88c824761ebe2e3ba0ed85b5e6503f1694502841
[linux-2.6.git] / arch / arm / mach-tegra / board-enterprise.c
1 /*
2  * arch/arm/mach-tegra/board-enterprise.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA CORPORATION. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/delay.h>
31 #include <linux/i2c-tegra.h>
32 #include <linux/gpio.h>
33 #include <linux/input.h>
34 #include <linux/platform_data/tegra_usb.h>
35 #include <linux/spi/spi.h>
36 #include <linux/tegra_uart.h>
37 #include <linux/fsl_devices.h>
38 #include <linux/i2c/atmel_mxt_ts.h>
39 #include <linux/memblock.h>
40 #include <linux/rfkill-gpio.h>
41 #include <linux/mfd/tlv320aic3262-registers.h>
42 #include <linux/mfd/tlv320aic3262-core.h>
43
44 #include <linux/nfc/pn544.h>
45 #include <sound/max98088.h>
46
47 #include <mach/clk.h>
48 #include <mach/iomap.h>
49 #include <mach/irqs.h>
50 #include <mach/pinmux.h>
51 #include <mach/iomap.h>
52 #include <mach/io.h>
53 #include <mach/io_dpd.h>
54 #include <asm/mach-types.h>
55 #include <asm/mach/arch.h>
56 #include <mach/usb_phy.h>
57 #include <mach/i2s.h>
58 #include <mach/tegra_asoc_pdata.h>
59 #include <mach/thermal.h>
60 #include <mach/tegra-bb-power.h>
61 #include <mach/tegra_fiq_debugger.h>
62 #include "board.h"
63 #include "clock.h"
64 #include "board-enterprise.h"
65 #include "baseband-xmm-power.h"
66 #include "devices.h"
67 #include "gpio-names.h"
68 #include "fuse.h"
69 #include "pm.h"
70
71 static struct balanced_throttle throttle_list[] = {
72         {
73                 .id = BALANCED_THROTTLE_ID_TJ,
74                 .throt_tab_size = 10,
75                 .throt_tab = {
76                         {      0, 1000 },
77                         { 640000, 1000 },
78                         { 640000, 1000 },
79                         { 640000, 1000 },
80                         { 640000, 1000 },
81                         { 640000, 1000 },
82                         { 760000, 1000 },
83                         { 760000, 1050 },
84                         {1000000, 1050 },
85                         {1000000, 1100 },
86                 },
87         },
88 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
89         {
90                 .id = BALANCED_THROTTLE_ID_SKIN,
91                 .throt_tab_size = 6,
92                 .throt_tab = {
93                         { 640000, 1200 },
94                         { 640000, 1200 },
95                         { 760000, 1200 },
96                         { 760000, 1200 },
97                         {1000000, 1200 },
98                         {1000000, 1200 },
99                 },
100         },
101 #endif
102 };
103
104 /* All units are in millicelsius */
105 static struct tegra_thermal_data thermal_data = {
106         .shutdown_device_id = THERMAL_DEVICE_ID_NCT_EXT,
107         .temp_shutdown = 90000,
108 #if defined(CONFIG_TEGRA_EDP_LIMITS) || defined(CONFIG_TEGRA_THERMAL_THROTTLE)
109         .throttle_edp_device_id = THERMAL_DEVICE_ID_NCT_EXT,
110 #endif
111 #ifdef CONFIG_TEGRA_EDP_LIMITS
112         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
113         .hysteresis_edp = 3000,
114 #endif
115 #ifdef CONFIG_TEGRA_THERMAL_THROTTLE
116         .temp_throttle = 85000,
117         .tc1 = 0,
118         .tc2 = 1,
119         .passive_delay = 2000,
120 #endif
121 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
122         .skin_device_id = THERMAL_DEVICE_ID_SKIN,
123         .temp_throttle_skin = 43000,
124 #endif
125 };
126
127 static struct rfkill_gpio_platform_data enterprise_bt_rfkill_pdata[] = {
128         {
129                 .name           = "bt_rfkill",
130                 .shutdown_gpio  = TEGRA_GPIO_PE6,
131                 .reset_gpio     = TEGRA_GPIO_INVALID,
132                 .type           = RFKILL_TYPE_BLUETOOTH,
133         },
134 };
135
136 static struct platform_device enterprise_bt_rfkill_device = {
137         .name = "rfkill_gpio",
138         .id             = -1,
139         .dev = {
140                 .platform_data = &enterprise_bt_rfkill_pdata,
141         },
142 };
143
144 static struct resource enterprise_bluesleep_resources[] = {
145         [0] = {
146                 .name = "gpio_host_wake",
147                         .start  = TEGRA_GPIO_PS2,
148                         .end    = TEGRA_GPIO_PS2,
149                         .flags  = IORESOURCE_IO,
150         },
151         [1] = {
152                 .name = "gpio_ext_wake",
153                         .start  = TEGRA_GPIO_PE7,
154                         .end    = TEGRA_GPIO_PE7,
155                         .flags  = IORESOURCE_IO,
156         },
157         [2] = {
158                 .name = "host_wake",
159                         .start  = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PS2),
160                         .end    = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PS2),
161                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
162         },
163 };
164
165 static struct platform_device enterprise_bluesleep_device = {
166         .name           = "bluesleep",
167         .id             = -1,
168         .num_resources  = ARRAY_SIZE(enterprise_bluesleep_resources),
169         .resource       = enterprise_bluesleep_resources,
170 };
171
172 static void __init enterprise_setup_bluesleep(void)
173 {
174         platform_device_register(&enterprise_bluesleep_device);
175         return;
176 }
177
178 static __initdata struct tegra_clk_init_table enterprise_clk_init_table[] = {
179         /* name         parent          rate            enabled */
180         { "pll_m",      NULL,           0,              false},
181         { "hda",        "pll_p",        108000000,      false},
182         { "hda2codec_2x","pll_p",       48000000,       false},
183         { "pwm",        "pll_p",        3187500,        false},
184         { "blink",      "clk_32k",      32768,          true},
185         { "i2s0",       "pll_a_out0",   0,              false},
186         { "i2s1",       "pll_a_out0",   0,              false},
187         { "i2s3",       "pll_a_out0",   0,              false},
188         { "spdif_out",  "pll_a_out0",   0,              false},
189         { "d_audio",    "clk_m",        12000000,       false},
190         { "dam0",       "clk_m",        12000000,       false},
191         { "dam1",       "clk_m",        12000000,       false},
192         { "dam2",       "clk_m",        12000000,       false},
193         { "audio0",     "i2s0_sync",    0,              false},
194         { "audio1",     "i2s1_sync",    0,              false},
195         { "audio2",     "i2s2_sync",    0,              false},
196         { "audio3",     "i2s3_sync",    0,              false},
197         { "vi",         "pll_p",        0,              false},
198         { "vi_sensor",  "pll_p",        0,              false},
199         { "i2c5",       "pll_p",        3200000,        false},
200         { NULL,         NULL,           0,              0},
201 };
202
203 static __initdata struct tegra_clk_init_table enterprise_clk_i2s2_table[] = {
204         /* name         parent          rate            enabled */
205         { "i2s2",       "pll_a_out0",   0,              false},
206         { NULL,         NULL,           0,              0},
207 };
208
209 static __initdata struct tegra_clk_init_table enterprise_clk_i2s4_table[] = {
210         /* name         parent          rate            enabled */
211         { "i2s4",       "pll_a_out0",   0,              false},
212         { NULL,         NULL,           0,              0},
213 };
214
215 static struct aic3262_gpio_setup aic3262_gpio[] = {
216         /* GPIO 1*/
217         {
218                 .used           = 1,
219                 .in             = 0,
220                 .value          = AIC3262_GPIO1_FUNC_INT1_OUTPUT ,
221         },
222         /* GPIO 2*/
223         {
224                 .used           = 1,
225                 .in             = 0,
226                 .value          = AIC3262_GPIO2_FUNC_ADC_MOD_CLK_OUTPUT,
227         },
228         /* GPIO 1 */
229         {
230                 .used           = 0,
231         },
232         {// GPI2
233                 .used           = 1,
234                 .in             = 1,
235                 .in_reg         = AIC3262_DMIC_INPUT_CNTL,
236                 .in_reg_bitmask = AIC3262_DMIC_CONFIGURE_MASK,
237                 .in_reg_shift   = AIC3262_DMIC_CONFIGURE_SHIFT,
238                 .value          = AIC3262_DMIC_GPI2_LEFT_GPI2_RIGHT,
239         },
240         {// GPO1
241                 .used           = 0,
242                 .value          = AIC3262_GPO1_FUNC_DISABLED,
243         },
244 };
245
246 static struct aic3262_pdata aic3262_codec_pdata = {
247         .gpio_irq       = 1,
248         .gpio           = aic3262_gpio,
249         .naudint_irq    = TEGRA_GPIO_HP_DET,
250         .irq_base       = AIC3262_CODEC_IRQ_BASE,
251 };
252
253 static struct tegra_i2c_platform_data enterprise_i2c1_platform_data = {
254         .adapter_nr     = 0,
255         .bus_count      = 1,
256         .bus_clk_rate   = { 100000, 0 },
257         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
258         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
259         .arb_recovery = arb_lost_recovery,
260 };
261
262 static struct tegra_i2c_platform_data enterprise_i2c2_platform_data = {
263         .adapter_nr     = 1,
264         .bus_count      = 1,
265         .bus_clk_rate   = { 400000, 0 },
266         .is_clkon_always = true,
267         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
268         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
269         .arb_recovery = arb_lost_recovery,
270 };
271
272 static struct tegra_i2c_platform_data enterprise_i2c3_platform_data = {
273         .adapter_nr     = 2,
274         .bus_count      = 1,
275         .bus_clk_rate   = { 271000, 0 },
276         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
277         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
278         .arb_recovery = arb_lost_recovery,
279 };
280
281 static struct tegra_i2c_platform_data enterprise_i2c4_platform_data = {
282         .adapter_nr     = 3,
283         .bus_count      = 1,
284         .bus_clk_rate   = { 10000, 0 },
285         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
286         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
287         .arb_recovery = arb_lost_recovery,
288 };
289
290 static struct tegra_i2c_platform_data enterprise_i2c5_platform_data = {
291         .adapter_nr     = 4,
292         .bus_count      = 1,
293         .bus_clk_rate   = { 390000, 0 },
294         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
295         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
296         .arb_recovery = arb_lost_recovery,
297 };
298
299 /* Equalizer filter coefs generated from the MAXIM MAX98088
300  * evkit software tool */
301 static struct max98088_eq_cfg max98088_eq_cfg[] = {
302         {
303                 .name = "FLAT",
304                 .rate = 44100,
305                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
306                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
307                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
308                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
309                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
310         },
311         {
312                 .name = "LOWPASS1K",
313                 .rate = 44100,
314                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
315                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
316                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
317                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
318                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
319         },
320         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
321                 .name = "HIBOOST",
322                 .rate = 44100,
323                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
324                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
325                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
326                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
327                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
328         },
329         { /* BASS=12dB, TREBLE=+12dB */
330                 .name = "LOUD12DB",
331                 .rate = 44100,
332                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
333                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
334                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
335                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
336                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
337         },
338         {
339                 .name = "FLAT",
340                 .rate = 16000,
341                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
342                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
343                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
344                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
345                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
346         },
347         {
348                 .name = "LOWPASS1K",
349                 .rate = 16000,
350                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
351                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
352                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
353                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
354                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
355         },
356         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
357                 .name = "HIBOOST",
358                 .rate = 16000,
359                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
360                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
361                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
362                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
363                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
364         },
365         { /* BASS=12dB, TREBLE=+12dB */
366                 .name = "LOUD12DB",
367                 .rate = 16000,
368                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
369                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
370                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
371                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
372                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
373         },
374 };
375
376
377 static struct max98088_pdata enterprise_max98088_pdata = {
378         /* equalizer configuration */
379         .eq_cfg = max98088_eq_cfg,
380         .eq_cfgcnt = ARRAY_SIZE(max98088_eq_cfg),
381
382         /* debounce time */
383         .debounce_time_ms = 200,
384
385         /* microphone configuration */
386         .digmic_left_mode = 1,
387         .digmic_right_mode = 1,
388
389         /* receiver output configuration */
390         .receiver_mode = 0,     /* 0 = amplifier, 1 = line output */
391 };
392
393 static struct pn544_i2c_platform_data nfc_pdata = {
394                 .irq_gpio = TEGRA_GPIO_PS4,
395                 .ven_gpio = TEGRA_GPIO_PM6,
396                 .firm_gpio = 0,
397 };
398
399
400 static struct i2c_board_info __initdata max98088_board_info = {
401         I2C_BOARD_INFO("max98088", 0x10),
402         .platform_data = &enterprise_max98088_pdata,
403         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_HP_DET),
404 };
405
406 static struct i2c_board_info __initdata enterprise_codec_aic326x_info = {
407         I2C_BOARD_INFO("tlv320aic3262", 0x18),
408         .platform_data = &aic3262_codec_pdata,
409         .irq = TEGRA_GPIO_HP_DET,
410 };
411
412 static struct i2c_board_info __initdata nfc_board_info = {
413         I2C_BOARD_INFO("pn544", 0x28),
414         .platform_data = &nfc_pdata,
415         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PS4),
416 };
417
418 static void enterprise_i2c_init(void)
419 {
420         tegra_i2c_device1.dev.platform_data = &enterprise_i2c1_platform_data;
421         tegra_i2c_device2.dev.platform_data = &enterprise_i2c2_platform_data;
422         tegra_i2c_device3.dev.platform_data = &enterprise_i2c3_platform_data;
423         tegra_i2c_device4.dev.platform_data = &enterprise_i2c4_platform_data;
424         tegra_i2c_device5.dev.platform_data = &enterprise_i2c5_platform_data;
425
426         platform_device_register(&tegra_i2c_device5);
427         platform_device_register(&tegra_i2c_device4);
428         platform_device_register(&tegra_i2c_device3);
429         platform_device_register(&tegra_i2c_device2);
430         platform_device_register(&tegra_i2c_device1);
431
432         i2c_register_board_info(0, &max98088_board_info, 1);
433         i2c_register_board_info(0, &enterprise_codec_aic326x_info, 1);
434         i2c_register_board_info(0, &nfc_board_info, 1);
435 }
436
437 static struct platform_device *enterprise_uart_devices[] __initdata = {
438         &tegra_uarta_device,
439         &tegra_uartb_device,
440         &tegra_uartc_device,
441         &tegra_uartd_device,
442         &tegra_uarte_device,
443 };
444
445 static struct uart_clk_parent uart_parent_clk[] = {
446         [0] = {.name = "clk_m"},
447         [1] = {.name = "pll_p"},
448 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
449         [2] = {.name = "pll_m"},
450 #endif
451 };
452 static struct tegra_uart_platform_data enterprise_uart_pdata;
453 static struct tegra_uart_platform_data enterprise_loopback_uart_pdata;
454
455 static void __init uart_debug_init(void)
456 {
457         unsigned long rate;
458         struct clk *c;
459
460         /* UARTD is the debug port. */
461         pr_info("Selecting UARTD as the debug console\n");
462         enterprise_uart_devices[3] = &debug_uartd_device;
463         debug_uart_port_base = ((struct plat_serial8250_port *)(
464                         debug_uartd_device.dev.platform_data))->mapbase;
465         debug_uart_clk = clk_get_sys("serial8250.0", "uartd");
466
467         /* Clock enable for the debug channel */
468         if (!IS_ERR_OR_NULL(debug_uart_clk)) {
469                 rate = ((struct plat_serial8250_port *)(
470                         debug_uartd_device.dev.platform_data))->uartclk;
471                 pr_info("The debug console clock name is %s\n",
472                                                 debug_uart_clk->name);
473                 c = tegra_get_clock_by_name("pll_p");
474                 if (IS_ERR_OR_NULL(c))
475                         pr_err("Not getting the parent clock pll_p\n");
476                 else
477                         clk_set_parent(debug_uart_clk, c);
478
479                 clk_enable(debug_uart_clk);
480                 clk_set_rate(debug_uart_clk, rate);
481         } else {
482                 pr_err("Not getting the clock %s for debug console\n",
483                                 debug_uart_clk->name);
484         }
485 }
486
487 static void __init enterprise_uart_init(void)
488 {
489         int i;
490         struct clk *c;
491
492         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
493                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
494                 if (IS_ERR_OR_NULL(c)) {
495                         pr_err("Not able to get the clock for %s\n",
496                                                 uart_parent_clk[i].name);
497                         continue;
498                 }
499                 uart_parent_clk[i].parent_clk = c;
500                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
501         }
502         enterprise_uart_pdata.parent_clk_list = uart_parent_clk;
503         enterprise_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
504         enterprise_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
505         enterprise_loopback_uart_pdata.parent_clk_count =
506                                                 ARRAY_SIZE(uart_parent_clk);
507         enterprise_loopback_uart_pdata.is_loopback = true;
508         tegra_uarta_device.dev.platform_data = &enterprise_uart_pdata;
509         tegra_uartb_device.dev.platform_data = &enterprise_uart_pdata;
510         tegra_uartc_device.dev.platform_data = &enterprise_uart_pdata;
511         tegra_uartd_device.dev.platform_data = &enterprise_uart_pdata;
512         /* UARTE is used for loopback test purpose */
513         tegra_uarte_device.dev.platform_data = &enterprise_loopback_uart_pdata;
514
515         /* Register low speed only if it is selected */
516         if (!is_tegra_debug_uartport_hs())
517                 uart_debug_init();
518
519         platform_add_devices(enterprise_uart_devices,
520                                 ARRAY_SIZE(enterprise_uart_devices));
521 }
522
523 static struct resource tegra_rtc_resources[] = {
524         [0] = {
525                 .start = TEGRA_RTC_BASE,
526                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
527                 .flags = IORESOURCE_MEM,
528         },
529         [1] = {
530                 .start = INT_RTC,
531                 .end = INT_RTC,
532                 .flags = IORESOURCE_IRQ,
533         },
534 };
535
536 static struct platform_device tegra_rtc_device = {
537         .name = "tegra_rtc",
538         .id   = -1,
539         .resource = tegra_rtc_resources,
540         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
541 };
542
543 static struct platform_device tegra_camera = {
544         .name = "tegra_camera",
545         .id = -1,
546 };
547
548 static struct tegra_asoc_platform_data enterprise_audio_pdata = {
549         .gpio_spkr_en           = -1,
550         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
551         .gpio_hp_mute           = -1,
552         .gpio_int_mic_en        = -1,
553         .gpio_ext_mic_en        = -1,
554         .debounce_time_hp       = -1,
555         /*defaults for Enterprise board*/
556         .i2s_param[HIFI_CODEC]  = {
557                 .audio_port_id  = 0,
558                 .is_i2s_master  = 0,
559                 .i2s_mode       = TEGRA_DAIFMT_I2S,
560                 .sample_size    = 16,
561         },
562         .i2s_param[BASEBAND]    = {
563                 .is_i2s_master  = 1,
564                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
565                 .sample_size    = 16,
566                 .rate           = 8000,
567                 .channels       = 1,
568         },
569         .i2s_param[BT_SCO]      = {
570                 .audio_port_id  = 3,
571                 .is_i2s_master  = 1,
572                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
573                 .sample_size    = 16,
574         },
575 };
576
577 static struct platform_device enterprise_audio_device = {
578         .name   = "tegra-snd-max98088",
579         .id     = 0,
580         .dev    = {
581                 .platform_data  = &enterprise_audio_pdata,
582         },
583 };
584
585 static struct tegra_asoc_platform_data enterprise_audio_aic326x_pdata = {
586         .gpio_spkr_en           = -1,
587         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
588         .gpio_hp_mute           = -1,
589         .gpio_int_mic_en        = -1,
590         .gpio_ext_mic_en        = -1,
591         /*defaults for Verbier-Enterprise (E1197) board with TI AIC326X codec*/
592         .i2s_param[HIFI_CODEC]  = {
593                 .audio_port_id  = 0,
594                 .is_i2s_master  = 1,
595                 .i2s_mode       = TEGRA_DAIFMT_I2S,
596                 .sample_size    = 16,
597         },
598         .i2s_param[BASEBAND]    = {
599                 .audio_port_id  = 2,
600                 .is_i2s_master  = 1,
601                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
602                 .sample_size    = 16,
603                 .rate           = 8000,
604                 .channels       = 1,
605         },
606         .i2s_param[BT_SCO]      = {
607                 .sample_size    = 16,
608                 .audio_port_id  = 3,
609                 .is_i2s_master  = 1,
610                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
611         },
612 };
613
614 static struct platform_device enterprise_audio_aic326x_device = {
615         .name   = "tegra-snd-aic326x",
616         .id     = 0,
617         .dev    = {
618                 .platform_data  = &enterprise_audio_aic326x_pdata,
619         },
620 };
621
622 static struct platform_device *enterprise_devices[] __initdata = {
623         &tegra_pmu_device,
624         &tegra_rtc_device,
625         &tegra_udc_device,
626 #if defined(CONFIG_TEGRA_IOVMM_SMMU) || defined(CONFIG_TEGRA_IOMMU_SMMU)
627         &tegra_smmu_device,
628 #endif
629         &tegra_wdt0_device,
630         &tegra_wdt1_device,
631         &tegra_wdt2_device,
632 #if defined(CONFIG_TEGRA_AVP)
633         &tegra_avp_device,
634 #endif
635         &tegra_camera,
636         &enterprise_bt_rfkill_device,
637         &tegra_spi_device4,
638         &tegra_hda_device,
639 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
640         &tegra_se_device,
641 #endif
642 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
643         &tegra_aes_device,
644 #endif
645 };
646
647 #define MXT_CONFIG_CRC 0x62F903
648 /*
649  * Config converted from memory-mapped cfg-file with
650  * following version information:
651  *
652  *
653  *
654  *      FAMILY_ID=128
655  *      VARIANT=1
656  *      VERSION=32
657  *      BUILD=170
658  *      VENDOR_ID=255
659  *      PRODUCT_ID=TBD
660  *      CHECKSUM=0xC189B6
661  *
662  *
663  */
664
665 static const u8 config[] = {
666         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
667         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x05, 0x01, 0x00,
668         0x00, 0x1E, 0x0A, 0x8B, 0x00, 0x00, 0x13, 0x0B,
669         0x00, 0x10, 0x32, 0x03, 0x03, 0x00, 0x03, 0x01,
670         0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xBF, 0x03, 0x1B,
671         0x02, 0x00, 0x00, 0x37, 0x37, 0x00, 0x00, 0x00,
672         0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
673         0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
674         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
675         0x00, 0x00, 0x00, 0xA9, 0x7F, 0x9A, 0x0E, 0x00,
676         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
677         0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00,
678         0x00, 0x00, 0x03, 0x23, 0x00, 0x00, 0x00, 0x0A,
679         0x0F, 0x14, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00,
680         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
681         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
682         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
683         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
684         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
685         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
686         0x00, 0x00, 0x00, 0x01, 0x00, 0x03, 0x08, 0x10,
687         0x00
688 };
689
690 static struct mxt_platform_data atmel_mxt_info = {
691         .x_line         = 19,
692         .y_line         = 11,
693         .x_size         = 960,
694         .y_size         = 540,
695         .blen           = 0x10,
696         .threshold      = 0x32,
697         .voltage        = 3300000,              /* 3.3V */
698         .orient         = 3,
699         .config         = config,
700         .config_length  = 168,
701         .config_crc     = MXT_CONFIG_CRC,
702         .irqflags       = IRQF_TRIGGER_FALLING,
703 /*      .read_chg       = &read_chg, */
704         .read_chg       = NULL,
705 };
706
707 static struct i2c_board_info __initdata atmel_i2c_info[] = {
708         {
709                 I2C_BOARD_INFO("atmel_mxt_ts", MXT224_I2C_ADDR1),
710                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PH6),
711                 .platform_data = &atmel_mxt_info,
712         }
713 };
714
715 static int __init enterprise_touch_init(void)
716 {
717         gpio_request(TEGRA_GPIO_PH6, "atmel-irq");
718         gpio_direction_input(TEGRA_GPIO_PH6);
719
720         gpio_request(TEGRA_GPIO_PF5, "atmel-reset");
721         gpio_direction_output(TEGRA_GPIO_PF5, 0);
722         msleep(1);
723         gpio_set_value(TEGRA_GPIO_PF5, 1);
724         msleep(100);
725
726         i2c_register_board_info(1, atmel_i2c_info, 1);
727
728         return 0;
729 }
730
731 static void enterprise_usb_hsic_postsupend(void)
732 {
733         pr_debug("%s\n", __func__);
734 #ifdef CONFIG_TEGRA_BB_XMM_POWER
735         baseband_xmm_set_power_status(BBXMM_PS_L2);
736 #endif
737 }
738
739 static void enterprise_usb_hsic_preresume(void)
740 {
741         pr_debug("%s\n", __func__);
742 #ifdef CONFIG_TEGRA_BB_XMM_POWER
743         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
744 #endif
745 }
746
747 static void enterprise_usb_hsic_phy_power(void)
748 {
749         pr_debug("%s\n", __func__);
750 #ifdef CONFIG_TEGRA_BB_XMM_POWER
751         baseband_xmm_set_power_status(BBXMM_PS_L0);
752 #endif
753 }
754
755 static void enterprise_usb_hsic_post_phy_off(void)
756 {
757         pr_debug("%s\n", __func__);
758 #ifdef CONFIG_TEGRA_BB_XMM_POWER
759         baseband_xmm_set_power_status(BBXMM_PS_L2);
760 #endif
761 }
762
763 static struct tegra_usb_phy_platform_ops hsic_xmm_plat_ops = {
764         .post_suspend = enterprise_usb_hsic_postsupend,
765         .pre_resume = enterprise_usb_hsic_preresume,
766         .port_power = enterprise_usb_hsic_phy_power,
767         .post_phy_on = enterprise_usb_hsic_phy_power,
768         .post_phy_off = enterprise_usb_hsic_post_phy_off,
769 };
770
771 static struct tegra_usb_platform_data tegra_ehci2_hsic_xmm_pdata = {
772         .port_otg = false,
773         .has_hostpc = true,
774         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
775         .op_mode        = TEGRA_USB_OPMODE_HOST,
776         .u_data.host = {
777                 .vbus_gpio = -1,
778                 .hot_plug = false,
779                 .remote_wakeup_supported = false,
780                 .power_off_on_suspend = false,
781         },
782         .ops = &hsic_xmm_plat_ops,
783 };
784
785 static struct tegra_usb_platform_data tegra_udc_pdata = {
786         .port_otg = true,
787         .has_hostpc = true,
788         .builtin_host_disabled = true,
789         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
790         .op_mode = TEGRA_USB_OPMODE_DEVICE,
791         .u_data.dev = {
792                 .vbus_pmu_irq = ENT_TPS80031_IRQ_BASE +
793                                 TPS80031_INT_VBUS_DET,
794                 .vbus_gpio = -1,
795                 .charging_supported = false,
796                 .remote_wakeup_supported = false,
797         },
798         .u_cfg.utmi = {
799                 .hssync_start_delay = 0,
800                 .elastic_limit = 16,
801                 .idle_wait_delay = 17,
802                 .term_range_adj = 6,
803                 .xcvr_setup = 8,
804                 .xcvr_lsfslew = 2,
805                 .xcvr_lsrslew = 2,
806                 .xcvr_setup_offset = 0,
807                 .xcvr_use_fuses = 1,
808         },
809 };
810
811 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
812         .port_otg = true,
813         .has_hostpc = true,
814         .builtin_host_disabled = true,
815         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
816         .op_mode = TEGRA_USB_OPMODE_HOST,
817         .u_data.host = {
818                 .vbus_gpio = -1,
819                 .vbus_reg = "usb_vbus",
820                 .hot_plug = true,
821                 .remote_wakeup_supported = true,
822                 .power_off_on_suspend = true,
823         },
824         .u_cfg.utmi = {
825                 .hssync_start_delay = 0,
826                 .elastic_limit = 16,
827                 .idle_wait_delay = 17,
828                 .term_range_adj = 6,
829                 .xcvr_setup = 15,
830                 .xcvr_lsfslew = 2,
831                 .xcvr_lsrslew = 2,
832                 .xcvr_setup_offset = 0,
833                 .xcvr_use_fuses = 1,
834         },
835 };
836
837 static struct tegra_usb_otg_data tegra_otg_pdata = {
838         .ehci_device = &tegra_ehci1_device,
839         .ehci_pdata = &tegra_ehci1_utmi_pdata,
840 };
841
842 struct platform_device *tegra_usb_hsic_host_register(void)
843 {
844         struct platform_device *pdev;
845         int val;
846
847         pdev = platform_device_alloc(tegra_ehci2_device.name,
848                 tegra_ehci2_device.id);
849         if (!pdev)
850                 return NULL;
851
852         val = platform_device_add_resources(pdev, tegra_ehci2_device.resource,
853                 tegra_ehci2_device.num_resources);
854         if (val)
855                 goto error;
856
857         pdev->dev.dma_mask =  tegra_ehci2_device.dev.dma_mask;
858         pdev->dev.coherent_dma_mask = tegra_ehci2_device.dev.coherent_dma_mask;
859
860         val = platform_device_add_data(pdev, &tegra_ehci2_hsic_xmm_pdata,
861                         sizeof(struct tegra_usb_platform_data));
862         if (val)
863                 goto error;
864
865         val = platform_device_add(pdev);
866         if (val)
867                 goto error;
868
869         return pdev;
870
871 error:
872         pr_err("%s: failed to add the host contoller device\n", __func__);
873         platform_device_put(pdev);
874         return NULL;
875 }
876
877 void tegra_usb_hsic_host_unregister(struct platform_device **platdev)
878 {
879         struct platform_device *pdev = *platdev;
880
881         if (pdev && &pdev->dev) {
882                 platform_device_unregister(pdev);
883                 *platdev = NULL;
884         } else
885                 pr_err("%s: no platform device\n", __func__);
886 }
887
888 static void enterprise_usb_init(void)
889 {
890         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
891
892         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
893         platform_device_register(&tegra_otg_device);
894 }
895
896 static struct platform_device *enterprise_audio_devices[] __initdata = {
897         &tegra_ahub_device,
898         &tegra_dam_device0,
899         &tegra_dam_device1,
900         &tegra_dam_device2,
901         &tegra_i2s_device0,
902         &tegra_i2s_device1,
903         &tegra_i2s_device3,
904         &tegra_spdif_device,
905         &spdif_dit_device,
906         &bluetooth_dit_device,
907         &baseband_dit_device,
908         &tegra_pcm_device,
909         &enterprise_audio_device,
910         &enterprise_audio_aic326x_device,
911 };
912
913 static void enterprise_audio_init(void)
914 {
915         struct board_info board_info;
916
917         tegra_get_board_info(&board_info);
918
919         if (board_info.board_id == BOARD_E1239) {
920                 enterprise_audio_aic326x_pdata.i2s_param[BASEBAND].
921                                         audio_port_id = 4;
922                 enterprise_audio_aic326x_pdata.i2s_param[BASEBAND].
923                                         i2s_mode        = TEGRA_DAIFMT_I2S;
924                 enterprise_audio_aic326x_pdata.i2s_param[BASEBAND].
925                                         channels        = 2;
926                 platform_device_register(&tegra_i2s_device4);
927         } else {
928                 if (board_info.board_id == BOARD_E1197)
929                         enterprise_audio_pdata.i2s_param[HIFI_CODEC].
930                                         audio_port_id = 1;
931                 else if (board_info.fab == BOARD_FAB_A04) {
932                         enterprise_audio_pdata.i2s_param[BASEBAND].
933                                         audio_port_id = 4;
934                         platform_device_register(&tegra_i2s_device4);
935                 } else {
936                         enterprise_audio_pdata.i2s_param[BASEBAND].
937                                         audio_port_id = 2;
938                         platform_device_register(&tegra_i2s_device2);
939                 }
940
941         }
942         platform_add_devices(enterprise_audio_devices,
943                 ARRAY_SIZE(enterprise_audio_devices));
944 }
945
946
947 static struct baseband_power_platform_data tegra_baseband_power_data = {
948         .baseband_type = BASEBAND_XMM,
949         .modem = {
950                 .xmm = {
951                         .bb_rst = XMM_GPIO_BB_RST,
952                         .bb_on = XMM_GPIO_BB_ON,
953                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
954                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
955                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
956                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
957                 },
958         },
959 };
960
961 static struct platform_device tegra_baseband_power_device = {
962         .name = "baseband_xmm_power",
963         .id = -1,
964         .dev = {
965                 .platform_data = &tegra_baseband_power_data,
966         },
967 };
968
969 static struct platform_device tegra_baseband_power2_device = {
970         .name = "baseband_xmm_power2",
971         .id = -1,
972         .dev = {
973                 .platform_data = &tegra_baseband_power_data,
974         },
975 };
976
977 #ifdef CONFIG_TEGRA_BB_M7400
978 static union tegra_bb_gpio_id m7400_gpio_id = {
979         .m7400 = {
980                 .pwr_status = GPIO_BB_RESET,
981                 .pwr_on = GPIO_BB_PWRON,
982                 .uart_awr = GPIO_BB_APACK,
983                 .uart_cwr = GPIO_BB_CPACK,
984                 .usb_awr = GPIO_BB_APACK2,
985                 .usb_cwr = GPIO_BB_CPACK2,
986                 .service = GPIO_BB_RSVD2,
987                 .resout2 = GPIO_BB_RSVD1,
988         },
989 };
990
991 static struct tegra_bb_pdata m7400_pdata = {
992         .id = &m7400_gpio_id,
993         .device = &tegra_ehci2_device,
994         .ehci_register = tegra_usb_hsic_host_register,
995         .ehci_unregister = tegra_usb_hsic_host_unregister,
996         .bb_id = TEGRA_BB_M7400,
997 };
998
999 static struct platform_device tegra_baseband_m7400_device = {
1000         .name = "tegra_baseband_power",
1001         .id = -1,
1002         .dev = {
1003                 .platform_data = &m7400_pdata,
1004         },
1005 };
1006 #endif
1007
1008 static void enterprise_baseband_init(void)
1009 {
1010         struct board_info board_info;
1011
1012         int modem_id = tegra_get_modem_id();
1013
1014         tegra_get_board_info(&board_info);
1015
1016         switch (modem_id) {
1017         case TEGRA_BB_PH450: /* PH450 ULPI */
1018                 enterprise_modem_init();
1019                 break;
1020         case TEGRA_BB_XMM6260: /* XMM6260 HSIC */
1021                 /* baseband-power.ko will register ehci2 device */
1022                 tegra_ehci2_device.dev.platform_data =
1023                                         &tegra_ehci2_hsic_xmm_pdata;
1024                 tegra_baseband_power_data.hsic_register =
1025                                                 &tegra_usb_hsic_host_register;
1026                 tegra_baseband_power_data.hsic_unregister =
1027                                                 &tegra_usb_hsic_host_unregister;
1028                 if ((board_info.board_id == BOARD_E1239) &&
1029                         (board_info.fab <= BOARD_FAB_A02)) {
1030                         tegra_baseband_power_data.modem.
1031                                 xmm.ipc_hsic_active  = BB_GPIO_LCD_PWR2;
1032                         tegra_baseband_power_data.modem.
1033                                 xmm.ipc_hsic_sus_req = BB_GPIO_LCD_PWR1;
1034                 }
1035                 platform_device_register(&tegra_baseband_power_device);
1036                 platform_device_register(&tegra_baseband_power2_device);
1037                 break;
1038 #ifdef CONFIG_TEGRA_BB_M7400
1039         case TEGRA_BB_M7400: /* M7400 HSIC */
1040                 tegra_ehci2_hsic_xmm_pdata.u_data.host.power_off_on_suspend = 0;
1041                 tegra_ehci2_device.dev.platform_data
1042                         = &tegra_ehci2_hsic_xmm_pdata;
1043                 platform_device_register(&tegra_baseband_m7400_device);
1044                 break;
1045 #endif
1046         }
1047 }
1048 static void enterprise_nfc_init(void)
1049 {
1050         struct board_info bi;
1051
1052         /* Enable firmware GPIO PX7 for board E1205 */
1053         tegra_get_board_info(&bi);
1054         if (bi.board_id == BOARD_E1205 && bi.fab >= BOARD_FAB_A03) {
1055                 nfc_pdata.firm_gpio = TEGRA_GPIO_PX7;
1056         } else if (bi.board_id == BOARD_E1239) {
1057                 nfc_pdata.firm_gpio = TEGRA_GPIO_PN6;
1058         }
1059 }
1060
1061 static void __init tegra_enterprise_init(void)
1062 {
1063         struct board_info board_info;
1064         tegra_get_board_info(&board_info);
1065         if (board_info.fab == BOARD_FAB_A04)
1066                 tegra_clk_init_from_table(enterprise_clk_i2s4_table);
1067         else
1068                 tegra_clk_init_from_table(enterprise_clk_i2s2_table);
1069
1070         tegra_thermal_init(&thermal_data,
1071                                 throttle_list,
1072                                 ARRAY_SIZE(throttle_list));
1073         tegra_clk_init_from_table(enterprise_clk_init_table);
1074         enterprise_pinmux_init();
1075         enterprise_i2c_init();
1076         enterprise_uart_init();
1077         enterprise_usb_init();
1078         if (board_info.board_id == BOARD_E1239)
1079                 enterprise_bt_rfkill_pdata[0].shutdown_gpio = TEGRA_GPIO_PF4;
1080
1081         platform_add_devices(enterprise_devices, ARRAY_SIZE(enterprise_devices));
1082         tegra_ram_console_debug_init();
1083         enterprise_regulator_init();
1084         tegra_io_dpd_init();
1085         enterprise_sdhci_init();
1086 #ifdef CONFIG_TEGRA_EDP_LIMITS
1087         enterprise_edp_init();
1088 #endif
1089         enterprise_kbc_init();
1090         enterprise_nfc_init();
1091         enterprise_touch_init();
1092         enterprise_audio_init();
1093         enterprise_baseband_init();
1094         enterprise_panel_init();
1095         enterprise_setup_bluesleep();
1096         enterprise_emc_init();
1097         enterprise_sensors_init();
1098         enterprise_suspend_init();
1099         enterprise_bpc_mgmt_init();
1100         tegra_release_bootloader_fb();
1101         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1102 }
1103
1104 static void __init tegra_enterprise_reserve(void)
1105 {
1106 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1107         tegra_reserve(0, SZ_4M, SZ_8M);
1108 #else
1109         tegra_reserve(SZ_128M, SZ_4M, SZ_8M);
1110 #endif
1111         tegra_ram_console_debug_reserve(SZ_1M);
1112 }
1113
1114 static const char *enterprise_dt_board_compat[] = {
1115         "nvidia,enterprise",
1116         NULL
1117 };
1118
1119 MACHINE_START(TEGRA_ENTERPRISE, "tegra_enterprise")
1120         .boot_params    = 0x80000100,
1121         .map_io         = tegra_map_common_io,
1122         .reserve        = tegra_enterprise_reserve,
1123         .init_early     = tegra_init_early,
1124         .init_irq       = tegra_init_irq,
1125         .timer          = &tegra_timer,
1126         .init_machine   = tegra_enterprise_init,
1127         .dt_compat      = enterprise_dt_board_compat,
1128 MACHINE_END