arch/arm/mach-tegra/board-enterprise.c

   1 /*
   2  * arch/arm/mach-tegra/board-enterprise.c
   3  *
   4  * Copyright (c) 2011-2012, NVIDIA Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along
  17  * with this program; if not, write to the Free Software Foundation, Inc.,
  18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  19  */
  20
  21 #include <linux/kernel.h>
  22 #include <linux/init.h>
  23 #include <linux/slab.h>
  24 #include <linux/ctype.h>
  25 #include <linux/platform_device.h>
  26 #include <linux/clk.h>
  27 #include <linux/serial_8250.h>
  28 #include <linux/i2c.h>
  29 #include <linux/dma-mapping.h>
  30 #include <linux/delay.h>
  31 #include <linux/i2c-tegra.h>
  32 #include <linux/gpio.h>
  33 #include <linux/input.h>
  34 #include <linux/platform_data/tegra_usb.h>
  35 #include <linux/spi/spi.h>
  36 #include <linux/tegra_uart.h>
  37 #include <linux/fsl_devices.h>
  38 #include <linux/i2c/atmel_mxt_ts.h>
  39 #include <linux/memblock.h>
  40
  41 #include <linux/nfc/pn544.h>
  42 #include <sound/max98088.h>
  43
  44 #include <asm/hardware/gic.h>
  45
  46 #include <mach/clk.h>
  47 #include <mach/iomap.h>
  48 #include <mach/irqs.h>
  49 #include <mach/pinmux.h>
  50 #include <mach/iomap.h>
  51 #include <mach/io.h>
  52 #include <asm/mach-types.h>
  53 #include <asm/mach/arch.h>
  54 #include <mach/usb_phy.h>
  55 #include <mach/i2s.h>
  56 #include <mach/tegra_asoc_pdata.h>
  57 #include <mach/thermal.h>
  58 #include <mach/tegra-bb-power.h>
  59 #include <mach/gpio-tegra.h>
  60
  61 #include "board.h"
  62 #include "clock.h"
  63 #include "board-enterprise.h"
  64 #include "baseband-xmm-power.h"
  65 #include "devices.h"
  66 #include "gpio-names.h"
  67 #include "fuse.h"
  68 #include "pm.h"
  69
  70 /* All units are in millicelsius */
  71 static struct tegra_thermal_data thermal_data = {
  72         .temp_throttle = 85000,
  73         .temp_shutdown = 90000,
  74         .temp_offset = TDIODE_OFFSET, /* temps based on tdiode */
  75 #ifdef CONFIG_TEGRA_EDP_LIMITS
  76         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
  77         .hysteresis_edp = 3000,
  78 #endif
  79 #ifdef CONFIG_TEGRA_THERMAL_SYSFS
  80         .tc1 = 0,
  81         .tc2 = 1,
  82         .passive_delay = 2000,
  83 #else
  84         .hysteresis_throttle = 1000,
  85 #endif
  86 };
  87
  88 /* !!!TODO: Change for enterprise (Taken from Cardhu) */
  89 static struct tegra_utmip_config utmi_phy_config[] = {
  90         [0] = {
  91                         .hssync_start_delay = 0,
  92                         .idle_wait_delay = 17,
  93                         .elastic_limit = 16,
  94                         .term_range_adj = 6,
  95                         .xcvr_setup = 15,
  96                         .xcvr_setup_offset = 0,
  97                         .xcvr_use_fuses = 1,
  98                         .xcvr_lsfslew = 2,
  99                         .xcvr_lsrslew = 2,
 100         },
 101         [1] = {
 102                         .hssync_start_delay = 0,
 103                         .idle_wait_delay = 17,
 104                         .elastic_limit = 16,
 105                         .term_range_adj = 6,
 106                         .xcvr_setup = 15,
 107                         .xcvr_setup_offset = 0,
 108                         .xcvr_use_fuses = 1,
 109                         .xcvr_lsfslew = 2,
 110                         .xcvr_lsrslew = 2,
 111         },
 112         [2] = {
 113                         .hssync_start_delay = 0,
 114                         .idle_wait_delay = 17,
 115                         .elastic_limit = 16,
 116                         .term_range_adj = 6,
 117                         .xcvr_setup = 8,
 118                         .xcvr_setup_offset = 0,
 119                         .xcvr_use_fuses = 1,
 120                         .xcvr_lsfslew = 2,
 121                         .xcvr_lsrslew = 2,
 122         },
 123 };
 124
 125 static struct resource enterprise_bcm4329_rfkill_resources[] = {
 126         {
 127                 .name   = "bcm4329_nshutdown_gpio",
 128                 .start  = TEGRA_GPIO_PE6,
 129                 .end    = TEGRA_GPIO_PE6,
 130                 .flags  = IORESOURCE_IO,
 131         },
 132 };
 133
 134 static struct platform_device enterprise_bcm4329_rfkill_device = {
 135         .name = "bcm4329_rfkill",
 136         .id             = -1,
 137         .num_resources  = ARRAY_SIZE(enterprise_bcm4329_rfkill_resources),
 138         .resource       = enterprise_bcm4329_rfkill_resources,
 139 };
 140
 141 static struct resource enterprise_bluesleep_resources[] = {
 142         [0] = {
 143                 .name = "gpio_host_wake",
 144                         .start  = TEGRA_GPIO_PS2,
 145                         .end    = TEGRA_GPIO_PS2,
 146                         .flags  = IORESOURCE_IO,
 147         },
 148         [1] = {
 149                 .name = "gpio_ext_wake",
 150                         .start  = TEGRA_GPIO_PE7,
 151                         .end    = TEGRA_GPIO_PE7,
 152                         .flags  = IORESOURCE_IO,
 153         },
 154         [2] = {
 155                 .name = "host_wake",
 156                         .start  = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PS2),
 157                         .end    = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PS2),
 158                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 159         },
 160 };
 161
 162 static struct platform_device enterprise_bluesleep_device = {
 163         .name           = "bluesleep",
 164         .id             = -1,
 165         .num_resources  = ARRAY_SIZE(enterprise_bluesleep_resources),
 166         .resource       = enterprise_bluesleep_resources,
 167 };
 168
 169 static void __init enterprise_setup_bluesleep(void)
 170 {
 171         platform_device_register(&enterprise_bluesleep_device);
 172         tegra_gpio_enable(TEGRA_GPIO_PS2);
 173         tegra_gpio_enable(TEGRA_GPIO_PE7);
 174         return;
 175 }
 176
 177 static __initdata struct tegra_clk_init_table enterprise_clk_init_table[] = {
 178         /* name         parent          rate            enabled */
 179         { "pll_m",      NULL,           0,              false},
 180         { "hda",        "pll_p",        108000000,      false},
 181         { "hda2codec_2x","pll_p",       48000000,       false},
 182         { "pwm",        "clk_32k",      32768,          false},
 183         { "blink",      "clk_32k",      32768,          true},
 184         { "i2s0",       "pll_a_out0",   0,              false},
 185         { "i2s1",       "pll_a_out0",   0,              false},
 186         { "i2s2",       "pll_a_out0",   0,              false},
 187         { "i2s3",       "pll_a_out0",   0,              false},
 188         { "spdif_out",  "pll_a_out0",   0,              false},
 189         { "d_audio",    "clk_m",        12000000,       false},
 190         { "dam0",       "clk_m",        12000000,       false},
 191         { "dam1",       "clk_m",        12000000,       false},
 192         { "dam2",       "clk_m",        12000000,       false},
 193         { "audio0",     "i2s0_sync",    0,              false},
 194         { "audio1",     "i2s1_sync",    0,              false},
 195         { "audio2",     "i2s2_sync",    0,              false},
 196         { "audio3",     "i2s3_sync",    0,              false},
 197         { "vi",         "pll_p",        0,              false},
 198         { "vi_sensor",  "pll_p",        0,              false},
 199         { NULL,         NULL,           0,              0},
 200 };
 201
 202 static struct tegra_i2c_platform_data enterprise_i2c1_platform_data = {
 203         .adapter_nr     = 0,
 204         .bus_count      = 1,
 205         .bus_clk_rate   = { 100000, 0 },
 206         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
 207         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
 208         .arb_recovery = arb_lost_recovery,
 209 };
 210
 211 static struct tegra_i2c_platform_data enterprise_i2c2_platform_data = {
 212         .adapter_nr     = 1,
 213         .bus_count      = 1,
 214         .bus_clk_rate   = { 100000, 0 },
 215         .is_clkon_always = true,
 216         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
 217         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
 218         .arb_recovery = arb_lost_recovery,
 219 };
 220
 221 static struct tegra_i2c_platform_data enterprise_i2c3_platform_data = {
 222         .adapter_nr     = 2,
 223         .bus_count      = 1,
 224         .bus_clk_rate   = { 271000, 0 },
 225         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
 226         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
 227         .arb_recovery = arb_lost_recovery,
 228 };
 229
 230 static struct tegra_i2c_platform_data enterprise_i2c4_platform_data = {
 231         .adapter_nr     = 3,
 232         .bus_count      = 1,
 233         .bus_clk_rate   = { 100000, 0 },
 234         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
 235         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
 236         .arb_recovery = arb_lost_recovery,
 237 };
 238
 239 static struct tegra_i2c_platform_data enterprise_i2c5_platform_data = {
 240         .adapter_nr     = 4,
 241         .bus_count      = 1,
 242         .bus_clk_rate   = { 100000, 0 },
 243         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
 244         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
 245         .arb_recovery = arb_lost_recovery,
 246 };
 247
 248 /* Equalizer filter coefs generated from the MAXIM MAX98088
 249  * evkit software tool */
 250 static struct max98088_eq_cfg max98088_eq_cfg[] = {
 251         {
 252                 .name = "FLAT",
 253                 .rate = 44100,
 254                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
 255                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
 256                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
 257                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
 258                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
 259         },
 260         {
 261                 .name = "LOWPASS1K",
 262                 .rate = 44100,
 263                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
 264                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
 265                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
 266                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
 267                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
 268         },
 269         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
 270                 .name = "HIBOOST",
 271                 .rate = 44100,
 272                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
 273                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
 274                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
 275                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
 276                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
 277         },
 278         { /* BASS=12dB, TREBLE=+12dB */
 279                 .name = "LOUD12DB",
 280                 .rate = 44100,
 281                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
 282                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
 283                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
 284                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
 285                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
 286         },
 287         {
 288                 .name = "FLAT",
 289                 .rate = 16000,
 290                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
 291                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
 292                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
 293                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
 294                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
 295         },
 296         {
 297                 .name = "LOWPASS1K",
 298                 .rate = 16000,
 299                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
 300                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
 301                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
 302                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
 303                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
 304         },
 305         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
 306                 .name = "HIBOOST",
 307                 .rate = 16000,
 308                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
 309                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
 310                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
 311                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
 312                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
 313         },
 314         { /* BASS=12dB, TREBLE=+12dB */
 315                 .name = "LOUD12DB",
 316                 .rate = 16000,
 317                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
 318                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
 319                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
 320                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
 321                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
 322         },
 323 };
 324
 325
 326 static struct max98088_pdata enterprise_max98088_pdata = {
 327         /* equalizer configuration */
 328         .eq_cfg = max98088_eq_cfg,
 329         .eq_cfgcnt = ARRAY_SIZE(max98088_eq_cfg),
 330
 331         /* debounce time */
 332         .debounce_time_ms = 200,
 333
 334         /* microphone configuration */
 335         .digmic_left_mode = 1,
 336         .digmic_right_mode = 1,
 337
 338         /* receiver output configuration */
 339         .receiver_mode = 0,     /* 0 = amplifier, 1 = line output */
 340 };
 341
 342 static struct pn544_i2c_platform_data nfc_pdata = {
 343                 .irq_gpio = TEGRA_GPIO_PS4,
 344                 .ven_gpio = TEGRA_GPIO_PM6,
 345                 .firm_gpio = 0,
 346 };
 347
 348
 349 static struct i2c_board_info __initdata max98088_board_info = {
 350         I2C_BOARD_INFO("max98088", 0x10),
 351         .platform_data = &enterprise_max98088_pdata,
 352         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_HP_DET),
 353 };
 354
 355 static struct i2c_board_info __initdata enterprise_codec_aic326x_info = {
 356         I2C_BOARD_INFO("aic3262-codec", 0x18),
 357         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_HP_DET),
 358 };
 359
 360 static struct i2c_board_info __initdata nfc_board_info = {
 361         I2C_BOARD_INFO("pn544", 0x28),
 362         .platform_data = &nfc_pdata,
 363         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PS4),
 364 };
 365
 366 static void enterprise_i2c_init(void)
 367 {
 368         tegra_i2c_device1.dev.platform_data = &enterprise_i2c1_platform_data;
 369         tegra_i2c_device2.dev.platform_data = &enterprise_i2c2_platform_data;
 370         tegra_i2c_device3.dev.platform_data = &enterprise_i2c3_platform_data;
 371         tegra_i2c_device4.dev.platform_data = &enterprise_i2c4_platform_data;
 372         tegra_i2c_device5.dev.platform_data = &enterprise_i2c5_platform_data;
 373
 374         platform_device_register(&tegra_i2c_device5);
 375         platform_device_register(&tegra_i2c_device4);
 376         platform_device_register(&tegra_i2c_device3);
 377         platform_device_register(&tegra_i2c_device2);
 378         platform_device_register(&tegra_i2c_device1);
 379
 380         i2c_register_board_info(0, &max98088_board_info, 1);
 381         i2c_register_board_info(0, &enterprise_codec_aic326x_info, 1);
 382         i2c_register_board_info(0, &nfc_board_info, 1);
 383 }
 384
 385 static struct platform_device *enterprise_uart_devices[] __initdata = {
 386         &tegra_uarta_device,
 387         &tegra_uartb_device,
 388         &tegra_uartc_device,
 389         &tegra_uartd_device,
 390         &tegra_uarte_device,
 391 };
 392
 393 static struct uart_clk_parent uart_parent_clk[] = {
 394         [0] = {.name = "clk_m"},
 395         [1] = {.name = "pll_p"},
 396 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
 397         [2] = {.name = "pll_m"},
 398 #endif
 399 };
 400 static struct tegra_uart_platform_data enterprise_uart_pdata;
 401 static struct tegra_uart_platform_data enterprise_loopback_uart_pdata;
 402
 403 static void __init uart_debug_init(void)
 404 {
 405         unsigned long rate;
 406         struct clk *c;
 407
 408         /* UARTD is the debug port. */
 409         pr_info("Selecting UARTD as the debug console\n");
 410         enterprise_uart_devices[3] = &debug_uartd_device;
 411         debug_uart_port_base = ((struct plat_serial8250_port *)(
 412                         debug_uartd_device.dev.platform_data))->mapbase;
 413         debug_uart_clk = clk_get_sys("serial8250.0", "uartd");
 414
 415         /* Clock enable for the debug channel */
 416         if (!IS_ERR_OR_NULL(debug_uart_clk)) {
 417                 rate = ((struct plat_serial8250_port *)(
 418                         debug_uartd_device.dev.platform_data))->uartclk;
 419                 pr_info("The debug console clock name is %s\n",
 420                                                 debug_uart_clk->name);
 421                 c = tegra_get_clock_by_name("pll_p");
 422                 if (IS_ERR_OR_NULL(c))
 423                         pr_err("Not getting the parent clock pll_p\n");
 424                 else
 425                         clk_set_parent(debug_uart_clk, c);
 426
 427                 clk_enable(debug_uart_clk);
 428                 clk_set_rate(debug_uart_clk, rate);
 429         } else {
 430                 pr_err("Not getting the clock %s for debug console\n",
 431                                 debug_uart_clk->name);
 432         }
 433 }
 434
 435 static void __init enterprise_uart_init(void)
 436 {
 437         int i;
 438         struct clk *c;
 439
 440         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
 441                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
 442                 if (IS_ERR_OR_NULL(c)) {
 443                         pr_err("Not able to get the clock for %s\n",
 444                                                 uart_parent_clk[i].name);
 445                         continue;
 446                 }
 447                 uart_parent_clk[i].parent_clk = c;
 448                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
 449         }
 450         enterprise_uart_pdata.parent_clk_list = uart_parent_clk;
 451         enterprise_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
 452         enterprise_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
 453         enterprise_loopback_uart_pdata.parent_clk_count =
 454                                                 ARRAY_SIZE(uart_parent_clk);
 455         enterprise_loopback_uart_pdata.is_loopback = true;
 456         tegra_uarta_device.dev.platform_data = &enterprise_uart_pdata;
 457         tegra_uartb_device.dev.platform_data = &enterprise_uart_pdata;
 458         tegra_uartc_device.dev.platform_data = &enterprise_uart_pdata;
 459         tegra_uartd_device.dev.platform_data = &enterprise_uart_pdata;
 460         /* UARTE is used for loopback test purpose */
 461         tegra_uarte_device.dev.platform_data = &enterprise_loopback_uart_pdata;
 462
 463         /* Register low speed only if it is selected */
 464         if (!is_tegra_debug_uartport_hs())
 465                 uart_debug_init();
 466
 467         platform_add_devices(enterprise_uart_devices,
 468                                 ARRAY_SIZE(enterprise_uart_devices));
 469 }
 470
 471
 472
 473 static struct resource tegra_rtc_resources[] = {
 474         [0] = {
 475                 .start = TEGRA_RTC_BASE,
 476                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
 477                 .flags = IORESOURCE_MEM,
 478         },
 479         [1] = {
 480                 .start = INT_RTC,
 481                 .end = INT_RTC,
 482                 .flags = IORESOURCE_IRQ,
 483         },
 484 };
 485
 486 static struct platform_device tegra_rtc_device = {
 487         .name = "tegra_rtc",
 488         .id   = -1,
 489         .resource = tegra_rtc_resources,
 490         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
 491 };
 492
 493 static struct platform_device tegra_camera = {
 494         .name = "tegra_camera",
 495         .id = -1,
 496 };
 497
 498 static struct tegra_asoc_platform_data enterprise_audio_pdata = {
 499         .gpio_spkr_en           = -1,
 500         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
 501         .gpio_hp_mute           = -1,
 502         .gpio_int_mic_en        = -1,
 503         .gpio_ext_mic_en        = -1,
 504         .debounce_time_hp = -1,
 505         /*defaults for Enterprise board*/
 506         .audio_port_id          = {
 507                 [HIFI_CODEC] = 0,
 508                 [BASEBAND] = 2,
 509                 [BT_SCO] = 3,
 510         },
 511         .baseband_param         = {
 512                 .rate = 8000,
 513                 .channels = 1,
 514         },
 515 };
 516
 517 static struct platform_device enterprise_audio_device = {
 518         .name   = "tegra-snd-max98088",
 519         .id     = 0,
 520         .dev    = {
 521                 .platform_data  = &enterprise_audio_pdata,
 522         },
 523 };
 524
 525 static struct tegra_asoc_platform_data enterprise_audio_aic326x_pdata = {
 526         .gpio_spkr_en           = -1,
 527         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
 528         .gpio_hp_mute           = -1,
 529         .gpio_int_mic_en        = -1,
 530         .gpio_ext_mic_en        = -1,
 531         /*defaults for Verbier-Enterprise (E1197) board with TI AIC326X codec*/
 532         .audio_port_id          = {
 533                 [HIFI_CODEC] = 0,
 534                 [BASEBAND] = 2,
 535                 [BT_SCO] = 3,
 536         },
 537         .baseband_param         = {
 538                 .rate = 8000,
 539                 .channels = 1,
 540                 .bit_format = TEGRA_DAIFMT_DSP_A,
 541         },
 542 };
 543
 544 static struct platform_device enterprise_audio_aic326x_device = {
 545         .name   = "tegra-snd-aic326x",
 546         .id     = 0,
 547         .dev    = {
 548                 .platform_data  = &enterprise_audio_aic326x_pdata,
 549         },
 550 };
 551
 552 static struct platform_device *enterprise_devices[] __initdata = {
 553         &tegra_pmu_device,
 554         &tegra_rtc_device,
 555         &tegra_udc_device,
 556 #if defined(CONFIG_TEGRA_IOVMM_SMMU) || defined(CONFIG_TEGRA_IOMMU_SMMU)
 557         &tegra_smmu_device,
 558 #endif
 559         &tegra_wdt_device,
 560 #if defined(CONFIG_TEGRA_AVP)
 561         &tegra_avp_device,
 562 #endif
 563         &tegra_camera,
 564         &enterprise_bcm4329_rfkill_device,
 565         &tegra_spi_device4,
 566         &tegra_hda_device,
 567 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
 568         &tegra_se_device,
 569 #endif
 570 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
 571         &tegra_aes_device,
 572 #endif
 573 };
 574
 575 #define MXT_CONFIG_CRC 0x62F903
 576 /*
 577  * Config converted from memory-mapped cfg-file with
 578  * following version information:
 579  *
 580  *
 581  *
 582  *      FAMILY_ID=128
 583  *      VARIANT=1
 584  *      VERSION=32
 585  *      BUILD=170
 586  *      VENDOR_ID=255
 587  *      PRODUCT_ID=TBD
 588  *      CHECKSUM=0xC189B6
 589  *
 590  *
 591  */
 592
 593 static const u8 config[] = {
 594         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 595         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x05, 0x01, 0x00,
 596         0x00, 0x1E, 0x0A, 0x8B, 0x00, 0x00, 0x13, 0x0B,
 597         0x00, 0x10, 0x32, 0x03, 0x03, 0x00, 0x03, 0x01,
 598         0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xBF, 0x03, 0x1B,
 599         0x02, 0x00, 0x00, 0x37, 0x37, 0x00, 0x00, 0x00,
 600         0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 601         0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
 602         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 603         0x00, 0x00, 0x00, 0xA9, 0x7F, 0x9A, 0x0E, 0x00,
 604         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 605         0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00,
 606         0x00, 0x00, 0x03, 0x23, 0x00, 0x00, 0x00, 0x0A,
 607         0x0F, 0x14, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00,
 608         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 609         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 610         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 611         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 612         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 613         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 614         0x00, 0x00, 0x00, 0x01, 0x00, 0x03, 0x08, 0x10,
 615         0x00
 616 };
 617
 618 static struct mxt_platform_data atmel_mxt_info = {
 619         .x_line         = 19,
 620         .y_line         = 11,
 621         .x_size         = 960,
 622         .y_size         = 540,
 623         .blen           = 0x10,
 624         .threshold      = 0x32,
 625         .voltage        = 3300000,              /* 3.3V */
 626         .orient         = 3,
 627         .config         = config,
 628         .config_length  = 168,
 629         .config_crc     = MXT_CONFIG_CRC,
 630         .irqflags       = IRQF_TRIGGER_FALLING,
 631 /*      .read_chg       = &read_chg, */
 632         .read_chg       = NULL,
 633 };
 634
 635 static struct i2c_board_info __initdata atmel_i2c_info[] = {
 636         {
 637                 I2C_BOARD_INFO("atmel_mxt_ts", MXT224_I2C_ADDR1),
 638                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PH6),
 639                 .platform_data = &atmel_mxt_info,
 640         }
 641 };
 642
 643 static int __init enterprise_touch_init(void)
 644 {
 645         tegra_gpio_enable(TEGRA_GPIO_PH6);
 646         tegra_gpio_enable(TEGRA_GPIO_PF5);
 647
 648         gpio_request(TEGRA_GPIO_PH6, "atmel-irq");
 649         gpio_direction_input(TEGRA_GPIO_PH6);
 650
 651         gpio_request(TEGRA_GPIO_PF5, "atmel-reset");
 652         gpio_direction_output(TEGRA_GPIO_PF5, 0);
 653         msleep(1);
 654         gpio_set_value(TEGRA_GPIO_PF5, 1);
 655         msleep(100);
 656
 657         i2c_register_board_info(1, atmel_i2c_info, 1);
 658
 659         return 0;
 660 }
 661
 662 static struct usb_phy_plat_data tegra_usb_phy_pdata[] = {
 663         [0] = {
 664                         .instance = 0,
 665                         .vbus_gpio = -1,
 666                         .vbus_reg_supply = "usb_vbus",
 667                         .vbus_irq = ENT_TPS80031_IRQ_BASE +
 668                                                         TPS80031_INT_VBUS_DET,
 669         },
 670         [1] = {
 671                         .instance = 1,
 672                         .vbus_gpio = -1,
 673         },
 674         [2] = {
 675                         .instance = 2,
 676                         .vbus_gpio = -1,
 677         },
 678 };
 679
 680 static struct tegra_uhsic_config uhsic_phy_config = {
 681         .enable_gpio = -1,
 682         .reset_gpio = -1,
 683         .sync_start_delay = 9,
 684         .idle_wait_delay = 17,
 685         .term_range_adj = 0,
 686         .elastic_underrun_limit = 16,
 687         .elastic_overrun_limit = 16,
 688 };
 689
 690 static struct tegra_ehci_platform_data tegra_ehci_uhsic_pdata = {
 691         .phy_type = TEGRA_USB_PHY_TYPE_HSIC,
 692         .phy_config = &uhsic_phy_config,
 693         .operating_mode = TEGRA_USB_HOST,
 694         .power_down_on_bus_suspend = 1,
 695         .default_enable = true,
 696 };
 697
 698 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
 699         [0] = {
 700                         .phy_config = &utmi_phy_config[0],
 701                         .operating_mode = TEGRA_USB_HOST,
 702                         .power_down_on_bus_suspend = 1,
 703                         .default_enable = false,
 704         },
 705         [1] = {
 706                         .phy_config = &utmi_phy_config[1],
 707                         .operating_mode = TEGRA_USB_HOST,
 708                         .power_down_on_bus_suspend = 1,
 709                         .default_enable = false,
 710         },
 711         [2] = {
 712                         .phy_config = &utmi_phy_config[2],
 713                         .operating_mode = TEGRA_USB_HOST,
 714                         .power_down_on_bus_suspend = 1,
 715                         .default_enable = false,
 716         },
 717 };
 718
 719 static struct tegra_otg_platform_data tegra_otg_pdata = {
 720         .ehci_device = &tegra_ehci1_device,
 721         .ehci_pdata = &tegra_ehci_pdata[0],
 722 };
 723
 724 struct platform_device *tegra_usb_hsic_host_register(void)
 725 {
 726         struct platform_device *pdev;
 727         int val;
 728
 729         pdev = platform_device_alloc(tegra_ehci2_device.name,
 730                 tegra_ehci2_device.id);
 731         if (!pdev)
 732                 return NULL;
 733
 734         val = platform_device_add_resources(pdev, tegra_ehci2_device.resource,
 735                 tegra_ehci2_device.num_resources);
 736         if (val)
 737                 goto error;
 738
 739         pdev->dev.dma_mask =  tegra_ehci2_device.dev.dma_mask;
 740         pdev->dev.coherent_dma_mask = tegra_ehci2_device.dev.coherent_dma_mask;
 741
 742         val = platform_device_add_data(pdev, &tegra_ehci_uhsic_pdata,
 743                         sizeof(struct tegra_ehci_platform_data));
 744         if (val)
 745                 goto error;
 746
 747         val = platform_device_add(pdev);
 748         if (val)
 749                 goto error;
 750
 751         return pdev;
 752
 753 error:
 754         pr_err("%s: failed to add the host contoller device\n", __func__);
 755         platform_device_put(pdev);
 756         return NULL;
 757 }
 758
 759 void tegra_usb_hsic_host_unregister(struct platform_device *pdev)
 760 {
 761         platform_device_unregister(pdev);
 762 }
 763
 764 static int enterprise_usb_hsic_postsupend(void)
 765 {
 766         pr_debug("%s\n", __func__);
 767 #ifdef CONFIG_TEGRA_BB_XMM_POWER
 768         baseband_xmm_set_power_status(BBXMM_PS_L2);
 769 #endif
 770         return 0;
 771 }
 772
 773 static int enterprise_usb_hsic_preresume(void)
 774 {
 775         pr_debug("%s\n", __func__);
 776 #ifdef CONFIG_TEGRA_BB_XMM_POWER
 777         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
 778 #endif
 779         return 0;
 780 }
 781
 782 static int enterprise_usb_hsic_phy_ready(void)
 783 {
 784         pr_debug("%s\n", __func__);
 785 #ifdef CONFIG_TEGRA_BB_XMM_POWER
 786         baseband_xmm_set_power_status(BBXMM_PS_L0);
 787 #endif
 788         return 0;
 789 }
 790
 791 static int enterprise_usb_hsic_phy_off(void)
 792 {
 793         pr_debug("%s\n", __func__);
 794 #ifdef CONFIG_TEGRA_BB_XMM_POWER
 795         baseband_xmm_set_power_status(BBXMM_PS_L3);
 796 #endif
 797         return 0;
 798 }
 799
 800 static void enterprise_usb_init(void)
 801 {
 802         struct  fsl_usb2_platform_data *udc_pdata;
 803
 804         tegra_usb_phy_init(tegra_usb_phy_pdata, ARRAY_SIZE(tegra_usb_phy_pdata));
 805
 806         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
 807         platform_device_register(&tegra_otg_device);
 808
 809         udc_pdata = tegra_udc_device.dev.platform_data;
 810 }
 811
 812 static struct platform_device *enterprise_audio_devices[] __initdata = {
 813         &tegra_ahub_device,
 814         &tegra_dam_device0,
 815         &tegra_dam_device1,
 816         &tegra_dam_device2,
 817         &tegra_i2s_device0,
 818         &tegra_i2s_device1,
 819         &tegra_i2s_device2,
 820         &tegra_i2s_device3,
 821         &tegra_spdif_device,
 822         &spdif_dit_device,
 823         &bluetooth_dit_device,
 824         &baseband_dit_device,
 825         &tegra_pcm_device,
 826         &enterprise_audio_device,
 827         &enterprise_audio_aic326x_device,
 828 };
 829
 830 static void enterprise_audio_init(void)
 831 {
 832         struct board_info board_info;
 833
 834         tegra_get_board_info(&board_info);
 835
 836         if (board_info.board_id == BOARD_E1197)
 837                 enterprise_audio_pdata.audio_port_id[HIFI_CODEC] = 1;
 838
 839         platform_add_devices(enterprise_audio_devices,
 840                         ARRAY_SIZE(enterprise_audio_devices));
 841 }
 842
 843 static void enterprise_gps_init(void)
 844 {
 845         tegra_gpio_enable(TEGRA_GPIO_PE4);
 846         tegra_gpio_enable(TEGRA_GPIO_PE5);
 847 }
 848
 849 static struct baseband_power_platform_data tegra_baseband_power_data = {
 850         .baseband_type = BASEBAND_XMM,
 851         .modem = {
 852                 .xmm = {
 853                         .bb_rst = XMM_GPIO_BB_RST,
 854                         .bb_on = XMM_GPIO_BB_ON,
 855                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
 856                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
 857                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
 858                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
 859                 },
 860         },
 861 };
 862
 863 static struct platform_device tegra_baseband_power_device = {
 864         .name = "baseband_xmm_power",
 865         .id = -1,
 866         .dev = {
 867                 .platform_data = &tegra_baseband_power_data,
 868         },
 869 };
 870
 871 static struct platform_device tegra_baseband_power2_device = {
 872         .name = "baseband_xmm_power2",
 873         .id = -1,
 874         .dev = {
 875                 .platform_data = &tegra_baseband_power_data,
 876         },
 877 };
 878
 879 #ifdef CONFIG_TEGRA_BB_M7400
 880 static union tegra_bb_gpio_id m7400_gpio_id = {
 881         .m7400 = {
 882                 .pwr_status = GPIO_BB_RESET,
 883                 .pwr_on = GPIO_BB_PWRON,
 884                 .uart_awr = GPIO_BB_APACK,
 885                 .uart_cwr = GPIO_BB_CPACK,
 886                 .usb_awr = GPIO_BB_APACK2,
 887                 .usb_cwr = GPIO_BB_CPACK2,
 888                 .service = GPIO_BB_RSVD2,
 889                 .resout2 = GPIO_BB_RSVD1,
 890         },
 891 };
 892
 893 static struct tegra_bb_pdata m7400_pdata = {
 894         .id = &m7400_gpio_id,
 895         .device = &tegra_ehci2_device,
 896         .ehci_register = tegra_usb_hsic_host_register,
 897         .ehci_unregister = tegra_usb_hsic_host_unregister,
 898         .bb_id = TEGRA_BB_M7400,
 899 };
 900
 901 static struct platform_device tegra_baseband_m7400_device = {
 902         .name = "tegra_baseband_power",
 903         .id = -1,
 904         .dev = {
 905                 .platform_data = &m7400_pdata,
 906         },
 907 };
 908 #endif
 909
 910 static void enterprise_baseband_init(void)
 911 {
 912         int modem_id = tegra_get_modem_id();
 913
 914         switch (modem_id) {
 915         case TEGRA_BB_PH450: /* PH450 ULPI */
 916                 enterprise_modem_init();
 917                 break;
 918         case TEGRA_BB_XMM6260: /* XMM6260 HSIC */
 919                 /* xmm baseband - do not switch off phy during suspend */
 920                 tegra_ehci_uhsic_pdata.power_down_on_bus_suspend = 0;
 921                 uhsic_phy_config.postsuspend = enterprise_usb_hsic_postsupend;
 922                 uhsic_phy_config.preresume = enterprise_usb_hsic_preresume;
 923                 uhsic_phy_config.usb_phy_ready = enterprise_usb_hsic_phy_ready;
 924                 uhsic_phy_config.post_phy_off = enterprise_usb_hsic_phy_off;
 925                 /* enable XMM6260 baseband gpio(s) */
 926                 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
 927                         .mdm_reset);
 928                 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
 929                         .mdm_on);
 930                 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
 931                         .ap2mdm_ack);
 932                 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
 933                         .mdm2ap_ack);
 934                 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
 935                         .ap2mdm_ack2);
 936                 tegra_gpio_enable(tegra_baseband_power_data.modem.generic
 937                         .mdm2ap_ack2);
 938                 tegra_baseband_power_data.hsic_register =
 939                                                 &tegra_usb_hsic_host_register;
 940                 tegra_baseband_power_data.hsic_unregister =
 941                                                 &tegra_usb_hsic_host_unregister;
 942                 platform_device_register(&tegra_baseband_power_device);
 943                 platform_device_register(&tegra_baseband_power2_device);
 944                 break;
 945 #ifdef CONFIG_TEGRA_BB_M7400
 946         case TEGRA_BB_M7400: /* M7400 HSIC */
 947                 tegra_ehci_uhsic_pdata.power_down_on_bus_suspend = 0;
 948                 tegra_ehci2_device.dev.platform_data
 949                         = &tegra_ehci_uhsic_pdata;
 950                 platform_device_register(&tegra_baseband_m7400_device);
 951                 break;
 952 #endif
 953         }
 954 }
 955
 956 static void enterprise_nfc_init(void)
 957 {
 958         tegra_gpio_enable(TEGRA_GPIO_PS4);
 959         tegra_gpio_enable(TEGRA_GPIO_PM6);
 960 }
 961
 962 static void __init tegra_enterprise_init(void)
 963 {
 964         tegra_thermal_init(&thermal_data);
 965         tegra_clk_init_from_table(enterprise_clk_init_table);
 966         tegra_enable_pinmux();
 967         enterprise_pinmux_init();
 968         enterprise_i2c_init();
 969         enterprise_uart_init();
 970         enterprise_usb_init();
 971         platform_add_devices(enterprise_devices, ARRAY_SIZE(enterprise_devices));
 972         tegra_ram_console_debug_init();
 973         enterprise_regulator_init();
 974         enterprise_sdhci_init();
 975 #ifdef CONFIG_TEGRA_EDP_LIMITS
 976         enterprise_edp_init();
 977 #endif
 978         enterprise_kbc_init();
 979         enterprise_touch_init();
 980         enterprise_audio_init();
 981         enterprise_gps_init();
 982         enterprise_baseband_init();
 983         enterprise_panel_init();
 984         enterprise_setup_bluesleep();
 985         enterprise_emc_init();
 986         enterprise_sensors_init();
 987         enterprise_suspend_init();
 988         enterprise_bpc_mgmt_init();
 989         tegra_release_bootloader_fb();
 990         enterprise_nfc_init();
 991 }
 992
 993 static void __init tegra_enterprise_reserve(void)
 994 {
 995 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
 996         tegra_reserve(0, SZ_4M, SZ_8M);
 997 #else
 998         tegra_reserve(SZ_128M, SZ_4M, SZ_8M);
 999 #endif
1000         tegra_ram_console_debug_reserve(SZ_1M);
1001 }
1002
1003 MACHINE_START(TEGRA_ENTERPRISE, "tegra_enterprise")
1004         .atag_offset    = 0x100,
1005         .map_io         = tegra_map_common_io,
1006         .reserve        = tegra_enterprise_reserve,
1007         .init_early     = tegra30_init_early,
1008         .init_irq       = tegra_init_irq,
1009         .handle_irq     = gic_handle_irq,
1010         .timer          = &tegra_timer,
1011         .init_machine   = tegra_enterprise_init,
1012         .restart        = tegra_assert_system_reset,
1013 MACHINE_END