46666fbf67d7a95e6cc895df2871f878fb5b29a5
[linux-2.6.git] / arch / arm / mach-tegra / board-enterprise.c
1 /*
2  * arch/arm/mach-tegra/board-enterprise.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA CORPORATION. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/delay.h>
31 #include <linux/i2c-tegra.h>
32 #include <linux/gpio.h>
33 #include <linux/input.h>
34 #include <linux/platform_data/tegra_usb.h>
35 #include <linux/spi/spi.h>
36 #include <linux/tegra_uart.h>
37 #include <linux/fsl_devices.h>
38 #include <linux/i2c/atmel_mxt_ts.h>
39 #include <linux/memblock.h>
40 #include <linux/rfkill-gpio.h>
41 #include <linux/nfc/pn544.h>
42
43 #include <sound/max98088.h>
44
45 #include <asm/hardware/gic.h>
46
47 #include <mach/clk.h>
48 #include <mach/iomap.h>
49 #include <mach/irqs.h>
50 #include <mach/pinmux.h>
51 #include <mach/iomap.h>
52 #include <mach/io.h>
53 #include <mach/io_dpd.h>
54 #include <mach/usb_phy.h>
55 #include <mach/i2s.h>
56 #include <mach/tegra_asoc_pdata.h>
57 #include <mach/thermal.h>
58 #include <mach/tegra-bb-power.h>
59 #include <mach/gpio-tegra.h>
60 #include <mach/tegra_fiq_debugger.h>
61
62 #include <asm/mach-types.h>
63 #include <asm/hardware/gic.h>
64 #include <asm/mach/arch.h>
65
66 #include "board.h"
67 #include "clock.h"
68 #include "board-enterprise.h"
69 #include "baseband-xmm-power.h"
70 #include "devices.h"
71 #include "gpio-names.h"
72 #include "fuse.h"
73 #include "pm.h"
74 #include "common.h"
75
76 static struct balanced_throttle throttle_list[] = {
77         {
78                 .id = BALANCED_THROTTLE_ID_TJ,
79                 .throt_tab_size = 10,
80                 .throt_tab = {
81                         {      0, 1000 },
82                         { 640000, 1000 },
83                         { 640000, 1000 },
84                         { 640000, 1000 },
85                         { 640000, 1000 },
86                         { 640000, 1000 },
87                         { 760000, 1000 },
88                         { 760000, 1050 },
89                         {1000000, 1050 },
90                         {1000000, 1100 },
91                 },
92         },
93 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
94         {
95                 .id = BALANCED_THROTTLE_ID_SKIN,
96                 .throt_tab_size = 6,
97                 .throt_tab = {
98                         { 640000, 1200 },
99                         { 640000, 1200 },
100                         { 760000, 1200 },
101                         { 760000, 1200 },
102                         {1000000, 1200 },
103                         {1000000, 1200 },
104                 },
105         },
106 #endif
107 };
108
109 /* All units are in millicelsius */
110 static struct tegra_thermal_data thermal_data = {
111         .shutdown_device_id = THERMAL_DEVICE_ID_NCT_EXT,
112         .temp_shutdown = 90000,
113         .throttle_edp_device_id = THERMAL_DEVICE_ID_NCT_EXT,
114 #ifdef CONFIG_TEGRA_EDP_LIMITS
115         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
116         .hysteresis_edp = 3000,
117 #endif
118         .temp_throttle = 85000,
119         .tc1 = 0,
120         .tc2 = 1,
121         .passive_delay = 2000,
122 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
123         .skin_device_id = THERMAL_DEVICE_ID_SKIN,
124         .temp_throttle_skin = 43000,
125 #endif
126 };
127
128 static struct rfkill_gpio_platform_data enterprise_bt_rfkill_pdata[] = {
129         {
130                 .name           = "bt_rfkill",
131                 .shutdown_gpio  = TEGRA_GPIO_PE6,
132                 .reset_gpio     = TEGRA_GPIO_INVALID,
133                 .type           = RFKILL_TYPE_BLUETOOTH,
134         },
135 };
136
137 static struct platform_device enterprise_bt_rfkill_device = {
138         .name = "rfkill_gpio",
139         .id             = -1,
140         .dev = {
141                 .platform_data = &enterprise_bt_rfkill_pdata,
142         },
143 };
144
145 static struct resource enterprise_bluesleep_resources[] = {
146         [0] = {
147                 .name = "gpio_host_wake",
148                         .start  = TEGRA_GPIO_PS2,
149                         .end    = TEGRA_GPIO_PS2,
150                         .flags  = IORESOURCE_IO,
151         },
152         [1] = {
153                 .name = "gpio_ext_wake",
154                         .start  = TEGRA_GPIO_PE7,
155                         .end    = TEGRA_GPIO_PE7,
156                         .flags  = IORESOURCE_IO,
157         },
158         [2] = {
159                 .name = "host_wake",
160                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
161         },
162 };
163
164 static struct platform_device enterprise_bluesleep_device = {
165         .name           = "bluesleep",
166         .id             = -1,
167         .num_resources  = ARRAY_SIZE(enterprise_bluesleep_resources),
168         .resource       = enterprise_bluesleep_resources,
169 };
170
171 static void __init enterprise_setup_bluesleep(void)
172 {
173         enterprise_bluesleep_resources[2].start =
174                 enterprise_bluesleep_resources[2].end =
175                         gpio_to_irq(TEGRA_GPIO_PS2);
176         platform_device_register(&enterprise_bluesleep_device);
177         return;
178 }
179
180 static __initdata struct tegra_clk_init_table enterprise_clk_init_table[] = {
181         /* name         parent          rate            enabled */
182         { "pll_m",      NULL,           0,              false},
183         { "hda",        "pll_p",        108000000,      false},
184         { "hda2codec_2x","pll_p",       48000000,       false},
185         { "pwm",        "pll_p",        3187500,        false},
186         { "blink",      "clk_32k",      32768,          true},
187         { "i2s0",       "pll_a_out0",   0,              false},
188         { "i2s1",       "pll_a_out0",   0,              false},
189         { "i2s3",       "pll_a_out0",   0,              false},
190         { "spdif_out",  "pll_a_out0",   0,              false},
191         { "d_audio",    "clk_m",        12000000,       false},
192         { "dam0",       "clk_m",        12000000,       false},
193         { "dam1",       "clk_m",        12000000,       false},
194         { "dam2",       "clk_m",        12000000,       false},
195         { "audio0",     "i2s0_sync",    0,              false},
196         { "audio1",     "i2s1_sync",    0,              false},
197         { "audio2",     "i2s2_sync",    0,              false},
198         { "audio3",     "i2s3_sync",    0,              false},
199         { "vi",         "pll_p",        0,              false},
200         { "vi_sensor",  "pll_p",        0,              false},
201         { "i2c5",       "pll_p",        3200000,        false},
202         { NULL,         NULL,           0,              0},
203 };
204
205 static __initdata struct tegra_clk_init_table enterprise_clk_i2s2_table[] = {
206         /* name         parent          rate            enabled */
207         { "i2s2",       "pll_a_out0",   0,              false},
208         { NULL,         NULL,           0,              0},
209 };
210
211 static __initdata struct tegra_clk_init_table enterprise_clk_i2s4_table[] = {
212         /* name         parent          rate            enabled */
213         { "i2s4",       "pll_a_out0",   0,              false},
214         { NULL,         NULL,           0,              0},
215 };
216
217 static struct tegra_i2c_platform_data enterprise_i2c1_platform_data = {
218         .adapter_nr     = 0,
219         .bus_count      = 1,
220         .bus_clk_rate   = { 100000, 0 },
221         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
222         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
223         .arb_recovery = arb_lost_recovery,
224 };
225
226 static struct tegra_i2c_platform_data enterprise_i2c2_platform_data = {
227         .adapter_nr     = 1,
228         .bus_count      = 1,
229         .bus_clk_rate   = { 400000, 0 },
230         .is_clkon_always = true,
231         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
232         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
233         .arb_recovery = arb_lost_recovery,
234 };
235
236 static struct tegra_i2c_platform_data enterprise_i2c3_platform_data = {
237         .adapter_nr     = 2,
238         .bus_count      = 1,
239         .bus_clk_rate   = { 271000, 0 },
240         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
241         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
242         .arb_recovery = arb_lost_recovery,
243 };
244
245 static struct tegra_i2c_platform_data enterprise_i2c4_platform_data = {
246         .adapter_nr     = 3,
247         .bus_count      = 1,
248         .bus_clk_rate   = { 10000, 0 },
249         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
250         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
251         .arb_recovery = arb_lost_recovery,
252 };
253
254 static struct tegra_i2c_platform_data enterprise_i2c5_platform_data = {
255         .adapter_nr     = 4,
256         .bus_count      = 1,
257         .bus_clk_rate   = { 390000, 0 },
258         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
259         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
260         .arb_recovery = arb_lost_recovery,
261 };
262
263 /* Equalizer filter coefs generated from the MAXIM MAX98088
264  * evkit software tool */
265 static struct max98088_eq_cfg max98088_eq_cfg[] = {
266         {
267                 .name = "FLAT",
268                 .rate = 44100,
269                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
270                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
271                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
272                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
273                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
274         },
275         {
276                 .name = "LOWPASS1K",
277                 .rate = 44100,
278                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
279                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
280                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
281                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
282                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
283         },
284         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
285                 .name = "HIBOOST",
286                 .rate = 44100,
287                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
288                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
289                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
290                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
291                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
292         },
293         { /* BASS=12dB, TREBLE=+12dB */
294                 .name = "LOUD12DB",
295                 .rate = 44100,
296                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
297                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
298                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
299                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
300                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
301         },
302         {
303                 .name = "FLAT",
304                 .rate = 16000,
305                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
306                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
307                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
308                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
309                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
310         },
311         {
312                 .name = "LOWPASS1K",
313                 .rate = 16000,
314                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
315                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
316                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
317                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
318                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
319         },
320         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
321                 .name = "HIBOOST",
322                 .rate = 16000,
323                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
324                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
325                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
326                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
327                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
328         },
329         { /* BASS=12dB, TREBLE=+12dB */
330                 .name = "LOUD12DB",
331                 .rate = 16000,
332                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
333                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
334                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
335                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
336                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
337         },
338 };
339
340
341 static struct max98088_pdata enterprise_max98088_pdata = {
342         /* equalizer configuration */
343         .eq_cfg = max98088_eq_cfg,
344         .eq_cfgcnt = ARRAY_SIZE(max98088_eq_cfg),
345
346         /* debounce time */
347         .debounce_time_ms = 200,
348
349         /* microphone configuration */
350         .digmic_left_mode = 1,
351         .digmic_right_mode = 1,
352
353         /* receiver output configuration */
354         .receiver_mode = 0,     /* 0 = amplifier, 1 = line output */
355 };
356
357 static struct pn544_i2c_platform_data nfc_pdata = {
358                 .irq_gpio = TEGRA_GPIO_PS4,
359                 .ven_gpio = TEGRA_GPIO_PM6,
360                 .firm_gpio = 0,
361 };
362
363
364 static struct i2c_board_info __initdata max98088_board_info = {
365         I2C_BOARD_INFO("max98088", 0x10),
366         .platform_data = &enterprise_max98088_pdata,
367 };
368
369 static struct i2c_board_info __initdata enterprise_codec_aic326x_info = {
370         I2C_BOARD_INFO("aic3262-codec", 0x18),
371 };
372
373 static struct i2c_board_info __initdata nfc_board_info = {
374         I2C_BOARD_INFO("pn544", 0x28),
375         .platform_data = &nfc_pdata,
376 };
377
378 static void enterprise_i2c_init(void)
379 {
380         tegra_i2c_device1.dev.platform_data = &enterprise_i2c1_platform_data;
381         tegra_i2c_device2.dev.platform_data = &enterprise_i2c2_platform_data;
382         tegra_i2c_device3.dev.platform_data = &enterprise_i2c3_platform_data;
383         tegra_i2c_device4.dev.platform_data = &enterprise_i2c4_platform_data;
384         tegra_i2c_device5.dev.platform_data = &enterprise_i2c5_platform_data;
385
386         platform_device_register(&tegra_i2c_device5);
387         platform_device_register(&tegra_i2c_device4);
388         platform_device_register(&tegra_i2c_device3);
389         platform_device_register(&tegra_i2c_device2);
390         platform_device_register(&tegra_i2c_device1);
391
392         max98088_board_info.irq = enterprise_codec_aic326x_info.irq =
393                 gpio_to_irq(TEGRA_GPIO_HP_DET);
394         i2c_register_board_info(0, &max98088_board_info, 1);
395         i2c_register_board_info(0, &enterprise_codec_aic326x_info, 1);
396         nfc_board_info.irq = gpio_to_irq(TEGRA_GPIO_PS4);
397         i2c_register_board_info(0, &nfc_board_info, 1);
398 }
399
400 static struct platform_device *enterprise_uart_devices[] __initdata = {
401         &tegra_uarta_device,
402         &tegra_uartb_device,
403         &tegra_uartc_device,
404         &tegra_uartd_device,
405         &tegra_uarte_device,
406 };
407
408 static struct uart_clk_parent uart_parent_clk[] = {
409         [0] = {.name = "clk_m"},
410         [1] = {.name = "pll_p"},
411 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
412         [2] = {.name = "pll_m"},
413 #endif
414 };
415 static struct tegra_uart_platform_data enterprise_uart_pdata;
416 static struct tegra_uart_platform_data enterprise_loopback_uart_pdata;
417
418 static void __init uart_debug_init(void)
419 {
420         unsigned long rate;
421         struct clk *c;
422
423         /* UARTD is the debug port. */
424         pr_info("Selecting UARTD as the debug console\n");
425         enterprise_uart_devices[3] = &debug_uartd_device;
426         debug_uart_port_base = ((struct plat_serial8250_port *)(
427                         debug_uartd_device.dev.platform_data))->mapbase;
428         debug_uart_clk = clk_get_sys("serial8250.0", "uartd");
429
430         /* Clock enable for the debug channel */
431         if (!IS_ERR_OR_NULL(debug_uart_clk)) {
432                 rate = ((struct plat_serial8250_port *)(
433                         debug_uartd_device.dev.platform_data))->uartclk;
434                 pr_info("The debug console clock name is %s\n",
435                                                 debug_uart_clk->name);
436                 c = tegra_get_clock_by_name("pll_p");
437                 if (IS_ERR_OR_NULL(c))
438                         pr_err("Not getting the parent clock pll_p\n");
439                 else
440                         clk_set_parent(debug_uart_clk, c);
441
442                 clk_enable(debug_uart_clk);
443                 clk_set_rate(debug_uart_clk, rate);
444         } else {
445                 pr_err("Not getting the clock %s for debug console\n",
446                                 debug_uart_clk->name);
447         }
448 }
449
450 static void __init enterprise_uart_init(void)
451 {
452         int i;
453         struct clk *c;
454
455         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
456                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
457                 if (IS_ERR_OR_NULL(c)) {
458                         pr_err("Not able to get the clock for %s\n",
459                                                 uart_parent_clk[i].name);
460                         continue;
461                 }
462                 uart_parent_clk[i].parent_clk = c;
463                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
464         }
465         enterprise_uart_pdata.parent_clk_list = uart_parent_clk;
466         enterprise_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
467         enterprise_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
468         enterprise_loopback_uart_pdata.parent_clk_count =
469                                                 ARRAY_SIZE(uart_parent_clk);
470         enterprise_loopback_uart_pdata.is_loopback = true;
471         tegra_uarta_device.dev.platform_data = &enterprise_uart_pdata;
472         tegra_uartb_device.dev.platform_data = &enterprise_uart_pdata;
473         tegra_uartc_device.dev.platform_data = &enterprise_uart_pdata;
474         tegra_uartd_device.dev.platform_data = &enterprise_uart_pdata;
475         /* UARTE is used for loopback test purpose */
476         tegra_uarte_device.dev.platform_data = &enterprise_loopback_uart_pdata;
477
478         /* Register low speed only if it is selected */
479         if (!is_tegra_debug_uartport_hs())
480                 uart_debug_init();
481
482         platform_add_devices(enterprise_uart_devices,
483                                 ARRAY_SIZE(enterprise_uart_devices));
484 }
485
486 static struct resource tegra_rtc_resources[] = {
487         [0] = {
488                 .start = TEGRA_RTC_BASE,
489                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
490                 .flags = IORESOURCE_MEM,
491         },
492         [1] = {
493                 .start = INT_RTC,
494                 .end = INT_RTC,
495                 .flags = IORESOURCE_IRQ,
496         },
497 };
498
499 static struct platform_device tegra_rtc_device = {
500         .name = "tegra_rtc",
501         .id   = -1,
502         .resource = tegra_rtc_resources,
503         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
504 };
505
506 static struct platform_device tegra_camera = {
507         .name = "tegra_camera",
508         .id = -1,
509 };
510
511 static struct tegra_asoc_platform_data enterprise_audio_pdata = {
512         .gpio_spkr_en           = -1,
513         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
514         .gpio_hp_mute           = -1,
515         .gpio_int_mic_en        = -1,
516         .gpio_ext_mic_en        = -1,
517         .debounce_time_hp       = -1,
518         /*defaults for Enterprise board*/
519         .i2s_param[HIFI_CODEC]  = {
520                 .audio_port_id  = 0,
521                 .is_i2s_master  = 1,
522                 .i2s_mode       = TEGRA_DAIFMT_I2S,
523                 .sample_size    = 16,
524         },
525         .i2s_param[BASEBAND]    = {
526                 .audio_port_id  = 2,
527                 .is_i2s_master  = 1,
528                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
529                 .sample_size    = 16,
530                 .rate           = 8000,
531                 .channels       = 1,
532         },
533         .i2s_param[BT_SCO]      = {
534                 .audio_port_id  = 3,
535                 .is_i2s_master  = 1,
536                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
537                 .sample_size    = 16,
538         },
539 };
540
541 static struct platform_device enterprise_audio_device = {
542         .name   = "tegra-snd-max98088",
543         .id     = 0,
544         .dev    = {
545                 .platform_data  = &enterprise_audio_pdata,
546         },
547 };
548
549 static struct tegra_asoc_platform_data enterprise_audio_aic326x_pdata = {
550         .gpio_spkr_en           = -1,
551         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
552         .gpio_hp_mute           = -1,
553         .gpio_int_mic_en        = -1,
554         .gpio_ext_mic_en        = -1,
555         /*defaults for Verbier-Enterprise (E1197) board with TI AIC326X codec*/
556         .i2s_param[HIFI_CODEC]  = {
557                 .audio_port_id  = 0,
558                 .is_i2s_master  = 1,
559                 .i2s_mode       = TEGRA_DAIFMT_I2S,
560                 .sample_size    = 16,
561         },
562         .i2s_param[BASEBAND]    = {
563                 .audio_port_id  = 2,
564                 .is_i2s_master  = 1,
565                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
566                 .sample_size    = 16,
567                 .rate           = 8000,
568                 .channels       = 1,
569         },
570         .i2s_param[BT_SCO]      = {
571                 .sample_size    = 16,
572                 .audio_port_id  = 3,
573                 .is_i2s_master  = 1,
574                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
575         },
576 };
577
578 static struct platform_device enterprise_audio_aic326x_device = {
579         .name   = "tegra-snd-aic326x",
580         .id     = 0,
581         .dev    = {
582                 .platform_data  = &enterprise_audio_aic326x_pdata,
583         },
584 };
585
586 static struct platform_device *enterprise_devices[] __initdata = {
587         &tegra_pmu_device,
588         &tegra_rtc_device,
589         &tegra_udc_device,
590         &tegra_wdt0_device,
591         &tegra_wdt1_device,
592         &tegra_wdt2_device,
593 #if defined(CONFIG_TEGRA_AVP)
594         &tegra_avp_device,
595 #endif
596         &tegra_camera,
597         &enterprise_bt_rfkill_device,
598         &tegra_spi_device4,
599         &tegra_hda_device,
600 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
601         &tegra_se_device,
602 #endif
603 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
604         &tegra_aes_device,
605 #endif
606 };
607
608 #define MXT_CONFIG_CRC 0x62F903
609 /*
610  * Config converted from memory-mapped cfg-file with
611  * following version information:
612  *
613  *
614  *
615  *      FAMILY_ID=128
616  *      VARIANT=1
617  *      VERSION=32
618  *      BUILD=170
619  *      VENDOR_ID=255
620  *      PRODUCT_ID=TBD
621  *      CHECKSUM=0xC189B6
622  *
623  *
624  */
625
626 static const u8 config[] = {
627         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
628         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x05, 0x01, 0x00,
629         0x00, 0x1E, 0x0A, 0x8B, 0x00, 0x00, 0x13, 0x0B,
630         0x00, 0x10, 0x32, 0x03, 0x03, 0x00, 0x03, 0x01,
631         0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xBF, 0x03, 0x1B,
632         0x02, 0x00, 0x00, 0x37, 0x37, 0x00, 0x00, 0x00,
633         0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
634         0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
635         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
636         0x00, 0x00, 0x00, 0xA9, 0x7F, 0x9A, 0x0E, 0x00,
637         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
638         0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00,
639         0x00, 0x00, 0x03, 0x23, 0x00, 0x00, 0x00, 0x0A,
640         0x0F, 0x14, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00,
641         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
642         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
643         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
644         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
645         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
646         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
647         0x00, 0x00, 0x00, 0x01, 0x00, 0x03, 0x08, 0x10,
648         0x00
649 };
650
651 static struct mxt_platform_data atmel_mxt_info = {
652         .x_line         = 19,
653         .y_line         = 11,
654         .x_size         = 960,
655         .y_size         = 540,
656         .blen           = 0x10,
657         .threshold      = 0x32,
658         .voltage        = 3300000,              /* 3.3V */
659         .orient         = 3,
660         .config         = config,
661         .config_length  = 168,
662         .config_crc     = MXT_CONFIG_CRC,
663         .irqflags       = IRQF_TRIGGER_FALLING,
664 /*      .read_chg       = &read_chg, */
665         .read_chg       = NULL,
666 };
667
668 static struct i2c_board_info __initdata atmel_i2c_info[] = {
669         {
670                 I2C_BOARD_INFO("atmel_mxt_ts", MXT224_I2C_ADDR1),
671                 .platform_data = &atmel_mxt_info,
672         }
673 };
674
675 static int __init enterprise_touch_init(void)
676 {
677         gpio_request(TEGRA_GPIO_PH6, "atmel-irq");
678         gpio_direction_input(TEGRA_GPIO_PH6);
679
680         gpio_request(TEGRA_GPIO_PF5, "atmel-reset");
681         gpio_direction_output(TEGRA_GPIO_PF5, 0);
682         msleep(1);
683         gpio_set_value(TEGRA_GPIO_PF5, 1);
684         msleep(100);
685
686         atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH6);
687         i2c_register_board_info(1, atmel_i2c_info, 1);
688
689         return 0;
690 }
691
692 static void enterprise_usb_hsic_postsupend(void)
693 {
694         pr_debug("%s\n", __func__);
695 #ifdef CONFIG_TEGRA_BB_XMM_POWER
696         baseband_xmm_set_power_status(BBXMM_PS_L2);
697 #endif
698 }
699
700 static void enterprise_usb_hsic_preresume(void)
701 {
702         pr_debug("%s\n", __func__);
703 #ifdef CONFIG_TEGRA_BB_XMM_POWER
704         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
705 #endif
706 }
707
708 static void enterprise_usb_hsic_phy_power(void)
709 {
710         pr_debug("%s\n", __func__);
711 #ifdef CONFIG_TEGRA_BB_XMM_POWER
712         baseband_xmm_set_power_status(BBXMM_PS_L0);
713 #endif
714 }
715
716 static void enterprise_usb_hsic_post_phy_off(void)
717 {
718         pr_debug("%s\n", __func__);
719 #ifdef CONFIG_TEGRA_BB_XMM_POWER
720         baseband_xmm_set_power_status(BBXMM_PS_L2);
721 #endif
722 }
723
724 static struct tegra_usb_phy_platform_ops hsic_xmm_plat_ops = {
725         .post_suspend = enterprise_usb_hsic_postsupend,
726         .pre_resume = enterprise_usb_hsic_preresume,
727         .port_power = enterprise_usb_hsic_phy_power,
728         .post_phy_on = enterprise_usb_hsic_phy_power,
729         .post_phy_off = enterprise_usb_hsic_post_phy_off,
730 };
731
732 static struct tegra_usb_platform_data tegra_ehci2_hsic_xmm_pdata = {
733         .port_otg = false,
734         .has_hostpc = true,
735         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
736         .op_mode        = TEGRA_USB_OPMODE_HOST,
737         .u_data.host = {
738                 .vbus_gpio = -1,
739                 .hot_plug = false,
740                 .remote_wakeup_supported = false,
741                 .power_off_on_suspend = false,
742         },
743         .ops = &hsic_xmm_plat_ops,
744 };
745
746 static struct tegra_usb_platform_data tegra_udc_pdata = {
747         .port_otg = true,
748         .has_hostpc = true,
749         .builtin_host_disabled = true,
750         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
751         .op_mode = TEGRA_USB_OPMODE_DEVICE,
752         .u_data.dev = {
753                 .vbus_pmu_irq = ENT_TPS80031_IRQ_BASE +
754                                 TPS80031_INT_VBUS_DET,
755                 .vbus_gpio = -1,
756                 .charging_supported = false,
757                 .remote_wakeup_supported = false,
758         },
759         .u_cfg.utmi = {
760                 .hssync_start_delay = 0,
761                 .elastic_limit = 16,
762                 .idle_wait_delay = 17,
763                 .term_range_adj = 6,
764                 .xcvr_setup = 8,
765                 .xcvr_lsfslew = 2,
766                 .xcvr_lsrslew = 2,
767                 .xcvr_setup_offset = 0,
768                 .xcvr_use_fuses = 1,
769         },
770 };
771
772 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
773         .port_otg = true,
774         .has_hostpc = true,
775         .builtin_host_disabled = true,
776         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
777         .op_mode = TEGRA_USB_OPMODE_HOST,
778         .u_data.host = {
779                 .vbus_gpio = -1,
780                 .vbus_reg = "usb_vbus",
781                 .hot_plug = true,
782                 .remote_wakeup_supported = true,
783                 .power_off_on_suspend = true,
784         },
785         .u_cfg.utmi = {
786                 .hssync_start_delay = 0,
787                 .elastic_limit = 16,
788                 .idle_wait_delay = 17,
789                 .term_range_adj = 6,
790                 .xcvr_setup = 15,
791                 .xcvr_lsfslew = 2,
792                 .xcvr_lsrslew = 2,
793                 .xcvr_setup_offset = 0,
794                 .xcvr_use_fuses = 1,
795         },
796 };
797
798 static struct tegra_usb_otg_data tegra_otg_pdata = {
799         .ehci_device = &tegra_ehci1_device,
800         .ehci_pdata = &tegra_ehci1_utmi_pdata,
801 };
802
803 struct platform_device *tegra_usb_hsic_host_register(void)
804 {
805         struct platform_device *pdev;
806         int val;
807
808         pdev = platform_device_alloc(tegra_ehci2_device.name,
809                 tegra_ehci2_device.id);
810         if (!pdev)
811                 return NULL;
812
813         val = platform_device_add_resources(pdev, tegra_ehci2_device.resource,
814                 tegra_ehci2_device.num_resources);
815         if (val)
816                 goto error;
817
818         pdev->dev.dma_mask =  tegra_ehci2_device.dev.dma_mask;
819         pdev->dev.coherent_dma_mask = tegra_ehci2_device.dev.coherent_dma_mask;
820
821         val = platform_device_add_data(pdev, &tegra_ehci2_hsic_xmm_pdata,
822                         sizeof(struct tegra_usb_platform_data));
823         if (val)
824                 goto error;
825
826         val = platform_device_add(pdev);
827         if (val)
828                 goto error;
829
830         return pdev;
831
832 error:
833         pr_err("%s: failed to add the host contoller device\n", __func__);
834         platform_device_put(pdev);
835         return NULL;
836 }
837
838 void tegra_usb_hsic_host_unregister(struct platform_device **platdev)
839 {
840         struct platform_device *pdev = *platdev;
841
842         if (pdev && &pdev->dev) {
843                 platform_device_unregister(pdev);
844                 *platdev = NULL;
845         } else
846                 pr_err("%s: no platform device\n", __func__);
847 }
848
849 static void enterprise_usb_init(void)
850 {
851         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
852
853         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
854         platform_device_register(&tegra_otg_device);
855 }
856
857 static struct platform_device *enterprise_audio_devices[] __initdata = {
858         &tegra_ahub_device,
859         &tegra_dam_device0,
860         &tegra_dam_device1,
861         &tegra_dam_device2,
862         &tegra_i2s_device0,
863         &tegra_i2s_device1,
864         &tegra_i2s_device3,
865         &tegra_spdif_device,
866         &spdif_dit_device,
867         &bluetooth_dit_device,
868         &baseband_dit_device,
869         &tegra_pcm_device,
870         &enterprise_audio_device,
871         &enterprise_audio_aic326x_device,
872 };
873
874 static void enterprise_audio_init(void)
875 {
876         struct board_info board_info;
877
878         tegra_get_board_info(&board_info);
879
880         if (board_info.board_id == BOARD_E1197)
881                 enterprise_audio_pdata.i2s_param[HIFI_CODEC].audio_port_id = 1;
882         else if (board_info.fab == BOARD_FAB_A04) {
883                 enterprise_audio_pdata.i2s_param[BASEBAND].audio_port_id = 4;
884                 platform_device_register(&tegra_i2s_device4);
885         } else {
886                 enterprise_audio_pdata.i2s_param[BASEBAND].audio_port_id = 2;
887                 platform_device_register(&tegra_i2s_device2);
888         }
889
890         platform_add_devices(enterprise_audio_devices,
891                         ARRAY_SIZE(enterprise_audio_devices));
892 }
893
894 static struct baseband_power_platform_data tegra_baseband_power_data = {
895         .baseband_type = BASEBAND_XMM,
896         .modem = {
897                 .xmm = {
898                         .bb_rst = XMM_GPIO_BB_RST,
899                         .bb_on = XMM_GPIO_BB_ON,
900                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
901                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
902                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
903                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
904                 },
905         },
906 };
907
908 static struct platform_device tegra_baseband_power_device = {
909         .name = "baseband_xmm_power",
910         .id = -1,
911         .dev = {
912                 .platform_data = &tegra_baseband_power_data,
913         },
914 };
915
916 static struct platform_device tegra_baseband_power2_device = {
917         .name = "baseband_xmm_power2",
918         .id = -1,
919         .dev = {
920                 .platform_data = &tegra_baseband_power_data,
921         },
922 };
923
924 #ifdef CONFIG_TEGRA_BB_M7400
925 static union tegra_bb_gpio_id m7400_gpio_id = {
926         .m7400 = {
927                 .pwr_status = GPIO_BB_RESET,
928                 .pwr_on = GPIO_BB_PWRON,
929                 .uart_awr = GPIO_BB_APACK,
930                 .uart_cwr = GPIO_BB_CPACK,
931                 .usb_awr = GPIO_BB_APACK2,
932                 .usb_cwr = GPIO_BB_CPACK2,
933                 .service = GPIO_BB_RSVD2,
934                 .resout2 = GPIO_BB_RSVD1,
935         },
936 };
937
938 static struct tegra_bb_pdata m7400_pdata = {
939         .id = &m7400_gpio_id,
940         .device = &tegra_ehci2_device,
941         .ehci_register = tegra_usb_hsic_host_register,
942         .ehci_unregister = tegra_usb_hsic_host_unregister,
943         .bb_id = TEGRA_BB_M7400,
944 };
945
946 static struct platform_device tegra_baseband_m7400_device = {
947         .name = "tegra_baseband_power",
948         .id = -1,
949         .dev = {
950                 .platform_data = &m7400_pdata,
951         },
952 };
953 #endif
954
955 static void enterprise_baseband_init(void)
956 {
957         int modem_id = tegra_get_modem_id();
958
959         switch (modem_id) {
960         case TEGRA_BB_PH450: /* PH450 ULPI */
961                 enterprise_modem_init();
962                 break;
963         case TEGRA_BB_XMM6260: /* XMM6260 HSIC */
964                 /* baseband-power.ko will register ehci2 device */
965                 tegra_ehci2_device.dev.platform_data =
966                                         &tegra_ehci2_hsic_xmm_pdata;
967                 tegra_baseband_power_data.hsic_register =
968                                                 &tegra_usb_hsic_host_register;
969                 tegra_baseband_power_data.hsic_unregister =
970                                                 &tegra_usb_hsic_host_unregister;
971
972                 platform_device_register(&tegra_baseband_power_device);
973                 platform_device_register(&tegra_baseband_power2_device);
974                 break;
975 #ifdef CONFIG_TEGRA_BB_M7400
976         case TEGRA_BB_M7400: /* M7400 HSIC */
977                 tegra_ehci2_hsic_xmm_pdata.u_data.host.power_off_on_suspend = 0;
978                 tegra_ehci2_device.dev.platform_data
979                         = &tegra_ehci2_hsic_xmm_pdata;
980                 platform_device_register(&tegra_baseband_m7400_device);
981                 break;
982 #endif
983         }
984 }
985 static void enterprise_nfc_init(void)
986 {
987         struct board_info bi;
988
989         /* Enable firmware GPIO PX7 for board E1205 */
990         tegra_get_board_info(&bi);
991         if (bi.board_id == BOARD_E1205 && bi.fab >= BOARD_FAB_A03) {
992                 nfc_pdata.firm_gpio = TEGRA_GPIO_PX7;
993         }
994 }
995
996 static void __init tegra_enterprise_init(void)
997 {
998         struct board_info board_info;
999         tegra_get_board_info(&board_info);
1000         if (board_info.fab == BOARD_FAB_A04)
1001                 tegra_clk_init_from_table(enterprise_clk_i2s4_table);
1002         else
1003                 tegra_clk_init_from_table(enterprise_clk_i2s2_table);
1004
1005         tegra_thermal_init(&thermal_data,
1006                                 throttle_list,
1007                                 ARRAY_SIZE(throttle_list));
1008         tegra_clk_init_from_table(enterprise_clk_init_table);
1009         tegra_enable_pinmux();
1010         tegra_smmu_init();
1011         enterprise_pinmux_init();
1012         enterprise_i2c_init();
1013         enterprise_uart_init();
1014         enterprise_usb_init();
1015         platform_add_devices(enterprise_devices, ARRAY_SIZE(enterprise_devices));
1016         tegra_ram_console_debug_init();
1017         enterprise_regulator_init();
1018         tegra_io_dpd_init();
1019         enterprise_sdhci_init();
1020 #ifdef CONFIG_TEGRA_EDP_LIMITS
1021         enterprise_edp_init();
1022 #endif
1023         enterprise_kbc_init();
1024         enterprise_nfc_init();
1025         enterprise_touch_init();
1026         enterprise_audio_init();
1027         enterprise_baseband_init();
1028         enterprise_panel_init();
1029         enterprise_setup_bluesleep();
1030         enterprise_emc_init();
1031         enterprise_sensors_init();
1032         enterprise_suspend_init();
1033         enterprise_bpc_mgmt_init();
1034         tegra_release_bootloader_fb();
1035         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1036 }
1037
1038 static void __init tegra_enterprise_reserve(void)
1039 {
1040 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1041         tegra_reserve(0, SZ_4M, SZ_8M);
1042 #else
1043         tegra_reserve(SZ_128M, SZ_4M, SZ_8M);
1044 #endif
1045         tegra_ram_console_debug_reserve(SZ_1M);
1046 }
1047
1048 static const char *enterprise_dt_board_compat[] = {
1049         "nvidia,enterprise",
1050         NULL
1051 };
1052
1053 MACHINE_START(TEGRA_ENTERPRISE, "tegra_enterprise")
1054         .atag_offset    = 0x100,
1055         .soc            = &tegra_soc_desc,
1056         .map_io         = tegra_map_common_io,
1057         .reserve        = tegra_enterprise_reserve,
1058         .init_early     = tegra30_init_early,
1059         .init_irq       = tegra_init_irq,
1060         .handle_irq     = gic_handle_irq,
1061         .timer          = &tegra_timer,
1062         .init_machine   = tegra_enterprise_init,
1063         .restart        = tegra_assert_system_reset,
1064         .dt_compat      = enterprise_dt_board_compat,
1065 MACHINE_END