Merge commit 'main-jb-2012.08.03-B4' into t114-0806
[linux-2.6.git] / arch / arm / mach-tegra / board-enterprise.c
1 /*
2  * arch/arm/mach-tegra/board-enterprise.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA CORPORATION. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/delay.h>
31 #include <linux/i2c-tegra.h>
32 #include <linux/gpio.h>
33 #include <linux/input.h>
34 #include <linux/platform_data/tegra_usb.h>
35 #include <linux/spi/spi.h>
36 #include <linux/tegra_uart.h>
37 #include <linux/fsl_devices.h>
38 #include <linux/i2c/atmel_mxt_ts.h>
39 #include <linux/memblock.h>
40 #include <linux/rfkill-gpio.h>
41 #include <linux/nfc/pn544.h>
42
43 #include <sound/max98088.h>
44
45 #include <asm/hardware/gic.h>
46
47 #include <mach/clk.h>
48 #include <mach/iomap.h>
49 #include <mach/irqs.h>
50 #include <mach/pinmux.h>
51 #include <mach/iomap.h>
52 #include <mach/io.h>
53 #include <mach/io_dpd.h>
54 #include <mach/usb_phy.h>
55 #include <mach/i2s.h>
56 #include <mach/tegra_asoc_pdata.h>
57 #include <mach/thermal.h>
58 #include <mach/tegra-bb-power.h>
59 #include <mach/gpio-tegra.h>
60 #include <mach/tegra_fiq_debugger.h>
61
62 #include <asm/mach-types.h>
63 #include <asm/hardware/gic.h>
64 #include <asm/mach/arch.h>
65
66 #include "board.h"
67 #include "clock.h"
68 #include "board-enterprise.h"
69 #include "baseband-xmm-power.h"
70 #include "devices.h"
71 #include "gpio-names.h"
72 #include "fuse.h"
73 #include "pm.h"
74 #include "common.h"
75
76 static struct balanced_throttle throttle_list[] = {
77         {
78                 .id = BALANCED_THROTTLE_ID_TJ,
79                 .throt_tab_size = 10,
80                 .throt_tab = {
81                         {      0, 1000 },
82                         { 640000, 1000 },
83                         { 640000, 1000 },
84                         { 640000, 1000 },
85                         { 640000, 1000 },
86                         { 640000, 1000 },
87                         { 760000, 1000 },
88                         { 760000, 1050 },
89                         {1000000, 1050 },
90                         {1000000, 1100 },
91                 },
92         },
93 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
94         {
95                 .id = BALANCED_THROTTLE_ID_SKIN,
96                 .throt_tab_size = 6,
97                 .throt_tab = {
98                         { 640000, 1200 },
99                         { 640000, 1200 },
100                         { 760000, 1200 },
101                         { 760000, 1200 },
102                         {1000000, 1200 },
103                         {1000000, 1200 },
104                 },
105         },
106 #endif
107 };
108
109 /* All units are in millicelsius */
110 static struct tegra_thermal_data thermal_data = {
111         .shutdown_device_id = THERMAL_DEVICE_ID_NCT_EXT,
112         .temp_shutdown = 90000,
113 #if defined(CONFIG_TEGRA_EDP_LIMITS) || defined(CONFIG_TEGRA_THERMAL_THROTTLE)
114         .throttle_edp_device_id = THERMAL_DEVICE_ID_NCT_EXT,
115 #endif
116 #ifdef CONFIG_TEGRA_EDP_LIMITS
117         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
118         .hysteresis_edp = 3000,
119 #endif
120 #ifdef CONFIG_TEGRA_THERMAL_THROTTLE
121         .temp_throttle = 85000,
122         .tc1 = 0,
123         .tc2 = 1,
124         .passive_delay = 2000,
125 #endif
126 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
127         .skin_device_id = THERMAL_DEVICE_ID_SKIN,
128         .temp_throttle_skin = 43000,
129 #endif
130 };
131
132 static struct rfkill_gpio_platform_data enterprise_bt_rfkill_pdata[] = {
133         {
134                 .name           = "bt_rfkill",
135                 .shutdown_gpio  = TEGRA_GPIO_PE6,
136                 .reset_gpio     = TEGRA_GPIO_INVALID,
137                 .type           = RFKILL_TYPE_BLUETOOTH,
138         },
139 };
140
141 static struct platform_device enterprise_bt_rfkill_device = {
142         .name = "rfkill_gpio",
143         .id             = -1,
144         .dev = {
145                 .platform_data = &enterprise_bt_rfkill_pdata,
146         },
147 };
148
149 static struct resource enterprise_bluesleep_resources[] = {
150         [0] = {
151                 .name = "gpio_host_wake",
152                         .start  = TEGRA_GPIO_PS2,
153                         .end    = TEGRA_GPIO_PS2,
154                         .flags  = IORESOURCE_IO,
155         },
156         [1] = {
157                 .name = "gpio_ext_wake",
158                         .start  = TEGRA_GPIO_PE7,
159                         .end    = TEGRA_GPIO_PE7,
160                         .flags  = IORESOURCE_IO,
161         },
162         [2] = {
163                 .name = "host_wake",
164                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
165         },
166 };
167
168 static struct platform_device enterprise_bluesleep_device = {
169         .name           = "bluesleep",
170         .id             = -1,
171         .num_resources  = ARRAY_SIZE(enterprise_bluesleep_resources),
172         .resource       = enterprise_bluesleep_resources,
173 };
174
175 static void __init enterprise_setup_bluesleep(void)
176 {
177         enterprise_bluesleep_resources[2].start =
178                 enterprise_bluesleep_resources[2].end =
179                         gpio_to_irq(TEGRA_GPIO_PS2);
180         platform_device_register(&enterprise_bluesleep_device);
181         return;
182 }
183
184 static __initdata struct tegra_clk_init_table enterprise_clk_init_table[] = {
185         /* name         parent          rate            enabled */
186         { "pll_m",      NULL,           0,              false},
187         { "hda",        "pll_p",        108000000,      false},
188         { "hda2codec_2x","pll_p",       48000000,       false},
189         { "pwm",        "pll_p",        3187500,        false},
190         { "blink",      "clk_32k",      32768,          true},
191         { "i2s0",       "pll_a_out0",   0,              false},
192         { "i2s1",       "pll_a_out0",   0,              false},
193         { "i2s3",       "pll_a_out0",   0,              false},
194         { "spdif_out",  "pll_a_out0",   0,              false},
195         { "d_audio",    "clk_m",        12000000,       false},
196         { "dam0",       "clk_m",        12000000,       false},
197         { "dam1",       "clk_m",        12000000,       false},
198         { "dam2",       "clk_m",        12000000,       false},
199         { "audio0",     "i2s0_sync",    0,              false},
200         { "audio1",     "i2s1_sync",    0,              false},
201         { "audio2",     "i2s2_sync",    0,              false},
202         { "audio3",     "i2s3_sync",    0,              false},
203         { "vi",         "pll_p",        0,              false},
204         { "vi_sensor",  "pll_p",        0,              false},
205         { "i2c5",       "pll_p",        3200000,        false},
206         { NULL,         NULL,           0,              0},
207 };
208
209 static __initdata struct tegra_clk_init_table enterprise_clk_i2s2_table[] = {
210         /* name         parent          rate            enabled */
211         { "i2s2",       "pll_a_out0",   0,              false},
212         { NULL,         NULL,           0,              0},
213 };
214
215 static __initdata struct tegra_clk_init_table enterprise_clk_i2s4_table[] = {
216         /* name         parent          rate            enabled */
217         { "i2s4",       "pll_a_out0",   0,              false},
218         { NULL,         NULL,           0,              0},
219 };
220
221 static struct tegra_i2c_platform_data enterprise_i2c1_platform_data = {
222         .adapter_nr     = 0,
223         .bus_count      = 1,
224         .bus_clk_rate   = { 100000, 0 },
225         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
226         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
227         .arb_recovery = arb_lost_recovery,
228 };
229
230 static struct tegra_i2c_platform_data enterprise_i2c2_platform_data = {
231         .adapter_nr     = 1,
232         .bus_count      = 1,
233         .bus_clk_rate   = { 400000, 0 },
234         .is_clkon_always = true,
235         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
236         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
237         .arb_recovery = arb_lost_recovery,
238 };
239
240 static struct tegra_i2c_platform_data enterprise_i2c3_platform_data = {
241         .adapter_nr     = 2,
242         .bus_count      = 1,
243         .bus_clk_rate   = { 271000, 0 },
244         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
245         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
246         .arb_recovery = arb_lost_recovery,
247 };
248
249 static struct tegra_i2c_platform_data enterprise_i2c4_platform_data = {
250         .adapter_nr     = 3,
251         .bus_count      = 1,
252         .bus_clk_rate   = { 10000, 0 },
253         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
254         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
255         .arb_recovery = arb_lost_recovery,
256 };
257
258 static struct tegra_i2c_platform_data enterprise_i2c5_platform_data = {
259         .adapter_nr     = 4,
260         .bus_count      = 1,
261         .bus_clk_rate   = { 390000, 0 },
262         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
263         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
264         .arb_recovery = arb_lost_recovery,
265 };
266
267 /* Equalizer filter coefs generated from the MAXIM MAX98088
268  * evkit software tool */
269 static struct max98088_eq_cfg max98088_eq_cfg[] = {
270         {
271                 .name = "FLAT",
272                 .rate = 44100,
273                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
274                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
275                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
276                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
277                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
278         },
279         {
280                 .name = "LOWPASS1K",
281                 .rate = 44100,
282                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
283                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
284                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
285                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
286                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
287         },
288         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
289                 .name = "HIBOOST",
290                 .rate = 44100,
291                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
292                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
293                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
294                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
295                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
296         },
297         { /* BASS=12dB, TREBLE=+12dB */
298                 .name = "LOUD12DB",
299                 .rate = 44100,
300                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
301                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
302                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
303                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
304                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
305         },
306         {
307                 .name = "FLAT",
308                 .rate = 16000,
309                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
310                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
311                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
312                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
313                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
314         },
315         {
316                 .name = "LOWPASS1K",
317                 .rate = 16000,
318                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
319                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
320                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
321                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
322                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
323         },
324         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
325                 .name = "HIBOOST",
326                 .rate = 16000,
327                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
328                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
329                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
330                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
331                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
332         },
333         { /* BASS=12dB, TREBLE=+12dB */
334                 .name = "LOUD12DB",
335                 .rate = 16000,
336                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
337                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
338                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
339                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
340                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
341         },
342 };
343
344
345 static struct max98088_pdata enterprise_max98088_pdata = {
346         /* equalizer configuration */
347         .eq_cfg = max98088_eq_cfg,
348         .eq_cfgcnt = ARRAY_SIZE(max98088_eq_cfg),
349
350         /* debounce time */
351         .debounce_time_ms = 200,
352
353         /* microphone configuration */
354         .digmic_left_mode = 1,
355         .digmic_right_mode = 1,
356
357         /* receiver output configuration */
358         .receiver_mode = 0,     /* 0 = amplifier, 1 = line output */
359 };
360
361 static struct pn544_i2c_platform_data nfc_pdata = {
362                 .irq_gpio = TEGRA_GPIO_PS4,
363                 .ven_gpio = TEGRA_GPIO_PM6,
364                 .firm_gpio = 0,
365 };
366
367
368 static struct i2c_board_info __initdata max98088_board_info = {
369         I2C_BOARD_INFO("max98088", 0x10),
370         .platform_data = &enterprise_max98088_pdata,
371 };
372
373 static struct i2c_board_info __initdata enterprise_codec_aic326x_info = {
374         I2C_BOARD_INFO("aic3262-codec", 0x18),
375 };
376
377 static struct i2c_board_info __initdata nfc_board_info = {
378         I2C_BOARD_INFO("pn544", 0x28),
379         .platform_data = &nfc_pdata,
380 };
381
382 static void enterprise_i2c_init(void)
383 {
384         tegra_i2c_device1.dev.platform_data = &enterprise_i2c1_platform_data;
385         tegra_i2c_device2.dev.platform_data = &enterprise_i2c2_platform_data;
386         tegra_i2c_device3.dev.platform_data = &enterprise_i2c3_platform_data;
387         tegra_i2c_device4.dev.platform_data = &enterprise_i2c4_platform_data;
388         tegra_i2c_device5.dev.platform_data = &enterprise_i2c5_platform_data;
389
390         platform_device_register(&tegra_i2c_device5);
391         platform_device_register(&tegra_i2c_device4);
392         platform_device_register(&tegra_i2c_device3);
393         platform_device_register(&tegra_i2c_device2);
394         platform_device_register(&tegra_i2c_device1);
395
396         max98088_board_info.irq = enterprise_codec_aic326x_info.irq =
397                 gpio_to_irq(TEGRA_GPIO_HP_DET);
398         i2c_register_board_info(0, &max98088_board_info, 1);
399         i2c_register_board_info(0, &enterprise_codec_aic326x_info, 1);
400         nfc_board_info.irq = gpio_to_irq(TEGRA_GPIO_PS4);
401         i2c_register_board_info(0, &nfc_board_info, 1);
402 }
403
404 static struct platform_device *enterprise_uart_devices[] __initdata = {
405         &tegra_uarta_device,
406         &tegra_uartb_device,
407         &tegra_uartc_device,
408         &tegra_uartd_device,
409         &tegra_uarte_device,
410 };
411
412 static struct uart_clk_parent uart_parent_clk[] = {
413         [0] = {.name = "clk_m"},
414         [1] = {.name = "pll_p"},
415 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
416         [2] = {.name = "pll_m"},
417 #endif
418 };
419 static struct tegra_uart_platform_data enterprise_uart_pdata;
420 static struct tegra_uart_platform_data enterprise_loopback_uart_pdata;
421
422 static void __init uart_debug_init(void)
423 {
424         unsigned long rate;
425         struct clk *c;
426
427         /* UARTD is the debug port. */
428         pr_info("Selecting UARTD as the debug console\n");
429         enterprise_uart_devices[3] = &debug_uartd_device;
430         debug_uart_port_base = ((struct plat_serial8250_port *)(
431                         debug_uartd_device.dev.platform_data))->mapbase;
432         debug_uart_clk = clk_get_sys("serial8250.0", "uartd");
433
434         /* Clock enable for the debug channel */
435         if (!IS_ERR_OR_NULL(debug_uart_clk)) {
436                 rate = ((struct plat_serial8250_port *)(
437                         debug_uartd_device.dev.platform_data))->uartclk;
438                 pr_info("The debug console clock name is %s\n",
439                                                 debug_uart_clk->name);
440                 c = tegra_get_clock_by_name("pll_p");
441                 if (IS_ERR_OR_NULL(c))
442                         pr_err("Not getting the parent clock pll_p\n");
443                 else
444                         clk_set_parent(debug_uart_clk, c);
445
446                 clk_enable(debug_uart_clk);
447                 clk_set_rate(debug_uart_clk, rate);
448         } else {
449                 pr_err("Not getting the clock %s for debug console\n",
450                                 debug_uart_clk->name);
451         }
452 }
453
454 static void __init enterprise_uart_init(void)
455 {
456         int i;
457         struct clk *c;
458
459         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
460                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
461                 if (IS_ERR_OR_NULL(c)) {
462                         pr_err("Not able to get the clock for %s\n",
463                                                 uart_parent_clk[i].name);
464                         continue;
465                 }
466                 uart_parent_clk[i].parent_clk = c;
467                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
468         }
469         enterprise_uart_pdata.parent_clk_list = uart_parent_clk;
470         enterprise_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
471         enterprise_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
472         enterprise_loopback_uart_pdata.parent_clk_count =
473                                                 ARRAY_SIZE(uart_parent_clk);
474         enterprise_loopback_uart_pdata.is_loopback = true;
475         tegra_uarta_device.dev.platform_data = &enterprise_uart_pdata;
476         tegra_uartb_device.dev.platform_data = &enterprise_uart_pdata;
477         tegra_uartc_device.dev.platform_data = &enterprise_uart_pdata;
478         tegra_uartd_device.dev.platform_data = &enterprise_uart_pdata;
479         /* UARTE is used for loopback test purpose */
480         tegra_uarte_device.dev.platform_data = &enterprise_loopback_uart_pdata;
481
482         /* Register low speed only if it is selected */
483         if (!is_tegra_debug_uartport_hs())
484                 uart_debug_init();
485
486         platform_add_devices(enterprise_uart_devices,
487                                 ARRAY_SIZE(enterprise_uart_devices));
488 }
489
490
491
492 static struct resource tegra_rtc_resources[] = {
493         [0] = {
494                 .start = TEGRA_RTC_BASE,
495                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
496                 .flags = IORESOURCE_MEM,
497         },
498         [1] = {
499                 .start = INT_RTC,
500                 .end = INT_RTC,
501                 .flags = IORESOURCE_IRQ,
502         },
503 };
504
505 static struct platform_device tegra_rtc_device = {
506         .name = "tegra_rtc",
507         .id   = -1,
508         .resource = tegra_rtc_resources,
509         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
510 };
511
512 static struct platform_device tegra_camera = {
513         .name = "tegra_camera",
514         .id = -1,
515 };
516
517 static struct tegra_asoc_platform_data enterprise_audio_pdata = {
518         .gpio_spkr_en           = -1,
519         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
520         .gpio_hp_mute           = -1,
521         .gpio_int_mic_en        = -1,
522         .gpio_ext_mic_en        = -1,
523         .debounce_time_hp = -1,
524         /*defaults for Enterprise board*/
525         .i2s_param[HIFI_CODEC]  = {
526                 .audio_port_id  = 0,
527                 .is_i2s_master  = 1,
528                 .i2s_mode       = TEGRA_DAIFMT_I2S,
529                 .sample_size    = 16,
530         },
531         .i2s_param[BASEBAND]    = {
532                 .is_i2s_master  = 1,
533                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
534                 .sample_size    = 16,
535                 .rate           = 8000,
536                 .channels       = 1,
537         },
538         .i2s_param[BT_SCO]      = {  
539                 .audio_port_id  = 3, 
540                 .is_i2s_master  = 1, 
541                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
542                 .sample_size    = 16,
543         },
544 };
545
546 static struct platform_device enterprise_audio_device = {
547         .name   = "tegra-snd-max98088",
548         .id     = 0,
549         .dev    = {
550                 .platform_data  = &enterprise_audio_pdata,
551         },
552 };
553
554 static struct tegra_asoc_platform_data enterprise_audio_aic326x_pdata = {
555         .gpio_spkr_en           = -1,
556         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
557         .gpio_hp_mute           = -1,
558         .gpio_int_mic_en        = -1,
559         .gpio_ext_mic_en        = -1,
560         /*defaults for Verbier-Enterprise (E1197) board with TI AIC326X codec*/
561         .audio_port_id          = {
562                 [HIFI_CODEC] = 0,
563                 [BASEBAND] = 2,
564                 [BT_SCO] = 3,
565         },
566         .baseband_param         = {
567                 .rate = 8000,
568                 .channels = 1,
569                 .bit_format = TEGRA_DAIFMT_DSP_A,
570         },
571 };
572
573 static struct platform_device enterprise_audio_aic326x_device = {
574         .name   = "tegra-snd-aic326x",
575         .id     = 0,
576         .dev    = {
577                 .platform_data  = &enterprise_audio_aic326x_pdata,
578         },
579 };
580
581 static struct platform_device *enterprise_devices[] __initdata = {
582         &tegra_pmu_device,
583         &tegra_rtc_device,
584         &tegra_udc_device,
585 #if defined(CONFIG_TEGRA_IOVMM_SMMU) || defined(CONFIG_TEGRA_IOMMU_SMMU)
586         &tegra_smmu_device,
587 #endif
588         &tegra_wdt0_device,
589         &tegra_wdt1_device,
590         &tegra_wdt2_device,
591 #if defined(CONFIG_TEGRA_AVP)
592         &tegra_avp_device,
593 #endif
594         &tegra_camera,
595         &enterprise_bt_rfkill_device,
596         &tegra_spi_device4,
597         &tegra_hda_device,
598 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
599         &tegra_se_device,
600 #endif
601 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
602         &tegra_aes_device,
603 #endif
604 };
605
606 #define MXT_CONFIG_CRC 0x62F903
607 /*
608  * Config converted from memory-mapped cfg-file with
609  * following version information:
610  *
611  *
612  *
613  *      FAMILY_ID=128
614  *      VARIANT=1
615  *      VERSION=32
616  *      BUILD=170
617  *      VENDOR_ID=255
618  *      PRODUCT_ID=TBD
619  *      CHECKSUM=0xC189B6
620  *
621  *
622  */
623
624 static const u8 config[] = {
625         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
626         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x05, 0x01, 0x00,
627         0x00, 0x1E, 0x0A, 0x8B, 0x00, 0x00, 0x13, 0x0B,
628         0x00, 0x10, 0x32, 0x03, 0x03, 0x00, 0x03, 0x01,
629         0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xBF, 0x03, 0x1B,
630         0x02, 0x00, 0x00, 0x37, 0x37, 0x00, 0x00, 0x00,
631         0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
632         0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
633         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
634         0x00, 0x00, 0x00, 0xA9, 0x7F, 0x9A, 0x0E, 0x00,
635         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
636         0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00,
637         0x00, 0x00, 0x03, 0x23, 0x00, 0x00, 0x00, 0x0A,
638         0x0F, 0x14, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00,
639         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
640         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
641         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
642         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
643         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
644         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
645         0x00, 0x00, 0x00, 0x01, 0x00, 0x03, 0x08, 0x10,
646         0x00
647 };
648
649 static struct mxt_platform_data atmel_mxt_info = {
650         .x_line         = 19,
651         .y_line         = 11,
652         .x_size         = 960,
653         .y_size         = 540,
654         .blen           = 0x10,
655         .threshold      = 0x32,
656         .voltage        = 3300000,              /* 3.3V */
657         .orient         = 3,
658         .config         = config,
659         .config_length  = 168,
660         .config_crc     = MXT_CONFIG_CRC,
661         .irqflags       = IRQF_TRIGGER_FALLING,
662 /*      .read_chg       = &read_chg, */
663         .read_chg       = NULL,
664 };
665
666 static struct i2c_board_info __initdata atmel_i2c_info[] = {
667         {
668                 I2C_BOARD_INFO("atmel_mxt_ts", MXT224_I2C_ADDR1),
669                 .platform_data = &atmel_mxt_info,
670         }
671 };
672
673 static int __init enterprise_touch_init(void)
674 {
675         gpio_request(TEGRA_GPIO_PH6, "atmel-irq");
676         gpio_direction_input(TEGRA_GPIO_PH6);
677
678         gpio_request(TEGRA_GPIO_PF5, "atmel-reset");
679         gpio_direction_output(TEGRA_GPIO_PF5, 0);
680         msleep(1);
681         gpio_set_value(TEGRA_GPIO_PF5, 1);
682         msleep(100);
683
684         atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH6);
685         i2c_register_board_info(1, atmel_i2c_info, 1);
686
687         return 0;
688 }
689
690 static void enterprise_usb_hsic_postsupend(void)
691 {
692         pr_debug("%s\n", __func__);
693 #ifdef CONFIG_TEGRA_BB_XMM_POWER
694         baseband_xmm_set_power_status(BBXMM_PS_L2);
695 #endif
696 }
697
698 static void enterprise_usb_hsic_preresume(void)
699 {
700         pr_debug("%s\n", __func__);
701 #ifdef CONFIG_TEGRA_BB_XMM_POWER
702         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
703 #endif
704 }
705
706 static void enterprise_usb_hsic_phy_power(void)
707 {
708         pr_debug("%s\n", __func__);
709 #ifdef CONFIG_TEGRA_BB_XMM_POWER
710         baseband_xmm_set_power_status(BBXMM_PS_L0);
711 #endif
712 }
713
714 static void enterprise_usb_hsic_post_phy_off(void)
715 {
716         pr_debug("%s\n", __func__);
717 #ifdef CONFIG_TEGRA_BB_XMM_POWER
718         baseband_xmm_set_power_status(BBXMM_PS_L2);
719 #endif
720 }
721
722 static struct tegra_usb_phy_platform_ops hsic_xmm_plat_ops = {
723         .post_suspend = enterprise_usb_hsic_postsupend,
724         .pre_resume = enterprise_usb_hsic_preresume,
725         .port_power = enterprise_usb_hsic_phy_power,
726         .post_phy_off = enterprise_usb_hsic_post_phy_off,
727 };
728
729 static struct tegra_usb_platform_data tegra_ehci2_hsic_xmm_pdata = {
730         .port_otg = false,
731         .has_hostpc = true,
732         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
733         .op_mode        = TEGRA_USB_OPMODE_HOST,
734         .u_data.host = {
735                 .vbus_gpio = -1,
736                 .hot_plug = false,
737                 .remote_wakeup_supported = false,
738                 .power_off_on_suspend = false,
739         },
740         .ops = &hsic_xmm_plat_ops,
741 };
742
743 static struct tegra_usb_platform_data tegra_udc_pdata = {
744         .port_otg = true,
745         .has_hostpc = true,
746         .builtin_host_disabled = true,
747         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
748         .op_mode = TEGRA_USB_OPMODE_DEVICE,
749         .u_data.dev = {
750                 .vbus_pmu_irq = ENT_TPS80031_IRQ_BASE +
751                                 TPS80031_INT_VBUS_DET,
752                 .vbus_gpio = -1,
753                 .charging_supported = false,
754                 .remote_wakeup_supported = false,
755         },
756         .u_cfg.utmi = {
757                 .hssync_start_delay = 0,
758                 .elastic_limit = 16,
759                 .idle_wait_delay = 17,
760                 .term_range_adj = 6,
761                 .xcvr_setup = 8,
762                 .xcvr_lsfslew = 2,
763                 .xcvr_lsrslew = 2,
764                 .xcvr_setup_offset = 0,
765                 .xcvr_use_fuses = 1,
766         },
767 };
768
769 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
770         .port_otg = true,
771         .has_hostpc = true,
772         .builtin_host_disabled = true,
773         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
774         .op_mode = TEGRA_USB_OPMODE_HOST,
775         .u_data.host = {
776                 .vbus_gpio = -1,
777                 .vbus_reg = "usb_vbus",
778                 .hot_plug = true,
779                 .remote_wakeup_supported = true,
780                 .power_off_on_suspend = true,
781         },
782         .u_cfg.utmi = {
783                 .hssync_start_delay = 0,
784                 .elastic_limit = 16,
785                 .idle_wait_delay = 17,
786                 .term_range_adj = 6,
787                 .xcvr_setup = 15,
788                 .xcvr_lsfslew = 2,
789                 .xcvr_lsrslew = 2,
790                 .xcvr_setup_offset = 0,
791                 .xcvr_use_fuses = 1,
792         },
793 };
794
795 static struct tegra_usb_otg_data tegra_otg_pdata = {
796         .ehci_device = &tegra_ehci1_device,
797         .ehci_pdata = &tegra_ehci1_utmi_pdata,
798 };
799
800 struct platform_device *tegra_usb_hsic_host_register(void)
801 {
802         struct platform_device *pdev;
803         int val;
804
805         pdev = platform_device_alloc(tegra_ehci2_device.name,
806                 tegra_ehci2_device.id);
807         if (!pdev)
808                 return NULL;
809
810         val = platform_device_add_resources(pdev, tegra_ehci2_device.resource,
811                 tegra_ehci2_device.num_resources);
812         if (val)
813                 goto error;
814
815         pdev->dev.dma_mask =  tegra_ehci2_device.dev.dma_mask;
816         pdev->dev.coherent_dma_mask = tegra_ehci2_device.dev.coherent_dma_mask;
817
818         val = platform_device_add_data(pdev, &tegra_ehci2_hsic_xmm_pdata,
819                         sizeof(struct tegra_usb_platform_data));
820         if (val)
821                 goto error;
822
823         val = platform_device_add(pdev);
824         if (val)
825                 goto error;
826
827         return pdev;
828
829 error:
830         pr_err("%s: failed to add the host contoller device\n", __func__);
831         platform_device_put(pdev);
832         return NULL;
833 }
834
835 void tegra_usb_hsic_host_unregister(struct platform_device *pdev)
836 {
837         platform_device_unregister(pdev);
838 }
839
840 static void enterprise_usb_init(void)
841 {
842         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
843
844         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
845         platform_device_register(&tegra_otg_device);
846 }
847
848 static struct platform_device *enterprise_audio_devices[] __initdata = {
849         &tegra_ahub_device,
850         &tegra_dam_device0,
851         &tegra_dam_device1,
852         &tegra_dam_device2,
853         &tegra_i2s_device0,
854         &tegra_i2s_device1,
855         &tegra_i2s_device3,
856         &tegra_spdif_device,
857         &spdif_dit_device,
858         &bluetooth_dit_device,
859         &baseband_dit_device,
860         &tegra_pcm_device,
861         &enterprise_audio_device,
862         &enterprise_audio_aic326x_device,
863 };
864
865 static void enterprise_audio_init(void)
866 {
867         struct board_info board_info;
868
869         tegra_get_board_info(&board_info);
870
871         if (board_info.board_id == BOARD_E1197)
872                 enterprise_audio_pdata.i2s_param[HIFI_CODEC].audio_port_id = 1;
873         else if (board_info.fab == BOARD_FAB_A04) {
874                 enterprise_audio_pdata.i2s_param[BASEBAND].audio_port_id = 4;
875                 platform_device_register(&tegra_i2s_device4);
876         } else {
877                 enterprise_audio_pdata.i2s_param[BASEBAND].audio_port_id = 2;
878                 platform_device_register(&tegra_i2s_device2);
879         }
880
881         platform_add_devices(enterprise_audio_devices,
882                         ARRAY_SIZE(enterprise_audio_devices));
883 }
884
885
886 static struct baseband_power_platform_data tegra_baseband_power_data = {
887         .baseband_type = BASEBAND_XMM,
888         .modem = {
889                 .xmm = {
890                         .bb_rst = XMM_GPIO_BB_RST,
891                         .bb_on = XMM_GPIO_BB_ON,
892                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
893                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
894                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
895                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
896                 },
897         },
898 };
899
900 static struct platform_device tegra_baseband_power_device = {
901         .name = "baseband_xmm_power",
902         .id = -1,
903         .dev = {
904                 .platform_data = &tegra_baseband_power_data,
905         },
906 };
907
908 static struct platform_device tegra_baseband_power2_device = {
909         .name = "baseband_xmm_power2",
910         .id = -1,
911         .dev = {
912                 .platform_data = &tegra_baseband_power_data,
913         },
914 };
915
916 #ifdef CONFIG_TEGRA_BB_M7400
917 static union tegra_bb_gpio_id m7400_gpio_id = {
918         .m7400 = {
919                 .pwr_status = GPIO_BB_RESET,
920                 .pwr_on = GPIO_BB_PWRON,
921                 .uart_awr = GPIO_BB_APACK,
922                 .uart_cwr = GPIO_BB_CPACK,
923                 .usb_awr = GPIO_BB_APACK2,
924                 .usb_cwr = GPIO_BB_CPACK2,
925                 .service = GPIO_BB_RSVD2,
926                 .resout2 = GPIO_BB_RSVD1,
927         },
928 };
929
930 static struct tegra_bb_pdata m7400_pdata = {
931         .id = &m7400_gpio_id,
932         .device = &tegra_ehci2_device,
933         .ehci_register = tegra_usb_hsic_host_register,
934         .ehci_unregister = tegra_usb_hsic_host_unregister,
935         .bb_id = TEGRA_BB_M7400,
936 };
937
938 static struct platform_device tegra_baseband_m7400_device = {
939         .name = "tegra_baseband_power",
940         .id = -1,
941         .dev = {
942                 .platform_data = &m7400_pdata,
943         },
944 };
945 #endif
946
947 static void enterprise_baseband_init(void)
948 {
949         int modem_id = tegra_get_modem_id();
950
951         switch (modem_id) {
952         case TEGRA_BB_PH450: /* PH450 ULPI */
953                 enterprise_modem_init();
954                 break;
955         case TEGRA_BB_XMM6260: /* XMM6260 HSIC */
956                 /* baseband-power.ko will register ehci2 device */
957                 tegra_ehci2_device.dev.platform_data =
958                                         &tegra_ehci2_hsic_xmm_pdata;
959                 tegra_baseband_power_data.hsic_register =
960                                                 &tegra_usb_hsic_host_register;
961                 tegra_baseband_power_data.hsic_unregister =
962                                                 &tegra_usb_hsic_host_unregister;
963
964                 platform_device_register(&tegra_baseband_power_device);
965                 platform_device_register(&tegra_baseband_power2_device);
966                 break;
967 #ifdef CONFIG_TEGRA_BB_M7400
968         case TEGRA_BB_M7400: /* M7400 HSIC */
969                 tegra_ehci2_hsic_xmm_pdata.u_data.host.power_off_on_suspend = 0;
970                 tegra_ehci2_device.dev.platform_data
971                         = &tegra_ehci2_hsic_xmm_pdata;
972                 platform_device_register(&tegra_baseband_m7400_device);
973                 break;
974 #endif
975         }
976 }
977 static void enterprise_nfc_init(void)
978 {
979         struct board_info bi;
980
981         /* Enable firmware GPIO PX7 for board E1205 */
982         tegra_get_board_info(&bi);
983         if (bi.board_id == BOARD_E1205 && bi.fab >= BOARD_FAB_A03) {
984                 nfc_pdata.firm_gpio = TEGRA_GPIO_PX7;
985         }
986 }
987
988 static void __init tegra_enterprise_init(void)
989 {
990         struct board_info board_info;
991         tegra_get_board_info(&board_info);
992         if (board_info.fab == BOARD_FAB_A04)
993                 tegra_clk_init_from_table(enterprise_clk_i2s4_table);
994         else
995                 tegra_clk_init_from_table(enterprise_clk_i2s2_table);
996
997         tegra_thermal_init(&thermal_data,
998                                 throttle_list,
999                                 ARRAY_SIZE(throttle_list));
1000         tegra_clk_init_from_table(enterprise_clk_init_table);
1001         tegra_enable_pinmux();
1002         enterprise_pinmux_init();
1003         enterprise_i2c_init();
1004         enterprise_uart_init();
1005         enterprise_usb_init();
1006         platform_add_devices(enterprise_devices, ARRAY_SIZE(enterprise_devices));
1007         tegra_ram_console_debug_init();
1008         enterprise_regulator_init();
1009         tegra_io_dpd_init();
1010         enterprise_sdhci_init();
1011 #ifdef CONFIG_TEGRA_EDP_LIMITS
1012         enterprise_edp_init();
1013 #endif
1014         enterprise_kbc_init();
1015         enterprise_nfc_init();
1016         enterprise_touch_init();
1017         enterprise_audio_init();
1018         enterprise_baseband_init();
1019         enterprise_panel_init();
1020         enterprise_setup_bluesleep();
1021         enterprise_emc_init();
1022         enterprise_sensors_init();
1023         enterprise_suspend_init();
1024         enterprise_bpc_mgmt_init();
1025         tegra_release_bootloader_fb();
1026         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1027 }
1028
1029 static void __init tegra_enterprise_reserve(void)
1030 {
1031 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1032         tegra_reserve(0, SZ_4M, SZ_8M);
1033 #else
1034         tegra_reserve(SZ_128M, SZ_4M, SZ_8M);
1035 #endif
1036         tegra_ram_console_debug_reserve(SZ_1M);
1037 }
1038
1039 static const char *enterprise_dt_board_compat[] = {
1040         "nvidia,enterprise",
1041         NULL
1042 };
1043
1044 MACHINE_START(TEGRA_ENTERPRISE, "tegra_enterprise")
1045         .atag_offset    = 0x100,
1046         .soc            = &tegra_soc_desc,
1047         .map_io         = tegra_map_common_io,
1048         .reserve        = tegra_enterprise_reserve,
1049         .init_early     = tegra30_init_early,
1050         .init_irq       = tegra_init_irq,
1051         .handle_irq     = gic_handle_irq,
1052         .timer          = &tegra_timer,
1053         .init_machine   = tegra_enterprise_init,
1054         .restart        = tegra_assert_system_reset,
1055         .dt_compat      = enterprise_dt_board_compat,
1056 MACHINE_END