video: tegra: host: Register devices in SoC files
[linux-2.6.git] / arch / arm / mach-tegra / board-enterprise-panel.c
1 /*
2  * arch/arm/mach-tegra/board-enterprise-panel.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/delay.h>
22 #include <linux/gpio.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/resource.h>
25 #include <asm/mach-types.h>
26 #include <linux/platform_device.h>
27 #ifdef CONFIG_HAS_EARLYSUSPEND
28 #include <linux/earlysuspend.h>
29 #endif
30 #include <linux/tegra_pwm_bl.h>
31 #include <asm/atomic.h>
32 #include <linux/nvhost.h>
33 #include <linux/nvmap.h>
34 #include <mach/irqs.h>
35 #include <mach/iomap.h>
36 #include <mach/dc.h>
37 #include <mach/fb.h>
38 #include <mach/hardware.h>
39 #include <mach/gpio-tegra.h>
40
41 #include "board.h"
42 #include "board-enterprise.h"
43 #include "devices.h"
44 #include "gpio-names.h"
45 #include "fuse.h"
46 #include "tegra3_host1x_devices.h"
47
48 #define DC_CTRL_MODE    TEGRA_DC_OUT_ONE_SHOT_MODE
49
50 /* Select panel to be used. */
51 #define AVDD_LCD PMU_TCA6416_GPIO_PORT17
52 #define DSI_PANEL_RESET 1
53
54 #define enterprise_lvds_shutdown        TEGRA_GPIO_PL2
55 #define enterprise_hdmi_hpd             TEGRA_GPIO_PN7
56
57 #define enterprise_dsi_panel_reset      TEGRA_GPIO_PW0
58
59 #define enterprise_lcd_2d_3d            TEGRA_GPIO_PH1
60 #define ENTERPRISE_STEREO_3D            0
61 #define ENTERPRISE_STEREO_2D            1
62
63 #define enterprise_lcd_swp_pl           TEGRA_GPIO_PH2
64 #define ENTERPRISE_STEREO_LANDSCAPE     0
65 #define ENTERPRISE_STEREO_PORTRAIT      1
66
67 #define enterprise_lcd_te               TEGRA_GPIO_PJ1
68
69 #ifdef CONFIG_TEGRA_DC
70 static struct regulator *enterprise_dsi_reg;
71 static bool dsi_regulator_status;
72 static struct regulator *enterprise_lcd_reg;
73
74 static struct regulator *enterprise_hdmi_reg;
75 static struct regulator *enterprise_hdmi_pll;
76 static struct regulator *enterprise_hdmi_vddio;
77 #endif
78
79 static atomic_t sd_brightness = ATOMIC_INIT(255);
80
81 static tegra_dc_bl_output enterprise_bl_output_measured_a02 = {
82         1, 5, 9, 10, 11, 12, 12, 13,
83         13, 14, 14, 15, 15, 16, 16, 17,
84         17, 18, 18, 19, 19, 20, 21, 21,
85         22, 22, 23, 24, 24, 25, 26, 26,
86         27, 27, 28, 29, 29, 31, 31, 32,
87         32, 33, 34, 35, 36, 36, 37, 38,
88         39, 39, 40, 41, 41, 42, 43, 43,
89         44, 45, 45, 46, 47, 47, 48, 49,
90         49, 50, 51, 51, 52, 53, 53, 54,
91         55, 56, 56, 57, 58, 59, 60, 61,
92         61, 62, 63, 64, 65, 65, 66, 67,
93         67, 68, 69, 69, 70, 71, 71, 72,
94         73, 73, 74, 74, 75, 76, 76, 77,
95         77, 78, 79, 79, 80, 81, 82, 83,
96         83, 84, 85, 85, 86, 86, 88, 89,
97         90, 91, 91, 92, 93, 93, 94, 95,
98         95, 96, 97, 97, 98, 99, 99, 100,
99         101, 101, 102, 103, 103, 104, 105, 105,
100         107, 107, 108, 109, 110, 111, 111, 112,
101         113, 113, 114, 115, 115, 116, 117, 117,
102         118, 119, 119, 120, 121, 122, 123, 124,
103         124, 125, 126, 126, 127, 128, 129, 129,
104         130, 131, 131, 132, 133, 133, 134, 135,
105         135, 136, 137, 137, 138, 139, 139, 140,
106         142, 142, 143, 144, 145, 146, 147, 147,
107         148, 149, 149, 150, 151, 152, 153, 153,
108         153, 154, 155, 156, 157, 158, 158, 159,
109         160, 161, 162, 163, 163, 164, 165, 165,
110         166, 166, 167, 168, 169, 169, 170, 170,
111         171, 172, 173, 173, 174, 175, 175, 176,
112         176, 178, 178, 179, 180, 181, 182, 182,
113         183, 184, 185, 186, 186, 187, 188, 188
114 };
115
116 static tegra_dc_bl_output enterprise_bl_output_measured_a03 = {
117         0, 1, 2, 3, 4, 5, 6, 7,
118         8, 9, 10, 12, 13, 14, 15, 16,
119         17, 19, 20, 21, 22, 22, 23, 24,
120         25, 26, 27, 28, 29, 29, 30, 32,
121         33, 34, 35, 36, 38, 39, 40, 42,
122         43, 44, 46, 47, 49, 50, 51, 52,
123         53, 54, 55, 56, 57, 58, 59, 60,
124         61, 63, 64, 66, 67, 69, 70, 71,
125         72, 73, 74, 75, 76, 77, 78, 79,
126         80, 81, 82, 83, 84, 84, 85, 86,
127         87, 88, 89, 90, 91, 92, 93, 94,
128         95, 96, 97, 98, 99, 100, 101, 102,
129         103, 104, 105, 106, 107, 108, 109, 110,
130         110, 111, 112, 113, 113, 114, 115, 116,
131         116, 117, 118, 118, 119, 120, 121, 122,
132         123, 124, 125, 126, 127, 128, 129, 130,
133         130, 131, 132, 133, 134, 135, 136, 137,
134         138, 139, 140, 141, 142, 143, 144, 145,
135         146, 147, 148, 149, 150, 151, 152, 153,
136         154, 155, 156, 157, 158, 159, 160, 160,
137         161, 162, 163, 163, 164, 165, 165, 166,
138         167, 168, 168, 169, 170, 171, 172, 173,
139         174, 175, 176, 176, 177, 178, 179, 180,
140         181, 182, 183, 184, 185, 186, 187, 188,
141         189, 190, 191, 191, 192, 193, 194, 194,
142         195, 196, 197, 197, 198, 199, 199, 200,
143         202, 203, 205, 206, 208, 209, 211, 212,
144         213, 215, 216, 218, 219, 220, 221, 222,
145         223, 224, 225, 226, 227, 228, 229, 230,
146         231, 232, 233, 234, 235, 236, 237, 238,
147         239, 240, 241, 243, 244, 245, 247, 248,
148         250, 251, 251, 252, 253, 254, 254, 255,
149 };
150
151 static p_tegra_dc_bl_output bl_output;
152
153 static bool kernel_1st_panel_init = true;
154
155 static int enterprise_backlight_notify(struct device *unused, int brightness)
156 {
157         int cur_sd_brightness = atomic_read(&sd_brightness);
158
159         /* SD brightness is a percentage, 8-bit value. */
160         brightness = (brightness * cur_sd_brightness) / 255;
161
162         /* Apply any backlight response curve */
163         if (brightness > 255)
164                 pr_info("Error: Brightness > 255!\n");
165         else
166                 brightness = bl_output[brightness];
167
168         return brightness;
169 }
170
171 static int enterprise_disp1_check_fb(struct device *dev, struct fb_info *info);
172
173 /*
174  * In case which_pwm is TEGRA_PWM_PM0,
175  * gpio_conf_to_sfio should be TEGRA_GPIO_PW0: set LCD_CS1_N pin to SFIO
176  * In case which_pwm is TEGRA_PWM_PM1,
177  * gpio_conf_to_sfio should be TEGRA_GPIO_PW1: set LCD_M1 pin to SFIO
178  */
179 static struct platform_tegra_pwm_backlight_data enterprise_disp1_backlight_data = {
180         .which_dc               = 0,
181         .which_pwm              = TEGRA_PWM_PM1,
182         .gpio_conf_to_sfio      = TEGRA_GPIO_PW1,
183         .switch_to_sfio         = &tegra_gpio_disable,
184         .max_brightness         = 255,
185         .dft_brightness         = 224,
186         .notify         = enterprise_backlight_notify,
187         .period                 = 0xFF,
188         .clk_div                = 0x3FF,
189         .clk_select             = 0,
190         /* Only toggle backlight on fb blank notifications for disp1 */
191         .check_fb       = enterprise_disp1_check_fb,
192 };
193
194 static struct platform_device enterprise_disp1_backlight_device = {
195         .name   = "tegra-pwm-bl",
196         .id     = -1,
197         .dev    = {
198                 .platform_data = &enterprise_disp1_backlight_data,
199         },
200 };
201
202 #ifdef CONFIG_TEGRA_DC
203 static int enterprise_hdmi_vddio_enable(void)
204 {
205         int ret;
206         if (!enterprise_hdmi_vddio) {
207                 enterprise_hdmi_vddio = regulator_get(NULL, "hdmi_5v0");
208                 if (IS_ERR_OR_NULL(enterprise_hdmi_vddio)) {
209                         ret = PTR_ERR(enterprise_hdmi_vddio);
210                         pr_err("hdmi: couldn't get regulator hdmi_5v0\n");
211                         enterprise_hdmi_vddio = NULL;
212                         return ret;
213                 }
214         }
215         ret = regulator_enable(enterprise_hdmi_vddio);
216         if (ret < 0) {
217                 pr_err("hdmi: couldn't enable regulator hdmi_5v0\n");
218                 regulator_put(enterprise_hdmi_vddio);
219                 enterprise_hdmi_vddio = NULL;
220                 return ret;
221         }
222         return ret;
223 }
224
225 static int enterprise_hdmi_vddio_disable(void)
226 {
227         if (enterprise_hdmi_vddio) {
228                 regulator_disable(enterprise_hdmi_vddio);
229                 regulator_put(enterprise_hdmi_vddio);
230                 enterprise_hdmi_vddio = NULL;
231         }
232         return 0;
233 }
234
235 static int enterprise_hdmi_enable(void)
236 {
237         int ret;
238         if (!enterprise_hdmi_reg) {
239                 enterprise_hdmi_reg = regulator_get(NULL, "avdd_hdmi");
240                 if (IS_ERR_OR_NULL(enterprise_hdmi_reg)) {
241                         pr_err("hdmi: couldn't get regulator avdd_hdmi\n");
242                         enterprise_hdmi_reg = NULL;
243                         return PTR_ERR(enterprise_hdmi_reg);
244                 }
245         }
246         ret = regulator_enable(enterprise_hdmi_reg);
247         if (ret < 0) {
248                 pr_err("hdmi: couldn't enable regulator avdd_hdmi\n");
249                 return ret;
250         }
251         if (!enterprise_hdmi_pll) {
252                 enterprise_hdmi_pll = regulator_get(NULL, "avdd_hdmi_pll");
253                 if (IS_ERR_OR_NULL(enterprise_hdmi_pll)) {
254                         pr_err("hdmi: couldn't get regulator avdd_hdmi_pll\n");
255                         enterprise_hdmi_pll = NULL;
256                         regulator_put(enterprise_hdmi_reg);
257                         enterprise_hdmi_reg = NULL;
258                         return PTR_ERR(enterprise_hdmi_pll);
259                 }
260         }
261         ret = regulator_enable(enterprise_hdmi_pll);
262         if (ret < 0) {
263                 pr_err("hdmi: couldn't enable regulator avdd_hdmi_pll\n");
264                 return ret;
265         }
266         return 0;
267 }
268
269 static int enterprise_hdmi_disable(void)
270 {
271
272         regulator_disable(enterprise_hdmi_reg);
273         regulator_put(enterprise_hdmi_reg);
274         enterprise_hdmi_reg = NULL;
275
276         regulator_disable(enterprise_hdmi_pll);
277         regulator_put(enterprise_hdmi_pll);
278         enterprise_hdmi_pll = NULL;
279
280         return 0;
281 }
282 static struct resource enterprise_disp1_resources[] = {
283         {
284                 .name   = "irq",
285                 .start  = INT_DISPLAY_GENERAL,
286                 .end    = INT_DISPLAY_GENERAL,
287                 .flags  = IORESOURCE_IRQ,
288         },
289         {
290                 .name   = "regs",
291                 .start  = TEGRA_DISPLAY_BASE,
292                 .end    = TEGRA_DISPLAY_BASE + TEGRA_DISPLAY_SIZE-1,
293                 .flags  = IORESOURCE_MEM,
294         },
295         {
296                 .name   = "fbmem",
297                 .start  = 0,    /* Filled in by enterprise_panel_init() */
298                 .end    = 0,    /* Filled in by enterprise_panel_init() */
299                 .flags  = IORESOURCE_MEM,
300         },
301         {
302                 .name   = "dsi_regs",
303                 .start  = TEGRA_DSI_BASE,
304                 .end    = TEGRA_DSI_BASE + TEGRA_DSI_SIZE - 1,
305                 .flags  = IORESOURCE_MEM,
306         },
307 };
308
309 static struct resource enterprise_disp2_resources[] = {
310         {
311                 .name   = "irq",
312                 .start  = INT_DISPLAY_B_GENERAL,
313                 .end    = INT_DISPLAY_B_GENERAL,
314                 .flags  = IORESOURCE_IRQ,
315         },
316         {
317                 .name   = "regs",
318                 .start  = TEGRA_DISPLAY2_BASE,
319                 .end    = TEGRA_DISPLAY2_BASE + TEGRA_DISPLAY2_SIZE - 1,
320                 .flags  = IORESOURCE_MEM,
321         },
322         {
323                 .name   = "fbmem",
324                 .flags  = IORESOURCE_MEM,
325                 .start  = 0,
326                 .end    = 0,
327         },
328         {
329                 .name   = "hdmi_regs",
330                 .start  = TEGRA_HDMI_BASE,
331                 .end    = TEGRA_HDMI_BASE + TEGRA_HDMI_SIZE - 1,
332                 .flags  = IORESOURCE_MEM,
333         },
334 };
335
336 static struct tegra_dc_sd_settings enterprise_sd_settings = {
337         .enable = 1, /* Normal mode operation */
338         .use_auto_pwm = false,
339         .hw_update_delay = 0,
340         .bin_width = -1,
341         .aggressiveness = 1,
342         .phase_in_adjustments = true,
343         .use_vid_luma = false,
344         /* Default video coefficients */
345         .coeff = {5, 9, 2},
346         .fc = {0, 0},
347         /* Immediate backlight changes */
348         .blp = {1024, 255},
349         /* Gammas: R: 2.2 G: 2.2 B: 2.2 */
350         /* Default BL TF */
351         .bltf = {
352                         {
353                                 {57, 65, 74, 83},
354                                 {93, 103, 114, 126},
355                                 {138, 151, 165, 179},
356                                 {194, 209, 225, 242},
357                         },
358                         {
359                                 {58, 66, 75, 84},
360                                 {94, 105, 116, 127},
361                                 {140, 153, 166, 181},
362                                 {196, 211, 227, 244},
363                         },
364                         {
365                                 {60, 68, 77, 87},
366                                 {97, 107, 119, 130},
367                                 {143, 156, 170, 184},
368                                 {199, 215, 231, 248},
369                         },
370                         {
371                                 {64, 73, 82, 91},
372                                 {102, 113, 124, 137},
373                                 {149, 163, 177, 192},
374                                 {207, 223, 240, 255},
375                         },
376                 },
377         /* Default LUT */
378         .lut = {
379                         {
380                                 {250, 250, 250},
381                                 {194, 194, 194},
382                                 {149, 149, 149},
383                                 {113, 113, 113},
384                                 {82, 82, 82},
385                                 {56, 56, 56},
386                                 {34, 34, 34},
387                                 {15, 15, 15},
388                                 {0, 0, 0},
389                         },
390                         {
391                                 {246, 246, 246},
392                                 {191, 191, 191},
393                                 {147, 147, 147},
394                                 {111, 111, 111},
395                                 {80, 80, 80},
396                                 {55, 55, 55},
397                                 {33, 33, 33},
398                                 {14, 14, 14},
399                                 {0, 0, 0},
400                         },
401                         {
402                                 {239, 239, 239},
403                                 {185, 185, 185},
404                                 {142, 142, 142},
405                                 {107, 107, 107},
406                                 {77, 77, 77},
407                                 {52, 52, 52},
408                                 {30, 30, 30},
409                                 {12, 12, 12},
410                                 {0, 0, 0},
411                         },
412                         {
413                                 {224, 224, 224},
414                                 {173, 173, 173},
415                                 {133, 133, 133},
416                                 {99, 99, 99},
417                                 {70, 70, 70},
418                                 {46, 46, 46},
419                                 {25, 25, 25},
420                                 {7, 7, 7},
421                                 {0, 0, 0},
422                         },
423                 },
424         .sd_brightness = &sd_brightness,
425         .bl_device = &enterprise_disp1_backlight_device,
426 };
427
428 static struct tegra_fb_data enterprise_hdmi_fb_data = {
429         .win            = 0,
430         .xres           = 1366,
431         .yres           = 768,
432         .bits_per_pixel = 32,
433         .flags          = TEGRA_FB_FLIP_ON_PROBE,
434 };
435
436 static struct tegra_dc_out enterprise_disp2_out = {
437         .type           = TEGRA_DC_OUT_HDMI,
438         .flags          = TEGRA_DC_OUT_HOTPLUG_HIGH,
439         .parent_clk     = "pll_d2_out0",
440
441         .dcc_bus        = 3,
442         .hotplug_gpio   = enterprise_hdmi_hpd,
443
444         .max_pixclock   = KHZ2PICOS(148500),
445
446         .align          = TEGRA_DC_ALIGN_MSB,
447         .order          = TEGRA_DC_ORDER_RED_BLUE,
448
449         .enable         = enterprise_hdmi_enable,
450         .disable        = enterprise_hdmi_disable,
451         .postsuspend    = enterprise_hdmi_vddio_disable,
452         .hotplug_init   = enterprise_hdmi_vddio_enable,
453 };
454
455 static struct tegra_dc_platform_data enterprise_disp2_pdata = {
456         .flags          = 0,
457         .default_out    = &enterprise_disp2_out,
458         .fb             = &enterprise_hdmi_fb_data,
459         .emc_clk_rate   = 300000000,
460 };
461
462 static int avdd_dsi_csi_rail_enable(void)
463 {
464         int ret;
465
466         if (dsi_regulator_status == true)
467                 return 0;
468
469         if (enterprise_dsi_reg == NULL) {
470                 enterprise_dsi_reg = regulator_get(NULL, "avdd_dsi_csi");
471                 if (IS_ERR_OR_NULL(enterprise_dsi_reg)) {
472                         pr_err("dsi: Could not get regulator avdd_dsi_csi\n");
473                         enterprise_dsi_reg = NULL;
474                         return PTR_ERR(enterprise_dsi_reg);
475                 }
476         }
477         ret = regulator_enable(enterprise_dsi_reg);
478         if (ret < 0) {
479                 pr_err("DSI regulator avdd_dsi_csi could not be enabled\n");
480                 return ret;
481         }
482         dsi_regulator_status = true;
483         return 0;
484 }
485
486 static int avdd_dsi_csi_rail_disable(void)
487 {
488         int ret;
489
490         if (dsi_regulator_status == false)
491                 return 0;
492
493         if (enterprise_dsi_reg == NULL) {
494                 pr_warn("%s: unbalanced disable\n", __func__);
495                 return -EIO;
496         }
497
498         ret = regulator_disable(enterprise_dsi_reg);
499         if (ret < 0) {
500                 pr_err("DSI regulator avdd_dsi_csi cannot be disabled\n");
501                 return ret;
502         }
503         dsi_regulator_status = false;
504         return 0;
505 }
506
507 static int enterprise_dsi_panel_enable(void)
508 {
509         int ret;
510         struct board_info board_info;
511
512         tegra_get_board_info(&board_info);
513
514         ret = avdd_dsi_csi_rail_enable();
515         if (ret)
516                 return ret;
517
518 #if DSI_PANEL_RESET
519
520         if (board_info.fab >= BOARD_FAB_A03) {
521                 if (enterprise_lcd_reg == NULL) {
522                         enterprise_lcd_reg = regulator_get(NULL, "lcd_vddio_en");
523                         if (IS_ERR_OR_NULL(enterprise_lcd_reg)) {
524                                 pr_err("Could not get regulator lcd_vddio_en\n");
525                                 ret = PTR_ERR(enterprise_lcd_reg);
526                                 enterprise_lcd_reg = NULL;
527                                 return ret;
528                         }
529                 }
530                 if (enterprise_lcd_reg != NULL) {
531                         ret = regulator_enable(enterprise_lcd_reg);
532                         if (ret < 0) {
533                                 pr_err("Could not enable lcd_vddio_en\n");
534                                 return ret;
535                         }
536                 }
537         }
538
539         if (kernel_1st_panel_init != true) {
540                 ret = gpio_request(enterprise_dsi_panel_reset, "panel reset");
541                 if (ret < 0)
542                         return ret;
543
544                 ret = gpio_direction_output(enterprise_dsi_panel_reset, 0);
545                 if (ret < 0) {
546                         gpio_free(enterprise_dsi_panel_reset);
547                         return ret;
548                 }
549
550                 gpio_set_value(enterprise_dsi_panel_reset, 0);
551                 udelay(2000);
552                 gpio_set_value(enterprise_dsi_panel_reset, 1);
553                 mdelay(20);
554         }
555 #endif
556
557         return ret;
558 }
559
560 static int enterprise_dsi_panel_disable(void)
561 {
562         if (enterprise_lcd_reg != NULL)
563                 regulator_disable(enterprise_lcd_reg);
564
565 #if DSI_PANEL_RESET
566         if (kernel_1st_panel_init != true) {
567                 gpio_free(enterprise_dsi_panel_reset);
568         } else
569                 kernel_1st_panel_init = false;
570 #endif
571         return 0;
572 }
573 #endif
574
575 static void enterprise_stereo_set_mode(int mode)
576 {
577         switch (mode) {
578         case TEGRA_DC_STEREO_MODE_2D:
579                 gpio_set_value(TEGRA_GPIO_PH1, ENTERPRISE_STEREO_2D);
580                 break;
581         case TEGRA_DC_STEREO_MODE_3D:
582                 gpio_set_value(TEGRA_GPIO_PH1, ENTERPRISE_STEREO_3D);
583                 break;
584         }
585 }
586
587 static void enterprise_stereo_set_orientation(int mode)
588 {
589         switch (mode) {
590         case TEGRA_DC_STEREO_LANDSCAPE:
591                 gpio_set_value(TEGRA_GPIO_PH2, ENTERPRISE_STEREO_LANDSCAPE);
592                 break;
593         case TEGRA_DC_STEREO_PORTRAIT:
594                 gpio_set_value(TEGRA_GPIO_PH2, ENTERPRISE_STEREO_PORTRAIT);
595                 break;
596         }
597 }
598
599 #ifdef CONFIG_TEGRA_DC
600 static int enterprise_dsi_panel_postsuspend(void)
601 {
602         /* Disable enterprise dsi rail */
603         return avdd_dsi_csi_rail_disable();
604 }
605 #endif
606
607 static struct tegra_dsi_cmd dsi_init_cmd[]= {
608         DSI_CMD_SHORT(0x05, 0x11, 0x00),
609         DSI_DLY_MS(20),
610 #if(DC_CTRL_MODE & TEGRA_DC_OUT_ONE_SHOT_MODE)
611         DSI_CMD_SHORT(0x15, 0x35, 0x00),
612 #endif
613         DSI_CMD_SHORT(0x05, 0x29, 0x00),
614         DSI_DLY_MS(20),
615 };
616
617 static struct tegra_dsi_cmd dsi_early_suspend_cmd[] = {
618         DSI_CMD_SHORT(0x05, 0x28, 0x00),
619         DSI_DLY_MS(20),
620 #if(DC_CTRL_MODE & TEGRA_DC_OUT_ONE_SHOT_MODE)
621         DSI_CMD_SHORT(0x05, 0x34, 0x00),
622 #endif
623 };
624
625 static struct tegra_dsi_cmd dsi_late_resume_cmd[] = {
626 #if(DC_CTRL_MODE & TEGRA_DC_OUT_ONE_SHOT_MODE)
627         DSI_CMD_SHORT(0x15, 0x35, 0x00),
628 #endif
629         DSI_CMD_SHORT(0x05, 0x29, 0x00),
630         DSI_DLY_MS(20),
631 };
632
633 static struct tegra_dsi_cmd dsi_suspend_cmd[] = {
634         DSI_CMD_SHORT(0x05, 0x28, 0x00),
635         DSI_DLY_MS(20),
636 #if(DC_CTRL_MODE & TEGRA_DC_OUT_ONE_SHOT_MODE)
637         DSI_CMD_SHORT(0x05, 0x34, 0x00),
638 #endif
639         DSI_CMD_SHORT(0x05, 0x10, 0x00),
640         DSI_DLY_MS(5),
641 };
642
643 struct tegra_dsi_out enterprise_dsi = {
644         .n_data_lanes = 2,
645         .pixel_format = TEGRA_DSI_PIXEL_FORMAT_24BIT_P,
646 #if(DC_CTRL_MODE & TEGRA_DC_OUT_ONE_SHOT_MODE)
647         /* For one-shot mode, actual refresh rate is decided by the
648          * frequency of TE signal. Although the frequency of TE is
649          * expected running at rated_refresh_rate (typically 60Hz),
650          * it may vary. Mismatch between freq of DC and TE signal
651          * would cause frame drop. We increase refresh_rate to the
652          * value larger than maximum TE frequency to avoid missing
653          * any TE signal. The value of refresh_rate is also used to
654          * calculate the pixel clock.
655          */
656         .refresh_rate = 66,
657         .rated_refresh_rate = 60,
658 #else
659         .refresh_rate = 60,
660 #endif
661         .virtual_channel = TEGRA_DSI_VIRTUAL_CHANNEL_0,
662
663         .panel_has_frame_buffer = true,
664         .dsi_instance = 0,
665
666         .panel_reset = DSI_PANEL_RESET,
667         .power_saving_suspend = true,
668         .n_init_cmd = ARRAY_SIZE(dsi_init_cmd),
669         .dsi_init_cmd = dsi_init_cmd,
670
671         .n_early_suspend_cmd = ARRAY_SIZE(dsi_early_suspend_cmd),
672         .dsi_early_suspend_cmd = dsi_early_suspend_cmd,
673
674         .n_late_resume_cmd = ARRAY_SIZE(dsi_late_resume_cmd),
675         .dsi_late_resume_cmd = dsi_late_resume_cmd,
676
677         .n_suspend_cmd = ARRAY_SIZE(dsi_suspend_cmd),
678         .dsi_suspend_cmd = dsi_suspend_cmd,
679
680         .video_data_type = TEGRA_DSI_VIDEO_TYPE_COMMAND_MODE,
681         .lp_cmd_mode_freq_khz = 20000,
682
683         /* TODO: Get the vender recommended freq */
684         .lp_read_cmd_mode_freq_khz = 200000,
685 };
686
687 static struct tegra_stereo_out enterprise_stereo = {
688         .set_mode               = &enterprise_stereo_set_mode,
689         .set_orientation        = &enterprise_stereo_set_orientation,
690 };
691
692 #ifdef CONFIG_TEGRA_DC
693 static struct tegra_dc_mode enterprise_dsi_modes[] = {
694         {
695                 .pclk = 10000000,
696                 .h_ref_to_sync = 4,
697                 .v_ref_to_sync = 1,
698                 .h_sync_width = 16,
699                 .v_sync_width = 1,
700                 .h_back_porch = 32,
701                 .v_back_porch = 1,
702                 .h_active = 540,
703                 .v_active = 960,
704                 .h_front_porch = 32,
705                 .v_front_porch = 2,
706         },
707 };
708
709 static struct tegra_fb_data enterprise_dsi_fb_data = {
710         .win            = 0,
711         .xres           = 540,
712         .yres           = 960,
713         .bits_per_pixel = 32,
714         .flags          = TEGRA_FB_FLIP_ON_PROBE,
715 };
716
717 static struct tegra_dc_out enterprise_disp1_out = {
718         .align          = TEGRA_DC_ALIGN_MSB,
719         .order          = TEGRA_DC_ORDER_RED_BLUE,
720         .sd_settings    = &enterprise_sd_settings,
721
722         .flags          = DC_CTRL_MODE,
723
724         .type           = TEGRA_DC_OUT_DSI,
725
726         .modes          = enterprise_dsi_modes,
727         .n_modes        = ARRAY_SIZE(enterprise_dsi_modes),
728
729         .dsi            = &enterprise_dsi,
730         .stereo         = &enterprise_stereo,
731
732         .enable         = enterprise_dsi_panel_enable,
733         .disable        = enterprise_dsi_panel_disable,
734         .postsuspend    = enterprise_dsi_panel_postsuspend,
735
736         .width          = 53,
737         .height         = 95,
738 };
739 static struct tegra_dc_platform_data enterprise_disp1_pdata = {
740         .flags          = TEGRA_DC_FLAG_ENABLED,
741         .default_out    = &enterprise_disp1_out,
742         .emc_clk_rate   = 204000000,
743         .fb             = &enterprise_dsi_fb_data,
744 };
745
746 static struct nvhost_device enterprise_disp1_device = {
747         .name           = "tegradc",
748         .id             = 0,
749         .resource       = enterprise_disp1_resources,
750         .num_resources  = ARRAY_SIZE(enterprise_disp1_resources),
751         .dev = {
752                 .platform_data = &enterprise_disp1_pdata,
753         },
754 };
755
756 static int enterprise_disp1_check_fb(struct device *dev, struct fb_info *info)
757 {
758         return info->device == &enterprise_disp1_device.dev;
759 }
760
761 static struct nvhost_device enterprise_disp2_device = {
762         .name           = "tegradc",
763         .id             = 1,
764         .resource       = enterprise_disp2_resources,
765         .num_resources  = ARRAY_SIZE(enterprise_disp2_resources),
766         .dev = {
767                 .platform_data = &enterprise_disp2_pdata,
768         },
769 };
770 #endif
771
772 #if defined(CONFIG_TEGRA_NVMAP)
773 static struct nvmap_platform_carveout enterprise_carveouts[] = {
774         [0] = NVMAP_HEAP_CARVEOUT_IRAM_INIT,
775         [1] = {
776                 .name           = "generic-0",
777                 .usage_mask     = NVMAP_HEAP_CARVEOUT_GENERIC,
778                 .base           = 0,    /* Filled in by enterprise_panel_init() */
779                 .size           = 0,    /* Filled in by enterprise_panel_init() */
780                 .buddy_size     = SZ_32K,
781         },
782 };
783
784 static struct nvmap_platform_data enterprise_nvmap_data = {
785         .carveouts      = enterprise_carveouts,
786         .nr_carveouts   = ARRAY_SIZE(enterprise_carveouts),
787 };
788
789 static struct platform_device enterprise_nvmap_device = {
790         .name   = "tegra-nvmap",
791         .id     = -1,
792         .dev    = {
793                 .platform_data = &enterprise_nvmap_data,
794         },
795 };
796 #endif
797
798 static struct platform_device *enterprise_gfx_devices[] __initdata = {
799 #if defined(CONFIG_TEGRA_NVMAP)
800         &enterprise_nvmap_device,
801 #endif
802         &tegra_pwfm0_device,
803 };
804
805 static struct platform_device *enterprise_bl_devices[]  = {
806         &enterprise_disp1_backlight_device,
807 };
808
809 #ifdef CONFIG_HAS_EARLYSUSPEND
810 /* put early_suspend/late_resume handlers here for the display in order
811  * to keep the code out of the display driver, keeping it closer to upstream
812  */
813 struct early_suspend enterprise_panel_early_suspender;
814
815 static void enterprise_panel_early_suspend(struct early_suspend *h)
816 {
817         /* power down LCD, add use a black screen for HDMI */
818         if (num_registered_fb > 0)
819                 fb_blank(registered_fb[0], FB_BLANK_POWERDOWN);
820         if (num_registered_fb > 1)
821                 fb_blank(registered_fb[1], FB_BLANK_NORMAL);
822
823 #ifdef CONFIG_TEGRA_CONVSERVATIVE_GOV_ON_EARLYSUPSEND
824         cpufreq_store_default_gov();
825         if (cpufreq_change_gov(cpufreq_conservative_gov))
826                 pr_err("Early_suspend: Error changing governor to %s\n",
827                                 cpufreq_conservative_gov);
828 #endif
829 }
830
831 static void enterprise_panel_late_resume(struct early_suspend *h)
832 {
833         unsigned i;
834
835 #ifdef CONFIG_TEGRA_CONVSERVATIVE_GOV_ON_EARLYSUPSEND
836         if (cpufreq_restore_default_gov())
837                 pr_err("Early_suspend: Unable to restore governor\n");
838 #endif
839         for (i = 0; i < num_registered_fb; i++)
840                 fb_blank(registered_fb[i], FB_BLANK_UNBLANK);
841 }
842 #endif
843
844 int __init enterprise_panel_init(void)
845 {
846         int err;
847         struct resource __maybe_unused *res;
848         struct board_info board_info;
849
850         tegra_get_board_info(&board_info);
851
852         BUILD_BUG_ON(ARRAY_SIZE(enterprise_bl_output_measured_a03) != 256);
853         BUILD_BUG_ON(ARRAY_SIZE(enterprise_bl_output_measured_a02) != 256);
854
855         if (board_info.fab >= BOARD_FAB_A03) {
856                 enterprise_disp1_backlight_data.clk_div = 0x1D;
857                 bl_output = enterprise_bl_output_measured_a03;
858         } else
859                 bl_output = enterprise_bl_output_measured_a02;
860
861         enterprise_dsi.chip_id = tegra_get_chipid();
862         enterprise_dsi.chip_rev = tegra_revision;
863
864 #if defined(CONFIG_TEGRA_NVMAP)
865         enterprise_carveouts[1].base = tegra_carveout_start;
866         enterprise_carveouts[1].size = tegra_carveout_size;
867 #endif
868
869         gpio_request(enterprise_hdmi_hpd, "hdmi_hpd");
870         gpio_direction_input(enterprise_hdmi_hpd);
871
872         gpio_request(enterprise_lcd_2d_3d, "lcd_2d_3d");
873         gpio_direction_output(enterprise_lcd_2d_3d, 0);
874         enterprise_stereo_set_mode(enterprise_stereo.mode_2d_3d);
875
876         gpio_request(enterprise_lcd_swp_pl, "lcd_swp_pl");
877         gpio_direction_output(enterprise_lcd_swp_pl, 0);
878         enterprise_stereo_set_orientation(enterprise_stereo.orientation);
879
880 #if !(DC_CTRL_MODE & TEGRA_DC_OUT_ONE_SHOT_MODE)
881         gpio_request(enterprise_lcd_swp_pl, "lcd_te");
882         gpio_direction_input(enterprise_lcd_te);
883 #endif
884
885 #ifdef CONFIG_HAS_EARLYSUSPEND
886         enterprise_panel_early_suspender.suspend = enterprise_panel_early_suspend;
887         enterprise_panel_early_suspender.resume = enterprise_panel_late_resume;
888         enterprise_panel_early_suspender.level = EARLY_SUSPEND_LEVEL_DISABLE_FB;
889         register_early_suspend(&enterprise_panel_early_suspender);
890 #endif
891
892 #ifdef CONFIG_TEGRA_GRHOST
893         err = tegra3_register_host1x_devices();
894         if (err)
895                 return err;
896 #endif
897
898         err = platform_add_devices(enterprise_gfx_devices,
899                                 ARRAY_SIZE(enterprise_gfx_devices));
900
901 #if defined(CONFIG_TEGRA_GRHOST) && defined(CONFIG_TEGRA_DC)
902         res = nvhost_get_resource_byname(&enterprise_disp1_device,
903                                          IORESOURCE_MEM, "fbmem");
904         res->start = tegra_fb_start;
905         res->end = tegra_fb_start + tegra_fb_size - 1;
906 #endif
907
908         /* Copy the bootloader fb to the fb. */
909         tegra_move_framebuffer(tegra_fb_start, tegra_bootloader_fb_start,
910                 min(tegra_fb_size, tegra_bootloader_fb_size));
911
912 #if defined(CONFIG_TEGRA_GRHOST) && defined(CONFIG_TEGRA_DC)
913         if (!err)
914                 err = nvhost_device_register(&enterprise_disp1_device);
915
916         res = nvhost_get_resource_byname(&enterprise_disp2_device,
917                                          IORESOURCE_MEM, "fbmem");
918         res->start = tegra_fb2_start;
919         res->end = tegra_fb2_start + tegra_fb2_size - 1;
920         if (!err)
921                 err = nvhost_device_register(&enterprise_disp2_device);
922 #endif
923
924 #if defined(CONFIG_TEGRA_GRHOST) && defined(CONFIG_TEGRA_NVAVP)
925         if (!err)
926                 err = nvhost_device_register(&nvavp_device);
927 #endif
928
929         if (!err)
930                 err = platform_add_devices(enterprise_bl_devices,
931                                 ARRAY_SIZE(enterprise_bl_devices));
932         return err;
933 }