rtc: tps80031: register as mfd sub device
[linux-2.6.git] / arch / arm / mach-tegra / board-enterprise-panel.c
1 /*
2  * arch/arm/mach-tegra/board-enterprise-panel.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA CORPORATION. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/delay.h>
22 #include <linux/gpio.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/resource.h>
25 #include <asm/mach-types.h>
26 #include <linux/platform_device.h>
27 #include <linux/earlysuspend.h>
28 #include <linux/tegra_pwm_bl.h>
29 #include <linux/pwm_backlight.h>
30 #include <asm/atomic.h>
31 #include <linux/nvhost.h>
32 #include <linux/nvmap.h>
33 #include <mach/irqs.h>
34 #include <mach/iomap.h>
35 #include <mach/dc.h>
36 #include <mach/fb.h>
37 #include <mach/hardware.h>
38
39 #include "board.h"
40 #include "board-enterprise.h"
41 #include "devices.h"
42 #include "gpio-names.h"
43 #include "tegra3_host1x_devices.h"
44
45 #define DC_CTRL_MODE    TEGRA_DC_OUT_ONE_SHOT_MODE
46
47 /* Select panel to be used. */
48 #define AVDD_LCD PMU_TCA6416_GPIO_PORT17
49 #define DSI_PANEL_RESET 1
50
51 #define enterprise_lvds_shutdown        TEGRA_GPIO_PL2
52 #define enterprise_hdmi_hpd             TEGRA_GPIO_PN7
53
54 #define enterprise_dsi_panel_reset      TEGRA_GPIO_PW0
55
56 #define enterprise_lcd_2d_3d            TEGRA_GPIO_PH1
57 #define ENTERPRISE_STEREO_3D            0
58 #define ENTERPRISE_STEREO_2D            1
59
60 #define enterprise_lcd_swp_pl           TEGRA_GPIO_PH2
61 #define ENTERPRISE_STEREO_LANDSCAPE     0
62 #define ENTERPRISE_STEREO_PORTRAIT      1
63
64 #define enterprise_lcd_te               TEGRA_GPIO_PJ1
65
66 #define enterprise_bl_pwm               TEGRA_GPIO_PH3
67
68 #ifdef CONFIG_TEGRA_DC
69 static struct regulator *enterprise_dsi_reg;
70 static bool dsi_regulator_status;
71 static struct regulator *enterprise_lcd_reg;
72
73 static struct regulator *enterprise_hdmi_reg;
74 static struct regulator *enterprise_hdmi_pll;
75 static struct regulator *enterprise_hdmi_vddio;
76 #endif
77
78 static atomic_t sd_brightness = ATOMIC_INIT(255);
79
80 static tegra_dc_bl_output enterprise_bl_output_measured_a02 = {
81         1, 5, 9, 10, 11, 12, 12, 13,
82         13, 14, 14, 15, 15, 16, 16, 17,
83         17, 18, 18, 19, 19, 20, 21, 21,
84         22, 22, 23, 24, 24, 25, 26, 26,
85         27, 27, 28, 29, 29, 31, 31, 32,
86         32, 33, 34, 35, 36, 36, 37, 38,
87         39, 39, 40, 41, 41, 42, 43, 43,
88         44, 45, 45, 46, 47, 47, 48, 49,
89         49, 50, 51, 51, 52, 53, 53, 54,
90         55, 56, 56, 57, 58, 59, 60, 61,
91         61, 62, 63, 64, 65, 65, 66, 67,
92         67, 68, 69, 69, 70, 71, 71, 72,
93         73, 73, 74, 74, 75, 76, 76, 77,
94         77, 78, 79, 79, 80, 81, 82, 83,
95         83, 84, 85, 85, 86, 86, 88, 89,
96         90, 91, 91, 92, 93, 93, 94, 95,
97         95, 96, 97, 97, 98, 99, 99, 100,
98         101, 101, 102, 103, 103, 104, 105, 105,
99         107, 107, 108, 109, 110, 111, 111, 112,
100         113, 113, 114, 115, 115, 116, 117, 117,
101         118, 119, 119, 120, 121, 122, 123, 124,
102         124, 125, 126, 126, 127, 128, 129, 129,
103         130, 131, 131, 132, 133, 133, 134, 135,
104         135, 136, 137, 137, 138, 139, 139, 140,
105         142, 142, 143, 144, 145, 146, 147, 147,
106         148, 149, 149, 150, 151, 152, 153, 153,
107         153, 154, 155, 156, 157, 158, 158, 159,
108         160, 161, 162, 163, 163, 164, 165, 165,
109         166, 166, 167, 168, 169, 169, 170, 170,
110         171, 172, 173, 173, 174, 175, 175, 176,
111         176, 178, 178, 179, 180, 181, 182, 182,
112         183, 184, 185, 186, 186, 187, 188, 188
113 };
114
115 static tegra_dc_bl_output enterprise_bl_output_measured_a03 = {
116         0, 1, 2, 3, 4, 5, 6, 7,
117         8, 9, 10, 12, 13, 14, 15, 16,
118         17, 19, 20, 21, 22, 22, 23, 24,
119         25, 26, 27, 28, 29, 29, 30, 32,
120         33, 34, 35, 36, 38, 39, 40, 42,
121         43, 44, 46, 47, 49, 50, 51, 52,
122         53, 54, 55, 56, 57, 58, 59, 60,
123         61, 63, 64, 66, 67, 69, 70, 71,
124         72, 73, 74, 75, 76, 77, 78, 79,
125         80, 81, 82, 83, 84, 84, 85, 86,
126         87, 88, 89, 90, 91, 92, 93, 94,
127         95, 96, 97, 98, 99, 100, 101, 102,
128         103, 104, 105, 106, 107, 108, 109, 110,
129         110, 111, 112, 113, 113, 114, 115, 116,
130         116, 117, 118, 118, 119, 120, 121, 122,
131         123, 124, 125, 126, 127, 128, 129, 130,
132         130, 131, 132, 133, 134, 135, 136, 137,
133         138, 139, 140, 141, 142, 143, 144, 145,
134         146, 147, 148, 149, 150, 151, 152, 153,
135         154, 155, 156, 157, 158, 159, 160, 160,
136         161, 162, 163, 163, 164, 165, 165, 166,
137         167, 168, 168, 169, 170, 171, 172, 173,
138         174, 175, 176, 176, 177, 178, 179, 180,
139         181, 182, 183, 184, 185, 186, 187, 188,
140         189, 190, 191, 191, 192, 193, 194, 194,
141         195, 196, 197, 197, 198, 199, 199, 200,
142         202, 203, 205, 206, 208, 209, 211, 212,
143         213, 215, 216, 218, 219, 220, 221, 222,
144         223, 224, 225, 226, 227, 228, 229, 230,
145         231, 232, 233, 234, 235, 236, 237, 238,
146         239, 240, 241, 243, 244, 245, 247, 248,
147         250, 251, 251, 252, 253, 254, 254, 255,
148 };
149
150 static p_tegra_dc_bl_output bl_output;
151
152 static bool kernel_1st_panel_init = true;
153
154 static int enterprise_backlight_notify(struct device *unused, int brightness)
155 {
156         int cur_sd_brightness = atomic_read(&sd_brightness);
157
158         /* SD brightness is a percentage, 8-bit value. */
159         brightness = (brightness * cur_sd_brightness) / 255;
160
161         /* Apply any backlight response curve */
162         if (brightness > 255)
163                 pr_info("Error: Brightness > 255!\n");
164         else
165                 brightness = bl_output[brightness];
166
167         return brightness;
168 }
169
170 static int enterprise_disp1_check_fb(struct device *dev, struct fb_info *info);
171
172 #if IS_EXTERNAL_PWM
173 static struct platform_pwm_backlight_data enterprise_disp1_backlight_data = {
174         .pwm_id         = 3,
175         .max_brightness = 255,
176         .dft_brightness = 224,
177         .pwm_period_ns  = 1000000,
178         .notify         = enterprise_backlight_notify,
179         /* Only toggle backlight on fb blank notifications for disp1 */
180         .check_fb       = enterprise_disp1_check_fb,
181 };
182 #else
183 /*
184  * In case which_pwm is TEGRA_PWM_PM0,
185  * gpio_conf_to_sfio should be TEGRA_GPIO_PW0: set LCD_CS1_N pin to SFIO
186  * In case which_pwm is TEGRA_PWM_PM1,
187  * gpio_conf_to_sfio should be TEGRA_GPIO_PW1: set LCD_M1 pin to SFIO
188  */
189 static struct platform_tegra_pwm_backlight_data enterprise_disp1_backlight_data = {
190         .which_dc               = 0,
191         .which_pwm              = TEGRA_PWM_PM1,
192         .gpio_conf_to_sfio      = TEGRA_GPIO_PW1,
193         .max_brightness         = 255,
194         .dft_brightness         = 224,
195         .notify         = enterprise_backlight_notify,
196         .period                 = 0xFF,
197         .clk_div                = 0x3FF,
198         .clk_select             = 0,
199         /* Only toggle backlight on fb blank notifications for disp1 */
200         .check_fb       = enterprise_disp1_check_fb,
201 };
202 #endif
203
204
205 static struct platform_device enterprise_disp1_backlight_device = {
206 #if IS_EXTERNAL_PWM
207         .name   = "pwm-backlight",
208 #else
209         .name   = "tegra-pwm-bl",
210 #endif
211         .id     = -1,
212         .dev    = {
213                 .platform_data = &enterprise_disp1_backlight_data,
214         },
215 };
216
217 #ifdef CONFIG_TEGRA_DC
218 static int enterprise_hdmi_vddio_enable(void)
219 {
220         int ret;
221         if (!enterprise_hdmi_vddio) {
222                 enterprise_hdmi_vddio = regulator_get(NULL, "hdmi_5v0");
223                 if (IS_ERR_OR_NULL(enterprise_hdmi_vddio)) {
224                         ret = PTR_ERR(enterprise_hdmi_vddio);
225                         pr_err("hdmi: couldn't get regulator hdmi_5v0\n");
226                         enterprise_hdmi_vddio = NULL;
227                         return ret;
228                 }
229         }
230         ret = regulator_enable(enterprise_hdmi_vddio);
231         if (ret < 0) {
232                 pr_err("hdmi: couldn't enable regulator hdmi_5v0\n");
233                 regulator_put(enterprise_hdmi_vddio);
234                 enterprise_hdmi_vddio = NULL;
235                 return ret;
236         }
237         return ret;
238 }
239
240 static int enterprise_hdmi_vddio_disable(void)
241 {
242         if (enterprise_hdmi_vddio) {
243                 regulator_disable(enterprise_hdmi_vddio);
244                 regulator_put(enterprise_hdmi_vddio);
245                 enterprise_hdmi_vddio = NULL;
246         }
247         return 0;
248 }
249
250 static int enterprise_hdmi_enable(void)
251 {
252         int ret;
253         if (!enterprise_hdmi_reg) {
254                 enterprise_hdmi_reg = regulator_get(NULL, "avdd_hdmi");
255                 if (IS_ERR_OR_NULL(enterprise_hdmi_reg)) {
256                         pr_err("hdmi: couldn't get regulator avdd_hdmi\n");
257                         enterprise_hdmi_reg = NULL;
258                         return PTR_ERR(enterprise_hdmi_reg);
259                 }
260         }
261         ret = regulator_enable(enterprise_hdmi_reg);
262         if (ret < 0) {
263                 pr_err("hdmi: couldn't enable regulator avdd_hdmi\n");
264                 return ret;
265         }
266         if (!enterprise_hdmi_pll) {
267                 enterprise_hdmi_pll = regulator_get(NULL, "avdd_hdmi_pll");
268                 if (IS_ERR_OR_NULL(enterprise_hdmi_pll)) {
269                         pr_err("hdmi: couldn't get regulator avdd_hdmi_pll\n");
270                         enterprise_hdmi_pll = NULL;
271                         regulator_put(enterprise_hdmi_reg);
272                         enterprise_hdmi_reg = NULL;
273                         return PTR_ERR(enterprise_hdmi_pll);
274                 }
275         }
276         ret = regulator_enable(enterprise_hdmi_pll);
277         if (ret < 0) {
278                 pr_err("hdmi: couldn't enable regulator avdd_hdmi_pll\n");
279                 return ret;
280         }
281         return 0;
282 }
283
284 static int enterprise_hdmi_disable(void)
285 {
286
287         regulator_disable(enterprise_hdmi_reg);
288         regulator_put(enterprise_hdmi_reg);
289         enterprise_hdmi_reg = NULL;
290
291         regulator_disable(enterprise_hdmi_pll);
292         regulator_put(enterprise_hdmi_pll);
293         enterprise_hdmi_pll = NULL;
294
295         return 0;
296 }
297 static struct resource enterprise_disp1_resources[] = {
298         {
299                 .name   = "irq",
300                 .start  = INT_DISPLAY_GENERAL,
301                 .end    = INT_DISPLAY_GENERAL,
302                 .flags  = IORESOURCE_IRQ,
303         },
304         {
305                 .name   = "regs",
306                 .start  = TEGRA_DISPLAY_BASE,
307                 .end    = TEGRA_DISPLAY_BASE + TEGRA_DISPLAY_SIZE-1,
308                 .flags  = IORESOURCE_MEM,
309         },
310         {
311                 .name   = "fbmem",
312                 .start  = 0,    /* Filled in by enterprise_panel_init() */
313                 .end    = 0,    /* Filled in by enterprise_panel_init() */
314                 .flags  = IORESOURCE_MEM,
315         },
316         {
317                 .name   = "dsi_regs",
318                 .start  = TEGRA_DSI_BASE,
319                 .end    = TEGRA_DSI_BASE + TEGRA_DSI_SIZE - 1,
320                 .flags  = IORESOURCE_MEM,
321         },
322 };
323
324 static struct resource enterprise_disp2_resources[] = {
325         {
326                 .name   = "irq",
327                 .start  = INT_DISPLAY_B_GENERAL,
328                 .end    = INT_DISPLAY_B_GENERAL,
329                 .flags  = IORESOURCE_IRQ,
330         },
331         {
332                 .name   = "regs",
333                 .start  = TEGRA_DISPLAY2_BASE,
334                 .end    = TEGRA_DISPLAY2_BASE + TEGRA_DISPLAY2_SIZE - 1,
335                 .flags  = IORESOURCE_MEM,
336         },
337         {
338                 .name   = "fbmem",
339                 .flags  = IORESOURCE_MEM,
340                 .start  = 0,
341                 .end    = 0,
342         },
343         {
344                 .name   = "hdmi_regs",
345                 .start  = TEGRA_HDMI_BASE,
346                 .end    = TEGRA_HDMI_BASE + TEGRA_HDMI_SIZE - 1,
347                 .flags  = IORESOURCE_MEM,
348         },
349 };
350
351 static struct tegra_dc_sd_settings enterprise_sd_settings = {
352         .enable = 1, /* Normal mode operation */
353         .use_auto_pwm = false,
354         .hw_update_delay = 0,
355         .bin_width = -1,
356         .aggressiveness = 1,
357         .phase_in_adjustments = true,
358         .use_vid_luma = false,
359         /* Default video coefficients */
360         .coeff = {5, 9, 2},
361         .fc = {0, 0},
362         /* Immediate backlight changes */
363         .blp = {1024, 255},
364         /* Gammas: R: 2.2 G: 2.2 B: 2.2 */
365         /* Default BL TF */
366         .bltf = {
367                         {
368                                 {57, 65, 74, 83},
369                                 {93, 103, 114, 126},
370                                 {138, 151, 165, 179},
371                                 {194, 209, 225, 242},
372                         },
373                         {
374                                 {58, 66, 75, 84},
375                                 {94, 105, 116, 127},
376                                 {140, 153, 166, 181},
377                                 {196, 211, 227, 244},
378                         },
379                         {
380                                 {60, 68, 77, 87},
381                                 {97, 107, 119, 130},
382                                 {143, 156, 170, 184},
383                                 {199, 215, 231, 248},
384                         },
385                         {
386                                 {64, 73, 82, 91},
387                                 {102, 113, 124, 137},
388                                 {149, 163, 177, 192},
389                                 {207, 223, 240, 255},
390                         },
391                 },
392         /* Default LUT */
393         .lut = {
394                         {
395                                 {250, 250, 250},
396                                 {194, 194, 194},
397                                 {149, 149, 149},
398                                 {113, 113, 113},
399                                 {82, 82, 82},
400                                 {56, 56, 56},
401                                 {34, 34, 34},
402                                 {15, 15, 15},
403                                 {0, 0, 0},
404                         },
405                         {
406                                 {246, 246, 246},
407                                 {191, 191, 191},
408                                 {147, 147, 147},
409                                 {111, 111, 111},
410                                 {80, 80, 80},
411                                 {55, 55, 55},
412                                 {33, 33, 33},
413                                 {14, 14, 14},
414                                 {0, 0, 0},
415                         },
416                         {
417                                 {239, 239, 239},
418                                 {185, 185, 185},
419                                 {142, 142, 142},
420                                 {107, 107, 107},
421                                 {77, 77, 77},
422                                 {52, 52, 52},
423                                 {30, 30, 30},
424                                 {12, 12, 12},
425                                 {0, 0, 0},
426                         },
427                         {
428                                 {224, 224, 224},
429                                 {173, 173, 173},
430                                 {133, 133, 133},
431                                 {99, 99, 99},
432                                 {70, 70, 70},
433                                 {46, 46, 46},
434                                 {25, 25, 25},
435                                 {7, 7, 7},
436                                 {0, 0, 0},
437                         },
438                 },
439         .sd_brightness = &sd_brightness,
440         .bl_device = &enterprise_disp1_backlight_device,
441 };
442
443 static struct tegra_fb_data enterprise_hdmi_fb_data = {
444         .win            = 0,
445         .xres           = 1366,
446         .yres           = 768,
447         .bits_per_pixel = 32,
448         .flags          = TEGRA_FB_FLIP_ON_PROBE,
449 };
450
451 static struct tegra_dc_out enterprise_disp2_out = {
452         .type           = TEGRA_DC_OUT_HDMI,
453         .flags          = TEGRA_DC_OUT_HOTPLUG_HIGH,
454         .parent_clk     = "pll_d2_out0",
455
456         .dcc_bus        = 3,
457         .hotplug_gpio   = enterprise_hdmi_hpd,
458
459         .max_pixclock   = KHZ2PICOS(148500),
460
461         .align          = TEGRA_DC_ALIGN_MSB,
462         .order          = TEGRA_DC_ORDER_RED_BLUE,
463
464         .enable         = enterprise_hdmi_enable,
465         .disable        = enterprise_hdmi_disable,
466         .postsuspend    = enterprise_hdmi_vddio_disable,
467         .hotplug_init   = enterprise_hdmi_vddio_enable,
468 };
469
470 static struct tegra_dc_platform_data enterprise_disp2_pdata = {
471         .flags          = 0,
472         .default_out    = &enterprise_disp2_out,
473         .fb             = &enterprise_hdmi_fb_data,
474         .emc_clk_rate   = 300000000,
475 };
476
477 static int avdd_dsi_csi_rail_enable(void)
478 {
479         int ret;
480
481         if (dsi_regulator_status == true)
482                 return 0;
483
484         if (enterprise_dsi_reg == NULL) {
485                 enterprise_dsi_reg = regulator_get(NULL, "avdd_dsi_csi");
486                 if (IS_ERR_OR_NULL(enterprise_dsi_reg)) {
487                         pr_err("dsi: Could not get regulator avdd_dsi_csi\n");
488                         enterprise_dsi_reg = NULL;
489                         return PTR_ERR(enterprise_dsi_reg);
490                 }
491         }
492         ret = regulator_enable(enterprise_dsi_reg);
493         if (ret < 0) {
494                 pr_err("DSI regulator avdd_dsi_csi could not be enabled\n");
495                 return ret;
496         }
497         dsi_regulator_status = true;
498         return 0;
499 }
500
501 static int avdd_dsi_csi_rail_disable(void)
502 {
503         int ret;
504
505         if (dsi_regulator_status == false)
506                 return 0;
507
508         if (enterprise_dsi_reg == NULL) {
509                 pr_warn("%s: unbalanced disable\n", __func__);
510                 return -EIO;
511         }
512
513         ret = regulator_disable(enterprise_dsi_reg);
514         if (ret < 0) {
515                 pr_err("DSI regulator avdd_dsi_csi cannot be disabled\n");
516                 return ret;
517         }
518         dsi_regulator_status = false;
519         return 0;
520 }
521
522 static int enterprise_dsi_panel_enable(void)
523 {
524         int ret;
525         struct board_info board_info;
526
527         tegra_get_board_info(&board_info);
528
529         ret = avdd_dsi_csi_rail_enable();
530         if (ret)
531                 return ret;
532
533 #if IS_EXTERNAL_PWM
534         tegra_gpio_disable(enterprise_bl_pwm);
535 #endif
536
537 #if DSI_PANEL_RESET
538         if (board_info.fab >= BOARD_FAB_A03) {
539                 if (enterprise_lcd_reg == NULL) {
540                         enterprise_lcd_reg = regulator_get(NULL, "lcd_vddio_en");
541                         if (IS_ERR_OR_NULL(enterprise_lcd_reg)) {
542                                 pr_err("Could not get regulator lcd_vddio_en\n");
543                                 ret = PTR_ERR(enterprise_lcd_reg);
544                                 enterprise_lcd_reg = NULL;
545                                 return ret;
546                         }
547                 }
548                 if (enterprise_lcd_reg != NULL) {
549                         ret = regulator_enable(enterprise_lcd_reg);
550                         if (ret < 0) {
551                                 pr_err("Could not enable lcd_vddio_en\n");
552                                 return ret;
553                         }
554                 }
555         }
556
557         if (kernel_1st_panel_init == true) {
558                 ret = gpio_request(enterprise_dsi_panel_reset, "panel reset");
559                 if (ret < 0)
560                         return ret;
561                 kernel_1st_panel_init = false;
562         } else {
563                 gpio_direction_output(enterprise_dsi_panel_reset, 0);
564
565                 gpio_set_value(enterprise_dsi_panel_reset, 0);
566                 udelay(2000);
567                 gpio_set_value(enterprise_dsi_panel_reset, 1);
568                 mdelay(20);
569         }
570 #endif
571
572         return ret;
573 }
574
575 static int enterprise_dsi_panel_disable(void)
576 {
577         if (enterprise_lcd_reg != NULL)
578                 regulator_disable(enterprise_lcd_reg);
579
580 #if DSI_PANEL_RESET
581         gpio_direction_output(enterprise_dsi_panel_reset, 0);
582 #endif
583         return 0;
584 }
585 #endif
586
587 static void enterprise_stereo_set_mode(int mode)
588 {
589         switch (mode) {
590         case TEGRA_DC_STEREO_MODE_2D:
591                 gpio_set_value(TEGRA_GPIO_PH1, ENTERPRISE_STEREO_2D);
592                 break;
593         case TEGRA_DC_STEREO_MODE_3D:
594                 gpio_set_value(TEGRA_GPIO_PH1, ENTERPRISE_STEREO_3D);
595                 break;
596         }
597 }
598
599 static void enterprise_stereo_set_orientation(int mode)
600 {
601         switch (mode) {
602         case TEGRA_DC_STEREO_LANDSCAPE:
603                 gpio_set_value(TEGRA_GPIO_PH2, ENTERPRISE_STEREO_LANDSCAPE);
604                 break;
605         case TEGRA_DC_STEREO_PORTRAIT:
606                 gpio_set_value(TEGRA_GPIO_PH2, ENTERPRISE_STEREO_PORTRAIT);
607                 break;
608         }
609 }
610
611 #ifdef CONFIG_TEGRA_DC
612 static int enterprise_dsi_panel_postsuspend(void)
613 {
614         /* Disable enterprise dsi rail */
615         return avdd_dsi_csi_rail_disable();
616 }
617 #endif
618
619 static struct tegra_dsi_cmd dsi_init_cmd[]= {
620         DSI_CMD_SHORT(0x05, 0x11, 0x00),
621         DSI_DLY_MS(20),
622 #if(DC_CTRL_MODE & TEGRA_DC_OUT_ONE_SHOT_MODE)
623         DSI_CMD_SHORT(0x15, 0x35, 0x00),
624 #endif
625         DSI_CMD_SHORT(0x05, 0x29, 0x00),
626         DSI_DLY_MS(20),
627 };
628
629 static struct tegra_dsi_cmd dsi_early_suspend_cmd[] = {
630         DSI_CMD_SHORT(0x05, 0x28, 0x00),
631         DSI_DLY_MS(20),
632 #if(DC_CTRL_MODE & TEGRA_DC_OUT_ONE_SHOT_MODE)
633         DSI_CMD_SHORT(0x05, 0x34, 0x00),
634 #endif
635 };
636
637 static struct tegra_dsi_cmd dsi_late_resume_cmd[] = {
638 #if(DC_CTRL_MODE & TEGRA_DC_OUT_ONE_SHOT_MODE)
639         DSI_CMD_SHORT(0x15, 0x35, 0x00),
640 #endif
641         DSI_CMD_SHORT(0x05, 0x29, 0x00),
642         DSI_DLY_MS(20),
643 };
644
645 static struct tegra_dsi_cmd dsi_suspend_cmd[] = {
646         DSI_CMD_SHORT(0x05, 0x28, 0x00),
647         DSI_DLY_MS(20),
648 #if(DC_CTRL_MODE & TEGRA_DC_OUT_ONE_SHOT_MODE)
649         DSI_CMD_SHORT(0x05, 0x34, 0x00),
650 #endif
651         DSI_CMD_SHORT(0x05, 0x10, 0x00),
652         DSI_DLY_MS(5),
653 };
654
655 struct tegra_dsi_out enterprise_dsi = {
656         .n_data_lanes = 2,
657         .pixel_format = TEGRA_DSI_PIXEL_FORMAT_24BIT_P,
658 #if(DC_CTRL_MODE & TEGRA_DC_OUT_ONE_SHOT_MODE)
659         /* For one-shot mode, actual refresh rate is decided by the
660          * frequency of TE signal. Although the frequency of TE is
661          * expected running at rated_refresh_rate (typically 60Hz),
662          * it may vary. Mismatch between freq of DC and TE signal
663          * would cause frame drop. We increase refresh_rate to the
664          * value larger than maximum TE frequency to avoid missing
665          * any TE signal. The value of refresh_rate is also used to
666          * calculate the pixel clock.
667          */
668         .refresh_rate = 66,
669         .rated_refresh_rate = 60,
670 #else
671         .refresh_rate = 60,
672 #endif
673         .virtual_channel = TEGRA_DSI_VIRTUAL_CHANNEL_0,
674
675         .panel_has_frame_buffer = true,
676         .dsi_instance = 0,
677
678         .panel_reset = DSI_PANEL_RESET,
679         .power_saving_suspend = true,
680         .n_init_cmd = ARRAY_SIZE(dsi_init_cmd),
681         .dsi_init_cmd = dsi_init_cmd,
682
683         .n_early_suspend_cmd = ARRAY_SIZE(dsi_early_suspend_cmd),
684         .dsi_early_suspend_cmd = dsi_early_suspend_cmd,
685
686         .n_late_resume_cmd = ARRAY_SIZE(dsi_late_resume_cmd),
687         .dsi_late_resume_cmd = dsi_late_resume_cmd,
688
689         .n_suspend_cmd = ARRAY_SIZE(dsi_suspend_cmd),
690         .dsi_suspend_cmd = dsi_suspend_cmd,
691
692         .video_data_type = TEGRA_DSI_VIDEO_TYPE_COMMAND_MODE,
693         .lp_cmd_mode_freq_khz = 20000,
694
695         /* TODO: Get the vender recommended freq */
696         .lp_read_cmd_mode_freq_khz = 200000,
697 };
698
699 static struct tegra_stereo_out enterprise_stereo = {
700         .set_mode               = &enterprise_stereo_set_mode,
701         .set_orientation        = &enterprise_stereo_set_orientation,
702 };
703
704 #ifdef CONFIG_TEGRA_DC
705 static struct tegra_dc_mode enterprise_dsi_modes[] = {
706         {
707                 .pclk = 10000000,
708                 .h_ref_to_sync = 4,
709                 .v_ref_to_sync = 1,
710                 .h_sync_width = 16,
711                 .v_sync_width = 1,
712                 .h_back_porch = 32,
713                 .v_back_porch = 1,
714                 .h_active = 540,
715                 .v_active = 960,
716                 .h_front_porch = 32,
717                 .v_front_porch = 2,
718         },
719 };
720
721 static struct tegra_fb_data enterprise_dsi_fb_data = {
722         .win            = 0,
723         .xres           = 540,
724         .yres           = 960,
725         .bits_per_pixel = 32,
726         .flags          = TEGRA_FB_FLIP_ON_PROBE,
727 };
728
729 static struct tegra_dc_out enterprise_disp1_out = {
730         .align          = TEGRA_DC_ALIGN_MSB,
731         .order          = TEGRA_DC_ORDER_RED_BLUE,
732         .sd_settings    = &enterprise_sd_settings,
733
734         .flags          = DC_CTRL_MODE,
735
736         .type           = TEGRA_DC_OUT_DSI,
737
738         .modes          = enterprise_dsi_modes,
739         .n_modes        = ARRAY_SIZE(enterprise_dsi_modes),
740
741         .dsi            = &enterprise_dsi,
742         .stereo         = &enterprise_stereo,
743
744         .enable         = enterprise_dsi_panel_enable,
745         .disable        = enterprise_dsi_panel_disable,
746         .postsuspend    = enterprise_dsi_panel_postsuspend,
747
748         .width          = 53,
749         .height         = 95,
750 };
751 static struct tegra_dc_platform_data enterprise_disp1_pdata = {
752         .flags          = TEGRA_DC_FLAG_ENABLED,
753         .default_out    = &enterprise_disp1_out,
754         .emc_clk_rate   = 204000000,
755         .fb             = &enterprise_dsi_fb_data,
756 };
757
758 static struct nvhost_device enterprise_disp1_device = {
759         .name           = "tegradc",
760         .id             = 0,
761         .resource       = enterprise_disp1_resources,
762         .num_resources  = ARRAY_SIZE(enterprise_disp1_resources),
763         .dev = {
764                 .platform_data = &enterprise_disp1_pdata,
765         },
766 };
767
768 static int enterprise_disp1_check_fb(struct device *dev, struct fb_info *info)
769 {
770         return info->device == &enterprise_disp1_device.dev;
771 }
772
773 static struct nvhost_device enterprise_disp2_device = {
774         .name           = "tegradc",
775         .id             = 1,
776         .resource       = enterprise_disp2_resources,
777         .num_resources  = ARRAY_SIZE(enterprise_disp2_resources),
778         .dev = {
779                 .platform_data = &enterprise_disp2_pdata,
780         },
781 };
782 #endif
783
784 #if defined(CONFIG_TEGRA_NVMAP)
785 static struct nvmap_platform_carveout enterprise_carveouts[] = {
786         [0] = NVMAP_HEAP_CARVEOUT_IRAM_INIT,
787         [1] = {
788                 .name           = "generic-0",
789                 .usage_mask     = NVMAP_HEAP_CARVEOUT_GENERIC,
790                 .base           = 0,    /* Filled in by enterprise_panel_init() */
791                 .size           = 0,    /* Filled in by enterprise_panel_init() */
792                 .buddy_size     = SZ_32K,
793         },
794 };
795
796 static struct nvmap_platform_data enterprise_nvmap_data = {
797         .carveouts      = enterprise_carveouts,
798         .nr_carveouts   = ARRAY_SIZE(enterprise_carveouts),
799 };
800
801 static struct platform_device enterprise_nvmap_device = {
802         .name   = "tegra-nvmap",
803         .id     = -1,
804         .dev    = {
805                 .platform_data = &enterprise_nvmap_data,
806         },
807 };
808 #endif
809
810 static struct platform_device *enterprise_gfx_devices[] __initdata = {
811 #if defined(CONFIG_TEGRA_NVMAP)
812         &enterprise_nvmap_device,
813 #endif
814 #if IS_EXTERNAL_PWM
815         &tegra_pwfm3_device,
816 #else
817         &tegra_pwfm0_device,
818 #endif
819 };
820
821 static struct platform_device *enterprise_bl_devices[]  = {
822         &enterprise_disp1_backlight_device,
823 };
824
825 #ifdef CONFIG_HAS_EARLYSUSPEND
826 /* put early_suspend/late_resume handlers here for the display in order
827  * to keep the code out of the display driver, keeping it closer to upstream
828  */
829 struct early_suspend enterprise_panel_early_suspender;
830
831 static void enterprise_panel_early_suspend(struct early_suspend *h)
832 {
833         /* power down LCD, add use a black screen for HDMI */
834         if (num_registered_fb > 0)
835                 fb_blank(registered_fb[0], FB_BLANK_POWERDOWN);
836         if (num_registered_fb > 1)
837                 fb_blank(registered_fb[1], FB_BLANK_NORMAL);
838
839 #ifdef CONFIG_TEGRA_CONVSERVATIVE_GOV_ON_EARLYSUPSEND
840         cpufreq_store_default_gov();
841         cpufreq_change_gov(cpufreq_conservative_gov);
842 #endif
843 }
844
845 static void enterprise_panel_late_resume(struct early_suspend *h)
846 {
847         unsigned i;
848
849 #ifdef CONFIG_TEGRA_CONVSERVATIVE_GOV_ON_EARLYSUPSEND
850         cpufreq_restore_default_gov();
851 #endif
852         for (i = 0; i < num_registered_fb; i++)
853                 fb_blank(registered_fb[i], FB_BLANK_UNBLANK);
854 }
855 #endif
856
857 int __init enterprise_panel_init(void)
858 {
859         int err;
860         struct resource __maybe_unused *res;
861         struct board_info board_info;
862
863         tegra_get_board_info(&board_info);
864
865         BUILD_BUG_ON(ARRAY_SIZE(enterprise_bl_output_measured_a03) != 256);
866         BUILD_BUG_ON(ARRAY_SIZE(enterprise_bl_output_measured_a02) != 256);
867
868         if (board_info.fab >= BOARD_FAB_A03) {
869 #if !(IS_EXTERNAL_PWM)
870                 enterprise_disp1_backlight_data.clk_div = 0x1D;
871 #endif
872                 bl_output = enterprise_bl_output_measured_a03;
873         } else
874                 bl_output = enterprise_bl_output_measured_a02;
875
876         enterprise_dsi.chip_id = tegra_get_chipid();
877         enterprise_dsi.chip_rev = tegra_get_revision();
878
879 #if defined(CONFIG_TEGRA_NVMAP)
880         enterprise_carveouts[1].base = tegra_carveout_start;
881         enterprise_carveouts[1].size = tegra_carveout_size;
882 #endif
883
884         gpio_request(enterprise_hdmi_hpd, "hdmi_hpd");
885         gpio_direction_input(enterprise_hdmi_hpd);
886
887         gpio_request(enterprise_lcd_2d_3d, "lcd_2d_3d");
888         gpio_direction_output(enterprise_lcd_2d_3d, 0);
889         enterprise_stereo_set_mode(enterprise_stereo.mode_2d_3d);
890
891         gpio_request(enterprise_lcd_swp_pl, "lcd_swp_pl");
892         gpio_direction_output(enterprise_lcd_swp_pl, 0);
893         enterprise_stereo_set_orientation(enterprise_stereo.orientation);
894
895 #if !(DC_CTRL_MODE & TEGRA_DC_OUT_ONE_SHOT_MODE)
896         gpio_request(enterprise_lcd_swp_pl, "lcd_te");
897         gpio_direction_input(enterprise_lcd_te);
898 #endif
899
900 #ifdef CONFIG_HAS_EARLYSUSPEND
901         enterprise_panel_early_suspender.suspend = enterprise_panel_early_suspend;
902         enterprise_panel_early_suspender.resume = enterprise_panel_late_resume;
903         enterprise_panel_early_suspender.level = EARLY_SUSPEND_LEVEL_DISABLE_FB;
904         register_early_suspend(&enterprise_panel_early_suspender);
905 #endif
906
907 #ifdef CONFIG_TEGRA_GRHOST
908         err = tegra3_register_host1x_devices();
909         if (err)
910                 return err;
911 #endif
912
913         err = platform_add_devices(enterprise_gfx_devices,
914                                 ARRAY_SIZE(enterprise_gfx_devices));
915
916 #if defined(CONFIG_TEGRA_GRHOST) && defined(CONFIG_TEGRA_DC)
917         res = nvhost_get_resource_byname(&enterprise_disp1_device,
918                                          IORESOURCE_MEM, "fbmem");
919         res->start = tegra_fb_start;
920         res->end = tegra_fb_start + tegra_fb_size - 1;
921 #endif
922
923         /* Copy the bootloader fb to the fb. */
924         tegra_move_framebuffer(tegra_fb_start, tegra_bootloader_fb_start,
925                 min(tegra_fb_size, tegra_bootloader_fb_size));
926
927 #if defined(CONFIG_TEGRA_GRHOST) && defined(CONFIG_TEGRA_DC)
928         if (!err)
929                 err = nvhost_device_register(&enterprise_disp1_device);
930
931         res = nvhost_get_resource_byname(&enterprise_disp2_device,
932                                          IORESOURCE_MEM, "fbmem");
933         res->start = tegra_fb2_start;
934         res->end = tegra_fb2_start + tegra_fb2_size - 1;
935         if (!err)
936                 err = nvhost_device_register(&enterprise_disp2_device);
937 #endif
938
939 #if defined(CONFIG_TEGRA_GRHOST) && defined(CONFIG_TEGRA_NVAVP)
940         if (!err)
941                 err = nvhost_device_register(&nvavp_device);
942 #endif
943
944         if (!err)
945                 err = platform_add_devices(enterprise_bl_devices,
946                                 ARRAY_SIZE(enterprise_bl_devices));
947         return err;
948 }