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1 /*
2  * nVidia Tegra device tree board support
3  *
4  * Copyright (C) 2010 Secret Lab Technologies, Ltd.
5  * Copyright (C) 2010 Google, Inc.
6  *
7  * This software is licensed under the terms of the GNU General Public
8  * License version 2, as published by the Free Software Foundation, and
9  * may be copied, distributed, and modified under those terms.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  */
17
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/platform_device.h>
21 #include <linux/serial_8250.h>
22 #include <linux/clk.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/irqdomain.h>
25 #include <linux/of.h>
26 #include <linux/of_address.h>
27 #include <linux/of_fdt.h>
28 #include <linux/of_irq.h>
29 #include <linux/of_platform.h>
30 #include <linux/pda_power.h>
31 #include <linux/io.h>
32 #include <linux/i2c.h>
33 #include <linux/i2c-tegra.h>
34
35 #include <asm/hardware/gic.h>
36 #include <asm/mach-types.h>
37 #include <asm/mach/arch.h>
38 #include <asm/mach/time.h>
39 #include <asm/setup.h>
40 #include <asm/hardware/gic.h>
41
42 #include <mach/iomap.h>
43 #include <mach/irqs.h>
44
45 #include "board.h"
46 #include "board-harmony.h"
47 #include "clock.h"
48 #include "devices.h"
49
50 void harmony_pinmux_init(void);
51 void paz00_pinmux_init(void);
52 void seaboard_pinmux_init(void);
53 void trimslice_pinmux_init(void);
54 void ventana_pinmux_init(void);
55
56 struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
57         OF_DEV_AUXDATA("nvidia,tegra20-pinmux", TEGRA_APB_MISC_BASE + 0x14, "tegra-pinmux", NULL),
58         OF_DEV_AUXDATA("nvidia,tegra20-gpio", TEGRA_GPIO_BASE, "tegra-gpio", NULL),
59         OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
60         OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
61         OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL),
62         OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC4_BASE, "sdhci-tegra.3", NULL),
63         OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C_BASE, "tegra-i2c.0", NULL),
64         OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C2_BASE, "tegra-i2c.1", NULL),
65         OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL),
66         OF_DEV_AUXDATA("nvidia,tegra20-i2c-dvc", TEGRA_DVC_BASE, "tegra-i2c.3", NULL),
67         OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.0", NULL),
68         OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S2_BASE, "tegra-i2s.1", NULL),
69         OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra-das", NULL),
70         OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB_BASE, "tegra-ehci.0",
71                        &tegra_ehci1_device.dev.platform_data),
72         OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB2_BASE, "tegra-ehci.1",
73                        &tegra_ehci2_device.dev.platform_data),
74         OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2",
75                        &tegra_ehci3_device.dev.platform_data),
76         {}
77 };
78
79 static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
80         /* name         parent          rate            enabled */
81         { "uartd",      "pll_p",        216000000,      true },
82         { "usbd",       "clk_m",        12000000,       false },
83         { "usb2",       "clk_m",        12000000,       false },
84         { "usb3",       "clk_m",        12000000,       false },
85         { "pll_a",      "pll_p_out1",   56448000,       true },
86         { "pll_a_out0", "pll_a",        11289600,       true },
87         { "cdev1",      NULL,           0,              true },
88         { "i2s1",       "pll_a_out0",   11289600,       false},
89         { "i2s2",       "pll_a_out0",   11289600,       false},
90         { NULL,         NULL,           0,              0},
91 };
92
93 static struct of_device_id tegra_dt_match_table[] __initdata = {
94         { .compatible = "simple-bus", },
95         {}
96 };
97
98 static struct {
99         char *machine;
100         void (*init)(void);
101 } pinmux_configs[] = {
102         { "compulab,trimslice", trimslice_pinmux_init },
103         { "nvidia,harmony", harmony_pinmux_init },
104         { "compal,paz00", paz00_pinmux_init },
105         { "nvidia,seaboard", seaboard_pinmux_init },
106         { "nvidia,ventana", ventana_pinmux_init },
107 };
108
109 static void __init tegra_dt_init(void)
110 {
111         int i;
112
113         tegra_clk_init_from_table(tegra_dt_clk_init_table);
114
115         for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) {
116                 if (of_machine_is_compatible(pinmux_configs[i].machine)) {
117                         pinmux_configs[i].init();
118                         break;
119                 }
120         }
121
122         WARN(i == ARRAY_SIZE(pinmux_configs),
123                 "Unknown platform! Pinmuxing not initialized\n");
124
125         /*
126          * Finished with the static registrations now; fill in the missing
127          * devices
128          */
129         of_platform_populate(NULL, tegra_dt_match_table,
130                                 tegra20_auxdata_lookup, NULL);
131 }
132
133 static const char *tegra20_dt_board_compat[] = {
134         "compulab,trimslice",
135         "nvidia,harmony",
136         "compal,paz00",
137         "nvidia,seaboard",
138         "nvidia,ventana",
139         NULL
140 };
141
142 DT_MACHINE_START(TEGRA_DT, "nVidia Tegra20 (Flattened Device Tree)")
143         .map_io         = tegra_map_common_io,
144         .init_early     = tegra20_init_early,
145         .init_irq       = tegra_dt_init_irq,
146         .handle_irq     = gic_handle_irq,
147         .timer          = &tegra_timer,
148         .init_machine   = tegra_dt_init,
149         .restart        = tegra_assert_system_reset,
150         .dt_compat      = tegra20_dt_board_compat,
151 MACHINE_END