regulator: max77663: convert regulator init data to pointer
[linux-2.6.git] / arch / arm / mach-tegra / board-curacao-power.c
1 /*
2  * arch/arm/mach-tegra/board-curacao-power.c
3  *
4  * Copyright (C) 2011-2012 NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/io.h>
25 #include <linux/regulator/machine.h>
26 #include <linux/gpio.h>
27 #include <linux/regulator/driver.h>
28 #include <linux/regulator/gpio-regulator.h>
29 #include <linux/mfd/max77663-core.h>
30 #include <linux/regulator/max77663-regulator.h>
31
32 #include <mach/iomap.h>
33 #include <mach/irqs.h>
34 #include <mach/gpio-tegra.h>
35
36 #include "pm.h"
37 #include "board.h"
38 #include "board-curacao.h"
39 #include "tegra_cl_dvfs.h"
40 #include "gpio-names.h"
41 #include "tegra11_soctherm.h"
42
43 #define PMC_CTRL                0x0
44 #define PMC_CTRL_INTR_LOW       (1 << 17)
45
46 static struct regulator_consumer_supply max77663_sd0_supply[] = {
47         REGULATOR_SUPPLY("unused_sd0", NULL),
48 };
49
50 static struct regulator_consumer_supply max77663_sd1_supply[] = {
51         REGULATOR_SUPPLY("unused_sd1", NULL),
52 };
53
54 static struct regulator_consumer_supply max77663_sd2_supply[] = {
55         REGULATOR_SUPPLY("unused_sd2", NULL),
56 };
57
58 static struct regulator_consumer_supply max77663_sd3_supply[] = {
59         REGULATOR_SUPPLY("unused_sd3", NULL),
60 };
61
62 static struct regulator_consumer_supply max77663_ldo0_supply[] = {
63         REGULATOR_SUPPLY("unused_ldo0", NULL),
64 };
65
66 static struct regulator_consumer_supply max77663_ldo1_supply[] = {
67         REGULATOR_SUPPLY("unused_ldo1", NULL),
68 };
69
70 static struct regulator_consumer_supply max77663_ldo2_supply[] = {
71         REGULATOR_SUPPLY("unused_ldo2", NULL),
72 };
73
74 static struct regulator_consumer_supply max77663_ldo3_supply[] = {
75         REGULATOR_SUPPLY("unused_ldo3", NULL),
76 };
77
78 static struct regulator_consumer_supply max77663_ldo4_supply[] = {
79         REGULATOR_SUPPLY("unused_ldo4", NULL),
80 };
81
82 static struct regulator_consumer_supply max77663_ldo5_supply[] = {
83         REGULATOR_SUPPLY("unused_ldo5", NULL),
84 };
85
86 static struct regulator_consumer_supply max77663_ldo6_supply[] = {
87         REGULATOR_SUPPLY("unused_ldo6", NULL),
88 };
89
90 static struct regulator_consumer_supply max77663_ldo7_supply[] = {
91         REGULATOR_SUPPLY("unused_ldo7", NULL),
92 };
93
94 static struct regulator_consumer_supply max77663_ldo8_supply[] = {
95         REGULATOR_SUPPLY("unused_ldo8", NULL),
96 };
97
98 static struct max77663_regulator_fps_cfg max77663_fps_cfgs[] = {
99         {
100                 .src = FPS_SRC_0,
101                 .en_src = FPS_EN_SRC_EN0,
102                 .time_period = FPS_TIME_PERIOD_DEF,
103         },
104         {
105                 .src = FPS_SRC_1,
106                 .en_src = FPS_EN_SRC_EN1,
107                 .time_period = FPS_TIME_PERIOD_DEF,
108         },
109         {
110                 .src = FPS_SRC_2,
111                 .en_src = FPS_EN_SRC_EN0,
112                 .time_period = FPS_TIME_PERIOD_DEF,
113         },
114 };
115
116 #define MAX77663_PDATA_INIT(_id, _min_uV, _max_uV, _supply_reg,         \
117                 _always_on, _boot_on, _apply_uV,                        \
118                 _init_apply, _init_enable, _init_uV,                    \
119                 _fps_src, _fps_pu_period, _fps_pd_period, _flags)       \
120         static struct regulator_init_data max77663_regulator_idata_##_id = {  \
121                 .supply_regulator = _supply_reg,                        \
122                 .constraints = {                                        \
123                         .name = max77663_rails(_id),                    \
124                         .min_uV = _min_uV,                              \
125                         .max_uV = _max_uV,                              \
126                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
127                                              REGULATOR_MODE_STANDBY),   \
128                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
129                                            REGULATOR_CHANGE_STATUS |    \
130                                            REGULATOR_CHANGE_VOLTAGE),   \
131                         .always_on = _always_on,                        \
132                         .boot_on = _boot_on,                            \
133                         .apply_uV = _apply_uV,                          \
134                 },                                                      \
135                 .num_consumer_supplies =                                \
136                         ARRAY_SIZE(max77663_##_id##_supply),            \
137                 .consumer_supplies = max77663_##_id##_supply,           \
138         };                                                              \
139         static struct max77663_regulator_platform_data max77663_regulator_pdata_##_id = \
140         {                                                               \
141                 .reg_init_data = &max77663_regulator_idata_##_id,       \
142                 .init_apply = _init_apply,                              \
143                 .init_enable = _init_enable,                            \
144                 .init_uV = _init_uV,                                    \
145                 .fps_src = _fps_src,                                    \
146                 .fps_pu_period = _fps_pu_period,                        \
147                 .fps_pd_period = _fps_pd_period,                        \
148                 .fps_cfgs = max77663_fps_cfgs,                          \
149                 .flags = _flags,                                        \
150         }
151
152 MAX77663_PDATA_INIT(sd0,  600000, 3387500, NULL, 1, 0, 0,
153                     0, 0, -1, FPS_SRC_NONE, -1, -1, EN2_CTRL_SD0 | SD_FSRADE_DISABLE);
154
155 MAX77663_PDATA_INIT(sd1,  800000, 1587500, NULL, 1, 0, 0,
156                     1, 1, -1, FPS_SRC_1, -1, -1, SD_FSRADE_DISABLE);
157
158 MAX77663_PDATA_INIT(sd2,  1800000, 1800000, NULL, 1, 0, 0,
159                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
160
161 MAX77663_PDATA_INIT(sd3,  600000, 3387500, NULL, 1, 0, 0,
162                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
163
164 MAX77663_PDATA_INIT(ldo0, 800000, 2350000, max77663_rails(sd3), 1, 0, 0,
165                     1, 1, -1, FPS_SRC_1, -1, -1, 0);
166
167 MAX77663_PDATA_INIT(ldo1, 800000, 2350000, max77663_rails(sd3), 0, 0, 0,
168                     0, 0, -1, FPS_SRC_NONE, -1, -1, 0);
169
170 MAX77663_PDATA_INIT(ldo2, 800000, 3950000, NULL, 1, 0, 0,
171                     1, 1, -1, FPS_SRC_1, -1, -1, 0);
172
173 MAX77663_PDATA_INIT(ldo3, 800000, 3950000, NULL, 1, 0, 0,
174                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
175
176 MAX77663_PDATA_INIT(ldo4, 800000, 1587500, NULL, 0, 0, 0,
177                     1, 1, 1000000, FPS_SRC_NONE, -1, -1, LDO4_EN_TRACKING);
178
179 MAX77663_PDATA_INIT(ldo5, 800000, 2800000, NULL, 0, 0, 0,
180                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
181
182 MAX77663_PDATA_INIT(ldo6, 800000, 3950000, NULL, 0, 0, 0,
183                     0, 0, -1, FPS_SRC_NONE, -1, -1, 0);
184
185 MAX77663_PDATA_INIT(ldo7, 800000, 3950000, max77663_rails(sd3), 0, 0, 0,
186                     0, 0, -1, FPS_SRC_NONE, -1, -1, 0);
187
188 MAX77663_PDATA_INIT(ldo8, 800000, 3950000, max77663_rails(sd3), 0, 0, 0,
189                     1, 1, -1, FPS_SRC_1, -1, -1, 0);
190
191 #define MAX77663_REG(_id, _data)                                        \
192         {                                                               \
193                 .name = "max77663-regulator",                           \
194                 .id = MAX77663_REGULATOR_ID_##_id,                      \
195                 .platform_data = &max77663_regulator_pdata_##_data,     \
196                 .pdata_size = sizeof(max77663_regulator_pdata_##_data), \
197         }
198
199 static struct mfd_cell max77663_subdevs[] = {
200         MAX77663_REG(SD0, sd0),
201         MAX77663_REG(SD1, sd1),
202         MAX77663_REG(SD2, sd2),
203         MAX77663_REG(SD3, sd3),
204         MAX77663_REG(LDO0, ldo0),
205         MAX77663_REG(LDO1, ldo1),
206         MAX77663_REG(LDO2, ldo2),
207         MAX77663_REG(LDO3, ldo3),
208         MAX77663_REG(LDO4, ldo4),
209         MAX77663_REG(LDO5, ldo5),
210         MAX77663_REG(LDO6, ldo6),
211         MAX77663_REG(LDO7, ldo7),
212         MAX77663_REG(LDO8, ldo8),
213 };
214
215 static struct max77663_gpio_config max77663_gpio_cfgs[] = {
216         {
217                 .gpio = MAX77663_GPIO0,
218                 .dir = GPIO_DIR_OUT,
219                 .dout = GPIO_DOUT_LOW,
220                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
221                 .alternate = GPIO_ALT_DISABLE,
222         },
223         {
224                 .gpio = MAX77663_GPIO1,
225                 .dir = GPIO_DIR_IN,
226                 .dout = GPIO_DOUT_LOW,
227                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
228                 .alternate = GPIO_ALT_DISABLE,
229         },
230         {
231                 .gpio = MAX77663_GPIO2,
232                 .dir = GPIO_DIR_OUT,
233                 .dout = GPIO_DOUT_HIGH,
234                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
235                 .alternate = GPIO_ALT_DISABLE,
236         },
237         {
238                 .gpio = MAX77663_GPIO3,
239                 .dir = GPIO_DIR_OUT,
240                 .dout = GPIO_DOUT_HIGH,
241                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
242                 .alternate = GPIO_ALT_DISABLE,
243         },
244         {
245                 .gpio = MAX77663_GPIO4,
246                 .dir = GPIO_DIR_OUT,
247                 .dout = GPIO_DOUT_HIGH,
248                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
249                 .alternate = GPIO_ALT_ENABLE,
250         },
251         {
252                 .gpio = MAX77663_GPIO5,
253                 .dir = GPIO_DIR_OUT,
254                 .dout = GPIO_DOUT_LOW,
255                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
256                 .alternate = GPIO_ALT_DISABLE,
257         },
258         {
259                 .gpio = MAX77663_GPIO6,
260                 .dir = GPIO_DIR_IN,
261                 .alternate = GPIO_ALT_DISABLE,
262         },
263         {
264                 .gpio = MAX77663_GPIO7,
265                 .dir = GPIO_DIR_OUT,
266                 .dout = GPIO_DOUT_LOW,
267                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
268                 .alternate = GPIO_ALT_DISABLE,
269         },
270 };
271
272 static struct max77663_platform_data max7763_pdata = {
273         .irq_base       = MAX77663_IRQ_BASE,
274         .gpio_base      = MAX77663_GPIO_BASE,
275
276         .num_gpio_cfgs  = ARRAY_SIZE(max77663_gpio_cfgs),
277         .gpio_cfgs      = max77663_gpio_cfgs,
278
279         .num_subdevs    = ARRAY_SIZE(max77663_subdevs),
280         .sub_devices    = max77663_subdevs,
281
282         .rtc_i2c_addr   = 0x68,
283
284         .use_power_off  = true,
285 };
286
287 static struct i2c_board_info __initdata max77663_regulators[] = {
288         {
289                 /* The I2C address was determined by OTP factory setting */
290                 I2C_BOARD_INFO("max77663", 0x3c),
291                 .irq            = INT_EXTERNAL_PMU,
292                 .platform_data  = &max7763_pdata,
293         },
294 };
295
296 static int __init curacao_max77663_regulator_init(void)
297 {
298         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
299         u32 pmc_ctrl;
300
301         /* configure the power management controller to trigger PMU
302          * interrupts when low */
303         pmc_ctrl = readl(pmc + PMC_CTRL);
304         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
305
306         i2c_register_board_info(4, max77663_regulators,
307                                 ARRAY_SIZE(max77663_regulators));
308
309         return 0;
310 }
311
312 static int ac_online(void)
313 {
314         return 1;
315 }
316
317 static struct regulator_consumer_supply gpio_reg_sdmmc3_vdd_sel_supply[] = {
318         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
319 };
320
321 static struct gpio_regulator_state gpio_reg_sdmmc3_vdd_sel_states[] = {
322         {
323                 .gpios = 0,
324                 .value = 1800000,
325         },
326         {
327                 .gpios = 1,
328                 .value = 3300000,
329         },
330 };
331
332 static struct gpio gpio_reg_sdmmc3_vdd_sel_gpios[] = {
333         {
334                 .gpio = TEGRA_GPIO_PV1,
335                 .flags = 0,
336                 .label = "sdmmc3_vdd_sel",
337         },
338 };
339
340 /* Macro for defining gpio regulator device data */
341 #define GPIO_REG(_id, _name, _input_supply, _active_high,       \
342                 _boot_state, _delay_us, _minmv, _maxmv)         \
343         static struct regulator_init_data ri_data_##_name =     \
344 {                                                               \
345         .supply_regulator = NULL,                               \
346         .num_consumer_supplies =                                \
347                 ARRAY_SIZE(gpio_reg_##_name##_supply),          \
348         .consumer_supplies = gpio_reg_##_name##_supply,         \
349         .constraints = {                                        \
350                 .name = "gpio_reg_"#_name,                      \
351                 .min_uV = (_minmv)*1000,                        \
352                 .max_uV = (_maxmv)*1000,                        \
353                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
354                                 REGULATOR_MODE_STANDBY),        \
355                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
356                                 REGULATOR_CHANGE_STATUS |       \
357                                 REGULATOR_CHANGE_VOLTAGE),      \
358         },                                                      \
359 };                                                              \
360 static struct gpio_regulator_config gpio_reg_##_name##_pdata =  \
361 {                                                               \
362         .supply_name = "vddio_sdmmc",                           \
363         .enable_gpio = -EINVAL,                                 \
364         .enable_high = _active_high,                            \
365         .enabled_at_boot = _boot_state,                         \
366         .startup_delay = _delay_us,                             \
367         .gpios = gpio_reg_##_name##_gpios,                      \
368         .nr_gpios = ARRAY_SIZE(gpio_reg_##_name##_gpios),       \
369         .states = gpio_reg_##_name##_states,                    \
370         .nr_states = ARRAY_SIZE(gpio_reg_##_name##_states),     \
371         .type = REGULATOR_VOLTAGE,                              \
372         .init_data = &ri_data_##_name,                          \
373 };                                                              \
374 static struct platform_device gpio_reg_##_name##_dev = {        \
375         .name   = "gpio-regulator",                             \
376         .id = _id,                                              \
377         .dev    = {                                             \
378                 .platform_data = &gpio_reg_##_name##_pdata,     \
379         },                                                      \
380 }
381 GPIO_REG(4, sdmmc3_vdd_sel, NULL,
382                 true, true, 0, 1000, 3300);
383
384 #define ADD_GPIO_REG(_name) (&gpio_reg_##_name##_dev)
385 static struct platform_device *gpio_regs_devices[] = {
386         ADD_GPIO_REG(sdmmc3_vdd_sel),
387 };
388
389 static struct resource curacao_pda_resources[] = {
390         [0] = {
391                 .name   = "ac",
392         },
393 };
394
395 static struct pda_power_pdata curacao_pda_data = {
396         .is_ac_online   = ac_online,
397 };
398
399 static struct platform_device curacao_pda_power_device = {
400         .name           = "pda-power",
401         .id             = -1,
402         .resource       = curacao_pda_resources,
403         .num_resources  = ARRAY_SIZE(curacao_pda_resources),
404         .dev    = {
405                 .platform_data  = &curacao_pda_data,
406         },
407 };
408
409 static struct tegra_suspend_platform_data curacao_suspend_data = {
410         .cpu_timer      = 2000,
411         .cpu_off_timer  = 0,
412         .suspend_mode   = TEGRA_SUSPEND_LP1,
413         .core_timer     = 0x7e7e,
414         .core_off_timer = 0,
415         .corereq_high   = false,
416         .sysclkreq_high = true,
417 };
418
419 /* FIXME: the cl_dvfs data below is bogus, just to enable s/w
420    debugging on FPGA */
421
422 /* Board characterization parameters */
423 static struct tegra_cl_dvfs_cfg_param curacao_cl_dvfs_param = {
424         .sample_rate = 2250,
425
426         .force_mode = TEGRA_CL_DVFS_FORCE_FIXED,
427         .cf = 16,
428         .ci = 7,
429         .cg = -12,
430
431         .droop_cut_value = 0x8,
432         .droop_restore_ramp = 0x10,
433         .scale_out_ramp = 0x2,
434 };
435
436 /* PMU data : fixed 12.5mV steps from 600mV to 1400mV, no offset */
437 #define PMU_CPU_VDD_MAP_SIZE ((1400000 - 600000) / 12500 + 1)
438 static struct voltage_reg_map pmu_cpu_vdd_map[PMU_CPU_VDD_MAP_SIZE];
439 static void fill_reg_map(void)
440 {
441         int i;
442         for (i = 0; i < PMU_CPU_VDD_MAP_SIZE; i++) {
443                 pmu_cpu_vdd_map[i].reg_value = i;
444                 pmu_cpu_vdd_map[i].reg_uV = 600000 + 12500 * i;
445         }
446 }
447
448 static struct tegra_cl_dvfs_platform_data curacao_cl_dvfs_data = {
449         .dfll_clk_name = "dfll_cpu",
450         .pmu_if = TEGRA_CL_DVFS_PMU_I2C,
451         .u.pmu_i2c = {
452                 .fs_rate = 50000,
453                 .hs_master_code = 0, /* no hs mode support */
454                 .slave_addr = 0x78,
455                 .reg = 0x16,
456         },
457         .vdd_map = pmu_cpu_vdd_map,
458         .vdd_map_size = PMU_CPU_VDD_MAP_SIZE,
459
460         .cfg_param = &curacao_cl_dvfs_param,
461 };
462
463 int __init curacao_regulator_init(void)
464 {
465         int ret;
466
467         platform_device_register(&curacao_pda_power_device);
468         ret = curacao_max77663_regulator_init();
469         if (ret < 0)
470                 return ret;
471
472         fill_reg_map();
473         tegra_cl_dvfs_set_plarform_data(&curacao_cl_dvfs_data);
474
475         return platform_add_devices(gpio_regs_devices,
476                         ARRAY_SIZE(gpio_regs_devices));
477 }
478
479 int __init curacao_suspend_init(void)
480 {
481         tegra_init_suspend(&curacao_suspend_data);
482         return 0;
483 }
484
485 int __init curacao_soctherm_init(void)
486 {
487 #ifdef CONFIG_TEGRA_SIMULATION_PLATFORM
488         return 0;
489 #else
490         return tegra11_soctherm_init();
491 #endif
492 }
493
494 #ifdef CONFIG_TEGRA_SIMULATION_PLATFORM
495
496 #define COSIM_SHUTDOWN_REG         0x538f0ffc
497
498 static void curacao_power_off(void)
499 {
500         pr_err("Curacao Powering off the device\n");
501         writel(1, IO_ADDRESS(COSIM_SHUTDOWN_REG));
502         while (1)
503                 ;
504 }
505
506 int __init curacao_power_off_init(void)
507 {
508         pm_power_off = curacao_power_off;
509         return 0;
510 }
511 #endif