15b918d5429f231c099fc01789ff2caf9dadd23d
[linux-2.6.git] / arch / arm / mach-tegra / board-curacao-power.c
1 /*
2  * arch/arm/mach-tegra/board-curacao-power.c
3  *
4  * Copyright (C) 2011-2012 NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License along
16  * with this program; if not, write to the Free Software Foundation, Inc.,
17  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
18  */
19
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/io.h>
25 #include <linux/regulator/machine.h>
26 #include <linux/gpio.h>
27 #include <linux/regulator/driver.h>
28 #include <linux/regulator/gpio-regulator.h>
29 #include <linux/mfd/max77663-core.h>
30 #include <linux/regulator/max77663-regulator.h>
31
32 #include <mach/iomap.h>
33 #include <mach/irqs.h>
34 #include <mach/gpio-tegra.h>
35
36 #include "pm.h"
37 #include "board.h"
38 #include "board-curacao.h"
39 #include "tegra_cl_dvfs.h"
40 #include "gpio-names.h"
41 #include "tegra11_soctherm.h"
42
43 #define PMC_CTRL                0x0
44 #define PMC_CTRL_INTR_LOW       (1 << 17)
45
46 static struct regulator_consumer_supply max77663_sd0_supply[] = {
47         REGULATOR_SUPPLY("unused_sd0", NULL),
48 };
49
50 static struct regulator_consumer_supply max77663_sd1_supply[] = {
51         REGULATOR_SUPPLY("unused_sd1", NULL),
52 };
53
54 static struct regulator_consumer_supply max77663_sd2_supply[] = {
55         REGULATOR_SUPPLY("unused_sd2", NULL),
56 };
57
58 static struct regulator_consumer_supply max77663_sd3_supply[] = {
59         REGULATOR_SUPPLY("unused_sd3", NULL),
60 };
61
62 static struct regulator_consumer_supply max77663_ldo0_supply[] = {
63         REGULATOR_SUPPLY("unused_ldo0", NULL),
64 };
65
66 static struct regulator_consumer_supply max77663_ldo1_supply[] = {
67         REGULATOR_SUPPLY("unused_ldo1", NULL),
68 };
69
70 static struct regulator_consumer_supply max77663_ldo2_supply[] = {
71         REGULATOR_SUPPLY("unused_ldo2", NULL),
72 };
73
74 static struct regulator_consumer_supply max77663_ldo3_supply[] = {
75         REGULATOR_SUPPLY("unused_ldo3", NULL),
76 };
77
78 static struct regulator_consumer_supply max77663_ldo4_supply[] = {
79         REGULATOR_SUPPLY("unused_ldo4", NULL),
80 };
81
82 static struct regulator_consumer_supply max77663_ldo5_supply[] = {
83         REGULATOR_SUPPLY("unused_ldo5", NULL),
84 };
85
86 static struct regulator_consumer_supply max77663_ldo6_supply[] = {
87         REGULATOR_SUPPLY("unused_ldo6", NULL),
88 };
89
90 static struct regulator_consumer_supply max77663_ldo7_supply[] = {
91         REGULATOR_SUPPLY("unused_ldo7", NULL),
92 };
93
94 static struct regulator_consumer_supply max77663_ldo8_supply[] = {
95         REGULATOR_SUPPLY("unused_ldo8", NULL),
96 };
97
98 static struct max77663_regulator_fps_cfg max77663_fps_cfgs[] = {
99         {
100                 .src = FPS_SRC_0,
101                 .en_src = FPS_EN_SRC_EN0,
102                 .time_period = FPS_TIME_PERIOD_DEF,
103         },
104         {
105                 .src = FPS_SRC_1,
106                 .en_src = FPS_EN_SRC_EN1,
107                 .time_period = FPS_TIME_PERIOD_DEF,
108         },
109         {
110                 .src = FPS_SRC_2,
111                 .en_src = FPS_EN_SRC_EN0,
112                 .time_period = FPS_TIME_PERIOD_DEF,
113         },
114 };
115
116 #define MAX77663_PDATA_INIT(_id, _min_uV, _max_uV, _supply_reg,         \
117                 _always_on, _boot_on, _apply_uV,                        \
118                 _init_apply, _init_enable, _init_uV,                    \
119                 _fps_src, _fps_pu_period, _fps_pd_period, _flags)       \
120         static struct max77663_regulator_platform_data max77663_regulator_pdata_##_id = \
121 {                                                               \
122         .init_data = {                                          \
123                         .constraints = {                                \
124                                 .name = max77663_rails(_id),            \
125                                 .min_uV = _min_uV,                      \
126                                 .max_uV = _max_uV,                      \
127                                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
128                                                      REGULATOR_MODE_STANDBY), \
129                                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
130                                                    REGULATOR_CHANGE_STATUS |  \
131                                                    REGULATOR_CHANGE_VOLTAGE), \
132                                 .always_on = _always_on,                \
133                                 .boot_on = _boot_on,                    \
134                                 .apply_uV = _apply_uV,                  \
135                         },                                              \
136                         .num_consumer_supplies =                        \
137                                 ARRAY_SIZE(max77663_##_id##_supply),    \
138                         .consumer_supplies = max77663_##_id##_supply,   \
139                         .supply_regulator = _supply_reg,                \
140                 },                                                      \
141                 .init_apply = _init_apply,                              \
142                 .init_enable = _init_enable,                            \
143                 .init_uV = _init_uV,                                    \
144                 .fps_src = _fps_src,                                    \
145                 .fps_pu_period = _fps_pu_period,                        \
146                 .fps_pd_period = _fps_pd_period,                        \
147                 .fps_cfgs = max77663_fps_cfgs,                          \
148                 .flags = _flags,                                        \
149         }
150
151 MAX77663_PDATA_INIT(sd0,  600000, 3387500, NULL, 1, 0, 0,
152                     0, 0, -1, FPS_SRC_NONE, -1, -1, EN2_CTRL_SD0 | SD_FSRADE_DISABLE);
153
154 MAX77663_PDATA_INIT(sd1,  800000, 1587500, NULL, 1, 0, 0,
155                     1, 1, -1, FPS_SRC_1, -1, -1, SD_FSRADE_DISABLE);
156
157 MAX77663_PDATA_INIT(sd2,  1800000, 1800000, NULL, 1, 0, 0,
158                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
159
160 MAX77663_PDATA_INIT(sd3,  600000, 3387500, NULL, 1, 0, 0,
161                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
162
163 MAX77663_PDATA_INIT(ldo0, 800000, 2350000, max77663_rails(sd3), 1, 0, 0,
164                     1, 1, -1, FPS_SRC_1, -1, -1, 0);
165
166 MAX77663_PDATA_INIT(ldo1, 800000, 2350000, max77663_rails(sd3), 0, 0, 0,
167                     0, 0, -1, FPS_SRC_NONE, -1, -1, 0);
168
169 MAX77663_PDATA_INIT(ldo2, 800000, 3950000, NULL, 1, 0, 0,
170                     1, 1, -1, FPS_SRC_1, -1, -1, 0);
171
172 MAX77663_PDATA_INIT(ldo3, 800000, 3950000, NULL, 1, 0, 0,
173                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
174
175 MAX77663_PDATA_INIT(ldo4, 800000, 1587500, NULL, 0, 0, 0,
176                     1, 1, 1000000, FPS_SRC_NONE, -1, -1, LDO4_EN_TRACKING);
177
178 MAX77663_PDATA_INIT(ldo5, 800000, 2800000, NULL, 0, 0, 0,
179                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
180
181 MAX77663_PDATA_INIT(ldo6, 800000, 3950000, NULL, 0, 0, 0,
182                     0, 0, -1, FPS_SRC_NONE, -1, -1, 0);
183
184 MAX77663_PDATA_INIT(ldo7, 800000, 3950000, max77663_rails(sd3), 0, 0, 0,
185                     0, 0, -1, FPS_SRC_NONE, -1, -1, 0);
186
187 MAX77663_PDATA_INIT(ldo8, 800000, 3950000, max77663_rails(sd3), 0, 0, 0,
188                     1, 1, -1, FPS_SRC_1, -1, -1, 0);
189
190 #define MAX77663_REG(_id, _data)                                        \
191         {                                                               \
192                 .name = "max77663-regulator",                           \
193                 .id = MAX77663_REGULATOR_ID_##_id,                      \
194                 .platform_data = &max77663_regulator_pdata_##_data,     \
195                 .pdata_size = sizeof(max77663_regulator_pdata_##_data), \
196         }
197
198 static struct mfd_cell max77663_subdevs[] = {
199         MAX77663_REG(SD0, sd0),
200         MAX77663_REG(SD1, sd1),
201         MAX77663_REG(SD2, sd2),
202         MAX77663_REG(SD3, sd3),
203         MAX77663_REG(LDO0, ldo0),
204         MAX77663_REG(LDO1, ldo1),
205         MAX77663_REG(LDO2, ldo2),
206         MAX77663_REG(LDO3, ldo3),
207         MAX77663_REG(LDO4, ldo4),
208         MAX77663_REG(LDO5, ldo5),
209         MAX77663_REG(LDO6, ldo6),
210         MAX77663_REG(LDO7, ldo7),
211         MAX77663_REG(LDO8, ldo8),
212 };
213
214 static struct max77663_gpio_config max77663_gpio_cfgs[] = {
215         {
216                 .gpio = MAX77663_GPIO0,
217                 .dir = GPIO_DIR_OUT,
218                 .dout = GPIO_DOUT_LOW,
219                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
220                 .alternate = GPIO_ALT_DISABLE,
221         },
222         {
223                 .gpio = MAX77663_GPIO1,
224                 .dir = GPIO_DIR_IN,
225                 .dout = GPIO_DOUT_LOW,
226                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
227                 .alternate = GPIO_ALT_DISABLE,
228         },
229         {
230                 .gpio = MAX77663_GPIO2,
231                 .dir = GPIO_DIR_OUT,
232                 .dout = GPIO_DOUT_HIGH,
233                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
234                 .alternate = GPIO_ALT_DISABLE,
235         },
236         {
237                 .gpio = MAX77663_GPIO3,
238                 .dir = GPIO_DIR_OUT,
239                 .dout = GPIO_DOUT_HIGH,
240                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
241                 .alternate = GPIO_ALT_DISABLE,
242         },
243         {
244                 .gpio = MAX77663_GPIO4,
245                 .dir = GPIO_DIR_OUT,
246                 .dout = GPIO_DOUT_HIGH,
247                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
248                 .alternate = GPIO_ALT_ENABLE,
249         },
250         {
251                 .gpio = MAX77663_GPIO5,
252                 .dir = GPIO_DIR_OUT,
253                 .dout = GPIO_DOUT_LOW,
254                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
255                 .alternate = GPIO_ALT_DISABLE,
256         },
257         {
258                 .gpio = MAX77663_GPIO6,
259                 .dir = GPIO_DIR_IN,
260                 .alternate = GPIO_ALT_DISABLE,
261         },
262         {
263                 .gpio = MAX77663_GPIO7,
264                 .dir = GPIO_DIR_OUT,
265                 .dout = GPIO_DOUT_LOW,
266                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
267                 .alternate = GPIO_ALT_DISABLE,
268         },
269 };
270
271 static struct max77663_platform_data max7763_pdata = {
272         .irq_base       = MAX77663_IRQ_BASE,
273         .gpio_base      = MAX77663_GPIO_BASE,
274
275         .num_gpio_cfgs  = ARRAY_SIZE(max77663_gpio_cfgs),
276         .gpio_cfgs      = max77663_gpio_cfgs,
277
278         .num_subdevs    = ARRAY_SIZE(max77663_subdevs),
279         .sub_devices    = max77663_subdevs,
280
281         .rtc_i2c_addr   = 0x68,
282
283         .use_power_off  = true,
284 };
285
286 static struct i2c_board_info __initdata max77663_regulators[] = {
287         {
288                 /* The I2C address was determined by OTP factory setting */
289                 I2C_BOARD_INFO("max77663", 0x3c),
290                 .irq            = INT_EXTERNAL_PMU,
291                 .platform_data  = &max7763_pdata,
292         },
293 };
294
295 static int __init curacao_max77663_regulator_init(void)
296 {
297         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
298         u32 pmc_ctrl;
299
300         /* configure the power management controller to trigger PMU
301          * interrupts when low */
302         pmc_ctrl = readl(pmc + PMC_CTRL);
303         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
304
305         i2c_register_board_info(4, max77663_regulators,
306                                 ARRAY_SIZE(max77663_regulators));
307
308         return 0;
309 }
310
311 static int ac_online(void)
312 {
313         return 1;
314 }
315
316 static struct regulator_consumer_supply gpio_reg_sdmmc3_vdd_sel_supply[] = {
317         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
318 };
319
320 static struct gpio_regulator_state gpio_reg_sdmmc3_vdd_sel_states[] = {
321         {
322                 .gpios = 0,
323                 .value = 1800000,
324         },
325         {
326                 .gpios = 1,
327                 .value = 3300000,
328         },
329 };
330
331 static struct gpio gpio_reg_sdmmc3_vdd_sel_gpios[] = {
332         {
333                 .gpio = TEGRA_GPIO_PV1,
334                 .flags = 0,
335                 .label = "sdmmc3_vdd_sel",
336         },
337 };
338
339 /* Macro for defining gpio regulator device data */
340 #define GPIO_REG(_id, _name, _input_supply, _active_high,       \
341                 _boot_state, _delay_us, _minmv, _maxmv)         \
342         static struct regulator_init_data ri_data_##_name =     \
343 {                                                               \
344         .supply_regulator = NULL,                               \
345         .num_consumer_supplies =                                \
346                 ARRAY_SIZE(gpio_reg_##_name##_supply),          \
347         .consumer_supplies = gpio_reg_##_name##_supply,         \
348         .constraints = {                                        \
349                 .name = "gpio_reg_"#_name,                      \
350                 .min_uV = (_minmv)*1000,                        \
351                 .max_uV = (_maxmv)*1000,                        \
352                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
353                                 REGULATOR_MODE_STANDBY),        \
354                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
355                                 REGULATOR_CHANGE_STATUS |       \
356                                 REGULATOR_CHANGE_VOLTAGE),      \
357         },                                                      \
358 };                                                              \
359 static struct gpio_regulator_config gpio_reg_##_name##_pdata =  \
360 {                                                               \
361         .supply_name = "vddio_sdmmc",                           \
362         .enable_gpio = -EINVAL,                                 \
363         .enable_high = _active_high,                            \
364         .enabled_at_boot = _boot_state,                         \
365         .startup_delay = _delay_us,                             \
366         .gpios = gpio_reg_##_name##_gpios,                      \
367         .nr_gpios = ARRAY_SIZE(gpio_reg_##_name##_gpios),       \
368         .states = gpio_reg_##_name##_states,                    \
369         .nr_states = ARRAY_SIZE(gpio_reg_##_name##_states),     \
370         .type = REGULATOR_VOLTAGE,                              \
371         .init_data = &ri_data_##_name,                          \
372 };                                                              \
373 static struct platform_device gpio_reg_##_name##_dev = {        \
374         .name   = "gpio-regulator",                             \
375         .id = _id,                                              \
376         .dev    = {                                             \
377                 .platform_data = &gpio_reg_##_name##_pdata,     \
378         },                                                      \
379 }
380 GPIO_REG(4, sdmmc3_vdd_sel, NULL,
381                 true, true, 0, 1000, 3300);
382
383 #define ADD_GPIO_REG(_name) (&gpio_reg_##_name##_dev)
384 static struct platform_device *gpio_regs_devices[] = {
385         ADD_GPIO_REG(sdmmc3_vdd_sel),
386 };
387
388 static struct resource curacao_pda_resources[] = {
389         [0] = {
390                 .name   = "ac",
391         },
392 };
393
394 static struct pda_power_pdata curacao_pda_data = {
395         .is_ac_online   = ac_online,
396 };
397
398 static struct platform_device curacao_pda_power_device = {
399         .name           = "pda-power",
400         .id             = -1,
401         .resource       = curacao_pda_resources,
402         .num_resources  = ARRAY_SIZE(curacao_pda_resources),
403         .dev    = {
404                 .platform_data  = &curacao_pda_data,
405         },
406 };
407
408 static struct tegra_suspend_platform_data curacao_suspend_data = {
409         .cpu_timer      = 2000,
410         .cpu_off_timer  = 0,
411         .suspend_mode   = TEGRA_SUSPEND_LP1,
412         .core_timer     = 0x7e7e,
413         .core_off_timer = 0,
414         .corereq_high   = false,
415         .sysclkreq_high = true,
416 };
417
418 /* FIXME: the cl_dvfs data below is bogus, just to enable s/w
419    debugging on FPGA */
420
421 /* Board characterization parameters */
422 static struct tegra_cl_dvfs_cfg_param curacao_cl_dvfs_param = {
423         .sample_rate = 2250,
424
425         .force_mode = TEGRA_CL_DVFS_FORCE_FIXED,
426         .cf = 16,
427         .ci = 7,
428         .cg = -12,
429
430         .droop_cut_value = 0x8,
431         .droop_restore_ramp = 0x10,
432         .scale_out_ramp = 0x2,
433 };
434
435 /* PMU data : fixed 12.5mV steps from 600mV to 1400mV, no offset */
436 #define PMU_CPU_VDD_MAP_SIZE ((1400000 - 600000) / 12500 + 1)
437 static struct voltage_reg_map pmu_cpu_vdd_map[PMU_CPU_VDD_MAP_SIZE];
438 static void fill_reg_map(void)
439 {
440         int i;
441         for (i = 0; i < PMU_CPU_VDD_MAP_SIZE; i++) {
442                 pmu_cpu_vdd_map[i].reg_value = i;
443                 pmu_cpu_vdd_map[i].reg_uV = 600000 + 12500 * i;
444         }
445 }
446
447 static struct tegra_cl_dvfs_platform_data curacao_cl_dvfs_data = {
448         .dfll_clk_name = "dfll_cpu",
449         .pmu_if = TEGRA_CL_DVFS_PMU_I2C,
450         .u.pmu_i2c = {
451                 .fs_rate = 50000,
452                 .hs_master_code = 0, /* no hs mode support */
453                 .slave_addr = 0x78,
454                 .reg = 0x16,
455         },
456         .vdd_map = pmu_cpu_vdd_map,
457         .vdd_map_size = PMU_CPU_VDD_MAP_SIZE,
458
459         .cfg_param = &curacao_cl_dvfs_param,
460 };
461
462 int __init curacao_regulator_init(void)
463 {
464         int ret;
465
466         platform_device_register(&curacao_pda_power_device);
467         ret = curacao_max77663_regulator_init();
468         if (ret < 0)
469                 return ret;
470
471         fill_reg_map();
472         tegra_cl_dvfs_set_plarform_data(&curacao_cl_dvfs_data);
473
474         return platform_add_devices(gpio_regs_devices,
475                         ARRAY_SIZE(gpio_regs_devices));
476 }
477
478 int __init curacao_suspend_init(void)
479 {
480         tegra_init_suspend(&curacao_suspend_data);
481         return 0;
482 }
483
484 int __init curacao_soctherm_init(void)
485 {
486 #ifdef CONFIG_TEGRA_SIMULATION_PLATFORM
487         return 0;
488 #else
489         return tegra11_soctherm_init();
490 #endif
491 }
492
493 #ifdef CONFIG_TEGRA_SIMULATION_PLATFORM
494
495 #define COSIM_SHUTDOWN_REG         0x538f0ffc
496
497 static void curacao_power_off(void)
498 {
499         pr_err("Curacao Powering off the device\n");
500         writel(1, IO_ADDRESS(COSIM_SHUTDOWN_REG));
501         while (1)
502                 ;
503 }
504
505 int __init curacao_power_off_init(void)
506 {
507         pm_power_off = curacao_power_off;
508         return 0;
509 }
510 #endif