ARM: tegra: wdt: Replace legacy WDT with CPU WDTs
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <linux/spi/spi.h>
37 #include <linux/i2c/atmel_mxt_ts.h>
38 #include <linux/tegra_uart.h>
39 #include <linux/memblock.h>
40 #include <linux/spi-tegra.h>
41 #include <linux/nfc/pn544.h>
42 #include <linux/rfkill-gpio.h>
43
44 #include <sound/wm8903.h>
45 #include <sound/max98095.h>
46 #include <media/tegra_dtv.h>
47
48 #include <asm/hardware/gic.h>
49
50 #include <mach/clk.h>
51 #include <mach/iomap.h>
52 #include <mach/irqs.h>
53 #include <mach/pinmux.h>
54 #include <mach/iomap.h>
55 #include <mach/io.h>
56 #include <mach/i2s.h>
57 #include <mach/tegra_asoc_pdata.h>
58 #include <mach/tegra_wm8903_pdata.h>
59 #include <mach/usb_phy.h>
60 #include <mach/thermal.h>
61 #include <mach/pci.h>
62 #include <mach/gpio-tegra.h>
63
64 #include <asm/hardware/gic.h>
65 #include <asm/mach-types.h>
66 #include <asm/mach/arch.h>
67
68 #include "board.h"
69 #include "clock.h"
70 #include "board-cardhu.h"
71 #include "board-touch.h"
72 #include "devices.h"
73 #include "gpio-names.h"
74 #include "fuse.h"
75 #include "pm.h"
76 #include "baseband-xmm-power.h"
77 #include "wdt-recovery.h"
78 #include "common.h"
79
80 static struct balanced_throttle throttle_list[] = {
81 #ifdef CONFIG_TEGRA_THERMAL_THROTTLE
82         {
83                 .id = BALANCED_THROTTLE_ID_TJ,
84                 .throt_tab_size = 10,
85                 .throt_tab = {
86                         {      0, 1000 },
87                         { 640000, 1000 },
88                         { 640000, 1000 },
89                         { 640000, 1000 },
90                         { 640000, 1000 },
91                         { 640000, 1000 },
92                         { 760000, 1000 },
93                         { 760000, 1050 },
94                         {1000000, 1050 },
95                         {1000000, 1100 },
96                 },
97         },
98 #endif
99 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
100         {
101                 .id = BALANCED_THROTTLE_ID_SKIN,
102                 .throt_tab_size = 6,
103                 .throt_tab = {
104                         { 640000, 1200 },
105                         { 640000, 1200 },
106                         { 760000, 1200 },
107                         { 760000, 1200 },
108                         {1000000, 1200 },
109                         {1000000, 1200 },
110                 },
111         },
112 #endif
113 };
114
115 /* All units are in millicelsius */
116 static struct tegra_thermal_data thermal_data = {
117         .shutdown_device_id = THERMAL_DEVICE_ID_NCT_EXT,
118         .temp_shutdown = 90000,
119
120 #if defined(CONFIG_TEGRA_EDP_LIMITS) || defined(CONFIG_TEGRA_THERMAL_THROTTLE)
121         .throttle_edp_device_id = THERMAL_DEVICE_ID_NCT_EXT,
122 #endif
123 #ifdef CONFIG_TEGRA_EDP_LIMITS
124         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
125         .hysteresis_edp = 3000,
126 #endif
127 #ifdef CONFIG_TEGRA_THERMAL_THROTTLE
128         .temp_throttle = 85000,
129         .tc1 = 0,
130         .tc2 = 1,
131         .passive_delay = 2000,
132 #endif
133 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
134         .skin_device_id = THERMAL_DEVICE_ID_SKIN,
135         .temp_throttle_skin = 43000,
136         .tc1_skin = 0,
137         .tc2_skin = 1,
138         .passive_delay_skin = 5000,
139
140         .skin_temp_offset = 9793,
141         .skin_period = 1100,
142         .skin_devs_size = 2,
143         .skin_devs = {
144                 {
145                         THERMAL_DEVICE_ID_NCT_EXT,
146                         {
147                                 2, 1, 1, 1,
148                                 1, 1, 1, 1,
149                                 1, 1, 1, 0,
150                                 1, 1, 0, 0,
151                                 0, 0, -1, -7
152                         }
153                 },
154                 {
155                         THERMAL_DEVICE_ID_NCT_INT,
156                         {
157                                 -11, -7, -5, -3,
158                                 -3, -2, -1, 0,
159                                 0, 0, 1, 1,
160                                 1, 2, 2, 3,
161                                 4, 6, 11, 18
162                         }
163                 },
164         },
165 #endif
166 };
167
168 static struct rfkill_gpio_platform_data cardhu_bt_rfkill_pdata[] = {
169         {
170                 .name           = "bt_rfkill",
171                 .shutdown_gpio  = TEGRA_GPIO_PU0,
172                 .reset_gpio     = TEGRA_GPIO_INVALID,
173                 .type           = RFKILL_TYPE_BLUETOOTH,
174         },
175 };
176
177 static struct platform_device cardhu_bt_rfkill_device = {
178         .name = "rfkill_gpio",
179         .id             = -1,
180         .dev = {
181                 .platform_data = &cardhu_bt_rfkill_pdata,
182         },
183 };
184
185 static struct resource cardhu_bluesleep_resources[] = {
186         [0] = {
187                 .name = "gpio_host_wake",
188                         .start  = TEGRA_GPIO_PU6,
189                         .end    = TEGRA_GPIO_PU6,
190                         .flags  = IORESOURCE_IO,
191         },
192         [1] = {
193                 .name = "gpio_ext_wake",
194                         .start  = TEGRA_GPIO_PU1,
195                         .end    = TEGRA_GPIO_PU1,
196                         .flags  = IORESOURCE_IO,
197         },
198         [2] = {
199                 .name = "host_wake",
200                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
201         },
202 };
203
204 static struct platform_device cardhu_bluesleep_device = {
205         .name           = "bluesleep",
206         .id             = -1,
207         .num_resources  = ARRAY_SIZE(cardhu_bluesleep_resources),
208         .resource       = cardhu_bluesleep_resources,
209 };
210
211 static noinline void __init cardhu_setup_bluesleep(void)
212 {
213         cardhu_bluesleep_resources[2].start =
214                 cardhu_bluesleep_resources[2].end =
215                         gpio_to_irq(TEGRA_GPIO_PU6);
216         platform_device_register(&cardhu_bluesleep_device);
217         return;
218 }
219
220 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
221         /* name         parent          rate            enabled */
222         { "pll_m",      NULL,           0,              false},
223         { "hda",        "pll_p",        108000000,      false},
224         { "hda2codec_2x","pll_p",       48000000,       false},
225         { "pwm",        "pll_p",        3187500,        false},
226         { "blink",      "clk_32k",      32768,          true},
227         { "i2s0",       "pll_a_out0",   0,              false},
228         { "i2s1",       "pll_a_out0",   0,              false},
229         { "i2s3",       "pll_a_out0",   0,              false},
230         { "spdif_out",  "pll_a_out0",   0,              false},
231         { "d_audio",    "clk_m",        12000000,       false},
232         { "dam0",       "clk_m",        12000000,       false},
233         { "dam1",       "clk_m",        12000000,       false},
234         { "dam2",       "clk_m",        12000000,       false},
235         { "audio1",     "i2s1_sync",    0,              false},
236         { "audio3",     "i2s3_sync",    0,              false},
237         { "vi_sensor",  "pll_p",        150000000,      false},
238         { "i2c1",       "pll_p",        3200000,        false},
239         { "i2c2",       "pll_p",        3200000,        false},
240         { "i2c3",       "pll_p",        3200000,        false},
241         { "i2c4",       "pll_p",        3200000,        false},
242         { "i2c5",       "pll_p",        3200000,        false},
243         { NULL,         NULL,           0,              0},
244 };
245
246 static struct pn544_i2c_platform_data nfc_pdata = {
247         .irq_gpio = TEGRA_GPIO_PX0,
248         .ven_gpio = TEGRA_GPIO_PP3,
249         .firm_gpio = TEGRA_GPIO_PO7,
250         };
251
252 static struct i2c_board_info __initdata cardhu_i2c_bus3_board_info[] = {
253         {
254                 I2C_BOARD_INFO("pn544", 0x28),
255                 .platform_data = &nfc_pdata,
256         },
257 };
258 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
259         .adapter_nr     = 0,
260         .bus_count      = 1,
261         .bus_clk_rate   = { 100000, 0 },
262         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
263         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
264         .arb_recovery = arb_lost_recovery,
265 };
266
267 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
268         .adapter_nr     = 1,
269         .bus_count      = 1,
270         .bus_clk_rate   = { 400000, 0 },
271         .is_clkon_always = true,
272         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
273         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
274         .arb_recovery = arb_lost_recovery,
275 };
276
277 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
278         .adapter_nr     = 2,
279         .bus_count      = 1,
280         .bus_clk_rate   = { 100000, 0 },
281         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
282         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
283         .arb_recovery = arb_lost_recovery,
284 };
285
286 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
287         .adapter_nr     = 3,
288         .bus_count      = 1,
289         .bus_clk_rate   = { 10000, 0 },
290         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
291         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
292         .arb_recovery = arb_lost_recovery,
293 };
294
295 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
296         .adapter_nr     = 4,
297         .bus_count      = 1,
298         .bus_clk_rate   = { 400000, 0 },
299         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
300         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
301         .arb_recovery = arb_lost_recovery,
302 };
303
304
305 #if 0
306 struct tegra_wired_jack_conf audio_wr_jack_conf = {
307         .hp_det_n = TEGRA_GPIO_PW2,
308         .en_mic_ext = TEGRA_GPIO_PX1,
309         .en_mic_int = TEGRA_GPIO_PX0,
310 };
311 #endif
312
313 static struct wm8903_platform_data cardhu_wm8903_pdata = {
314         .irq_active_low = 0,
315         .micdet_cfg = 0,
316         .micdet_delay = 100,
317         .gpio_base = CARDHU_GPIO_WM8903(0),
318         .gpio_cfg = {
319                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP1_FN_SHIFT),
320                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP2_FN_SHIFT) |
321                         WM8903_GP2_DIR,
322                 WM8903_GPIO_CONFIG_ZERO,
323                 0,
324                 0,
325         },
326 };
327
328 /* Equalizer filter coefs generated from the MAXIM MAX98095
329  * evkit software tool */
330 static struct max98095_eq_cfg max98095_eq_cfg[] = {
331         {
332                 .name = "FLAT",
333                 .rate = 44100,
334                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
335                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
336                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
337                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
338                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
339         },
340         {
341                 .name = "LOWPASS1K",
342                 .rate = 44100,
343                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
344                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
345                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
346                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
347                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
348         },
349         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
350                 .name = "HIBOOST",
351                 .rate = 44100,
352                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
353                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
354                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
355                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
356                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
357         },
358         { /* BASS=12dB, TREBLE=+12dB */
359                 .name = "LOUD12DB",
360                 .rate = 44100,
361                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
362                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
363                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
364                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
365                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
366         },
367         {
368                 .name = "FLAT",
369                 .rate = 16000,
370                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
371                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
372                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
373                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
374                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
375         },
376         {
377                 .name = "LOWPASS1K",
378                 .rate = 16000,
379                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
380                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
381                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
382                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
383                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
384         },
385         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
386                 .name = "HIBOOST",
387                 .rate = 16000,
388                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
389                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
390                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
391                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
392                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
393         },
394         { /* BASS=12dB, TREBLE=+12dB */
395                 .name = "LOUD12DB",
396                 .rate = 16000,
397                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
398                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
399                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
400                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
401                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
402         },
403 };
404
405 static struct max98095_pdata cardhu_max98095_pdata = {
406         /* equalizer configuration */
407         .eq_cfg = max98095_eq_cfg,
408         .eq_cfgcnt = ARRAY_SIZE(max98095_eq_cfg),
409
410         /* Biquad filter response configuration */
411         .bq_cfg = NULL,
412         .bq_cfgcnt = 0,
413
414         /* microphone configuration */
415         .digmic_left_mode = 1,
416         .digmic_right_mode = 1,
417 };
418
419 static struct i2c_board_info __initdata cardhu_codec_wm8903_info = {
420         I2C_BOARD_INFO("wm8903", 0x1a),
421         .platform_data = &cardhu_wm8903_pdata,
422 };
423
424 static struct i2c_board_info __initdata cardhu_codec_aic326x_info = {
425         I2C_BOARD_INFO("aic3262-codec", 0x18),
426 };
427
428 static struct i2c_board_info __initdata cardhu_codec_max98095_info = {
429         I2C_BOARD_INFO("max98095", 0x10),
430         .platform_data = &cardhu_max98095_pdata,
431 };
432
433 static void cardhu_i2c_init(void)
434 {
435         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
436         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
437         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
438         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
439         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
440
441         platform_device_register(&tegra_i2c_device5);
442         platform_device_register(&tegra_i2c_device4);
443         platform_device_register(&tegra_i2c_device3);
444         platform_device_register(&tegra_i2c_device2);
445         platform_device_register(&tegra_i2c_device1);
446
447         cardhu_codec_wm8903_info.irq = cardhu_codec_max98095_info.irq =
448                 cardhu_codec_aic326x_info.irq = gpio_to_irq(TEGRA_GPIO_CDC_IRQ);
449         i2c_register_board_info(4, &cardhu_codec_wm8903_info, 1);
450         i2c_register_board_info(4, &cardhu_codec_max98095_info, 1);
451         i2c_register_board_info(4, &cardhu_codec_aic326x_info, 1);
452
453         cardhu_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PX0);
454         i2c_register_board_info(2, cardhu_i2c_bus3_board_info, 1);
455 }
456
457 static struct platform_device *cardhu_uart_devices[] __initdata = {
458         &tegra_uarta_device,
459         &tegra_uartb_device,
460         &tegra_uartc_device,
461         &tegra_uartd_device,
462         &tegra_uarte_device,
463 };
464 static struct uart_clk_parent uart_parent_clk[] = {
465         [0] = {.name = "clk_m"},
466         [1] = {.name = "pll_p"},
467 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
468         [2] = {.name = "pll_m"},
469 #endif
470 };
471
472 static struct tegra_uart_platform_data cardhu_uart_pdata;
473 static struct tegra_uart_platform_data cardhu_loopback_uart_pdata;
474
475 static void __init uart_debug_init(void)
476 {
477         struct board_info board_info;
478         int debug_port_id;
479
480         tegra_get_board_info(&board_info);
481
482         debug_port_id = get_tegra_uart_debug_port_id();
483         if (debug_port_id < 0) {
484                 debug_port_id = 0;
485                         /* UARTB is debug port
486                          *       for SLT - E1186/E1187/PM269
487                          *       for E1256/E1257
488                          */
489                 if (((board_info.sku & SKU_SLT_ULPI_SUPPORT) &&
490                         ((board_info.board_id == BOARD_E1186) ||
491                         (board_info.board_id == BOARD_E1187) ||
492                         (board_info.board_id == BOARD_PM269))) ||
493                         (board_info.board_id == BOARD_E1256) ||
494                         (board_info.board_id == BOARD_E1257))
495                                 debug_port_id = 1;
496         }
497
498         switch (debug_port_id) {
499         case 0:
500                 /* UARTA is the debug port. */
501                 pr_info("Selecting UARTA as the debug console\n");
502                 cardhu_uart_devices[0] = &debug_uarta_device;
503                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
504                 debug_uart_port_base = ((struct plat_serial8250_port *)(
505                         debug_uarta_device.dev.platform_data))->mapbase;
506                 break;
507
508         case 1:
509                 /* UARTB is the debug port. */
510                 pr_info("Selecting UARTB as the debug console\n");
511                 cardhu_uart_devices[1] = &debug_uartb_device;
512                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartb");
513                 debug_uart_port_base = ((struct plat_serial8250_port *)(
514                         debug_uartb_device.dev.platform_data))->mapbase;
515                 break;
516
517         case 2:
518                 /* UARTC is the debug port. */
519                 pr_info("Selecting UARTC as the debug console\n");
520                 cardhu_uart_devices[2] = &debug_uartc_device;
521                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartc");
522                 debug_uart_port_base = ((struct plat_serial8250_port *)(
523                         debug_uartc_device.dev.platform_data))->mapbase;
524                 break;
525
526         case 3:
527                 /* UARTD is the debug port. */
528                 pr_info("Selecting UARTD as the debug console\n");
529                 cardhu_uart_devices[3] = &debug_uartd_device;
530                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartd");
531                 debug_uart_port_base = ((struct plat_serial8250_port *)(
532                         debug_uartd_device.dev.platform_data))->mapbase;
533                 break;
534
535         case 4:
536                 /* UARTE is the debug port. */
537                 pr_info("Selecting UARTE as the debug console\n");
538                 cardhu_uart_devices[4] = &debug_uarte_device;
539                 debug_uart_clk =  clk_get_sys("serial8250.0", "uarte");
540                 debug_uart_port_base = ((struct plat_serial8250_port *)(
541                         debug_uarte_device.dev.platform_data))->mapbase;
542                 break;
543
544         default:
545                 pr_info("The debug console id %d is invalid, Assuming UARTA", debug_port_id);
546                 cardhu_uart_devices[0] = &debug_uarta_device;
547                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
548                 debug_uart_port_base = ((struct plat_serial8250_port *)(
549                         debug_uarta_device.dev.platform_data))->mapbase;
550                 break;
551         }
552         return;
553 }
554
555 static void __init cardhu_uart_init(void)
556 {
557         struct clk *c;
558         int i;
559
560         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
561                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
562                 if (IS_ERR_OR_NULL(c)) {
563                         pr_err("Not able to get the clock for %s\n",
564                                                 uart_parent_clk[i].name);
565                         continue;
566                 }
567                 uart_parent_clk[i].parent_clk = c;
568                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
569         }
570         cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
571         cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
572         cardhu_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
573         cardhu_loopback_uart_pdata.parent_clk_count =
574                                                 ARRAY_SIZE(uart_parent_clk);
575         cardhu_loopback_uart_pdata.is_loopback = true;
576         tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
577         tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
578         tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
579         tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
580         /* UARTE is used for loopback test purpose */
581         tegra_uarte_device.dev.platform_data = &cardhu_loopback_uart_pdata;
582
583         /* Register low speed only if it is selected */
584         if (!is_tegra_debug_uartport_hs()) {
585                 uart_debug_init();
586                 /* Clock enable for the debug channel */
587                 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
588                         pr_info("The debug console clock name is %s\n",
589                                                 debug_uart_clk->name);
590                         c = tegra_get_clock_by_name("pll_p");
591                         if (IS_ERR_OR_NULL(c))
592                                 pr_err("Not getting the parent clock pll_p\n");
593                         else
594                                 clk_set_parent(debug_uart_clk, c);
595
596                         clk_enable(debug_uart_clk);
597                         clk_set_rate(debug_uart_clk, clk_get_rate(c));
598                 } else {
599                         pr_err("Not getting the clock %s for debug console\n",
600                                         debug_uart_clk->name);
601                 }
602         }
603
604         platform_add_devices(cardhu_uart_devices,
605                                 ARRAY_SIZE(cardhu_uart_devices));
606 }
607
608 static struct platform_device tegra_camera = {
609         .name = "tegra_camera",
610         .id = -1,
611 };
612
613 static struct platform_device *cardhu_spi_devices[] __initdata = {
614         &tegra_spi_device4,
615 };
616
617 static struct platform_device *touch_spi_device[] __initdata = {
618         &tegra_spi_device1,
619 };
620
621 struct spi_clk_parent spi_parent_clk[] = {
622         [0] = {.name = "pll_p"},
623 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
624         [1] = {.name = "pll_m"},
625         [2] = {.name = "clk_m"},
626 #else
627         [1] = {.name = "clk_m"},
628 #endif
629 };
630
631 static struct tegra_spi_platform_data cardhu_spi_pdata = {
632         .is_dma_based           = true,
633         .max_dma_buffer         = (16 * 1024),
634         .is_clkon_always        = false,
635         .max_rate               = 100000000,
636 };
637
638 static void __init cardhu_spi_init(void)
639 {
640         int i;
641         struct clk *c;
642         struct board_info board_info, display_board_info;
643
644         tegra_get_board_info(&board_info);
645         tegra_get_display_board_info(&display_board_info);
646
647         for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
648                 c = tegra_get_clock_by_name(spi_parent_clk[i].name);
649                 if (IS_ERR_OR_NULL(c)) {
650                         pr_err("Not able to get the clock for %s\n",
651                                                 spi_parent_clk[i].name);
652                         continue;
653                 }
654                 spi_parent_clk[i].parent_clk = c;
655                 spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
656         }
657         cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
658         cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
659         tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
660         platform_add_devices(cardhu_spi_devices,
661                                 ARRAY_SIZE(cardhu_spi_devices));
662
663         if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
664                 platform_add_devices(touch_spi_device,
665                                 ARRAY_SIZE(touch_spi_device));
666         }
667         if (board_info.board_id == BOARD_E1198) {
668                 tegra_spi_device2.dev.platform_data = &cardhu_spi_pdata;
669                 platform_device_register(&tegra_spi_device2);
670                 tegra_spi_slave_device1.dev.platform_data = &cardhu_spi_pdata;
671                 platform_device_register(&tegra_spi_slave_device1);
672         }
673 }
674
675 static void __init cardhu_dtv_init(void)
676 {
677         struct board_info board_info;
678
679         tegra_get_board_info(&board_info);
680
681         if (board_info.board_id == BOARD_E1186)
682                 platform_device_register(&tegra_dtv_device);
683 }
684
685 static struct resource tegra_rtc_resources[] = {
686         [0] = {
687                 .start = TEGRA_RTC_BASE,
688                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
689                 .flags = IORESOURCE_MEM,
690         },
691         [1] = {
692                 .start = INT_RTC,
693                 .end = INT_RTC,
694                 .flags = IORESOURCE_IRQ,
695         },
696 };
697
698 static struct platform_device tegra_rtc_device = {
699         .name = "tegra_rtc",
700         .id   = -1,
701         .resource = tegra_rtc_resources,
702         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
703 };
704
705 static struct tegra_wm8903_platform_data cardhu_audio_wm8903_pdata = {
706         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
707         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
708         .gpio_hp_mute           = -1,
709         .gpio_int_mic_en        = -1,
710         .gpio_ext_mic_en        = -1,
711 };
712
713 static struct tegra_asoc_platform_data cardhu_audio_max98095_pdata = {
714         .gpio_spkr_en           = -1,
715         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
716         .gpio_hp_mute           = -1,
717         .gpio_int_mic_en        = -1,
718         .gpio_ext_mic_en        = -1,
719 };
720
721 static struct platform_device cardhu_audio_wm8903_device = {
722         .name   = "tegra-snd-wm8903",
723         .id     = 0,
724         .dev    = {
725                 .platform_data = &cardhu_audio_wm8903_pdata,
726         },
727 };
728
729 static struct platform_device cardhu_audio_max98095_device = {
730         .name   = "tegra-snd-max98095",
731         .id     = 0,
732         .dev    = {
733                 .platform_data = &cardhu_audio_max98095_pdata,
734         },
735 };
736
737 static struct tegra_asoc_platform_data cardhu_audio_aic326x_pdata = {
738         .gpio_spkr_en           = -1,
739         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
740         .gpio_hp_mute           = -1,
741         .gpio_int_mic_en        = -1,
742         .gpio_ext_mic_en        = -1,
743         /*defaults for Verbier-Cardhu board with TI AIC326X codec*/
744         .audio_port_id          = {
745                 [HIFI_CODEC] = 0,
746                 [BASEBAND] = -1,
747                 [BT_SCO] = 3,
748         },
749         .baseband_param         = {
750                 .rate = -1,
751                 .channels = -1,
752         },
753 };
754
755 static struct platform_device cardhu_audio_aic326x_device = {
756         .name   = "tegra-snd-aic326x",
757         .id     = 0,
758         .dev    = {
759                 .platform_data  = &cardhu_audio_aic326x_pdata,
760         },
761 };
762
763 static struct platform_device *cardhu_devices[] __initdata = {
764         &tegra_pmu_device,
765         &tegra_rtc_device,
766         &tegra_udc_device,
767 #if defined(CONFIG_TEGRA_IOVMM_SMMU) ||  defined(CONFIG_TEGRA_IOMMU_SMMU)
768         &tegra_smmu_device,
769 #endif
770         &tegra_wdt0_device,
771         &tegra_wdt1_device,
772         &tegra_wdt2_device,
773 #if defined(CONFIG_TEGRA_AVP)
774         &tegra_avp_device,
775 #endif
776         &tegra_camera,
777 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
778         &tegra_se_device,
779 #endif
780         &tegra_ahub_device,
781         &tegra_dam_device0,
782         &tegra_dam_device1,
783         &tegra_dam_device2,
784         &tegra_i2s_device0,
785         &tegra_i2s_device1,
786         &tegra_i2s_device3,
787         &tegra_spdif_device,
788         &spdif_dit_device,
789         &bluetooth_dit_device,
790         &baseband_dit_device,
791         &cardhu_bt_rfkill_device,
792         &tegra_pcm_device,
793         &cardhu_audio_wm8903_device,
794         &cardhu_audio_max98095_device,
795         &cardhu_audio_aic326x_device,
796         &tegra_hda_device,
797         &tegra_cec_device,
798 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
799         &tegra_aes_device,
800 #endif
801 };
802
803 #define E1506_MXT_CONFIG_CRC 0x62F903
804 static const u8 e1506_config[] = {
805         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
806         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x05, 0x01, 0x00,
807         0x00, 0x1E, 0x0A, 0x8B, 0x00, 0x00, 0x13, 0x0B,
808         0x00, 0x10, 0x32, 0x03, 0x03, 0x00, 0x03, 0x01,
809         0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xBF, 0x03, 0x1B,
810         0x02, 0x00, 0x00, 0x37, 0x37, 0x00, 0x00, 0x00,
811         0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
812         0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
813         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
814         0x00, 0x00, 0x00, 0xA9, 0x7F, 0x9A, 0x0E, 0x00,
815         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
816         0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00,
817         0x00, 0x00, 0x03, 0x23, 0x00, 0x00, 0x00, 0x0A,
818         0x0F, 0x14, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00,
819         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
820         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
821         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
822         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
823         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
824         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
825         0x00, 0x00, 0x00, 0x01, 0x00, 0x03, 0x08, 0x10,
826         0x00
827 };
828
829 #define MXT_CONFIG_CRC  0xD62DE8
830 static const u8 config[] = {
831         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
832         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
833         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
834         0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
835         0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
836         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
837         0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
838         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
839         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
840         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
841         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
842         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
843         0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
844         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
845         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
846         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
847         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
848         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
849         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
850         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
851 };
852
853 #define MXT_CONFIG_CRC_SKU2000  0xA24D9A
854 static const u8 config_sku2000[] = {
855         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
856         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
857         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
858         0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00,  //23=thr  2 di
859         0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
860         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
861         0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00,  //0A=limit
862         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
863         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
864         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
865         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
866         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
867         0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
868         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
869         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
870         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
871         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
872         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
873         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
874         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
875 };
876
877 static struct mxt_platform_data atmel_mxt_info = {
878         .x_line         = 27,
879         .y_line         = 42,
880         .x_size         = 768,
881         .y_size         = 1366,
882         .blen           = 0x20,
883         .threshold      = 0x3C,
884         .voltage        = 3300000,              /* 3.3V */
885         .orient         = 5,
886         .config         = config,
887         .config_length  = 157,
888         .config_crc     = MXT_CONFIG_CRC,
889         .irqflags       = IRQF_TRIGGER_FALLING,
890 /*      .read_chg       = &read_chg, */
891         .read_chg       = NULL,
892 };
893
894 static struct mxt_platform_data e1506_atmel_mxt_info = {
895         .x_line         = 19,
896         .y_line         = 11,
897         .x_size         = 960,
898         .y_size         = 540,
899         .blen           = 0x10,
900         .threshold      = 0x32,
901         .voltage        = 3300000,              /* 3.3V */
902         .orient         = 3,
903         .config         = e1506_config,
904         .config_length  = 168,
905         .config_crc     = E1506_MXT_CONFIG_CRC,
906         .irqflags       = IRQF_TRIGGER_FALLING,
907 /*      .read_chg       = &read_chg, */
908         .read_chg       = NULL,
909 };
910
911 static struct i2c_board_info __initdata atmel_i2c_info[] = {
912         {
913                 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
914                 .platform_data = &atmel_mxt_info,
915         }
916 };
917
918 static struct i2c_board_info __initdata e1506_atmel_i2c_info[] = {
919         {
920                 I2C_BOARD_INFO("atmel_mxt_ts", 0x4A),
921                 .platform_data = &e1506_atmel_mxt_info,
922         }
923 };
924
925 static __initdata struct tegra_clk_init_table spi_clk_init_table[] = {
926         /* name         parent          rate            enabled */
927         { "sbc1",       "pll_p",        52000000,       true},
928         { NULL,         NULL,           0,              0},
929 };
930
931 static int __init cardhu_touch_init(void)
932 {
933         struct board_info BoardInfo, DisplayBoardInfo;
934
935         tegra_get_board_info(&BoardInfo);
936         tegra_get_display_board_info(&DisplayBoardInfo);
937         if (DisplayBoardInfo.board_id == BOARD_DISPLAY_PM313) {
938                 tegra_clk_init_from_table(spi_clk_init_table);
939
940                 touch_init_raydium(TEGRA_GPIO_PH4, TEGRA_GPIO_PH6, 2);
941         } else {
942                 gpio_request(TEGRA_GPIO_PH4, "atmel-irq");
943                 gpio_direction_input(TEGRA_GPIO_PH4);
944
945                 gpio_request(TEGRA_GPIO_PH6, "atmel-reset");
946                 gpio_direction_output(TEGRA_GPIO_PH6, 0);
947                 msleep(1);
948                 gpio_set_value(TEGRA_GPIO_PH6, 1);
949                 msleep(100);
950
951                 if ((BoardInfo.sku & SKU_TOUCH_MASK) == SKU_TOUCH_2000) {
952                         atmel_mxt_info.config = config_sku2000;
953                         atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
954                 }
955
956                 if (DisplayBoardInfo.board_id == BOARD_DISPLAY_E1506) {
957                         e1506_atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH4);
958                         i2c_register_board_info(1, e1506_atmel_i2c_info, 1);
959                 } else {
960                         atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH4);
961                         i2c_register_board_info(1, atmel_i2c_info, 1);
962                 }
963         }
964
965         return 0;
966 }
967
968 #if defined(CONFIG_USB_SUPPORT)
969
970 static void cardu_usb_hsic_postsupend(void)
971 {
972 #ifdef CONFIG_TEGRA_BB_XMM_POWER
973         baseband_xmm_set_power_status(BBXMM_PS_L2);
974 #endif
975 }
976
977 static void cardu_usb_hsic_preresume(void)
978 {
979 #ifdef CONFIG_TEGRA_BB_XMM_POWER
980         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
981 #endif
982 }
983
984 static void cardu_usb_hsic_phy_ready(void)
985 {
986 #ifdef CONFIG_TEGRA_BB_XMM_POWER
987         baseband_xmm_set_power_status(BBXMM_PS_L0);
988 #endif
989 }
990
991 static void cardu_usb_hsic_phy_off(void)
992 {
993 #ifdef CONFIG_TEGRA_BB_XMM_POWER
994         baseband_xmm_set_power_status(BBXMM_PS_L3);
995 #endif
996 }
997
998 static struct tegra_usb_phy_platform_ops hsic_xmm_plat_ops = {
999         .post_suspend = cardu_usb_hsic_postsupend,
1000         .pre_resume = cardu_usb_hsic_preresume,
1001         .port_power = cardu_usb_hsic_phy_ready,
1002         .post_phy_off = cardu_usb_hsic_phy_off,
1003 };
1004
1005 static struct tegra_usb_platform_data tegra_ehci2_hsic_xmm_pdata = {
1006         .port_otg = false,
1007         .has_hostpc = true,
1008         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
1009         .op_mode        = TEGRA_USB_OPMODE_HOST,
1010         .u_data.host = {
1011                 .vbus_gpio = -1,
1012                 .hot_plug = false,
1013                 .remote_wakeup_supported = false,
1014                 .power_off_on_suspend = false,
1015         },
1016         .u_cfg.hsic = {
1017                 .sync_start_delay = 9,
1018                 .idle_wait_delay = 17,
1019                 .term_range_adj = 0,
1020                 .elastic_underrun_limit = 16,
1021                 .elastic_overrun_limit = 16,
1022         },
1023         .ops = &hsic_xmm_plat_ops,
1024 };
1025 #endif
1026
1027 static int hsic_enable_gpio = -1;
1028 static int hsic_reset_gpio = -1;
1029
1030 void hsic_platform_open(void)
1031 {
1032         int reset_gpio = 0, enable_gpio = 0;
1033
1034         if (hsic_enable_gpio != -1)
1035                 enable_gpio = gpio_request(hsic_enable_gpio, "uhsic_enable");
1036         if (hsic_reset_gpio != -1)
1037                 reset_gpio = gpio_request(hsic_reset_gpio, "uhsic_reset");
1038         /* hsic enable signal deasserted, hsic reset asserted */
1039         if (!enable_gpio)
1040                 gpio_direction_output(hsic_enable_gpio, 0 /* deasserted */);
1041         if (!reset_gpio)
1042                 gpio_direction_output(hsic_reset_gpio, 0 /* asserted */);
1043         if (!enable_gpio)
1044                 tegra_gpio_enable(hsic_enable_gpio);
1045         if (!reset_gpio)
1046                 tegra_gpio_enable(hsic_reset_gpio);
1047         /* keep hsic reset asserted for 1 ms */
1048         udelay(1000);
1049         /* enable (power on) hsic */
1050         if (!enable_gpio)
1051                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
1052         udelay(1000);
1053         /* deassert reset */
1054         if (!reset_gpio)
1055                 gpio_set_value_cansleep(hsic_reset_gpio, 1);
1056
1057 }
1058
1059 void hsic_platform_close(void)
1060 {
1061         if (hsic_enable_gpio != -1) {
1062                 gpio_set_value(hsic_enable_gpio, 0);
1063                 gpio_free(hsic_enable_gpio);
1064         }
1065         if (hsic_reset_gpio != -1) {
1066                 gpio_set_value(hsic_reset_gpio, 0);
1067                 gpio_free(hsic_reset_gpio);
1068         }
1069 }
1070
1071 void hsic_power_on(void)
1072 {
1073         if (hsic_enable_gpio != -1) {
1074                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
1075                 udelay(1000);
1076         }
1077 }
1078
1079 void hsic_power_off(void)
1080 {
1081         if (hsic_enable_gpio != -1) {
1082                 gpio_set_value_cansleep(hsic_enable_gpio, 0);
1083                 udelay(1000);
1084         }
1085 }
1086
1087 #if defined(CONFIG_USB_SUPPORT)
1088 static struct tegra_usb_phy_platform_ops hsic_plat_ops = {
1089         .open = hsic_platform_open,
1090         .close = hsic_platform_close,
1091         .pre_phy_on = hsic_power_on,
1092         .post_phy_off = hsic_power_off,
1093 };
1094
1095 static struct tegra_usb_platform_data tegra_ehci2_hsic_pdata = {
1096         .port_otg = false,
1097         .has_hostpc = true,
1098         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
1099         .op_mode        = TEGRA_USB_OPMODE_HOST,
1100         .u_data.host = {
1101                 .vbus_gpio = -1,
1102                 .hot_plug = false,
1103                 .remote_wakeup_supported = false,
1104                 .power_off_on_suspend = false,
1105         },
1106         .u_cfg.hsic = {
1107                 .sync_start_delay = 9,
1108                 .idle_wait_delay = 17,
1109                 .term_range_adj = 0,
1110                 .elastic_underrun_limit = 16,
1111                 .elastic_overrun_limit = 16,
1112         },
1113         .ops = &hsic_plat_ops,
1114 };
1115
1116 static struct tegra_usb_platform_data tegra_udc_pdata = {
1117         .port_otg = true,
1118         .has_hostpc = true,
1119         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1120         .op_mode = TEGRA_USB_OPMODE_DEVICE,
1121         .u_data.dev = {
1122                 .vbus_pmu_irq = 0,
1123                 .vbus_gpio = -1,
1124                 .charging_supported = false,
1125                 .remote_wakeup_supported = false,
1126         },
1127         .u_cfg.utmi = {
1128                 .hssync_start_delay = 0,
1129                 .elastic_limit = 16,
1130                 .idle_wait_delay = 17,
1131                 .term_range_adj = 6,
1132                 .xcvr_setup = 8,
1133                 .xcvr_lsfslew = 2,
1134                 .xcvr_lsrslew = 2,
1135                 .xcvr_setup_offset = 0,
1136                 .xcvr_use_fuses = 1,
1137         },
1138 };
1139
1140 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
1141         .port_otg = false,
1142         .has_hostpc = true,
1143         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1144         .op_mode        = TEGRA_USB_OPMODE_HOST,
1145         .u_data.host = {
1146                 .vbus_gpio = -1,
1147                 .hot_plug = false,
1148                 .remote_wakeup_supported = true,
1149                 .power_off_on_suspend = true,
1150         },
1151         .u_cfg.utmi = {
1152                 .hssync_start_delay = 0,
1153                 .elastic_limit = 16,
1154                 .idle_wait_delay = 17,
1155                 .term_range_adj = 6,
1156                 .xcvr_setup = 15,
1157                 .xcvr_lsfslew = 2,
1158                 .xcvr_lsrslew = 2,
1159                 .xcvr_setup_offset = 0,
1160                 .xcvr_use_fuses = 1,
1161         },
1162 };
1163
1164 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
1165         .port_otg = false,
1166         .has_hostpc = true,
1167         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1168         .op_mode = TEGRA_USB_OPMODE_HOST,
1169         .u_data.host = {
1170                 .vbus_gpio = -1,
1171                 .vbus_reg = "vdd_vbus_typea_usb",
1172                 .hot_plug = true,
1173                 .remote_wakeup_supported = true,
1174                 .power_off_on_suspend = true,
1175         },
1176         .u_cfg.utmi = {
1177                 .hssync_start_delay = 0,
1178                 .elastic_limit = 16,
1179                 .idle_wait_delay = 17,
1180                 .term_range_adj = 6,
1181                 .xcvr_setup = 8,
1182                 .xcvr_lsfslew = 2,
1183                 .xcvr_lsrslew = 2,
1184                 .xcvr_setup_offset = 0,
1185                 .xcvr_use_fuses = 1,
1186         },
1187 };
1188
1189 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
1190         .port_otg = true,
1191         .has_hostpc = true,
1192         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1193         .op_mode = TEGRA_USB_OPMODE_HOST,
1194         .u_data.host = {
1195                 .vbus_gpio = -1,
1196                 .vbus_reg = "vdd_vbus_micro_usb",
1197                 .hot_plug = true,
1198                 .remote_wakeup_supported = true,
1199                 .power_off_on_suspend = true,
1200         },
1201         .u_cfg.utmi = {
1202                 .hssync_start_delay = 0,
1203                 .elastic_limit = 16,
1204                 .idle_wait_delay = 17,
1205                 .term_range_adj = 6,
1206                 .xcvr_setup = 15,
1207                 .xcvr_lsfslew = 2,
1208                 .xcvr_lsrslew = 2,
1209                 .xcvr_setup_offset = 0,
1210                 .xcvr_use_fuses = 1,
1211         },
1212 };
1213
1214 static struct tegra_usb_otg_data tegra_otg_pdata = {
1215         .ehci_device = &tegra_ehci1_device,
1216         .ehci_pdata = &tegra_ehci1_utmi_pdata,
1217 };
1218 #endif
1219
1220 #if defined(CONFIG_USB_SUPPORT)
1221 static void cardhu_usb_init(void)
1222 {
1223         struct board_info bi;
1224
1225         tegra_get_board_info(&bi);
1226
1227         /* OTG should be the first to be registered */
1228         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1229         platform_device_register(&tegra_otg_device);
1230
1231         /* setup the udc platform data */
1232         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1233
1234         if (bi.board_id == BOARD_PM267) {
1235                 hsic_enable_gpio = EN_HSIC_GPIO;
1236                 hsic_reset_gpio = PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
1237                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1238                 platform_device_register(&tegra_ehci2_device);
1239         } else if (bi.board_id == BOARD_E1256) {
1240                 hsic_enable_gpio = EN_HSIC_GPIO;
1241                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1242                 platform_device_register(&tegra_ehci2_device);
1243         } else if (bi.board_id == BOARD_E1186) {
1244                 tegra_ehci2_device.dev.platform_data =
1245                                                 &tegra_ehci2_hsic_xmm_pdata;
1246                 /* ehci2 registration happens in baseband-xmm-power  */
1247         } else {
1248                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_utmi_pdata;
1249                 platform_device_register(&tegra_ehci2_device);
1250         }
1251
1252         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
1253         platform_device_register(&tegra_ehci3_device);
1254
1255 }
1256 #else
1257 static void cardhu_usb_init(void) { }
1258 #endif
1259
1260 static struct baseband_power_platform_data tegra_baseband_power_data = {
1261         .baseband_type = BASEBAND_XMM,
1262         .modem = {
1263         .xmm = {
1264                         .bb_rst = XMM_GPIO_BB_RST,
1265                         .bb_on = XMM_GPIO_BB_ON,
1266                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1267                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1268                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1269                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1270                         .hsic_device = &tegra_ehci2_device,
1271                 },
1272         },
1273 };
1274
1275 static struct platform_device tegra_baseband_power_device = {
1276         .name = "baseband_xmm_power",
1277         .id = -1,
1278         .dev = {
1279                 .platform_data = &tegra_baseband_power_data,
1280         },
1281 };
1282
1283 static struct platform_device tegra_baseband_power2_device = {
1284         .name = "baseband_xmm_power2",
1285         .id = -1,
1286         .dev = {
1287                 .platform_data = &tegra_baseband_power_data,
1288         },
1289 };
1290
1291
1292 static struct tegra_pci_platform_data cardhu_pci_platform_data = {
1293         .port_status[0] = 1,
1294         .port_status[1] = 1,
1295         .port_status[2] = 1,
1296         .use_dock_detect        = 0,
1297         .gpio           = 0,
1298 };
1299
1300 static void cardhu_pci_init(void)
1301 {
1302         struct board_info board_info;
1303
1304         tegra_get_board_info(&board_info);
1305         if (board_info.board_id == BOARD_E1291) {
1306                 cardhu_pci_platform_data.port_status[0] = 0;
1307                 cardhu_pci_platform_data.port_status[1] = 0;
1308                 cardhu_pci_platform_data.port_status[2] = 1;
1309                 cardhu_pci_platform_data.use_dock_detect = 1;
1310                 cardhu_pci_platform_data.gpio = DOCK_DETECT_GPIO;
1311         }
1312         if ((board_info.board_id == BOARD_E1186) ||
1313                 (board_info.board_id == BOARD_E1187) ||
1314                 (board_info.board_id == BOARD_E1291)) {
1315                 tegra_pci_device.dev.platform_data = &cardhu_pci_platform_data;
1316                 platform_device_register(&tegra_pci_device);
1317         }
1318 }
1319
1320 static void cardhu_modem_init(void)
1321 {
1322         struct board_info board_info;
1323         int w_disable_gpio, ret;
1324
1325         tegra_get_board_info(&board_info);
1326         switch (board_info.board_id) {
1327         case BOARD_E1291:
1328         case BOARD_E1198:
1329                 if (((board_info.board_id == BOARD_E1291) &&
1330                                 (board_info.fab < BOARD_FAB_A03)) ||
1331                         ((board_info.board_id == BOARD_E1198) &&
1332                                         (board_info.fab < BOARD_FAB_A02))) {
1333                         w_disable_gpio = TEGRA_GPIO_PH5;
1334                 } else {
1335                         w_disable_gpio = TEGRA_GPIO_PDD5;
1336                 }
1337
1338                 ret = gpio_request(w_disable_gpio, "w_disable_gpio");
1339                 if (ret < 0)
1340                         pr_err("%s: gpio_request failed for gpio %d\n",
1341                                 __func__, w_disable_gpio);
1342                 else
1343                         gpio_direction_input(w_disable_gpio);
1344
1345                 /* E1291-A04 & E1198:A02: Set PERST signal to high */
1346                 if (((board_info.board_id == BOARD_E1291) &&
1347                                 (board_info.fab >= BOARD_FAB_A04)) ||
1348                         ((board_info.board_id == BOARD_E1198) &&
1349                                         (board_info.fab >= BOARD_FAB_A02))) {
1350                         ret = gpio_request(TEGRA_GPIO_PH7, "modem_perst");
1351                         if (ret < 0) {
1352                                 pr_err("%s(): Error in allocating gpio "
1353                                         "TEGRA_GPIO_PH7\n", __func__);
1354                                 break;
1355                         }
1356                         gpio_direction_output(TEGRA_GPIO_PH7, 1);
1357                 }
1358                 break;
1359         case BOARD_E1186:
1360                 platform_device_register(&tegra_baseband_power_device);
1361                 platform_device_register(&tegra_baseband_power2_device);
1362                 break;
1363         default:
1364                 break;
1365         }
1366
1367 }
1368
1369 #ifdef CONFIG_SATA_AHCI_TEGRA
1370 static void cardhu_sata_init(void)
1371 {
1372         platform_device_register(&tegra_sata_device);
1373 }
1374 #else
1375 static void cardhu_sata_init(void) { }
1376 #endif
1377
1378 static void __init tegra_cardhu_init(void)
1379 {
1380         tegra_thermal_init(&thermal_data,
1381                                 throttle_list,
1382                                 ARRAY_SIZE(throttle_list));
1383         tegra_clk_init_from_table(cardhu_clk_init_table);
1384         tegra_enable_pinmux();
1385         cardhu_pinmux_init();
1386         cardhu_i2c_init();
1387         cardhu_spi_init();
1388         cardhu_usb_init();
1389 #ifdef CONFIG_TEGRA_EDP_LIMITS
1390         cardhu_edp_init();
1391 #endif
1392         cardhu_uart_init();
1393         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
1394         tegra_ram_console_debug_init();
1395         cardhu_sdhci_init();
1396         cardhu_regulator_init();
1397         cardhu_dtv_init();
1398         cardhu_suspend_init();
1399         cardhu_touch_init();
1400         cardhu_modem_init();
1401         cardhu_kbc_init();
1402         cardhu_scroll_init();
1403         cardhu_keys_init();
1404         cardhu_panel_init();
1405         cardhu_pmon_init();
1406         cardhu_sensors_init();
1407         cardhu_setup_bluesleep();
1408         cardhu_sata_init();
1409         //audio_wired_jack_init();
1410         cardhu_pins_state_init();
1411         cardhu_emc_init();
1412         tegra_release_bootloader_fb();
1413         cardhu_pci_init();
1414 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1415         tegra_wdt_recovery_init();
1416 #endif
1417 }
1418
1419 static void __init tegra_cardhu_reserve(void)
1420 {
1421 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1422         /* support 1920X1200 with 24bpp */
1423         tegra_reserve(0, SZ_8M + SZ_1M, SZ_8M + SZ_1M);
1424 #else
1425         tegra_reserve(SZ_128M, SZ_8M, SZ_8M);
1426 #endif
1427         tegra_ram_console_debug_reserve(SZ_1M);
1428 }
1429
1430 MACHINE_START(CARDHU, "cardhu")
1431         .atag_offset    = 0x100,
1432         .soc            = &tegra_soc_desc,
1433         .map_io         = tegra_map_common_io,
1434         .reserve        = tegra_cardhu_reserve,
1435         .init_early     = tegra30_init_early,
1436         .init_irq       = tegra_init_irq,
1437         .handle_irq     = gic_handle_irq,
1438         .timer          = &tegra_timer,
1439         .init_machine   = tegra_cardhu_init,
1440         .restart        = tegra_assert_system_reset,
1441 MACHINE_END