arm: tegra: initialise dam/ahub audio clocks
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <linux/spi/spi.h>
37 #include <linux/i2c/atmel_mxt_ts.h>
38 #include <linux/tegra_uart.h>
39 #include <linux/spi-tegra.h>
40
41 #include <sound/wm8903.h>
42
43 #include <mach/clk.h>
44 #include <mach/iomap.h>
45 #include <mach/irqs.h>
46 #include <mach/pinmux.h>
47 #include <mach/iomap.h>
48 #include <mach/io.h>
49 #include <mach/i2s.h>
50 #include <mach/tegra_wm8903_pdata.h>
51 #include <asm/mach-types.h>
52 #include <asm/mach/arch.h>
53 #include <mach/usb_phy.h>
54
55 #include "board.h"
56 #include "clock.h"
57 #include "board-cardhu.h"
58 #include "devices.h"
59 #include "gpio-names.h"
60 #include "fuse.h"
61 #include "pm.h"
62 #include "baseband-xmm-power.h"
63
64
65 /* !!!TODO: Change for cardhu (Taken from Ventana) */
66 static struct tegra_utmip_config utmi_phy_config[] = {
67         [0] = {
68                         .hssync_start_delay = 0,
69                         .idle_wait_delay = 17,
70                         .elastic_limit = 16,
71                         .term_range_adj = 6,
72                         .xcvr_setup = 15,
73                         .xcvr_setup_offset = 0,
74                         .xcvr_use_fuses = 1,
75                         .xcvr_lsfslew = 2,
76                         .xcvr_lsrslew = 2,
77         },
78         [1] = {
79                         .hssync_start_delay = 0,
80                         .idle_wait_delay = 17,
81                         .elastic_limit = 16,
82                         .term_range_adj = 6,
83                         .xcvr_setup = 15,
84                         .xcvr_setup_offset = 0,
85                         .xcvr_use_fuses = 1,
86                         .xcvr_lsfslew = 2,
87                         .xcvr_lsrslew = 2,
88         },
89         [2] = {
90                         .hssync_start_delay = 0,
91                         .idle_wait_delay = 17,
92                         .elastic_limit = 16,
93                         .term_range_adj = 6,
94                         .xcvr_setup = 8,
95                         .xcvr_setup_offset = 0,
96                         .xcvr_use_fuses = 1,
97                         .xcvr_lsfslew = 2,
98                         .xcvr_lsrslew = 2,
99         },
100 };
101
102 #ifdef CONFIG_BCM4329_RFKILL
103 static struct resource cardhu_bcm4329_rfkill_resources[] = {
104         {
105                 .name   = "bcm4329_nshutdown_gpio",
106                 .start  = TEGRA_GPIO_PU0,
107                 .end    = TEGRA_GPIO_PU0,
108                 .flags  = IORESOURCE_IO,
109         },
110 };
111
112 static struct platform_device cardhu_bcm4329_rfkill_device = {
113         .name = "bcm4329_rfkill",
114         .id             = -1,
115         .num_resources  = ARRAY_SIZE(cardhu_bcm4329_rfkill_resources),
116         .resource       = cardhu_bcm4329_rfkill_resources,
117 };
118
119 static noinline void __init cardhu_bt_rfkill(void)
120 {
121         platform_device_register(&cardhu_bcm4329_rfkill_device);
122
123         return;
124 }
125 #else
126 static inline void cardhu_bt_rfkill(void) { }
127 #endif
128
129 #ifdef CONFIG_BT_BLUESLEEP
130 static noinline void __init tegra_setup_bluesleep(void)
131 {
132         struct platform_device *pdev = NULL;
133         struct resource *res;
134
135         pdev = platform_device_alloc("bluesleep", 0);
136         if (!pdev) {
137                 pr_err("unable to allocate platform device for bluesleep");
138                 return;
139         }
140
141         res = kzalloc(sizeof(struct resource) * 3, GFP_KERNEL);
142         if (!res) {
143                 pr_err("unable to allocate resource for bluesleep\n");
144                 goto err_free_dev;
145         }
146
147         res[0].name   = "gpio_host_wake";
148         res[0].start  = TEGRA_GPIO_PU6;
149         res[0].end    = TEGRA_GPIO_PU6;
150         res[0].flags  = IORESOURCE_IO;
151
152         res[1].name   = "gpio_ext_wake";
153         res[1].start  = TEGRA_GPIO_PU1;
154         res[1].end    = TEGRA_GPIO_PU1;
155         res[1].flags  = IORESOURCE_IO;
156
157         res[2].name   = "host_wake";
158         res[2].start  = gpio_to_irq(TEGRA_GPIO_PU6);
159         res[2].end    = gpio_to_irq(TEGRA_GPIO_PU6);
160         res[2].flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE ;
161
162         if (platform_device_add_resources(pdev, res, 3)) {
163                 pr_err("unable to add resources to bluesleep device\n");
164                 goto err_free_res;
165         }
166
167         if (platform_device_add(pdev)) {
168                 pr_err("unable to add bluesleep device\n");
169                 goto err_free_res;
170         }
171         tegra_gpio_enable(TEGRA_GPIO_PU6);
172         tegra_gpio_enable(TEGRA_GPIO_PU1);
173
174 return;
175
176 err_free_res:
177         kfree(res);
178 err_free_dev:
179         platform_device_put(pdev);
180         return;
181 }
182 #else
183 static inline void tegra_setup_bluesleep(void) { }
184 #endif
185
186 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
187         /* name         parent          rate            enabled */
188         { "pll_m",      NULL,           0,              false},
189         { "hda",        "pll_p",        108000000,      false},
190         { "hda2codec_2x","pll_p",       48000000,       false},
191         { "pwm",        "pll_p",        3187500,        false},
192         { "blink",      "clk_32k",      32768,          true},
193         { "i2s1",       "pll_a_out0",   0,              false},
194         { "spdif_out",  "pll_a_out0",   0,              false},
195         { "d_audio",    "pll_a_out0",   0,              false},
196         { "dam0",       "pll_a_out0",   0,              false},
197         { "dam1",       "pll_a_out0",   0,              false},
198         { "dam2",       "pll_a_out0",   0,              false},
199         { "vi_sensor",  "pll_p",        150000000,      false},
200         { "i2c1",       "pll_p",        3200000,        false},
201         { "i2c2",       "pll_p",        3200000,        false},
202         { "i2c3",       "pll_p",        3200000,        false},
203         { "i2c4",       "pll_p",        3200000,        false},
204         { "i2c5",       "pll_p",        3200000,        false},
205         { NULL,         NULL,           0,              0},
206 };
207
208 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
209         .adapter_nr     = 0,
210         .bus_count      = 1,
211         .bus_clk_rate   = { 100000, 0 },
212         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
213         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
214         .arb_recovery = arb_lost_recovery,
215 };
216
217 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
218         .adapter_nr     = 1,
219         .bus_count      = 1,
220         .bus_clk_rate   = { 100000, 0 },
221         .is_clkon_always = true,
222         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
223         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
224         .arb_recovery = arb_lost_recovery,
225 };
226
227 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
228         .adapter_nr     = 2,
229         .bus_count      = 1,
230         .bus_clk_rate   = { 100000, 0 },
231         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
232         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
233         .arb_recovery = arb_lost_recovery,
234 };
235
236 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
237         .adapter_nr     = 3,
238         .bus_count      = 1,
239         .bus_clk_rate   = { 100000, 0 },
240         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
241         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
242         .arb_recovery = arb_lost_recovery,
243 };
244
245 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
246         .adapter_nr     = 4,
247         .bus_count      = 1,
248         .bus_clk_rate   = { 400000, 0 },
249         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
250         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
251         .arb_recovery = arb_lost_recovery,
252 };
253
254
255 #if 0
256 struct tegra_wired_jack_conf audio_wr_jack_conf = {
257         .hp_det_n = TEGRA_GPIO_PW2,
258         .en_mic_ext = TEGRA_GPIO_PX1,
259         .en_mic_int = TEGRA_GPIO_PX0,
260 };
261 #endif
262
263 static struct wm8903_platform_data cardhu_wm8903_pdata = {
264         .irq_active_low = 0,
265         .micdet_cfg = 0,
266         .micdet_delay = 100,
267         .gpio_base = CARDHU_GPIO_WM8903(0),
268         .gpio_cfg = {
269                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP1_FN_SHIFT),
270                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP2_FN_SHIFT) |
271                         WM8903_GP2_DIR,
272                 0,
273                 WM8903_GPIO_NO_CONFIG,
274                 WM8903_GPIO_NO_CONFIG,
275         },
276 };
277
278 static struct i2c_board_info __initdata wm8903_board_info = {
279         I2C_BOARD_INFO("wm8903", 0x1a),
280         .platform_data = &cardhu_wm8903_pdata,
281         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
282 };
283
284 static void cardhu_i2c_init(void)
285 {
286         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
287         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
288         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
289         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
290         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
291
292         platform_device_register(&tegra_i2c_device5);
293         platform_device_register(&tegra_i2c_device4);
294         platform_device_register(&tegra_i2c_device3);
295         platform_device_register(&tegra_i2c_device2);
296         platform_device_register(&tegra_i2c_device1);
297
298         i2c_register_board_info(4, &wm8903_board_info, 1);
299 }
300
301 static struct platform_device *cardhu_uart_devices[] __initdata = {
302         &tegra_uarta_device,
303         &tegra_uartb_device,
304         &tegra_uartc_device,
305         &tegra_uartd_device,
306         &tegra_uarte_device,
307 };
308 static struct uart_clk_parent uart_parent_clk[] = {
309         [0] = {.name = "clk_m"},
310         [1] = {.name = "pll_p"},
311         [2] = {.name = "pll_m"},
312 };
313
314 static struct tegra_uart_platform_data cardhu_uart_pdata;
315
316 static void __init uart_debug_init(void)
317 {
318         struct board_info board_info;
319
320         tegra_get_board_info(&board_info);
321         /* UARTB is debug port
322          *       for SLT - E1186/E1187/PM269
323          *       for E1256/E1257
324          */
325         if (((board_info.sku & SKU_SLT_ULPI_SUPPORT) &&
326                 ((board_info.board_id == BOARD_E1186) ||
327                 (board_info.board_id == BOARD_E1187) ||
328                 (board_info.board_id == BOARD_PM269))) ||
329                 (board_info.board_id == BOARD_E1256) ||
330                 (board_info.board_id == BOARD_E1257)) {
331                         /* UARTB is the debug port. */
332                         pr_info("Selecting UARTB as the debug console\n");
333                         cardhu_uart_devices[1] = &debug_uartb_device;
334                         debug_uart_clk =  clk_get_sys("serial8250.0", "uartb");
335                         debug_uart_port_base = ((struct plat_serial8250_port *)(
336                                 debug_uartb_device.dev.platform_data))->mapbase;
337                         return;
338         }
339         /* UARTA is the debug port. */
340         pr_info("Selecting UARTA as the debug console\n");
341         cardhu_uart_devices[0] = &debug_uarta_device;
342         debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
343         debug_uart_port_base = ((struct plat_serial8250_port *)(
344                         debug_uarta_device.dev.platform_data))->mapbase;
345 }
346
347 static void __init cardhu_uart_init(void)
348 {
349         struct clk *c;
350         int i;
351
352         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
353                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
354                 if (IS_ERR_OR_NULL(c)) {
355                         pr_err("Not able to get the clock for %s\n",
356                                                 uart_parent_clk[i].name);
357                         continue;
358                 }
359                 uart_parent_clk[i].parent_clk = c;
360                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
361         }
362         cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
363         cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
364         tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
365         tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
366         tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
367         tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
368         tegra_uarte_device.dev.platform_data = &cardhu_uart_pdata;
369
370         /* Register low speed only if it is selected */
371         if (!is_tegra_debug_uartport_hs()) {
372                 uart_debug_init();
373                 /* Clock enable for the debug channel */
374                 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
375                         pr_info("The debug console clock name is %s\n",
376                                                 debug_uart_clk->name);
377                         c = tegra_get_clock_by_name("pll_p");
378                         if (IS_ERR_OR_NULL(c))
379                                 pr_err("Not getting the parent clock pll_p\n");
380                         else
381                                 clk_set_parent(debug_uart_clk, c);
382
383                         clk_enable(debug_uart_clk);
384                         clk_set_rate(debug_uart_clk, clk_get_rate(c));
385                 } else {
386                         pr_err("Not getting the clock %s for debug console\n",
387                                         debug_uart_clk->name);
388                 }
389         }
390
391         platform_add_devices(cardhu_uart_devices,
392                                 ARRAY_SIZE(cardhu_uart_devices));
393 }
394
395 static struct platform_device tegra_camera = {
396         .name = "tegra_camera",
397         .id = -1,
398 };
399
400 static struct platform_device *cardhu_spi_devices[] __initdata = {
401         &tegra_spi_device4,
402 };
403
404 struct spi_clk_parent spi_parent_clk[] = {
405         [0] = {.name = "pll_p"},
406         [1] = {.name = "pll_m"},
407         [2] = {.name = "clk_m"},
408 };
409
410 static struct tegra_spi_platform_data cardhu_spi_pdata = {
411         .is_dma_based           = true,
412         .max_dma_buffer         = (16 * 1024),
413         .is_clkon_always        = false,
414         .max_rate               = 100000000,
415 };
416
417 static void __init cardhu_spi_init(void)
418 {
419         int i;
420         struct clk *c;
421         struct board_info board_info;
422
423         tegra_get_board_info(&board_info);
424
425         for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
426                 c = tegra_get_clock_by_name(spi_parent_clk[i].name);
427                 if (IS_ERR_OR_NULL(c)) {
428                         pr_err("Not able to get the clock for %s\n",
429                                                 spi_parent_clk[i].name);
430                         continue;
431                 }
432                 spi_parent_clk[i].parent_clk = c;
433                 spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
434         }
435         cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
436         cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
437         tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
438         platform_add_devices(cardhu_spi_devices,
439                                 ARRAY_SIZE(cardhu_spi_devices));
440
441         if (board_info.board_id == BOARD_E1198) {
442                 tegra_spi_device2.dev.platform_data = &cardhu_spi_pdata;
443                 platform_device_register(&tegra_spi_device2);
444         }
445 }
446
447 static struct resource tegra_rtc_resources[] = {
448         [0] = {
449                 .start = TEGRA_RTC_BASE,
450                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
451                 .flags = IORESOURCE_MEM,
452         },
453         [1] = {
454                 .start = INT_RTC,
455                 .end = INT_RTC,
456                 .flags = IORESOURCE_IRQ,
457         },
458 };
459
460 static struct platform_device tegra_rtc_device = {
461         .name = "tegra_rtc",
462         .id   = -1,
463         .resource = tegra_rtc_resources,
464         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
465 };
466
467 static struct tegra_wm8903_platform_data cardhu_audio_pdata = {
468         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
469         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
470         .gpio_hp_mute           = -1,
471         .gpio_int_mic_en        = -1,
472         .gpio_ext_mic_en        = -1,
473 };
474
475 static struct platform_device cardhu_audio_device = {
476         .name   = "tegra-snd-wm8903",
477         .id     = 0,
478         .dev    = {
479                 .platform_data  = &cardhu_audio_pdata,
480         },
481 };
482
483 static struct platform_device *cardhu_devices[] __initdata = {
484         &tegra_pmu_device,
485         &tegra_rtc_device,
486         &tegra_udc_device,
487 #if defined(CONFIG_SND_HDA_TEGRA)
488         &tegra_hda_device,
489 #endif
490 #if defined(CONFIG_TEGRA_IOVMM_SMMU)
491         &tegra_smmu_device,
492 #endif
493         &tegra_wdt_device,
494 #if defined(CONFIG_TEGRA_AVP)
495         &tegra_avp_device,
496 #endif
497         &tegra_camera,
498 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
499         &tegra_se_device,
500 #endif
501         &tegra_ahub_device,
502         &tegra_dam_device0,
503         &tegra_dam_device1,
504         &tegra_dam_device2,
505         &tegra_i2s_device1,
506         &tegra_spdif_device,
507         &spdif_dit_device,
508         &tegra_pcm_device,
509         &cardhu_audio_device,
510 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
511         &tegra_aes_device,
512 #endif
513 };
514
515 #define MXT_CONFIG_CRC  0xD62DE8
516 static const u8 config[] = {
517         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
518         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
519         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
520         0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
521         0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
522         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
523         0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
524         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
525         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
526         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
527         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
528         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
529         0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
530         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
531         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
532         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
533         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
534         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
535         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
536         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
537 };
538
539 #define MXT_CONFIG_CRC_SKU2000  0xA24D9A
540 static const u8 config_sku2000[] = {
541         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
542         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
543         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
544         0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00,  //23=thr  2 di
545         0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
546         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
547         0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00,  //0A=limit
548         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
549         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
550         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
551         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
552         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
553         0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
554         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
555         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
556         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
557         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
558         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
559         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
560         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
561 };
562
563 static struct mxt_platform_data atmel_mxt_info = {
564         .x_line         = 27,
565         .y_line         = 42,
566         .x_size         = 768,
567         .y_size         = 1366,
568         .blen           = 0x20,
569         .threshold      = 0x3C,
570         .voltage        = 3300000,              /* 3.3V */
571         .orient         = 5,
572         .config         = config,
573         .config_length  = 157,
574         .config_crc     = MXT_CONFIG_CRC,
575         .irqflags       = IRQF_TRIGGER_FALLING,
576 /*      .read_chg       = &read_chg, */
577         .read_chg       = NULL,
578 };
579
580 static struct i2c_board_info __initdata atmel_i2c_info[] = {
581         {
582                 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
583                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PH4),
584                 .platform_data = &atmel_mxt_info,
585         }
586 };
587
588 static int __init cardhu_touch_init(void)
589 {
590         struct board_info BoardInfo;
591
592         tegra_gpio_enable(TEGRA_GPIO_PH4);
593         tegra_gpio_enable(TEGRA_GPIO_PH6);
594
595         gpio_request(TEGRA_GPIO_PH4, "atmel-irq");
596         gpio_direction_input(TEGRA_GPIO_PH4);
597
598         gpio_request(TEGRA_GPIO_PH6, "atmel-reset");
599         gpio_direction_output(TEGRA_GPIO_PH6, 0);
600         msleep(1);
601         gpio_set_value(TEGRA_GPIO_PH6, 1);
602         msleep(100);
603
604         tegra_get_board_info(&BoardInfo);
605         if ((BoardInfo.sku & SKU_TOUCH_MASK) == SKU_TOUCH_2000) {
606                 atmel_mxt_info.config = config_sku2000;
607                 atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
608         }
609
610         i2c_register_board_info(1, atmel_i2c_info, 1);
611
612         return 0;
613 }
614
615 static struct tegra_uhsic_config uhsic_phy_config = {
616         .enable_gpio = EN_HSIC_GPIO,
617         .reset_gpio = -1,
618         .sync_start_delay = 9,
619         .idle_wait_delay = 17,
620         .term_range_adj = 0,
621         .elastic_underrun_limit = 16,
622         .elastic_overrun_limit = 16,
623 };
624
625 static struct tegra_ehci_platform_data tegra_ehci_uhsic_pdata = {
626         .phy_type = TEGRA_USB_PHY_TYPE_HSIC,
627         .phy_config = &uhsic_phy_config,
628         .operating_mode = TEGRA_USB_HOST,
629         .power_down_on_bus_suspend = 1,
630 };
631
632 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
633         [0] = {
634                         .phy_config = &utmi_phy_config[0],
635                         .operating_mode = TEGRA_USB_HOST,
636                         .power_down_on_bus_suspend = 1,
637         },
638         [1] = {
639                         .phy_config = &utmi_phy_config[1],
640                         .operating_mode = TEGRA_USB_HOST,
641                         .power_down_on_bus_suspend = 1,
642         },
643         [2] = {
644                         .phy_config = &utmi_phy_config[2],
645                         .operating_mode = TEGRA_USB_HOST,
646                         .power_down_on_bus_suspend = 1,
647                         .hotplug = 1,
648         },
649 };
650
651 static struct platform_device *tegra_usb_otg_host_register(void)
652 {
653         struct platform_device *pdev;
654         void *platform_data;
655         int val;
656
657         pdev = platform_device_alloc(tegra_ehci1_device.name,
658                 tegra_ehci1_device.id);
659         if (!pdev)
660                 return NULL;
661
662         val = platform_device_add_resources(pdev, tegra_ehci1_device.resource,
663                 tegra_ehci1_device.num_resources);
664         if (val)
665                 goto error;
666
667         pdev->dev.dma_mask =  tegra_ehci1_device.dev.dma_mask;
668         pdev->dev.coherent_dma_mask = tegra_ehci1_device.dev.coherent_dma_mask;
669
670         platform_data = kmalloc(sizeof(struct tegra_ehci_platform_data),
671                 GFP_KERNEL);
672         if (!platform_data)
673                 goto error;
674
675         memcpy(platform_data, &tegra_ehci_pdata[0],
676                                 sizeof(struct tegra_ehci_platform_data));
677         pdev->dev.platform_data = platform_data;
678
679         val = platform_device_add(pdev);
680         if (val)
681                 goto error_add;
682
683         return pdev;
684
685 error_add:
686         kfree(platform_data);
687 error:
688         pr_err("%s: failed to add the host contoller device\n", __func__);
689         platform_device_put(pdev);
690         return NULL;
691 }
692
693 static void tegra_usb_otg_host_unregister(struct platform_device *pdev)
694 {
695         platform_device_unregister(pdev);
696 }
697
698 #ifdef CONFIG_USB_SUPPORT
699 static struct usb_phy_plat_data tegra_usb_phy_pdata[] = {
700         [0] = {
701                         .instance = 0,
702                         .vbus_gpio = -1,
703                         .vbus_reg_supply = "vdd_vbus_micro_usb",
704         },
705         [1] = {
706                         .instance = 1,
707                         .vbus_gpio = -1,
708         },
709         [2] = {
710                         .instance = 2,
711                         .vbus_gpio = -1,
712                         .vbus_reg_supply = "vdd_vbus_typea_usb",
713         },
714 };
715
716 static struct tegra_otg_platform_data tegra_otg_pdata = {
717         .host_register = &tegra_usb_otg_host_register,
718         .host_unregister = &tegra_usb_otg_host_unregister,
719 };
720
721 static void cardhu_usb_init(void)
722 {
723         struct board_info bi;
724
725         tegra_get_board_info(&bi);
726
727         tegra_usb_phy_init(tegra_usb_phy_pdata,
728                         ARRAY_SIZE(tegra_usb_phy_pdata));
729
730         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
731         platform_device_register(&tegra_otg_device);
732         if (bi.board_id == BOARD_PM267) {
733                 uhsic_phy_config.reset_gpio =
734                         PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
735                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
736                 platform_device_register(&tegra_ehci2_device);
737         } else if (bi.board_id == BOARD_E1256) {
738                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
739                 platform_device_register(&tegra_ehci2_device);
740         } else if (bi.board_id == BOARD_E1186) {
741                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
742                 /* baseband registration happens in baseband-xmm-power  */
743         } else {
744                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_pdata[1];
745                 platform_device_register(&tegra_ehci2_device);
746         }
747
748         tegra_ehci3_device.dev.platform_data = &tegra_ehci_pdata[2];
749         platform_device_register(&tegra_ehci3_device);
750
751 }
752 #else
753 static void cardhu_usb_init(void) { }
754 #endif
755
756 static void cardhu_gps_init(void)
757 {
758         tegra_gpio_enable(TEGRA_GPIO_PU2);
759         tegra_gpio_enable(TEGRA_GPIO_PU3);
760 }
761
762 static struct baseband_power_platform_data tegra_baseband_power_data = {
763         .baseband_type = BASEBAND_XMM,
764         .modem = {
765         .xmm = {
766                         .bb_rst = XMM_GPIO_BB_RST,
767                         .bb_on = XMM_GPIO_BB_ON,
768                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
769                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
770                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
771                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
772                         .hsic_device = &tegra_ehci2_device,
773                 },
774         },
775 };
776
777 static struct platform_device tegra_baseband_power_device = {
778         .name = "baseband_xmm_power",
779         .id = -1,
780         .dev = {
781                 .platform_data = &tegra_baseband_power_data,
782         },
783 };
784
785 static struct platform_device tegra_baseband_power2_device = {
786         .name = "baseband_xmm_power2",
787         .id = -1,
788         .dev = {
789                 .platform_data = &tegra_baseband_power_data,
790         },
791 };
792
793 static void cardhu_modem_init(void)
794 {
795         struct board_info board_info;
796         int w_disable_gpio, ret;
797
798         tegra_get_board_info(&board_info);
799         switch (board_info.board_id) {
800         case BOARD_E1291:
801         case BOARD_E1198:
802                 if (((board_info.board_id == BOARD_E1291) &&
803                                 (board_info.fab < BOARD_FAB_A03)) ||
804                         ((board_info.board_id == BOARD_E1198) &&
805                                         (board_info.fab < BOARD_FAB_A02))) {
806                         w_disable_gpio = TEGRA_GPIO_PH5;
807                 } else {
808                         w_disable_gpio = TEGRA_GPIO_PDD5;
809                 }
810                 tegra_gpio_enable(w_disable_gpio);
811                 ret = gpio_request(w_disable_gpio, "w_disable_gpio");
812                 if (ret < 0)
813                         pr_err("%s: gpio_request failed for gpio %d\n",
814                                 __func__, w_disable_gpio);
815                 else
816                         gpio_direction_input(w_disable_gpio);
817
818                 /* E1291-A04 & E1198:A02: Set PERST signal to high */
819                 if (((board_info.board_id == BOARD_E1291) &&
820                                 (board_info.fab >= BOARD_FAB_A04)) ||
821                         ((board_info.board_id == BOARD_E1198) &&
822                                         (board_info.fab >= BOARD_FAB_A02))) {
823                         ret = gpio_request(TEGRA_GPIO_PH7, "modem_perst");
824                         if (ret < 0) {
825                                 pr_err("%s(): Error in allocating gpio "
826                                         "TEGRA_GPIO_PH7\n", __func__);
827                                 break;
828                         }
829                         gpio_direction_output(TEGRA_GPIO_PH7, 1);
830                         tegra_gpio_enable(TEGRA_GPIO_PH7);
831                 }
832                 break;
833         case BOARD_E1186:
834                 tegra_gpio_enable(
835                         tegra_baseband_power_data.modem.xmm.bb_rst);
836                 tegra_gpio_enable(
837                         tegra_baseband_power_data.modem.xmm.bb_on);
838                 tegra_gpio_enable(
839                         tegra_baseband_power_data.modem.xmm.ipc_bb_wake);
840                 tegra_gpio_enable(
841                         tegra_baseband_power_data.modem.xmm.ipc_ap_wake);
842                 tegra_gpio_enable(
843                         tegra_baseband_power_data.modem.xmm.ipc_hsic_active);
844                 tegra_gpio_enable(
845                         tegra_baseband_power_data.modem.xmm.ipc_hsic_sus_req);
846                 platform_device_register(&tegra_baseband_power_device);
847                 platform_device_register(&tegra_baseband_power2_device);
848                 break;
849         default:
850                 break;
851         }
852
853 }
854
855 #ifdef CONFIG_SATA_AHCI_TEGRA
856 static void cardhu_sata_init(void)
857 {
858         platform_device_register(&tegra_sata_device);
859 }
860 #else
861 static void cardhu_sata_init(void) { }
862 #endif
863
864 static void __init tegra_cardhu_init(void)
865 {
866         tegra_clk_init_from_table(cardhu_clk_init_table);
867         cardhu_pinmux_init();
868         cardhu_i2c_init();
869         cardhu_spi_init();
870         cardhu_usb_init();
871 #ifdef CONFIG_TEGRA_EDP_LIMITS
872         cardhu_edp_init();
873 #endif
874         cardhu_uart_init();
875         cardhu_tsensor_init();
876         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
877         cardhu_sdhci_init();
878         cardhu_regulator_init();
879         cardhu_gpio_switch_regulator_init();
880         cardhu_suspend_init();
881         cardhu_power_off_init();
882         cardhu_touch_init();
883         cardhu_gps_init();
884         cardhu_modem_init();
885         cardhu_kbc_init();
886         cardhu_scroll_init();
887         cardhu_keys_init();
888         cardhu_panel_init();
889         cardhu_pmon_init();
890         cardhu_sensors_init();
891         cardhu_bt_rfkill();
892         tegra_setup_bluesleep();
893         cardhu_sata_init();
894         //audio_wired_jack_init();
895         cardhu_pins_state_init();
896         cardhu_emc_init();
897         tegra_release_bootloader_fb();
898 }
899
900 static void __init tegra_cardhu_reserve(void)
901 {
902 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
903         /* support 1920X1200 with 24bpp */
904         tegra_reserve(0, SZ_8M + SZ_1M, SZ_8M + SZ_1M);
905 #else
906         tegra_reserve(SZ_128M, SZ_8M, SZ_8M);
907 #endif
908 }
909
910 MACHINE_START(CARDHU, "cardhu")
911         .boot_params    = 0x80000100,
912         .map_io         = tegra_map_common_io,
913         .reserve        = tegra_cardhu_reserve,
914         .init_early     = tegra_init_early,
915         .init_irq       = tegra_init_irq,
916         .timer          = &tegra_timer,
917         .init_machine   = tegra_cardhu_init,
918 MACHINE_END