arm: tegra: cardhu: move VI to PLL_P
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA Corporation.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <linux/spi/spi.h>
37 #include <linux/i2c/atmel_mxt_ts.h>
38 #include <linux/tegra_uart.h>
39 #include <linux/memblock.h>
40 #include <linux/spi-tegra.h>
41 #include <linux/nfc/pn544.h>
42 #include <linux/rfkill-gpio.h>
43
44 #include <sound/wm8903.h>
45 #include <sound/max98095.h>
46 #include <media/tegra_dtv.h>
47
48 #include <mach/clk.h>
49 #include <mach/iomap.h>
50 #include <mach/irqs.h>
51 #include <mach/pinmux.h>
52 #include <mach/iomap.h>
53 #include <mach/io.h>
54 #include <mach/i2s.h>
55 #include <mach/tegra_asoc_pdata.h>
56 #include <mach/tegra_wm8903_pdata.h>
57 #include <asm/mach-types.h>
58 #include <asm/mach/arch.h>
59 #include <mach/usb_phy.h>
60 #include <mach/thermal.h>
61 #include <mach/pci.h>
62 #include <mach/tegra_fiq_debugger.h>
63
64 #include "board.h"
65 #include "clock.h"
66 #include "board-cardhu.h"
67 #include "board-touch.h"
68 #include "devices.h"
69 #include "gpio-names.h"
70 #include "fuse.h"
71 #include "pm.h"
72 #include "baseband-xmm-power.h"
73 #include "wdt-recovery.h"
74
75 static struct balanced_throttle throttle_list[] = {
76 #ifdef CONFIG_TEGRA_THERMAL_THROTTLE
77         {
78                 .id = BALANCED_THROTTLE_ID_TJ,
79                 .throt_tab_size = 10,
80                 .throt_tab = {
81                         {      0, 1000 },
82                         { 640000, 1000 },
83                         { 640000, 1000 },
84                         { 640000, 1000 },
85                         { 640000, 1000 },
86                         { 640000, 1000 },
87                         { 760000, 1000 },
88                         { 760000, 1050 },
89                         {1000000, 1050 },
90                         {1000000, 1100 },
91                 },
92         },
93 #endif
94 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
95         {
96                 .id = BALANCED_THROTTLE_ID_SKIN,
97                 .throt_tab_size = 6,
98                 .throt_tab = {
99                         { 640000, 1200 },
100                         { 640000, 1200 },
101                         { 760000, 1200 },
102                         { 760000, 1200 },
103                         {1000000, 1200 },
104                         {1000000, 1200 },
105                 },
106         },
107 #endif
108 };
109
110 /* All units are in millicelsius */
111 static struct tegra_thermal_data thermal_data = {
112         .shutdown_device_id = THERMAL_DEVICE_ID_NCT_EXT,
113         .temp_shutdown = 90000,
114
115 #if defined(CONFIG_TEGRA_EDP_LIMITS) || defined(CONFIG_TEGRA_THERMAL_THROTTLE)
116         .throttle_edp_device_id = THERMAL_DEVICE_ID_NCT_EXT,
117 #endif
118 #ifdef CONFIG_TEGRA_EDP_LIMITS
119         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
120         .hysteresis_edp = 3000,
121 #endif
122 #ifdef CONFIG_TEGRA_THERMAL_THROTTLE
123         .temp_throttle = 85000,
124         .tc1 = 0,
125         .tc2 = 1,
126         .passive_delay = 2000,
127 #endif
128 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
129         .skin_device_id = THERMAL_DEVICE_ID_SKIN,
130         .temp_throttle_skin = 43000,
131         .tc1_skin = 0,
132         .tc2_skin = 1,
133         .passive_delay_skin = 5000,
134
135         .skin_temp_offset = 9793,
136         .skin_period = 1100,
137         .skin_devs_size = 2,
138         .skin_devs = {
139                 {
140                         THERMAL_DEVICE_ID_NCT_EXT,
141                         {
142                                 2, 1, 1, 1,
143                                 1, 1, 1, 1,
144                                 1, 1, 1, 0,
145                                 1, 1, 0, 0,
146                                 0, 0, -1, -7
147                         }
148                 },
149                 {
150                         THERMAL_DEVICE_ID_NCT_INT,
151                         {
152                                 -11, -7, -5, -3,
153                                 -3, -2, -1, 0,
154                                 0, 0, 1, 1,
155                                 1, 2, 2, 3,
156                                 4, 6, 11, 18
157                         }
158                 },
159         },
160 #endif
161 };
162
163 static struct rfkill_gpio_platform_data cardhu_bt_rfkill_pdata[] = {
164         {
165                 .name           = "bt_rfkill",
166                 .shutdown_gpio  = TEGRA_GPIO_PU0,
167                 .reset_gpio     = TEGRA_GPIO_INVALID,
168                 .type           = RFKILL_TYPE_BLUETOOTH,
169         },
170 };
171
172 static struct platform_device cardhu_bt_rfkill_device = {
173         .name = "rfkill_gpio",
174         .id             = -1,
175         .dev = {
176                 .platform_data = &cardhu_bt_rfkill_pdata,
177         },
178 };
179
180 static struct resource cardhu_bluesleep_resources[] = {
181         [0] = {
182                 .name = "gpio_host_wake",
183                         .start  = TEGRA_GPIO_PU6,
184                         .end    = TEGRA_GPIO_PU6,
185                         .flags  = IORESOURCE_IO,
186         },
187         [1] = {
188                 .name = "gpio_ext_wake",
189                         .start  = TEGRA_GPIO_PU1,
190                         .end    = TEGRA_GPIO_PU1,
191                         .flags  = IORESOURCE_IO,
192         },
193         [2] = {
194                 .name = "host_wake",
195                         .start  = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PU6),
196                         .end    = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PU6),
197                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
198         },
199 };
200
201 static struct platform_device cardhu_bluesleep_device = {
202         .name           = "bluesleep",
203         .id             = -1,
204         .num_resources  = ARRAY_SIZE(cardhu_bluesleep_resources),
205         .resource       = cardhu_bluesleep_resources,
206 };
207
208 static noinline void __init cardhu_setup_bluesleep(void)
209 {
210         platform_device_register(&cardhu_bluesleep_device);
211         return;
212 }
213
214 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
215         /* name         parent          rate            enabled */
216         { "pll_m",      NULL,           0,              false},
217         { "hda",        "pll_p",        108000000,      false},
218         { "hda2codec_2x","pll_p",       48000000,       false},
219         { "pwm",        "pll_p",        3187500,        false},
220         { "blink",      "clk_32k",      32768,          true},
221         { "i2s0",       "pll_a_out0",   0,              false},
222         { "i2s1",       "pll_a_out0",   0,              false},
223         { "i2s3",       "pll_a_out0",   0,              false},
224         { "spdif_out",  "pll_a_out0",   0,              false},
225         { "d_audio",    "clk_m",        12000000,       false},
226         { "dam0",       "clk_m",        12000000,       false},
227         { "dam1",       "clk_m",        12000000,       false},
228         { "dam2",       "clk_m",        12000000,       false},
229         { "audio1",     "i2s1_sync",    0,              false},
230         { "audio3",     "i2s3_sync",    0,              false},
231         { "vi_sensor",  "pll_p",        150000000,      false},
232         { "i2c1",       "pll_p",        3200000,        false},
233         { "i2c2",       "pll_p",        3200000,        false},
234         { "i2c3",       "pll_p",        3200000,        false},
235         { "i2c4",       "pll_p",        3200000,        false},
236         { "i2c5",       "pll_p",        3200000,        false},
237         { "vi",         "pll_p",        0,              false},
238         { NULL,         NULL,           0,              0},
239 };
240
241 static struct pn544_i2c_platform_data nfc_pdata = {
242         .irq_gpio = TEGRA_GPIO_PX0,
243         .ven_gpio = TEGRA_GPIO_PP3,
244         .firm_gpio = TEGRA_GPIO_PO7,
245         };
246
247 static struct i2c_board_info __initdata cardhu_i2c_bus3_board_info[] = {
248         {
249                 I2C_BOARD_INFO("pn544", 0x28),
250                 .platform_data = &nfc_pdata,
251                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PX0),
252         },
253 };
254 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
255         .adapter_nr     = 0,
256         .bus_count      = 1,
257         .bus_clk_rate   = { 100000, 0 },
258         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
259         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
260         .arb_recovery = arb_lost_recovery,
261 };
262
263 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
264         .adapter_nr     = 1,
265         .bus_count      = 1,
266         .bus_clk_rate   = { 400000, 0 },
267         .is_clkon_always = true,
268         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
269         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
270         .arb_recovery = arb_lost_recovery,
271 };
272
273 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
274         .adapter_nr     = 2,
275         .bus_count      = 1,
276         .bus_clk_rate   = { 100000, 0 },
277         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
278         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
279         .arb_recovery = arb_lost_recovery,
280 };
281
282 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
283         .adapter_nr     = 3,
284         .bus_count      = 1,
285         .bus_clk_rate   = { 10000, 0 },
286         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
287         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
288         .arb_recovery = arb_lost_recovery,
289 };
290
291 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
292         .adapter_nr     = 4,
293         .bus_count      = 1,
294         .bus_clk_rate   = { 400000, 0 },
295         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
296         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
297         .arb_recovery = arb_lost_recovery,
298 };
299
300
301 #if 0
302 struct tegra_wired_jack_conf audio_wr_jack_conf = {
303         .hp_det_n = TEGRA_GPIO_PW2,
304         .en_mic_ext = TEGRA_GPIO_PX1,
305         .en_mic_int = TEGRA_GPIO_PX0,
306 };
307 #endif
308
309 static struct wm8903_platform_data cardhu_wm8903_pdata = {
310         .irq_active_low = 0,
311         .micdet_cfg = 0,
312         .micdet_delay = 100,
313         .gpio_base = CARDHU_GPIO_WM8903(0),
314         .gpio_cfg = {
315                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP1_FN_SHIFT),
316                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP2_FN_SHIFT) |
317                         WM8903_GP2_DIR,
318                 0,
319                 WM8903_GPIO_NO_CONFIG,
320                 WM8903_GPIO_NO_CONFIG,
321         },
322 };
323
324 /* Equalizer filter coefs generated from the MAXIM MAX98095
325  * evkit software tool */
326 static struct max98095_eq_cfg max98095_eq_cfg[] = {
327         {
328                 .name = "FLAT",
329                 .rate = 44100,
330                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
331                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
332                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
333                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
334                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
335         },
336         {
337                 .name = "LOWPASS1K",
338                 .rate = 44100,
339                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
340                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
341                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
342                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
343                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
344         },
345         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
346                 .name = "HIBOOST",
347                 .rate = 44100,
348                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
349                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
350                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
351                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
352                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
353         },
354         { /* BASS=12dB, TREBLE=+12dB */
355                 .name = "LOUD12DB",
356                 .rate = 44100,
357                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
358                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
359                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
360                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
361                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
362         },
363         {
364                 .name = "FLAT",
365                 .rate = 16000,
366                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
367                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
368                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
369                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
370                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
371         },
372         {
373                 .name = "LOWPASS1K",
374                 .rate = 16000,
375                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
376                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
377                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
378                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
379                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
380         },
381         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
382                 .name = "HIBOOST",
383                 .rate = 16000,
384                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
385                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
386                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
387                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
388                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
389         },
390         { /* BASS=12dB, TREBLE=+12dB */
391                 .name = "LOUD12DB",
392                 .rate = 16000,
393                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
394                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
395                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
396                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
397                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
398         },
399 };
400
401 static struct max98095_pdata cardhu_max98095_pdata = {
402         /* equalizer configuration */
403         .eq_cfg = max98095_eq_cfg,
404         .eq_cfgcnt = ARRAY_SIZE(max98095_eq_cfg),
405
406         /* Biquad filter response configuration */
407         .bq_cfg = NULL,
408         .bq_cfgcnt = 0,
409
410         /* microphone configuration */
411         .digmic_left_mode = 1,
412         .digmic_right_mode = 1,
413 };
414
415 static struct i2c_board_info __initdata cardhu_codec_wm8903_info = {
416         I2C_BOARD_INFO("wm8903", 0x1a),
417         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
418         .platform_data = &cardhu_wm8903_pdata,
419 };
420
421 static struct i2c_board_info __initdata cardhu_codec_aic326x_info = {
422         I2C_BOARD_INFO("aic3262-codec", 0x18),
423         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
424 };
425
426 static struct i2c_board_info __initdata cardhu_codec_max98095_info = {
427         I2C_BOARD_INFO("max98095", 0x10),
428         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
429         .platform_data = &cardhu_max98095_pdata,
430 };
431
432 static void cardhu_i2c_init(void)
433 {
434         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
435         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
436         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
437         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
438         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
439
440         platform_device_register(&tegra_i2c_device5);
441         platform_device_register(&tegra_i2c_device4);
442         platform_device_register(&tegra_i2c_device3);
443         platform_device_register(&tegra_i2c_device2);
444         platform_device_register(&tegra_i2c_device1);
445
446         i2c_register_board_info(4, &cardhu_codec_wm8903_info, 1);
447         i2c_register_board_info(4, &cardhu_codec_max98095_info, 1);
448         i2c_register_board_info(4, &cardhu_codec_aic326x_info, 1);
449
450         i2c_register_board_info(2, cardhu_i2c_bus3_board_info, 1);
451 }
452
453 static struct platform_device *cardhu_uart_devices[] __initdata = {
454         &tegra_uarta_device,
455         &tegra_uartb_device,
456         &tegra_uartc_device,
457         &tegra_uartd_device,
458         &tegra_uarte_device,
459 };
460 static struct uart_clk_parent uart_parent_clk[] = {
461         [0] = {.name = "clk_m"},
462         [1] = {.name = "pll_p"},
463 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
464         [2] = {.name = "pll_m"},
465 #endif
466 };
467
468 static struct tegra_uart_platform_data cardhu_uart_pdata;
469 static struct tegra_uart_platform_data cardhu_loopback_uart_pdata;
470
471 static void __init uart_debug_init(void)
472 {
473         struct board_info board_info;
474         int debug_port_id;
475
476         tegra_get_board_info(&board_info);
477
478         debug_port_id = get_tegra_uart_debug_port_id();
479         if (debug_port_id < 0) {
480                 debug_port_id = 0;
481                         /* UARTB is debug port
482                          *       for SLT - E1186/E1187/PM269
483                          *       for E1256/E1257
484                          */
485                 if (((board_info.sku & SKU_SLT_ULPI_SUPPORT) &&
486                         ((board_info.board_id == BOARD_E1186) ||
487                         (board_info.board_id == BOARD_E1187) ||
488                         (board_info.board_id == BOARD_PM269))) ||
489                         (board_info.board_id == BOARD_E1256) ||
490                         (board_info.board_id == BOARD_E1257))
491                                 debug_port_id = 1;
492         }
493
494         switch (debug_port_id) {
495         case 0:
496                 /* UARTA is the debug port. */
497                 pr_info("Selecting UARTA as the debug console\n");
498                 cardhu_uart_devices[0] = &debug_uarta_device;
499                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
500                 debug_uart_port_base = ((struct plat_serial8250_port *)(
501                         debug_uarta_device.dev.platform_data))->mapbase;
502                 break;
503
504         case 1:
505                 /* UARTB is the debug port. */
506                 pr_info("Selecting UARTB as the debug console\n");
507                 cardhu_uart_devices[1] = &debug_uartb_device;
508                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartb");
509                 debug_uart_port_base = ((struct plat_serial8250_port *)(
510                         debug_uartb_device.dev.platform_data))->mapbase;
511                 break;
512
513         case 2:
514                 /* UARTC is the debug port. */
515                 pr_info("Selecting UARTC as the debug console\n");
516                 cardhu_uart_devices[2] = &debug_uartc_device;
517                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartc");
518                 debug_uart_port_base = ((struct plat_serial8250_port *)(
519                         debug_uartc_device.dev.platform_data))->mapbase;
520                 break;
521
522         case 3:
523                 /* UARTD is the debug port. */
524                 pr_info("Selecting UARTD as the debug console\n");
525                 cardhu_uart_devices[3] = &debug_uartd_device;
526                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartd");
527                 debug_uart_port_base = ((struct plat_serial8250_port *)(
528                         debug_uartd_device.dev.platform_data))->mapbase;
529                 break;
530
531         case 4:
532                 /* UARTE is the debug port. */
533                 pr_info("Selecting UARTE as the debug console\n");
534                 cardhu_uart_devices[4] = &debug_uarte_device;
535                 debug_uart_clk =  clk_get_sys("serial8250.0", "uarte");
536                 debug_uart_port_base = ((struct plat_serial8250_port *)(
537                         debug_uarte_device.dev.platform_data))->mapbase;
538                 break;
539
540         default:
541                 pr_info("The debug console id %d is invalid, Assuming UARTA", debug_port_id);
542                 cardhu_uart_devices[0] = &debug_uarta_device;
543                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
544                 debug_uart_port_base = ((struct plat_serial8250_port *)(
545                         debug_uarta_device.dev.platform_data))->mapbase;
546                 break;
547         }
548         return;
549 }
550
551 static void __init cardhu_uart_init(void)
552 {
553         struct clk *c;
554         int i;
555
556         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
557                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
558                 if (IS_ERR_OR_NULL(c)) {
559                         pr_err("Not able to get the clock for %s\n",
560                                                 uart_parent_clk[i].name);
561                         continue;
562                 }
563                 uart_parent_clk[i].parent_clk = c;
564                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
565         }
566         cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
567         cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
568         cardhu_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
569         cardhu_loopback_uart_pdata.parent_clk_count =
570                                                 ARRAY_SIZE(uart_parent_clk);
571         cardhu_loopback_uart_pdata.is_loopback = true;
572         tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
573         tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
574         tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
575         tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
576         /* UARTE is used for loopback test purpose */
577         tegra_uarte_device.dev.platform_data = &cardhu_loopback_uart_pdata;
578
579         /* Register low speed only if it is selected */
580         if (!is_tegra_debug_uartport_hs()) {
581                 uart_debug_init();
582                 /* Clock enable for the debug channel */
583                 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
584                         pr_info("The debug console clock name is %s\n",
585                                                 debug_uart_clk->name);
586                         c = tegra_get_clock_by_name("pll_p");
587                         if (IS_ERR_OR_NULL(c))
588                                 pr_err("Not getting the parent clock pll_p\n");
589                         else
590                                 clk_set_parent(debug_uart_clk, c);
591
592                         clk_enable(debug_uart_clk);
593                         clk_set_rate(debug_uart_clk, clk_get_rate(c));
594                 } else {
595                         pr_err("Not getting the clock %s for debug console\n",
596                                         debug_uart_clk->name);
597                 }
598         }
599
600         platform_add_devices(cardhu_uart_devices,
601                                 ARRAY_SIZE(cardhu_uart_devices));
602 }
603
604 static struct platform_device tegra_camera = {
605         .name = "tegra_camera",
606         .id = -1,
607 };
608
609 static struct platform_device *cardhu_spi_devices[] __initdata = {
610         &tegra_spi_device4,
611 };
612
613 static struct platform_device *touch_spi_device[] __initdata = {
614         &tegra_spi_device1,
615 };
616
617 struct spi_clk_parent spi_parent_clk[] = {
618         [0] = {.name = "pll_p"},
619 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
620         [1] = {.name = "pll_m"},
621         [2] = {.name = "clk_m"},
622 #else
623         [1] = {.name = "clk_m"},
624 #endif
625 };
626
627 static struct tegra_spi_platform_data cardhu_spi_pdata = {
628         .is_dma_based           = true,
629         .max_dma_buffer         = (16 * 1024),
630         .is_clkon_always        = false,
631         .max_rate               = 100000000,
632 };
633
634 static void __init cardhu_spi_init(void)
635 {
636         int i;
637         struct clk *c;
638         struct board_info board_info, display_board_info;
639
640         tegra_get_board_info(&board_info);
641         tegra_get_display_board_info(&display_board_info);
642
643         for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
644                 c = tegra_get_clock_by_name(spi_parent_clk[i].name);
645                 if (IS_ERR_OR_NULL(c)) {
646                         pr_err("Not able to get the clock for %s\n",
647                                                 spi_parent_clk[i].name);
648                         continue;
649                 }
650                 spi_parent_clk[i].parent_clk = c;
651                 spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
652         }
653         cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
654         cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
655         tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
656         platform_add_devices(cardhu_spi_devices,
657                                 ARRAY_SIZE(cardhu_spi_devices));
658
659         if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
660                 platform_add_devices(touch_spi_device,
661                                 ARRAY_SIZE(touch_spi_device));
662         }
663         if (board_info.board_id == BOARD_E1198) {
664                 tegra_spi_device2.dev.platform_data = &cardhu_spi_pdata;
665                 platform_device_register(&tegra_spi_device2);
666                 tegra_spi_slave_device1.dev.platform_data = &cardhu_spi_pdata;
667                 platform_device_register(&tegra_spi_slave_device1);
668         }
669 }
670
671 static void __init cardhu_dtv_init(void)
672 {
673         struct board_info board_info;
674
675         tegra_get_board_info(&board_info);
676
677         if (board_info.board_id == BOARD_E1186)
678                 platform_device_register(&tegra_dtv_device);
679 }
680
681 static struct resource tegra_rtc_resources[] = {
682         [0] = {
683                 .start = TEGRA_RTC_BASE,
684                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
685                 .flags = IORESOURCE_MEM,
686         },
687         [1] = {
688                 .start = INT_RTC,
689                 .end = INT_RTC,
690                 .flags = IORESOURCE_IRQ,
691         },
692 };
693
694 static struct platform_device tegra_rtc_device = {
695         .name = "tegra_rtc",
696         .id   = -1,
697         .resource = tegra_rtc_resources,
698         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
699 };
700
701 static struct tegra_wm8903_platform_data cardhu_audio_wm8903_pdata = {
702         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
703         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
704         .gpio_hp_mute           = -1,
705         .gpio_int_mic_en        = -1,
706         .gpio_ext_mic_en        = -1,
707 };
708
709 static struct tegra_asoc_platform_data cardhu_audio_max98095_pdata = {
710         .gpio_spkr_en           = -1,
711         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
712         .gpio_hp_mute           = -1,
713         .gpio_int_mic_en        = -1,
714         .gpio_ext_mic_en        = -1,
715 };
716
717 static struct platform_device cardhu_audio_wm8903_device = {
718         .name   = "tegra-snd-wm8903",
719         .id     = 0,
720         .dev    = {
721                 .platform_data = &cardhu_audio_wm8903_pdata,
722         },
723 };
724
725 static struct platform_device cardhu_audio_max98095_device = {
726         .name   = "tegra-snd-max98095",
727         .id     = 0,
728         .dev    = {
729                 .platform_data = &cardhu_audio_max98095_pdata,
730         },
731 };
732
733 static struct tegra_asoc_platform_data cardhu_audio_aic326x_pdata = {
734         .gpio_spkr_en           = -1,
735         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
736         .gpio_hp_mute           = -1,
737         .gpio_int_mic_en        = -1,
738         .gpio_ext_mic_en        = -1,
739         /*defaults for Verbier-Cardhu board with TI AIC326X codec*/
740         .audio_port_id          = {
741                 [HIFI_CODEC] = 0,
742                 [BASEBAND] = -1,
743                 [BT_SCO] = 3,
744         },
745         .baseband_param         = {
746                 .rate = -1,
747                 .channels = -1,
748         },
749 };
750
751 static struct platform_device cardhu_audio_aic326x_device = {
752         .name   = "tegra-snd-aic326x",
753         .id     = 0,
754         .dev    = {
755                 .platform_data  = &cardhu_audio_aic326x_pdata,
756         },
757 };
758
759 static struct platform_device *cardhu_devices[] __initdata = {
760         &tegra_pmu_device,
761         &tegra_rtc_device,
762         &tegra_udc_device,
763 #if defined(CONFIG_TEGRA_IOVMM_SMMU) ||  defined(CONFIG_TEGRA_IOMMU_SMMU)
764         &tegra_smmu_device,
765 #endif
766         &tegra_wdt0_device,
767         &tegra_wdt1_device,
768         &tegra_wdt2_device,
769 #if defined(CONFIG_TEGRA_AVP)
770         &tegra_avp_device,
771 #endif
772         &tegra_camera,
773 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
774         &tegra_se_device,
775 #endif
776         &tegra_ahub_device,
777         &tegra_dam_device0,
778         &tegra_dam_device1,
779         &tegra_dam_device2,
780         &tegra_i2s_device0,
781         &tegra_i2s_device1,
782         &tegra_i2s_device3,
783         &tegra_spdif_device,
784         &spdif_dit_device,
785         &bluetooth_dit_device,
786         &baseband_dit_device,
787         &cardhu_bt_rfkill_device,
788         &tegra_pcm_device,
789         &cardhu_audio_wm8903_device,
790         &cardhu_audio_max98095_device,
791         &cardhu_audio_aic326x_device,
792         &tegra_hda_device,
793         &tegra_cec_device,
794 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
795         &tegra_aes_device,
796 #endif
797 };
798
799 #define E1506_MXT_CONFIG_CRC 0x62F903
800 static const u8 e1506_config[] = {
801         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
802         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x05, 0x01, 0x00,
803         0x00, 0x1E, 0x0A, 0x8B, 0x00, 0x00, 0x13, 0x0B,
804         0x00, 0x10, 0x32, 0x03, 0x03, 0x00, 0x03, 0x01,
805         0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xBF, 0x03, 0x1B,
806         0x02, 0x00, 0x00, 0x37, 0x37, 0x00, 0x00, 0x00,
807         0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
808         0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
809         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
810         0x00, 0x00, 0x00, 0xA9, 0x7F, 0x9A, 0x0E, 0x00,
811         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
812         0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00,
813         0x00, 0x00, 0x03, 0x23, 0x00, 0x00, 0x00, 0x0A,
814         0x0F, 0x14, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00,
815         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
816         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
817         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
818         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
819         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
820         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
821         0x00, 0x00, 0x00, 0x01, 0x00, 0x03, 0x08, 0x10,
822         0x00
823 };
824
825 #define MXT_CONFIG_CRC  0xD62DE8
826 static const u8 config[] = {
827         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
828         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
829         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
830         0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
831         0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
832         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
833         0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
834         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
835         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
836         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
837         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
838         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
839         0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
840         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
841         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
842         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
843         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
844         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
845         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
846         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
847 };
848
849 #define MXT_CONFIG_CRC_SKU2000  0xA24D9A
850 static const u8 config_sku2000[] = {
851         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
852         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
853         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
854         0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00,  //23=thr  2 di
855         0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
856         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
857         0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00,  //0A=limit
858         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
859         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
860         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
861         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
862         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
863         0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
864         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
865         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
866         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
867         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
868         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
869         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
870         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
871 };
872
873 static struct mxt_platform_data atmel_mxt_info = {
874         .x_line         = 27,
875         .y_line         = 42,
876         .x_size         = 768,
877         .y_size         = 1366,
878         .blen           = 0x20,
879         .threshold      = 0x3C,
880         .voltage        = 3300000,              /* 3.3V */
881         .orient         = 5,
882         .config         = config,
883         .config_length  = 157,
884         .config_crc     = MXT_CONFIG_CRC,
885         .irqflags       = IRQF_TRIGGER_FALLING,
886 /*      .read_chg       = &read_chg, */
887         .read_chg       = NULL,
888 };
889
890 static struct mxt_platform_data e1506_atmel_mxt_info = {
891         .x_line         = 19,
892         .y_line         = 11,
893         .x_size         = 960,
894         .y_size         = 540,
895         .blen           = 0x10,
896         .threshold      = 0x32,
897         .voltage        = 3300000,              /* 3.3V */
898         .orient         = 3,
899         .config         = e1506_config,
900         .config_length  = 168,
901         .config_crc     = E1506_MXT_CONFIG_CRC,
902         .irqflags       = IRQF_TRIGGER_FALLING,
903 /*      .read_chg       = &read_chg, */
904         .read_chg       = NULL,
905 };
906
907 static struct i2c_board_info __initdata atmel_i2c_info[] = {
908         {
909                 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
910                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PH4),
911                 .platform_data = &atmel_mxt_info,
912         }
913 };
914
915 static struct i2c_board_info __initdata e1506_atmel_i2c_info[] = {
916         {
917                 I2C_BOARD_INFO("atmel_mxt_ts", 0x4A),
918                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PH4),
919                 .platform_data = &e1506_atmel_mxt_info,
920         }
921 };
922
923 static __initdata struct tegra_clk_init_table spi_clk_init_table[] = {
924         /* name         parent          rate            enabled */
925         { "sbc1",       "pll_p",        52000000,       true},
926         { NULL,         NULL,           0,              0},
927 };
928
929 static int __init cardhu_touch_init(void)
930 {
931         struct board_info BoardInfo, DisplayBoardInfo;
932
933         tegra_get_board_info(&BoardInfo);
934         tegra_get_display_board_info(&DisplayBoardInfo);
935         if (DisplayBoardInfo.board_id == BOARD_DISPLAY_PM313) {
936                 tegra_clk_init_from_table(spi_clk_init_table);
937
938                 touch_init_raydium(TEGRA_GPIO_PH4, TEGRA_GPIO_PH6, 2);
939         } else {
940                 gpio_request(TEGRA_GPIO_PH4, "atmel-irq");
941                 gpio_direction_input(TEGRA_GPIO_PH4);
942
943                 gpio_request(TEGRA_GPIO_PH6, "atmel-reset");
944                 gpio_direction_output(TEGRA_GPIO_PH6, 0);
945                 msleep(1);
946                 gpio_set_value(TEGRA_GPIO_PH6, 1);
947                 msleep(100);
948
949                 if ((BoardInfo.sku & SKU_TOUCH_MASK) == SKU_TOUCH_2000) {
950                         atmel_mxt_info.config = config_sku2000;
951                         atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
952                 }
953
954                 if (DisplayBoardInfo.board_id == BOARD_DISPLAY_E1506)
955                         i2c_register_board_info(1, e1506_atmel_i2c_info, 1);
956                 else
957                         i2c_register_board_info(1, atmel_i2c_info, 1);
958         }
959
960         return 0;
961 }
962
963 #if defined(CONFIG_USB_SUPPORT)
964
965 static void cardu_usb_hsic_postsupend(void)
966 {
967 #ifdef CONFIG_TEGRA_BB_XMM_POWER
968         baseband_xmm_set_power_status(BBXMM_PS_L2);
969 #endif
970 }
971
972 static void cardu_usb_hsic_preresume(void)
973 {
974 #ifdef CONFIG_TEGRA_BB_XMM_POWER
975         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
976 #endif
977 }
978
979 static void cardu_usb_hsic_phy_ready(void)
980 {
981 #ifdef CONFIG_TEGRA_BB_XMM_POWER
982         baseband_xmm_set_power_status(BBXMM_PS_L0);
983 #endif
984 }
985
986 static void cardu_usb_hsic_phy_off(void)
987 {
988 #ifdef CONFIG_TEGRA_BB_XMM_POWER
989         baseband_xmm_set_power_status(BBXMM_PS_L3);
990 #endif
991 }
992
993 static struct tegra_usb_phy_platform_ops hsic_xmm_plat_ops = {
994         .post_suspend = cardu_usb_hsic_postsupend,
995         .pre_resume = cardu_usb_hsic_preresume,
996         .port_power = cardu_usb_hsic_phy_ready,
997         .post_phy_off = cardu_usb_hsic_phy_off,
998 };
999
1000 static struct tegra_usb_platform_data tegra_ehci2_hsic_xmm_pdata = {
1001         .port_otg = false,
1002         .has_hostpc = true,
1003         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
1004         .op_mode        = TEGRA_USB_OPMODE_HOST,
1005         .u_data.host = {
1006                 .vbus_gpio = -1,
1007                 .hot_plug = false,
1008                 .remote_wakeup_supported = false,
1009                 .power_off_on_suspend = false,
1010         },
1011         .u_cfg.hsic = {
1012                 .sync_start_delay = 9,
1013                 .idle_wait_delay = 17,
1014                 .term_range_adj = 0,
1015                 .elastic_underrun_limit = 16,
1016                 .elastic_overrun_limit = 16,
1017         },
1018         .ops = &hsic_xmm_plat_ops,
1019 };
1020 #endif
1021
1022 static int hsic_enable_gpio = -1;
1023 static int hsic_reset_gpio = -1;
1024
1025 void hsic_platform_open(void)
1026 {
1027         int reset_gpio = 0, enable_gpio = 0;
1028
1029         if (hsic_enable_gpio != -1)
1030                 enable_gpio = gpio_request(hsic_enable_gpio, "uhsic_enable");
1031         if (hsic_reset_gpio != -1)
1032                 reset_gpio = gpio_request(hsic_reset_gpio, "uhsic_reset");
1033         /* hsic enable signal deasserted, hsic reset asserted */
1034         if (!enable_gpio)
1035                 gpio_direction_output(hsic_enable_gpio, 0 /* deasserted */);
1036         if (!reset_gpio)
1037                 gpio_direction_output(hsic_reset_gpio, 0 /* asserted */);
1038         if (!enable_gpio)
1039                 tegra_gpio_enable(hsic_enable_gpio);
1040         if (!reset_gpio)
1041                 tegra_gpio_enable(hsic_reset_gpio);
1042         /* keep hsic reset asserted for 1 ms */
1043         udelay(1000);
1044         /* enable (power on) hsic */
1045         if (!enable_gpio)
1046                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
1047         udelay(1000);
1048         /* deassert reset */
1049         if (!reset_gpio)
1050                 gpio_set_value_cansleep(hsic_reset_gpio, 1);
1051
1052 }
1053
1054 void hsic_platform_close(void)
1055 {
1056         if (hsic_enable_gpio != -1) {
1057                 gpio_set_value(hsic_enable_gpio, 0);
1058                 gpio_free(hsic_enable_gpio);
1059         }
1060         if (hsic_reset_gpio != -1) {
1061                 gpio_set_value(hsic_reset_gpio, 0);
1062                 gpio_free(hsic_reset_gpio);
1063         }
1064 }
1065
1066 void hsic_power_on(void)
1067 {
1068         if (hsic_enable_gpio != -1) {
1069                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
1070                 udelay(1000);
1071         }
1072 }
1073
1074 void hsic_power_off(void)
1075 {
1076         if (hsic_enable_gpio != -1) {
1077                 gpio_set_value_cansleep(hsic_enable_gpio, 0);
1078                 udelay(1000);
1079         }
1080 }
1081
1082 #if defined(CONFIG_USB_SUPPORT)
1083 static struct tegra_usb_phy_platform_ops hsic_plat_ops = {
1084         .open = hsic_platform_open,
1085         .close = hsic_platform_close,
1086         .pre_phy_on = hsic_power_on,
1087         .post_phy_off = hsic_power_off,
1088 };
1089
1090 static struct tegra_usb_platform_data tegra_ehci2_hsic_pdata = {
1091         .port_otg = false,
1092         .has_hostpc = true,
1093         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
1094         .op_mode        = TEGRA_USB_OPMODE_HOST,
1095         .u_data.host = {
1096                 .vbus_gpio = -1,
1097                 .hot_plug = false,
1098                 .remote_wakeup_supported = false,
1099                 .power_off_on_suspend = false,
1100         },
1101         .u_cfg.hsic = {
1102                 .sync_start_delay = 9,
1103                 .idle_wait_delay = 17,
1104                 .term_range_adj = 0,
1105                 .elastic_underrun_limit = 16,
1106                 .elastic_overrun_limit = 16,
1107         },
1108         .ops = &hsic_plat_ops,
1109 };
1110
1111 static struct tegra_usb_platform_data tegra_udc_pdata = {
1112         .port_otg = true,
1113         .has_hostpc = true,
1114         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1115         .op_mode = TEGRA_USB_OPMODE_DEVICE,
1116         .u_data.dev = {
1117                 .vbus_pmu_irq = 0,
1118                 .vbus_gpio = -1,
1119                 .charging_supported = false,
1120                 .remote_wakeup_supported = false,
1121         },
1122         .u_cfg.utmi = {
1123                 .hssync_start_delay = 0,
1124                 .elastic_limit = 16,
1125                 .idle_wait_delay = 17,
1126                 .term_range_adj = 6,
1127                 .xcvr_setup = 8,
1128                 .xcvr_lsfslew = 2,
1129                 .xcvr_lsrslew = 2,
1130                 .xcvr_setup_offset = 0,
1131                 .xcvr_use_fuses = 1,
1132         },
1133 };
1134
1135 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
1136         .port_otg = false,
1137         .has_hostpc = true,
1138         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1139         .op_mode        = TEGRA_USB_OPMODE_HOST,
1140         .u_data.host = {
1141                 .vbus_gpio = -1,
1142                 .hot_plug = false,
1143                 .remote_wakeup_supported = true,
1144                 .power_off_on_suspend = true,
1145         },
1146         .u_cfg.utmi = {
1147                 .hssync_start_delay = 0,
1148                 .elastic_limit = 16,
1149                 .idle_wait_delay = 17,
1150                 .term_range_adj = 6,
1151                 .xcvr_setup = 15,
1152                 .xcvr_lsfslew = 2,
1153                 .xcvr_lsrslew = 2,
1154                 .xcvr_setup_offset = 0,
1155                 .xcvr_use_fuses = 1,
1156         },
1157 };
1158
1159 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
1160         .port_otg = false,
1161         .has_hostpc = true,
1162         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1163         .op_mode = TEGRA_USB_OPMODE_HOST,
1164         .u_data.host = {
1165                 .vbus_gpio = -1,
1166                 .vbus_reg = "vdd_vbus_typea_usb",
1167                 .hot_plug = true,
1168                 .remote_wakeup_supported = true,
1169                 .power_off_on_suspend = true,
1170         },
1171         .u_cfg.utmi = {
1172                 .hssync_start_delay = 0,
1173                 .elastic_limit = 16,
1174                 .idle_wait_delay = 17,
1175                 .term_range_adj = 6,
1176                 .xcvr_setup = 8,
1177                 .xcvr_lsfslew = 2,
1178                 .xcvr_lsrslew = 2,
1179                 .xcvr_setup_offset = 0,
1180                 .xcvr_use_fuses = 1,
1181         },
1182 };
1183
1184 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
1185         .port_otg = true,
1186         .has_hostpc = true,
1187         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1188         .op_mode = TEGRA_USB_OPMODE_HOST,
1189         .u_data.host = {
1190                 .vbus_gpio = -1,
1191                 .vbus_reg = "vdd_vbus_micro_usb",
1192                 .hot_plug = true,
1193                 .remote_wakeup_supported = true,
1194                 .power_off_on_suspend = true,
1195         },
1196         .u_cfg.utmi = {
1197                 .hssync_start_delay = 0,
1198                 .elastic_limit = 16,
1199                 .idle_wait_delay = 17,
1200                 .term_range_adj = 6,
1201                 .xcvr_setup = 15,
1202                 .xcvr_lsfslew = 2,
1203                 .xcvr_lsrslew = 2,
1204                 .xcvr_setup_offset = 0,
1205                 .xcvr_use_fuses = 1,
1206         },
1207 };
1208
1209 static struct tegra_usb_otg_data tegra_otg_pdata = {
1210         .ehci_device = &tegra_ehci1_device,
1211         .ehci_pdata = &tegra_ehci1_utmi_pdata,
1212 };
1213 #endif
1214
1215 #if defined(CONFIG_USB_SUPPORT)
1216 static void cardhu_usb_init(void)
1217 {
1218         struct board_info bi;
1219
1220         tegra_get_board_info(&bi);
1221
1222         /* OTG should be the first to be registered */
1223         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1224         platform_device_register(&tegra_otg_device);
1225
1226         /* setup the udc platform data */
1227         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1228
1229         if (bi.board_id == BOARD_PM267) {
1230                 hsic_enable_gpio = EN_HSIC_GPIO;
1231                 hsic_reset_gpio = PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
1232                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1233                 platform_device_register(&tegra_ehci2_device);
1234         } else if (bi.board_id == BOARD_E1256) {
1235                 hsic_enable_gpio = EN_HSIC_GPIO;
1236                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1237                 platform_device_register(&tegra_ehci2_device);
1238         } else if (bi.board_id == BOARD_E1186) {
1239                 tegra_ehci2_device.dev.platform_data =
1240                                                 &tegra_ehci2_hsic_xmm_pdata;
1241                 /* ehci2 registration happens in baseband-xmm-power  */
1242         } else {
1243                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_utmi_pdata;
1244                 platform_device_register(&tegra_ehci2_device);
1245         }
1246
1247         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
1248         platform_device_register(&tegra_ehci3_device);
1249
1250 }
1251 #else
1252 static void cardhu_usb_init(void) { }
1253 #endif
1254
1255 static struct baseband_power_platform_data tegra_baseband_power_data = {
1256         .baseband_type = BASEBAND_XMM,
1257         .modem = {
1258         .xmm = {
1259                         .bb_rst = XMM_GPIO_BB_RST,
1260                         .bb_on = XMM_GPIO_BB_ON,
1261                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1262                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1263                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1264                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1265                         .hsic_device = &tegra_ehci2_device,
1266                 },
1267         },
1268 };
1269
1270 static struct platform_device tegra_baseband_power_device = {
1271         .name = "baseband_xmm_power",
1272         .id = -1,
1273         .dev = {
1274                 .platform_data = &tegra_baseband_power_data,
1275         },
1276 };
1277
1278 static struct platform_device tegra_baseband_power2_device = {
1279         .name = "baseband_xmm_power2",
1280         .id = -1,
1281         .dev = {
1282                 .platform_data = &tegra_baseband_power_data,
1283         },
1284 };
1285
1286
1287 static struct tegra_pci_platform_data cardhu_pci_platform_data = {
1288         .port_status[0] = 1,
1289         .port_status[1] = 1,
1290         .port_status[2] = 1,
1291         .use_dock_detect        = 0,
1292         .gpio           = 0,
1293 };
1294
1295 static void cardhu_pci_init(void)
1296 {
1297         struct board_info board_info;
1298
1299         tegra_get_board_info(&board_info);
1300         if (board_info.board_id == BOARD_E1291) {
1301                 cardhu_pci_platform_data.port_status[0] = 0;
1302                 cardhu_pci_platform_data.port_status[1] = 0;
1303                 cardhu_pci_platform_data.port_status[2] = 1;
1304                 cardhu_pci_platform_data.use_dock_detect = 1;
1305                 cardhu_pci_platform_data.gpio = DOCK_DETECT_GPIO;
1306         }
1307         if ((board_info.board_id == BOARD_E1186) ||
1308                 (board_info.board_id == BOARD_E1187) ||
1309                 (board_info.board_id == BOARD_E1291)) {
1310                 tegra_pci_device.dev.platform_data = &cardhu_pci_platform_data;
1311                 platform_device_register(&tegra_pci_device);
1312         }
1313 }
1314
1315 static void cardhu_modem_init(void)
1316 {
1317         struct board_info board_info;
1318         int w_disable_gpio, ret;
1319
1320         tegra_get_board_info(&board_info);
1321         switch (board_info.board_id) {
1322         case BOARD_E1291:
1323         case BOARD_E1198:
1324                 if (((board_info.board_id == BOARD_E1291) &&
1325                                 (board_info.fab < BOARD_FAB_A03)) ||
1326                         ((board_info.board_id == BOARD_E1198) &&
1327                                         (board_info.fab < BOARD_FAB_A02))) {
1328                         w_disable_gpio = TEGRA_GPIO_PH5;
1329                 } else {
1330                         w_disable_gpio = TEGRA_GPIO_PDD5;
1331                 }
1332
1333                 ret = gpio_request(w_disable_gpio, "w_disable_gpio");
1334                 if (ret < 0)
1335                         pr_err("%s: gpio_request failed for gpio %d\n",
1336                                 __func__, w_disable_gpio);
1337                 else
1338                         gpio_direction_input(w_disable_gpio);
1339
1340                 /* E1291-A04 & E1198:A02: Set PERST signal to high */
1341                 if (((board_info.board_id == BOARD_E1291) &&
1342                                 (board_info.fab >= BOARD_FAB_A04)) ||
1343                         ((board_info.board_id == BOARD_E1198) &&
1344                                         (board_info.fab >= BOARD_FAB_A02))) {
1345                         ret = gpio_request(TEGRA_GPIO_PH7, "modem_perst");
1346                         if (ret < 0) {
1347                                 pr_err("%s(): Error in allocating gpio "
1348                                         "TEGRA_GPIO_PH7\n", __func__);
1349                                 break;
1350                         }
1351                         gpio_direction_output(TEGRA_GPIO_PH7, 1);
1352                 }
1353                 break;
1354         case BOARD_E1186:
1355                 platform_device_register(&tegra_baseband_power_device);
1356                 platform_device_register(&tegra_baseband_power2_device);
1357                 break;
1358         default:
1359                 break;
1360         }
1361
1362 }
1363
1364 #ifdef CONFIG_SATA_AHCI_TEGRA
1365 static void cardhu_sata_init(void)
1366 {
1367         platform_device_register(&tegra_sata_device);
1368 }
1369 #else
1370 static void cardhu_sata_init(void) { }
1371 #endif
1372
1373 static void __init tegra_cardhu_init(void)
1374 {
1375         tegra_thermal_init(&thermal_data,
1376                                 throttle_list,
1377                                 ARRAY_SIZE(throttle_list));
1378         tegra_clk_init_from_table(cardhu_clk_init_table);
1379         cardhu_pinmux_init();
1380         cardhu_i2c_init();
1381         cardhu_spi_init();
1382         cardhu_usb_init();
1383 #ifdef CONFIG_TEGRA_EDP_LIMITS
1384         cardhu_edp_init();
1385 #endif
1386         cardhu_uart_init();
1387         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
1388         tegra_ram_console_debug_init();
1389         cardhu_sdhci_init();
1390         cardhu_regulator_init();
1391         cardhu_dtv_init();
1392         cardhu_suspend_init();
1393         cardhu_touch_init();
1394         cardhu_modem_init();
1395         cardhu_kbc_init();
1396         cardhu_scroll_init();
1397         cardhu_keys_init();
1398         cardhu_panel_init();
1399         cardhu_pmon_init();
1400         cardhu_sensors_init();
1401         cardhu_setup_bluesleep();
1402         cardhu_sata_init();
1403         //audio_wired_jack_init();
1404         cardhu_pins_state_init();
1405         cardhu_emc_init();
1406         tegra_release_bootloader_fb();
1407         cardhu_pci_init();
1408 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1409         tegra_wdt_recovery_init();
1410 #endif
1411         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1412 }
1413
1414 static void __init tegra_cardhu_reserve(void)
1415 {
1416 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1417         /* support 1920X1200 with 24bpp */
1418         tegra_reserve(0, SZ_8M + SZ_1M, SZ_8M + SZ_1M);
1419 #else
1420         tegra_reserve(SZ_128M, SZ_8M, SZ_8M);
1421 #endif
1422         tegra_ram_console_debug_reserve(SZ_1M);
1423 }
1424
1425 MACHINE_START(CARDHU, "cardhu")
1426         .boot_params    = 0x80000100,
1427         .map_io         = tegra_map_common_io,
1428         .reserve        = tegra_cardhu_reserve,
1429         .init_early     = tegra_init_early,
1430         .init_irq       = tegra_init_irq,
1431         .timer          = &tegra_timer,
1432         .init_machine   = tegra_cardhu_init,
1433 MACHINE_END