arm: tegra: Cardhu board file, 400K I2C touch drvr
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <linux/spi/spi.h>
37 #include <linux/i2c/atmel_mxt_ts.h>
38 #include <linux/tegra_uart.h>
39 #include <linux/memblock.h>
40 #include <linux/spi-tegra.h>
41 #include <linux/nfc/pn544.h>
42
43 #include <sound/wm8903.h>
44 #include <sound/max98095.h>
45 #include <media/tegra_dtv.h>
46
47 #include <mach/clk.h>
48 #include <mach/iomap.h>
49 #include <mach/irqs.h>
50 #include <mach/pinmux.h>
51 #include <mach/iomap.h>
52 #include <mach/io.h>
53 #include <mach/i2s.h>
54 #include <mach/tegra_asoc_pdata.h>
55 #include <mach/tegra_wm8903_pdata.h>
56 #include <asm/mach-types.h>
57 #include <asm/mach/arch.h>
58 #include <mach/usb_phy.h>
59 #include <mach/thermal.h>
60 #include <mach/pci.h>
61
62 #include "board.h"
63 #include "clock.h"
64 #include "board-cardhu.h"
65 #include "board-touch.h"
66 #include "devices.h"
67 #include "gpio-names.h"
68 #include "fuse.h"
69 #include "pm.h"
70 #include "baseband-xmm-power.h"
71 #include "wdt-recovery.h"
72
73 /* All units are in millicelsius */
74 static struct tegra_thermal_data thermal_data = {
75         .temp_throttle = 85000,
76         .temp_shutdown = 90000,
77         .temp_offset = TDIODE_OFFSET, /* temps based on tdiode */
78 #ifdef CONFIG_TEGRA_EDP_LIMITS
79         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
80         .hysteresis_edp = 3000,
81 #endif
82 #ifdef CONFIG_TEGRA_THERMAL_SYSFS
83         .tc1 = 0,
84         .tc2 = 1,
85         .passive_delay = 2000,
86 #else
87         .hysteresis_throttle = 1000,
88 #endif
89 };
90
91 /* !!!TODO: Change for cardhu (Taken from Ventana) */
92 static struct tegra_utmip_config utmi_phy_config[] = {
93         [0] = {
94                         .hssync_start_delay = 0,
95                         .idle_wait_delay = 17,
96                         .elastic_limit = 16,
97                         .term_range_adj = 6,
98                         .xcvr_setup = 15,
99                         .xcvr_setup_offset = 0,
100                         .xcvr_use_fuses = 1,
101                         .xcvr_lsfslew = 2,
102                         .xcvr_lsrslew = 2,
103         },
104         [1] = {
105                         .hssync_start_delay = 0,
106                         .idle_wait_delay = 17,
107                         .elastic_limit = 16,
108                         .term_range_adj = 6,
109                         .xcvr_setup = 15,
110                         .xcvr_setup_offset = 0,
111                         .xcvr_use_fuses = 1,
112                         .xcvr_lsfslew = 2,
113                         .xcvr_lsrslew = 2,
114         },
115         [2] = {
116                         .hssync_start_delay = 0,
117                         .idle_wait_delay = 17,
118                         .elastic_limit = 16,
119                         .term_range_adj = 6,
120                         .xcvr_setup = 8,
121                         .xcvr_setup_offset = 0,
122                         .xcvr_use_fuses = 1,
123                         .xcvr_lsfslew = 2,
124                         .xcvr_lsrslew = 2,
125         },
126 };
127
128 static struct resource cardhu_bcm4329_rfkill_resources[] = {
129         {
130                 .name   = "bcm4329_nshutdown_gpio",
131                 .start  = TEGRA_GPIO_PU0,
132                 .end    = TEGRA_GPIO_PU0,
133                 .flags  = IORESOURCE_IO,
134         },
135 };
136
137 static struct platform_device cardhu_bcm4329_rfkill_device = {
138         .name = "bcm4329_rfkill",
139         .id             = -1,
140         .num_resources  = ARRAY_SIZE(cardhu_bcm4329_rfkill_resources),
141         .resource       = cardhu_bcm4329_rfkill_resources,
142 };
143
144 static struct resource cardhu_bluesleep_resources[] = {
145         [0] = {
146                 .name = "gpio_host_wake",
147                         .start  = TEGRA_GPIO_PU6,
148                         .end    = TEGRA_GPIO_PU6,
149                         .flags  = IORESOURCE_IO,
150         },
151         [1] = {
152                 .name = "gpio_ext_wake",
153                         .start  = TEGRA_GPIO_PU1,
154                         .end    = TEGRA_GPIO_PU1,
155                         .flags  = IORESOURCE_IO,
156         },
157         [2] = {
158                 .name = "host_wake",
159                         .start  = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PU6),
160                         .end    = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PU6),
161                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
162         },
163 };
164
165 static struct platform_device cardhu_bluesleep_device = {
166         .name           = "bluesleep",
167         .id             = -1,
168         .num_resources  = ARRAY_SIZE(cardhu_bluesleep_resources),
169         .resource       = cardhu_bluesleep_resources,
170 };
171
172 static noinline void __init cardhu_setup_bluesleep(void)
173 {
174         platform_device_register(&cardhu_bluesleep_device);
175         tegra_gpio_enable(TEGRA_GPIO_PU6);
176         tegra_gpio_enable(TEGRA_GPIO_PU1);
177         return;
178 }
179
180 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
181         /* name         parent          rate            enabled */
182         { "pll_m",      NULL,           0,              false},
183         { "hda",        "pll_p",        108000000,      false},
184         { "hda2codec_2x","pll_p",       48000000,       false},
185         { "pwm",        "pll_p",        3187500,        false},
186         { "blink",      "clk_32k",      32768,          true},
187         { "i2s0",       "pll_a_out0",   0,              false},
188         { "i2s1",       "pll_a_out0",   0,              false},
189         { "i2s3",       "pll_a_out0",   0,              false},
190         { "spdif_out",  "pll_a_out0",   0,              false},
191         { "d_audio",    "clk_m",        12000000,       false},
192         { "dam0",       "clk_m",        12000000,       false},
193         { "dam1",       "clk_m",        12000000,       false},
194         { "dam2",       "clk_m",        12000000,       false},
195         { "audio1",     "i2s1_sync",    0,              false},
196         { "audio3",     "i2s3_sync",    0,              false},
197         { "vi_sensor",  "pll_p",        150000000,      false},
198         { "i2c1",       "pll_p",        3200000,        false},
199         { "i2c2",       "pll_p",        3200000,        false},
200         { "i2c3",       "pll_p",        3200000,        false},
201         { "i2c4",       "pll_p",        3200000,        false},
202         { "i2c5",       "pll_p",        3200000,        false},
203         { NULL,         NULL,           0,              0},
204 };
205
206 static struct pn544_i2c_platform_data nfc_pdata = {
207         .irq_gpio = TEGRA_GPIO_PX0,
208         .ven_gpio = TEGRA_GPIO_PP3,
209         .firm_gpio = TEGRA_GPIO_PO7,
210         };
211
212 static struct i2c_board_info __initdata cardhu_i2c_bus3_board_info[] = {
213         {
214                 I2C_BOARD_INFO("pn544", 0x28),
215                 .platform_data = &nfc_pdata,
216                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PX0),
217         },
218 };
219 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
220         .adapter_nr     = 0,
221         .bus_count      = 1,
222         .bus_clk_rate   = { 100000, 0 },
223         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
224         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
225         .arb_recovery = arb_lost_recovery,
226 };
227
228 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
229         .adapter_nr     = 1,
230         .bus_count      = 1,
231         .bus_clk_rate   = { 400000, 0 },
232         .is_clkon_always = true,
233         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
234         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
235         .arb_recovery = arb_lost_recovery,
236 };
237
238 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
239         .adapter_nr     = 2,
240         .bus_count      = 1,
241         .bus_clk_rate   = { 100000, 0 },
242         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
243         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
244         .arb_recovery = arb_lost_recovery,
245 };
246
247 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
248         .adapter_nr     = 3,
249         .bus_count      = 1,
250         .bus_clk_rate   = { 10000, 0 },
251         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
252         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
253         .arb_recovery = arb_lost_recovery,
254 };
255
256 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
257         .adapter_nr     = 4,
258         .bus_count      = 1,
259         .bus_clk_rate   = { 400000, 0 },
260         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
261         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
262         .arb_recovery = arb_lost_recovery,
263 };
264
265
266 #if 0
267 struct tegra_wired_jack_conf audio_wr_jack_conf = {
268         .hp_det_n = TEGRA_GPIO_PW2,
269         .en_mic_ext = TEGRA_GPIO_PX1,
270         .en_mic_int = TEGRA_GPIO_PX0,
271 };
272 #endif
273
274 static struct wm8903_platform_data cardhu_wm8903_pdata = {
275         .irq_active_low = 0,
276         .micdet_cfg = 0,
277         .micdet_delay = 100,
278         .gpio_base = CARDHU_GPIO_WM8903(0),
279         .gpio_cfg = {
280                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP1_FN_SHIFT),
281                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP2_FN_SHIFT) |
282                         WM8903_GP2_DIR,
283                 0,
284                 WM8903_GPIO_NO_CONFIG,
285                 WM8903_GPIO_NO_CONFIG,
286         },
287 };
288
289 /* Equalizer filter coefs generated from the MAXIM MAX98095
290  * evkit software tool */
291 static struct max98095_eq_cfg max98095_eq_cfg[] = {
292         {
293                 .name = "FLAT",
294                 .rate = 44100,
295                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
296                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
297                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
298                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
299                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
300         },
301         {
302                 .name = "LOWPASS1K",
303                 .rate = 44100,
304                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
305                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
306                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
307                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
308                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
309         },
310         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
311                 .name = "HIBOOST",
312                 .rate = 44100,
313                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
314                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
315                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
316                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
317                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
318         },
319         { /* BASS=12dB, TREBLE=+12dB */
320                 .name = "LOUD12DB",
321                 .rate = 44100,
322                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
323                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
324                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
325                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
326                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
327         },
328         {
329                 .name = "FLAT",
330                 .rate = 16000,
331                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
332                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
333                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
334                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
335                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
336         },
337         {
338                 .name = "LOWPASS1K",
339                 .rate = 16000,
340                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
341                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
342                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
343                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
344                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
345         },
346         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
347                 .name = "HIBOOST",
348                 .rate = 16000,
349                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
350                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
351                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
352                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
353                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
354         },
355         { /* BASS=12dB, TREBLE=+12dB */
356                 .name = "LOUD12DB",
357                 .rate = 16000,
358                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
359                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
360                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
361                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
362                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
363         },
364 };
365
366 static struct max98095_pdata cardhu_max98095_pdata = {
367         /* equalizer configuration */
368         .eq_cfg = max98095_eq_cfg,
369         .eq_cfgcnt = ARRAY_SIZE(max98095_eq_cfg),
370
371         /* Biquad filter response configuration */
372         .bq_cfg = NULL,
373         .bq_cfgcnt = 0,
374
375         /* microphone configuration */
376         .digmic_left_mode = 1,
377         .digmic_right_mode = 1,
378 };
379
380 static struct i2c_board_info __initdata cardhu_codec_wm8903_info = {
381         I2C_BOARD_INFO("wm8903", 0x1a),
382         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
383         .platform_data = &cardhu_wm8903_pdata,
384 };
385
386 static struct i2c_board_info __initdata cardhu_codec_aic326x_info = {
387         I2C_BOARD_INFO("aic3262-codec", 0x18),
388         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
389 };
390
391 static struct i2c_board_info __initdata cardhu_codec_max98095_info = {
392         I2C_BOARD_INFO("max98095", 0x10),
393         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
394         .platform_data = &cardhu_max98095_pdata,
395 };
396
397 static void cardhu_i2c_init(void)
398 {
399         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
400         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
401         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
402         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
403         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
404
405         platform_device_register(&tegra_i2c_device5);
406         platform_device_register(&tegra_i2c_device4);
407         platform_device_register(&tegra_i2c_device3);
408         platform_device_register(&tegra_i2c_device2);
409         platform_device_register(&tegra_i2c_device1);
410
411         i2c_register_board_info(4, &cardhu_codec_wm8903_info, 1);
412         i2c_register_board_info(4, &cardhu_codec_max98095_info, 1);
413         i2c_register_board_info(4, &cardhu_codec_aic326x_info, 1);
414
415         i2c_register_board_info(2, cardhu_i2c_bus3_board_info, 1);
416 }
417
418 static struct platform_device *cardhu_uart_devices[] __initdata = {
419         &tegra_uarta_device,
420         &tegra_uartb_device,
421         &tegra_uartc_device,
422         &tegra_uartd_device,
423         &tegra_uarte_device,
424 };
425 static struct uart_clk_parent uart_parent_clk[] = {
426         [0] = {.name = "clk_m"},
427         [1] = {.name = "pll_p"},
428 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
429         [2] = {.name = "pll_m"},
430 #endif
431 };
432
433 static struct tegra_uart_platform_data cardhu_uart_pdata;
434 static struct tegra_uart_platform_data cardhu_loopback_uart_pdata;
435
436 static void __init uart_debug_init(void)
437 {
438         struct board_info board_info;
439         int debug_port_id;
440
441         tegra_get_board_info(&board_info);
442
443         debug_port_id = get_tegra_uart_debug_port_id();
444         if (debug_port_id < 0) {
445                 debug_port_id = 0;
446                         /* UARTB is debug port
447                          *       for SLT - E1186/E1187/PM269
448                          *       for E1256/E1257
449                          */
450                 if (((board_info.sku & SKU_SLT_ULPI_SUPPORT) &&
451                         ((board_info.board_id == BOARD_E1186) ||
452                         (board_info.board_id == BOARD_E1187) ||
453                         (board_info.board_id == BOARD_PM269))) ||
454                         (board_info.board_id == BOARD_E1256) ||
455                         (board_info.board_id == BOARD_E1257))
456                                 debug_port_id = 1;
457         }
458
459         switch (debug_port_id) {
460         case 0:
461                 /* UARTA is the debug port. */
462                 pr_info("Selecting UARTA as the debug console\n");
463                 cardhu_uart_devices[0] = &debug_uarta_device;
464                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
465                 debug_uart_port_base = ((struct plat_serial8250_port *)(
466                         debug_uarta_device.dev.platform_data))->mapbase;
467                 break;
468
469         case 1:
470                 /* UARTB is the debug port. */
471                 pr_info("Selecting UARTB as the debug console\n");
472                 cardhu_uart_devices[1] = &debug_uartb_device;
473                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartb");
474                 debug_uart_port_base = ((struct plat_serial8250_port *)(
475                         debug_uartb_device.dev.platform_data))->mapbase;
476                 break;
477
478         case 2:
479                 /* UARTC is the debug port. */
480                 pr_info("Selecting UARTC as the debug console\n");
481                 cardhu_uart_devices[2] = &debug_uartc_device;
482                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartc");
483                 debug_uart_port_base = ((struct plat_serial8250_port *)(
484                         debug_uartc_device.dev.platform_data))->mapbase;
485                 break;
486
487         case 3:
488                 /* UARTD is the debug port. */
489                 pr_info("Selecting UARTD as the debug console\n");
490                 cardhu_uart_devices[3] = &debug_uartd_device;
491                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartd");
492                 debug_uart_port_base = ((struct plat_serial8250_port *)(
493                         debug_uartd_device.dev.platform_data))->mapbase;
494                 break;
495
496         case 4:
497                 /* UARTE is the debug port. */
498                 pr_info("Selecting UARTE as the debug console\n");
499                 cardhu_uart_devices[4] = &debug_uarte_device;
500                 debug_uart_clk =  clk_get_sys("serial8250.0", "uarte");
501                 debug_uart_port_base = ((struct plat_serial8250_port *)(
502                         debug_uarte_device.dev.platform_data))->mapbase;
503                 break;
504
505         default:
506                 pr_info("The debug console id %d is invalid, Assuming UARTA", debug_port_id);
507                 cardhu_uart_devices[0] = &debug_uarta_device;
508                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
509                 debug_uart_port_base = ((struct plat_serial8250_port *)(
510                         debug_uarta_device.dev.platform_data))->mapbase;
511                 break;
512         }
513         return;
514 }
515
516 static void __init cardhu_uart_init(void)
517 {
518         struct clk *c;
519         int i;
520
521         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
522                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
523                 if (IS_ERR_OR_NULL(c)) {
524                         pr_err("Not able to get the clock for %s\n",
525                                                 uart_parent_clk[i].name);
526                         continue;
527                 }
528                 uart_parent_clk[i].parent_clk = c;
529                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
530         }
531         cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
532         cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
533         cardhu_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
534         cardhu_loopback_uart_pdata.parent_clk_count =
535                                                 ARRAY_SIZE(uart_parent_clk);
536         cardhu_loopback_uart_pdata.is_loopback = true;
537         tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
538         tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
539         tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
540         tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
541         /* UARTE is used for loopback test purpose */
542         tegra_uarte_device.dev.platform_data = &cardhu_loopback_uart_pdata;
543
544         /* Register low speed only if it is selected */
545         if (!is_tegra_debug_uartport_hs()) {
546                 uart_debug_init();
547                 /* Clock enable for the debug channel */
548                 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
549                         pr_info("The debug console clock name is %s\n",
550                                                 debug_uart_clk->name);
551                         c = tegra_get_clock_by_name("pll_p");
552                         if (IS_ERR_OR_NULL(c))
553                                 pr_err("Not getting the parent clock pll_p\n");
554                         else
555                                 clk_set_parent(debug_uart_clk, c);
556
557                         clk_enable(debug_uart_clk);
558                         clk_set_rate(debug_uart_clk, clk_get_rate(c));
559                 } else {
560                         pr_err("Not getting the clock %s for debug console\n",
561                                         debug_uart_clk->name);
562                 }
563         }
564
565         platform_add_devices(cardhu_uart_devices,
566                                 ARRAY_SIZE(cardhu_uart_devices));
567 }
568
569 static struct platform_device tegra_camera = {
570         .name = "tegra_camera",
571         .id = -1,
572 };
573
574 static struct platform_device *cardhu_spi_devices[] __initdata = {
575         &tegra_spi_device4,
576 };
577
578 static struct platform_device *touch_spi_device[] __initdata = {
579         &tegra_spi_device1,
580 };
581
582 struct spi_clk_parent spi_parent_clk[] = {
583         [0] = {.name = "pll_p"},
584 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
585         [1] = {.name = "pll_m"},
586         [2] = {.name = "clk_m"},
587 #else
588         [1] = {.name = "clk_m"},
589 #endif
590 };
591
592 static struct tegra_spi_platform_data cardhu_spi_pdata = {
593         .is_dma_based           = true,
594         .max_dma_buffer         = (16 * 1024),
595         .is_clkon_always        = false,
596         .max_rate               = 100000000,
597 };
598
599 static void __init cardhu_spi_init(void)
600 {
601         int i;
602         struct clk *c;
603         struct board_info board_info, display_board_info;
604
605         tegra_get_board_info(&board_info);
606         tegra_get_display_board_info(&display_board_info);
607
608         for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
609                 c = tegra_get_clock_by_name(spi_parent_clk[i].name);
610                 if (IS_ERR_OR_NULL(c)) {
611                         pr_err("Not able to get the clock for %s\n",
612                                                 spi_parent_clk[i].name);
613                         continue;
614                 }
615                 spi_parent_clk[i].parent_clk = c;
616                 spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
617         }
618         cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
619         cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
620         tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
621         platform_add_devices(cardhu_spi_devices,
622                                 ARRAY_SIZE(cardhu_spi_devices));
623
624         if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
625                 platform_add_devices(touch_spi_device,
626                                 ARRAY_SIZE(touch_spi_device));
627         }
628         if (board_info.board_id == BOARD_E1198) {
629                 tegra_spi_device2.dev.platform_data = &cardhu_spi_pdata;
630                 platform_device_register(&tegra_spi_device2);
631                 tegra_spi_slave_device1.dev.platform_data = &cardhu_spi_pdata;
632                 platform_device_register(&tegra_spi_slave_device1);
633         }
634 }
635
636 static void __init cardhu_dtv_init(void)
637 {
638         struct board_info board_info;
639
640         tegra_get_board_info(&board_info);
641
642         if (board_info.board_id == BOARD_E1186)
643                 platform_device_register(&tegra_dtv_device);
644 }
645
646 static struct resource tegra_rtc_resources[] = {
647         [0] = {
648                 .start = TEGRA_RTC_BASE,
649                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
650                 .flags = IORESOURCE_MEM,
651         },
652         [1] = {
653                 .start = INT_RTC,
654                 .end = INT_RTC,
655                 .flags = IORESOURCE_IRQ,
656         },
657 };
658
659 static struct platform_device tegra_rtc_device = {
660         .name = "tegra_rtc",
661         .id   = -1,
662         .resource = tegra_rtc_resources,
663         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
664 };
665
666 static struct tegra_wm8903_platform_data cardhu_audio_wm8903_pdata = {
667         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
668         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
669         .gpio_hp_mute           = -1,
670         .gpio_int_mic_en        = -1,
671         .gpio_ext_mic_en        = -1,
672 };
673
674 static struct tegra_asoc_platform_data cardhu_audio_max98095_pdata = {
675         .gpio_spkr_en           = -1,
676         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
677         .gpio_hp_mute           = -1,
678         .gpio_int_mic_en        = -1,
679         .gpio_ext_mic_en        = -1,
680 };
681
682 static struct platform_device cardhu_audio_wm8903_device = {
683         .name   = "tegra-snd-wm8903",
684         .id     = 0,
685         .dev    = {
686                 .platform_data = &cardhu_audio_wm8903_pdata,
687         },
688 };
689
690 static struct platform_device cardhu_audio_max98095_device = {
691         .name   = "tegra-snd-max98095",
692         .id     = 0,
693         .dev    = {
694                 .platform_data = &cardhu_audio_max98095_pdata,
695         },
696 };
697
698 static struct tegra_asoc_platform_data cardhu_audio_aic326x_pdata = {
699         .gpio_spkr_en           = -1,
700         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
701         .gpio_hp_mute           = -1,
702         .gpio_int_mic_en        = -1,
703         .gpio_ext_mic_en        = -1,
704         /*defaults for Verbier-Cardhu board with TI AIC326X codec*/
705         .audio_port_id          = {
706                 [HIFI_CODEC] = 0,
707                 [BASEBAND] = -1,
708                 [BT_SCO] = 3,
709         },
710         .baseband_param         = {
711                 .rate = -1,
712                 .channels = -1,
713         },
714 };
715
716 static struct platform_device cardhu_audio_aic326x_device = {
717         .name   = "tegra-snd-aic326x",
718         .id     = 0,
719         .dev    = {
720                 .platform_data  = &cardhu_audio_aic326x_pdata,
721         },
722 };
723
724 static struct platform_device *cardhu_devices[] __initdata = {
725         &tegra_pmu_device,
726         &tegra_rtc_device,
727         &tegra_udc_device,
728 #if defined(CONFIG_TEGRA_IOVMM_SMMU) ||  defined(CONFIG_TEGRA_IOMMU_SMMU)
729         &tegra_smmu_device,
730 #endif
731         &tegra_wdt_device,
732 #if defined(CONFIG_TEGRA_AVP)
733         &tegra_avp_device,
734 #endif
735         &tegra_camera,
736 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
737         &tegra_se_device,
738 #endif
739         &tegra_ahub_device,
740         &tegra_dam_device0,
741         &tegra_dam_device1,
742         &tegra_dam_device2,
743         &tegra_i2s_device0,
744         &tegra_i2s_device1,
745         &tegra_i2s_device3,
746         &tegra_spdif_device,
747         &spdif_dit_device,
748         &bluetooth_dit_device,
749         &baseband_dit_device,
750         &cardhu_bcm4329_rfkill_device,
751         &tegra_pcm_device,
752         &cardhu_audio_wm8903_device,
753         &cardhu_audio_max98095_device,
754         &cardhu_audio_aic326x_device,
755         &tegra_hda_device,
756 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
757         &tegra_aes_device,
758 #endif
759 };
760
761 #define MXT_CONFIG_CRC  0xD62DE8
762 static const u8 config[] = {
763         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
764         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
765         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
766         0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
767         0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
768         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
769         0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
770         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
771         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
772         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
773         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
774         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
775         0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
776         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
777         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
778         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
779         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
780         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
781         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
782         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
783 };
784
785 #define MXT_CONFIG_CRC_SKU2000  0xA24D9A
786 static const u8 config_sku2000[] = {
787         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
788         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
789         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
790         0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00,  //23=thr  2 di
791         0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
792         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
793         0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00,  //0A=limit
794         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
795         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
796         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
797         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
798         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
799         0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
800         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
801         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
802         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
803         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
804         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
805         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
806         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
807 };
808
809 static struct mxt_platform_data atmel_mxt_info = {
810         .x_line         = 27,
811         .y_line         = 42,
812         .x_size         = 768,
813         .y_size         = 1366,
814         .blen           = 0x20,
815         .threshold      = 0x3C,
816         .voltage        = 3300000,              /* 3.3V */
817         .orient         = 5,
818         .config         = config,
819         .config_length  = 157,
820         .config_crc     = MXT_CONFIG_CRC,
821         .irqflags       = IRQF_TRIGGER_FALLING,
822 /*      .read_chg       = &read_chg, */
823         .read_chg       = NULL,
824 };
825
826 static struct i2c_board_info __initdata atmel_i2c_info[] = {
827         {
828                 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
829                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PH4),
830                 .platform_data = &atmel_mxt_info,
831         }
832 };
833
834 static __initdata struct tegra_clk_init_table spi_clk_init_table[] = {
835         /* name         parent          rate            enabled */
836         { "sbc1",       "pll_p",        52000000,       true},
837         { NULL,         NULL,           0,              0},
838 };
839
840 static int __init cardhu_touch_init(void)
841 {
842         struct board_info BoardInfo;
843
844         tegra_get_display_board_info(&BoardInfo);
845         if (BoardInfo.board_id == BOARD_DISPLAY_PM313) {
846                 tegra_clk_init_from_table(spi_clk_init_table);
847
848                 touch_init_raydium(TEGRA_GPIO_PH4, TEGRA_GPIO_PH6, 2);
849         } else {
850                 tegra_gpio_enable(TEGRA_GPIO_PH4);
851                 tegra_gpio_enable(TEGRA_GPIO_PH6);
852
853                 gpio_request(TEGRA_GPIO_PH4, "atmel-irq");
854                 gpio_direction_input(TEGRA_GPIO_PH4);
855
856                 gpio_request(TEGRA_GPIO_PH6, "atmel-reset");
857                 gpio_direction_output(TEGRA_GPIO_PH6, 0);
858                 msleep(1);
859                 gpio_set_value(TEGRA_GPIO_PH6, 1);
860                 msleep(100);
861
862                 tegra_get_board_info(&BoardInfo);
863                 if ((BoardInfo.sku & SKU_TOUCH_MASK) == SKU_TOUCH_2000) {
864                         atmel_mxt_info.config = config_sku2000;
865                         atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
866                 }
867
868                 i2c_register_board_info(1, atmel_i2c_info, 1);
869         }
870
871         return 0;
872 }
873
874 static struct tegra_uhsic_config uhsic_phy_config = {
875         .enable_gpio = EN_HSIC_GPIO,
876         .reset_gpio = -1,
877         .sync_start_delay = 9,
878         .idle_wait_delay = 17,
879         .term_range_adj = 0,
880         .elastic_underrun_limit = 16,
881         .elastic_overrun_limit = 16,
882 };
883
884 static struct tegra_ehci_platform_data tegra_ehci_uhsic_pdata = {
885         .phy_type = TEGRA_USB_PHY_TYPE_HSIC,
886         .phy_config = &uhsic_phy_config,
887         .operating_mode = TEGRA_USB_HOST,
888         .power_down_on_bus_suspend = 1,
889         .default_enable = true,
890 };
891
892 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
893         [0] = {
894                         .phy_config = &utmi_phy_config[0],
895                         .operating_mode = TEGRA_USB_HOST,
896                         .power_down_on_bus_suspend = 1,
897                         .default_enable = true,
898         },
899         [1] = {
900                         .phy_config = &utmi_phy_config[1],
901                         .operating_mode = TEGRA_USB_HOST,
902                         .power_down_on_bus_suspend = 1,
903                         .default_enable = true,
904         },
905         [2] = {
906                         .phy_config = &utmi_phy_config[2],
907                         .operating_mode = TEGRA_USB_HOST,
908                         .power_down_on_bus_suspend = 1,
909                         .hotplug = 1,
910                         .default_enable = true,
911         },
912 };
913
914 static struct tegra_otg_platform_data tegra_otg_pdata = {
915         .ehci_device = &tegra_ehci1_device,
916         .ehci_pdata = &tegra_ehci_pdata[0],
917 };
918
919 #ifdef CONFIG_USB_SUPPORT
920 static struct usb_phy_plat_data tegra_usb_phy_pdata[] = {
921         [0] = {
922                         .instance = 0,
923                         .vbus_gpio = -1,
924                         .vbus_reg_supply = "vdd_vbus_micro_usb",
925         },
926         [1] = {
927                         .instance = 1,
928                         .vbus_gpio = -1,
929         },
930         [2] = {
931                         .instance = 2,
932                         .vbus_gpio = -1,
933                         .vbus_reg_supply = "vdd_vbus_typea_usb",
934         },
935 };
936
937 static int cardhu_usb_hsic_postsupend(void)
938 {
939 #ifdef CONFIG_TEGRA_BB_XMM_POWER
940         baseband_xmm_set_power_status(BBXMM_PS_L2);
941 #endif
942         return 0;
943 }
944
945 static int cardhu_usb_hsic_preresume(void)
946 {
947 #ifdef CONFIG_TEGRA_BB_XMM_POWER
948         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
949 #endif
950         return 0;
951 }
952
953 static int cardhu_usb_hsic_phy_ready(void)
954 {
955 #ifdef CONFIG_TEGRA_BB_XMM_POWER
956         baseband_xmm_set_power_status(BBXMM_PS_L0);
957 #endif
958         return 0;
959 }
960
961 static int cardhu_usb_hsic_phy_off(void)
962 {
963 #ifdef CONFIG_TEGRA_BB_XMM_POWER
964         baseband_xmm_set_power_status(BBXMM_PS_L3);
965 #endif
966         return 0;
967 }
968
969 static void cardhu_usb_init(void)
970 {
971         struct board_info bi;
972
973         tegra_get_board_info(&bi);
974
975         tegra_usb_phy_init(tegra_usb_phy_pdata,
976                         ARRAY_SIZE(tegra_usb_phy_pdata));
977
978         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
979         platform_device_register(&tegra_otg_device);
980         if (bi.board_id == BOARD_PM267) {
981                 uhsic_phy_config.reset_gpio =
982                         PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
983                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
984                 platform_device_register(&tegra_ehci2_device);
985         } else if (bi.board_id == BOARD_E1256) {
986                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
987                 platform_device_register(&tegra_ehci2_device);
988         } else if (bi.board_id == BOARD_E1186) {
989                 /* for baseband devices do not switch off phy during suspend */
990                 tegra_ehci_uhsic_pdata.power_down_on_bus_suspend = 0;
991                 uhsic_phy_config.postsuspend = cardhu_usb_hsic_postsupend;
992                 uhsic_phy_config.preresume = cardhu_usb_hsic_preresume;
993                 uhsic_phy_config.usb_phy_ready = cardhu_usb_hsic_phy_ready;
994                 uhsic_phy_config.post_phy_off = cardhu_usb_hsic_phy_off;
995                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
996                 /* baseband registration happens in baseband-xmm-power  */
997         } else {
998                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_pdata[1];
999                 platform_device_register(&tegra_ehci2_device);
1000         }
1001
1002         tegra_ehci3_device.dev.platform_data = &tegra_ehci_pdata[2];
1003         platform_device_register(&tegra_ehci3_device);
1004
1005 }
1006 #else
1007 static void cardhu_usb_init(void) { }
1008 #endif
1009
1010 static void cardhu_gps_init(void)
1011 {
1012         tegra_gpio_enable(TEGRA_GPIO_PU2);
1013         tegra_gpio_enable(TEGRA_GPIO_PU3);
1014 }
1015
1016 static void cardhu_nfc_init(void)
1017 {
1018         tegra_gpio_enable(TEGRA_GPIO_PX0);
1019         tegra_gpio_enable(TEGRA_GPIO_PP3);
1020         tegra_gpio_enable(TEGRA_GPIO_PO7);
1021 }
1022
1023 static struct baseband_power_platform_data tegra_baseband_power_data = {
1024         .baseband_type = BASEBAND_XMM,
1025         .modem = {
1026         .xmm = {
1027                         .bb_rst = XMM_GPIO_BB_RST,
1028                         .bb_on = XMM_GPIO_BB_ON,
1029                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1030                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1031                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1032                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1033                         .hsic_device = &tegra_ehci2_device,
1034                 },
1035         },
1036 };
1037
1038 static struct platform_device tegra_baseband_power_device = {
1039         .name = "baseband_xmm_power",
1040         .id = -1,
1041         .dev = {
1042                 .platform_data = &tegra_baseband_power_data,
1043         },
1044 };
1045
1046 static struct platform_device tegra_baseband_power2_device = {
1047         .name = "baseband_xmm_power2",
1048         .id = -1,
1049         .dev = {
1050                 .platform_data = &tegra_baseband_power_data,
1051         },
1052 };
1053
1054
1055 static struct tegra_pci_platform_data cardhu_pci_platform_data = {
1056         .port_status[0] = 1,
1057         .port_status[1] = 1,
1058         .port_status[2] = 1,
1059         .use_dock_detect        = 0,
1060         .gpio           = 0,
1061 };
1062
1063 static void cardhu_pci_init(void)
1064 {
1065         struct board_info board_info;
1066
1067         tegra_get_board_info(&board_info);
1068         if (board_info.board_id == BOARD_E1291) {
1069                 cardhu_pci_platform_data.port_status[0] = 0;
1070                 cardhu_pci_platform_data.port_status[1] = 0;
1071                 cardhu_pci_platform_data.port_status[2] = 1;
1072                 cardhu_pci_platform_data.use_dock_detect = 1;
1073                 cardhu_pci_platform_data.gpio = DOCK_DETECT_GPIO;
1074         }
1075         if ((board_info.board_id == BOARD_E1186) ||
1076                 (board_info.board_id == BOARD_E1187) ||
1077                 (board_info.board_id == BOARD_E1291)) {
1078                 tegra_pci_device.dev.platform_data = &cardhu_pci_platform_data;
1079                 platform_device_register(&tegra_pci_device);
1080         }
1081 }
1082
1083 static void cardhu_modem_init(void)
1084 {
1085         struct board_info board_info;
1086         int w_disable_gpio, ret;
1087
1088         tegra_get_board_info(&board_info);
1089         switch (board_info.board_id) {
1090         case BOARD_E1291:
1091         case BOARD_E1198:
1092                 if (((board_info.board_id == BOARD_E1291) &&
1093                                 (board_info.fab < BOARD_FAB_A03)) ||
1094                         ((board_info.board_id == BOARD_E1198) &&
1095                                         (board_info.fab < BOARD_FAB_A02))) {
1096                         w_disable_gpio = TEGRA_GPIO_PH5;
1097                 } else {
1098                         w_disable_gpio = TEGRA_GPIO_PDD5;
1099                 }
1100                 tegra_gpio_enable(w_disable_gpio);
1101                 ret = gpio_request(w_disable_gpio, "w_disable_gpio");
1102                 if (ret < 0)
1103                         pr_err("%s: gpio_request failed for gpio %d\n",
1104                                 __func__, w_disable_gpio);
1105                 else
1106                         gpio_direction_input(w_disable_gpio);
1107
1108                 /* E1291-A04 & E1198:A02: Set PERST signal to high */
1109                 if (((board_info.board_id == BOARD_E1291) &&
1110                                 (board_info.fab >= BOARD_FAB_A04)) ||
1111                         ((board_info.board_id == BOARD_E1198) &&
1112                                         (board_info.fab >= BOARD_FAB_A02))) {
1113                         ret = gpio_request(TEGRA_GPIO_PH7, "modem_perst");
1114                         if (ret < 0) {
1115                                 pr_err("%s(): Error in allocating gpio "
1116                                         "TEGRA_GPIO_PH7\n", __func__);
1117                                 break;
1118                         }
1119                         gpio_direction_output(TEGRA_GPIO_PH7, 1);
1120                         tegra_gpio_enable(TEGRA_GPIO_PH7);
1121                 }
1122                 break;
1123         case BOARD_E1186:
1124                 tegra_gpio_enable(
1125                         tegra_baseband_power_data.modem.xmm.bb_rst);
1126                 tegra_gpio_enable(
1127                         tegra_baseband_power_data.modem.xmm.bb_on);
1128                 tegra_gpio_enable(
1129                         tegra_baseband_power_data.modem.xmm.ipc_bb_wake);
1130                 tegra_gpio_enable(
1131                         tegra_baseband_power_data.modem.xmm.ipc_ap_wake);
1132                 tegra_gpio_enable(
1133                         tegra_baseband_power_data.modem.xmm.ipc_hsic_active);
1134                 tegra_gpio_enable(
1135                         tegra_baseband_power_data.modem.xmm.ipc_hsic_sus_req);
1136                 platform_device_register(&tegra_baseband_power_device);
1137                 platform_device_register(&tegra_baseband_power2_device);
1138                 break;
1139         default:
1140                 break;
1141         }
1142
1143 }
1144
1145 #ifdef CONFIG_SATA_AHCI_TEGRA
1146 static void cardhu_sata_init(void)
1147 {
1148         platform_device_register(&tegra_sata_device);
1149 }
1150 #else
1151 static void cardhu_sata_init(void) { }
1152 #endif
1153
1154 static void __init tegra_cardhu_init(void)
1155 {
1156         tegra_thermal_init(&thermal_data);
1157         tegra_clk_init_from_table(cardhu_clk_init_table);
1158         cardhu_pinmux_init();
1159         cardhu_i2c_init();
1160         cardhu_spi_init();
1161         cardhu_usb_init();
1162 #ifdef CONFIG_TEGRA_EDP_LIMITS
1163         cardhu_edp_init();
1164 #endif
1165         cardhu_uart_init();
1166         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
1167         tegra_ram_console_debug_init();
1168         cardhu_sdhci_init();
1169         cardhu_regulator_init();
1170         cardhu_dtv_init();
1171         cardhu_suspend_init();
1172         cardhu_touch_init();
1173         cardhu_gps_init();
1174         cardhu_modem_init();
1175         cardhu_kbc_init();
1176         cardhu_scroll_init();
1177         cardhu_keys_init();
1178         cardhu_panel_init();
1179         cardhu_pmon_init();
1180         cardhu_sensors_init();
1181         cardhu_setup_bluesleep();
1182         cardhu_sata_init();
1183         //audio_wired_jack_init();
1184         cardhu_pins_state_init();
1185         cardhu_emc_init();
1186         tegra_release_bootloader_fb();
1187         cardhu_nfc_init();
1188         cardhu_pci_init();
1189 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1190         tegra_wdt_recovery_init();
1191 #endif
1192 }
1193
1194 static void __init tegra_cardhu_reserve(void)
1195 {
1196 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1197         /* support 1920X1200 with 24bpp */
1198         tegra_reserve(0, SZ_8M + SZ_1M, SZ_8M + SZ_1M);
1199 #else
1200         tegra_reserve(SZ_128M, SZ_8M, SZ_8M);
1201 #endif
1202         tegra_ram_console_debug_reserve(SZ_1M);
1203 }
1204
1205 MACHINE_START(CARDHU, "cardhu")
1206         .boot_params    = 0x80000100,
1207         .map_io         = tegra_map_common_io,
1208         .reserve        = tegra_cardhu_reserve,
1209         .init_early     = tegra_init_early,
1210         .init_irq       = tegra_init_irq,
1211         .timer          = &tegra_timer,
1212         .init_machine   = tegra_cardhu_init,
1213 MACHINE_END