[tegra-usb] otg: Enabling OTG mode on USB1 port
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <mach/clk.h>
37 #include <mach/iomap.h>
38 #include <mach/irqs.h>
39 #include <mach/pinmux.h>
40 #include <mach/iomap.h>
41 #include <mach/io.h>
42 #include <mach/i2s.h>
43 #include <mach/audio.h>
44 #include <asm/mach-types.h>
45 #include <asm/mach/arch.h>
46 #include <mach/usb_phy.h>
47
48 #include "board.h"
49 #include "clock.h"
50 #include "board-cardhu.h"
51 #include "devices.h"
52 #include "gpio-names.h"
53 #include "fuse.h"
54
55 #define ENABLE_USB_HOST 0
56
57 static struct plat_serial8250_port debug_uart_platform_data[] = {
58         {
59                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
60                 .mapbase        = TEGRA_UARTA_BASE,
61                 .irq            = INT_UARTA,
62                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
63                 .type           = PORT_TEGRA,
64                 .iotype         = UPIO_MEM,
65                 .regshift       = 2,
66                 .uartclk        = 216000000,
67         }, {
68                 .flags          = 0,
69         }
70 };
71
72 static struct platform_device debug_uart = {
73         .name = "serial8250",
74         .id = PLAT8250_DEV_PLATFORM,
75         .dev = {
76                 .platform_data = debug_uart_platform_data,
77         },
78 };
79
80 /* !!!TODO: Change for cardhu (Taken from Ventana) */
81 static struct tegra_utmip_config utmi_phy_config[] = {
82         [0] = {
83                         .hssync_start_delay = 0,
84                         .idle_wait_delay = 17,
85                         .elastic_limit = 16,
86                         .term_range_adj = 6,
87                         .xcvr_setup = 15,
88                         .xcvr_lsfslew = 2,
89                         .xcvr_lsrslew = 2,
90         },
91         [1] = {
92                         .hssync_start_delay = 0,
93                         .idle_wait_delay = 17,
94                         .elastic_limit = 16,
95                         .term_range_adj = 6,
96                         .xcvr_setup = 8,
97                         .xcvr_lsfslew = 2,
98                         .xcvr_lsrslew = 2,
99         },
100 };
101
102 /* !!!TODO: Change for cardhu (Taken from Ventana) */
103 static struct tegra_ulpi_config ulpi_phy_config = {
104         /* !!!TODO!!! CABLE DETECT? if so GPIO_PC7 on cardhu */
105         .reset_gpio = TEGRA_GPIO_PG2,
106         .clk = "clk_dev2",
107 };
108
109 #ifdef CONFIG_BCM4329_RFKILL
110 static struct resource cardhu_bcm4329_rfkill_resources[] = {
111         {
112                 .name   = "bcm4329_nreset_gpio",
113                 .start  = TEGRA_GPIO_PU0,
114                 .end    = TEGRA_GPIO_PU0,
115                 .flags  = IORESOURCE_IO,
116         },
117         {
118                 .name   = "bcm4329_nshutdown_gpio",
119                 .start  = TEGRA_GPIO_PK2,
120                 .end    = TEGRA_GPIO_PK2,
121                 .flags  = IORESOURCE_IO,
122         },
123 };
124
125 static struct platform_device cardhu_bcm4329_rfkill_device = {
126         .name = "bcm4329_rfkill",
127         .id             = -1,
128         .num_resources  = ARRAY_SIZE(cardhu_bcm4329_rfkill_resources),
129         .resource       = cardhu_bcm4329_rfkill_resources,
130 };
131
132 static noinline void __init cardhu_bt_rfkill(void)
133 {
134         /*Add Clock Resource*/
135         clk_add_alias("bcm4329_32k_clk", cardhu_bcm4329_rfkill_device.name, \
136                                 "blink", NULL);
137
138         platform_device_register(&cardhu_bcm4329_rfkill_device);
139
140         return;
141 }
142 #else
143 static inline void cardhu_bt_rfkill(void) { }
144 #endif
145
146 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
147         /* name         parent          rate            enabled */
148         { "uarta",      "pll_p",        216000000,      true},
149         { "uartb",      "clk_m",        13000000,       true},
150         { "uartc",      "clk_m",        13000000,       true},
151         { "uartd",      "clk_m",        13000000,       true},
152         { "uarte",      "clk_m",        13000000,       true},
153         { "pll_m",      NULL,           0,              true},
154         { "pll_p_out4", "pll_p",        24000000,       true },
155         { "pwm",        "clk_32k",      32768,          false},
156         { "blink",      "clk_32k",      32768,          true},
157         { "pll_a",      NULL,           56448000,       true},
158         { "pll_a_out0", NULL,           11289600,       true},
159         { "i2s1",       "pll_a_out0",   11289600,       true},
160         { "i2s2",       "pll_a_out0",   11289600,       true},
161         { "audio",      "pll_a_out0",   11289600,       true},
162         { "audio_2x",   "audio",        22579200,       true},
163         { "sdmmc3",     "clk_m",        12000000,       true},
164         { NULL,         NULL,           0,              0},
165 };
166
167 static struct tegra_ulpi_config cardhu_ehci2_ulpi_phy_config = {
168         .reset_gpio = TEGRA_GPIO_PV1,
169         .clk = "clk_dev2",
170 };
171
172 static struct tegra_ehci_platform_data cardhu_ehci2_ulpi_platform_data = {
173         .operating_mode = TEGRA_USB_HOST,
174         .power_down_on_bus_suspend = 0,
175         .phy_config = &cardhu_ehci2_ulpi_phy_config,
176 };
177
178 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
179         .adapter_nr     = 0,
180         .bus_count      = 1,
181         .bus_clk_rate   = { 100000, 0 },
182 };
183
184 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
185         .adapter_nr     = 1,
186         .bus_count      = 1,
187         .bus_clk_rate   = { 100000, 0 },
188 };
189
190 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
191         .adapter_nr     = 2,
192         .bus_count      = 1,
193         .bus_clk_rate   = { 100000, 0 },
194 };
195
196 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
197         .adapter_nr     = 3,
198         .bus_count      = 1,
199         .bus_clk_rate   = { 100000, 0 },
200 };
201
202 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
203         .adapter_nr     = 4,
204         .bus_count      = 1,
205         .bus_clk_rate   = { 100000, 0 },
206 };
207
208
209 static void cardhu_i2c_init(void)
210 {
211         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
212         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
213         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
214         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
215         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
216
217         platform_device_register(&tegra_i2c_device5);
218         platform_device_register(&tegra_i2c_device4);
219         platform_device_register(&tegra_i2c_device3);
220         platform_device_register(&tegra_i2c_device2);
221         platform_device_register(&tegra_i2c_device1);
222 }
223
224 static struct resource tegra_rtc_resources[] = {
225         [0] = {
226                 .start = TEGRA_RTC_BASE,
227                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
228                 .flags = IORESOURCE_MEM,
229         },
230         [1] = {
231                 .start = INT_RTC,
232                 .end = INT_RTC,
233                 .flags = IORESOURCE_IRQ,
234         },
235 };
236
237 static struct platform_device tegra_rtc_device = {
238         .name = "tegra_rtc",
239         .id   = -1,
240         .resource = tegra_rtc_resources,
241         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
242 };
243
244 static struct platform_device *cardhu_devices[] __initdata = {
245         &tegra_otg_device,
246         &debug_uart,
247         &tegra_uartb_device,
248         &tegra_uartc_device,
249         &tegra_uartd_device,
250         &tegra_uarte_device,
251         &pmu_device,
252         &tegra_rtc_device,
253         &tegra_udc_device,
254 #if ENABLE_USB_HOST
255         &tegra_ehci2_device,
256 #endif
257 #if defined(CONFIG_TEGRA_IOVMM_SMMU)
258         &tegra_smmu_device,
259 #endif
260         &tegra_wdt_device,
261         &tegra_avp_device,
262 };
263
264 static int __init cardhu_touch_init(void)
265 {
266         return 0;
267 }
268
269
270 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
271         [0] = {
272                         .phy_config = &utmi_phy_config[0],
273                         .operating_mode = TEGRA_USB_HOST,
274                         .power_down_on_bus_suspend = 0,
275         },
276         [1] = {
277                         .phy_config = &ulpi_phy_config,
278                         .operating_mode = TEGRA_USB_HOST,
279                         .power_down_on_bus_suspend = 1,
280         },
281         [2] = {
282                         .phy_config = &utmi_phy_config[1],
283                         .operating_mode = TEGRA_USB_HOST,
284                         .power_down_on_bus_suspend = 0,
285         },
286 };
287
288 #if ENABLE_USB_HOST
289 static void cardhu_usb_init(void)
290 {
291         tegra_ehci3_device.dev.platform_data = &tegra_ehci_pdata[2];
292         platform_device_register(&tegra_ehci3_device);
293 }
294 #endif
295
296 struct platform_device *tegra_usb_otg_host_register(void)
297 {
298         struct platform_device *pdev;
299         void *platform_data;
300         int val;
301
302         pdev = platform_device_alloc(tegra_ehci1_device.name,
303                 tegra_ehci1_device.id);
304         if (!pdev)
305                 return NULL;
306
307         val = platform_device_add_resources(pdev, tegra_ehci1_device.resource,
308                 tegra_ehci1_device.num_resources);
309         if (val)
310                 goto error;
311
312         pdev->dev.dma_mask =  tegra_ehci1_device.dev.dma_mask;
313         pdev->dev.coherent_dma_mask = tegra_ehci1_device.dev.coherent_dma_mask;
314
315         platform_data = kmalloc(sizeof(struct tegra_ehci_platform_data),
316                 GFP_KERNEL);
317         if (!platform_data)
318                 goto error;
319
320         memcpy(platform_data, &tegra_ehci_pdata[0],
321                                 sizeof(struct tegra_ehci_platform_data));
322         pdev->dev.platform_data = platform_data;
323
324         val = platform_device_add(pdev);
325         if (val)
326                 goto error_add;
327
328         return pdev;
329
330 error_add:
331         kfree(platform_data);
332 error:
333         pr_err("%s: failed to add the host contoller device\n", __func__);
334         platform_device_put(pdev);
335         return NULL;
336 }
337
338 void tegra_usb_otg_host_unregister(struct platform_device *pdev)
339 {
340         platform_device_unregister(pdev);
341 }
342
343
344 #ifdef CONFIG_SATA_AHCI_TEGRA
345 static void cardhu_sata_init(void)
346 {
347         platform_device_register(&tegra_sata_device);
348 }
349 #else
350 static void cardhu_sata_init(void) { }
351 #endif
352
353 static void __init tegra_cardhu_init(void)
354 {
355         tegra_common_init();
356         tegra_clk_init_from_table(cardhu_clk_init_table);
357         cardhu_pinmux_init();
358
359         tegra_ehci2_device.dev.platform_data
360                 = &cardhu_ehci2_ulpi_platform_data;
361         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
362
363         cardhu_sdhci_init();
364         cardhu_i2c_init();
365         cardhu_regulator_init();
366         cardhu_gpio_switch_regulator_init();
367         cardhu_suspend_init();
368         cardhu_touch_init();
369 #if ENABLE_USB_HOST
370         cardhu_usb_init();
371 #endif
372
373 #ifdef CONFIG_KEYBOARD_TEGRA
374         cardhu_kbc_init();
375 #endif
376
377 #ifdef CONFIG_INPUT_ALPS_GPIO_SCROLLWHEEL
378         cardhu_scroll_init();
379 #endif
380
381 #ifdef CONFIG_KEYBOARD_GPIO
382         cardhu_keys_init();
383 #endif
384
385         cardhu_panel_init();
386         cardhu_sensors_init();
387         cardhu_bt_rfkill();
388         cardhu_sata_init();
389 }
390
391 static void __init tegra_cardhu_reserve(void)
392 {
393         tegra_reserve(SZ_128M, SZ_4M, SZ_8M);
394 }
395
396 MACHINE_START(CARDHU, "cardhu")
397         .boot_params    = 0x80000100,
398         .phys_io        = IO_APB_PHYS,
399         .io_pg_offst    = ((IO_APB_VIRT) >> 18) & 0xfffc,
400         .init_irq       = tegra_init_irq,
401         .init_machine   = tegra_cardhu_init,
402         .map_io         = tegra_map_common_io,
403         .reserve        = tegra_cardhu_reserve,
404         .timer          = &tegra_timer,
405 MACHINE_END