arm: thermal: Removed nonTEGRA_THERMAL_SYSFS logic
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <linux/spi/spi.h>
37 #include <linux/i2c/atmel_mxt_ts.h>
38 #include <linux/tegra_uart.h>
39 #include <linux/memblock.h>
40 #include <linux/spi-tegra.h>
41 #include <linux/nfc/pn544.h>
42
43 #include <sound/wm8903.h>
44 #include <sound/max98095.h>
45 #include <media/tegra_dtv.h>
46
47 #include <mach/clk.h>
48 #include <mach/iomap.h>
49 #include <mach/irqs.h>
50 #include <mach/pinmux.h>
51 #include <mach/iomap.h>
52 #include <mach/io.h>
53 #include <mach/i2s.h>
54 #include <mach/tegra_asoc_pdata.h>
55 #include <mach/tegra_wm8903_pdata.h>
56 #include <asm/mach-types.h>
57 #include <asm/mach/arch.h>
58 #include <mach/usb_phy.h>
59 #include <mach/thermal.h>
60 #include <mach/pci.h>
61
62 #include "board.h"
63 #include "clock.h"
64 #include "board-cardhu.h"
65 #include "board-touch.h"
66 #include "devices.h"
67 #include "gpio-names.h"
68 #include "fuse.h"
69 #include "pm.h"
70 #include "baseband-xmm-power.h"
71 #include "wdt-recovery.h"
72
73 /* All units are in millicelsius */
74 static struct tegra_thermal_data thermal_data = {
75         .temp_shutdown = 90000,
76         .temp_offset = TDIODE_OFFSET, /* temps based on tdiode */
77 #ifdef CONFIG_TEGRA_EDP_LIMITS
78         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
79         .hysteresis_edp = 3000,
80 #endif
81 #ifdef CONFIG_TEGRA_THERMAL_THROTTLE
82         .temp_throttle = 85000,
83         .tc1 = 0,
84         .tc2 = 1,
85         .passive_delay = 2000,
86 #endif
87 };
88
89 /* !!!TODO: Change for cardhu (Taken from Ventana) */
90 static struct tegra_utmip_config utmi_phy_config[] = {
91         [0] = {
92                         .hssync_start_delay = 0,
93                         .idle_wait_delay = 17,
94                         .elastic_limit = 16,
95                         .term_range_adj = 6,
96                         .xcvr_setup = 15,
97                         .xcvr_setup_offset = 0,
98                         .xcvr_use_fuses = 1,
99                         .xcvr_lsfslew = 2,
100                         .xcvr_lsrslew = 2,
101         },
102         [1] = {
103                         .hssync_start_delay = 0,
104                         .idle_wait_delay = 17,
105                         .elastic_limit = 16,
106                         .term_range_adj = 6,
107                         .xcvr_setup = 15,
108                         .xcvr_setup_offset = 0,
109                         .xcvr_use_fuses = 1,
110                         .xcvr_lsfslew = 2,
111                         .xcvr_lsrslew = 2,
112         },
113         [2] = {
114                         .hssync_start_delay = 0,
115                         .idle_wait_delay = 17,
116                         .elastic_limit = 16,
117                         .term_range_adj = 6,
118                         .xcvr_setup = 8,
119                         .xcvr_setup_offset = 0,
120                         .xcvr_use_fuses = 1,
121                         .xcvr_lsfslew = 2,
122                         .xcvr_lsrslew = 2,
123         },
124 };
125
126 static struct resource cardhu_bcm4329_rfkill_resources[] = {
127         {
128                 .name   = "bcm4329_nshutdown_gpio",
129                 .start  = TEGRA_GPIO_PU0,
130                 .end    = TEGRA_GPIO_PU0,
131                 .flags  = IORESOURCE_IO,
132         },
133 };
134
135 static struct platform_device cardhu_bcm4329_rfkill_device = {
136         .name = "bcm4329_rfkill",
137         .id             = -1,
138         .num_resources  = ARRAY_SIZE(cardhu_bcm4329_rfkill_resources),
139         .resource       = cardhu_bcm4329_rfkill_resources,
140 };
141
142 static struct resource cardhu_bluesleep_resources[] = {
143         [0] = {
144                 .name = "gpio_host_wake",
145                         .start  = TEGRA_GPIO_PU6,
146                         .end    = TEGRA_GPIO_PU6,
147                         .flags  = IORESOURCE_IO,
148         },
149         [1] = {
150                 .name = "gpio_ext_wake",
151                         .start  = TEGRA_GPIO_PU1,
152                         .end    = TEGRA_GPIO_PU1,
153                         .flags  = IORESOURCE_IO,
154         },
155         [2] = {
156                 .name = "host_wake",
157                         .start  = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PU6),
158                         .end    = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PU6),
159                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
160         },
161 };
162
163 static struct platform_device cardhu_bluesleep_device = {
164         .name           = "bluesleep",
165         .id             = -1,
166         .num_resources  = ARRAY_SIZE(cardhu_bluesleep_resources),
167         .resource       = cardhu_bluesleep_resources,
168 };
169
170 static noinline void __init cardhu_setup_bluesleep(void)
171 {
172         platform_device_register(&cardhu_bluesleep_device);
173         tegra_gpio_enable(TEGRA_GPIO_PU6);
174         tegra_gpio_enable(TEGRA_GPIO_PU1);
175         return;
176 }
177
178 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
179         /* name         parent          rate            enabled */
180         { "pll_m",      NULL,           0,              false},
181         { "hda",        "pll_p",        108000000,      false},
182         { "hda2codec_2x","pll_p",       48000000,       false},
183         { "pwm",        "pll_p",        3187500,        false},
184         { "blink",      "clk_32k",      32768,          true},
185         { "i2s0",       "pll_a_out0",   0,              false},
186         { "i2s1",       "pll_a_out0",   0,              false},
187         { "i2s3",       "pll_a_out0",   0,              false},
188         { "spdif_out",  "pll_a_out0",   0,              false},
189         { "d_audio",    "clk_m",        12000000,       false},
190         { "dam0",       "clk_m",        12000000,       false},
191         { "dam1",       "clk_m",        12000000,       false},
192         { "dam2",       "clk_m",        12000000,       false},
193         { "audio1",     "i2s1_sync",    0,              false},
194         { "audio3",     "i2s3_sync",    0,              false},
195         { "vi_sensor",  "pll_p",        150000000,      false},
196         { "i2c1",       "pll_p",        3200000,        false},
197         { "i2c2",       "pll_p",        3200000,        false},
198         { "i2c3",       "pll_p",        3200000,        false},
199         { "i2c4",       "pll_p",        3200000,        false},
200         { "i2c5",       "pll_p",        3200000,        false},
201         { NULL,         NULL,           0,              0},
202 };
203
204 static struct pn544_i2c_platform_data nfc_pdata = {
205         .irq_gpio = TEGRA_GPIO_PX0,
206         .ven_gpio = TEGRA_GPIO_PP3,
207         .firm_gpio = TEGRA_GPIO_PO7,
208         };
209
210 static struct i2c_board_info __initdata cardhu_i2c_bus3_board_info[] = {
211         {
212                 I2C_BOARD_INFO("pn544", 0x28),
213                 .platform_data = &nfc_pdata,
214                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PX0),
215         },
216 };
217 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
218         .adapter_nr     = 0,
219         .bus_count      = 1,
220         .bus_clk_rate   = { 100000, 0 },
221         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
222         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
223         .arb_recovery = arb_lost_recovery,
224 };
225
226 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
227         .adapter_nr     = 1,
228         .bus_count      = 1,
229         .bus_clk_rate   = { 400000, 0 },
230         .is_clkon_always = true,
231         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
232         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
233         .arb_recovery = arb_lost_recovery,
234 };
235
236 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
237         .adapter_nr     = 2,
238         .bus_count      = 1,
239         .bus_clk_rate   = { 100000, 0 },
240         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
241         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
242         .arb_recovery = arb_lost_recovery,
243 };
244
245 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
246         .adapter_nr     = 3,
247         .bus_count      = 1,
248         .bus_clk_rate   = { 10000, 0 },
249         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
250         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
251         .arb_recovery = arb_lost_recovery,
252 };
253
254 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
255         .adapter_nr     = 4,
256         .bus_count      = 1,
257         .bus_clk_rate   = { 400000, 0 },
258         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
259         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
260         .arb_recovery = arb_lost_recovery,
261 };
262
263
264 #if 0
265 struct tegra_wired_jack_conf audio_wr_jack_conf = {
266         .hp_det_n = TEGRA_GPIO_PW2,
267         .en_mic_ext = TEGRA_GPIO_PX1,
268         .en_mic_int = TEGRA_GPIO_PX0,
269 };
270 #endif
271
272 static struct wm8903_platform_data cardhu_wm8903_pdata = {
273         .irq_active_low = 0,
274         .micdet_cfg = 0,
275         .micdet_delay = 100,
276         .gpio_base = CARDHU_GPIO_WM8903(0),
277         .gpio_cfg = {
278                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP1_FN_SHIFT),
279                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP2_FN_SHIFT) |
280                         WM8903_GP2_DIR,
281                 0,
282                 WM8903_GPIO_NO_CONFIG,
283                 WM8903_GPIO_NO_CONFIG,
284         },
285 };
286
287 /* Equalizer filter coefs generated from the MAXIM MAX98095
288  * evkit software tool */
289 static struct max98095_eq_cfg max98095_eq_cfg[] = {
290         {
291                 .name = "FLAT",
292                 .rate = 44100,
293                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
294                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
295                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
296                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
297                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
298         },
299         {
300                 .name = "LOWPASS1K",
301                 .rate = 44100,
302                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
303                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
304                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
305                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
306                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
307         },
308         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
309                 .name = "HIBOOST",
310                 .rate = 44100,
311                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
312                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
313                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
314                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
315                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
316         },
317         { /* BASS=12dB, TREBLE=+12dB */
318                 .name = "LOUD12DB",
319                 .rate = 44100,
320                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
321                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
322                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
323                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
324                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
325         },
326         {
327                 .name = "FLAT",
328                 .rate = 16000,
329                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
330                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
331                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
332                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
333                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
334         },
335         {
336                 .name = "LOWPASS1K",
337                 .rate = 16000,
338                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
339                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
340                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
341                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
342                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
343         },
344         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
345                 .name = "HIBOOST",
346                 .rate = 16000,
347                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
348                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
349                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
350                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
351                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
352         },
353         { /* BASS=12dB, TREBLE=+12dB */
354                 .name = "LOUD12DB",
355                 .rate = 16000,
356                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
357                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
358                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
359                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
360                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
361         },
362 };
363
364 static struct max98095_pdata cardhu_max98095_pdata = {
365         /* equalizer configuration */
366         .eq_cfg = max98095_eq_cfg,
367         .eq_cfgcnt = ARRAY_SIZE(max98095_eq_cfg),
368
369         /* Biquad filter response configuration */
370         .bq_cfg = NULL,
371         .bq_cfgcnt = 0,
372
373         /* microphone configuration */
374         .digmic_left_mode = 1,
375         .digmic_right_mode = 1,
376 };
377
378 static struct i2c_board_info __initdata cardhu_codec_wm8903_info = {
379         I2C_BOARD_INFO("wm8903", 0x1a),
380         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
381         .platform_data = &cardhu_wm8903_pdata,
382 };
383
384 static struct i2c_board_info __initdata cardhu_codec_aic326x_info = {
385         I2C_BOARD_INFO("aic3262-codec", 0x18),
386         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
387 };
388
389 static struct i2c_board_info __initdata cardhu_codec_max98095_info = {
390         I2C_BOARD_INFO("max98095", 0x10),
391         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
392         .platform_data = &cardhu_max98095_pdata,
393 };
394
395 static void cardhu_i2c_init(void)
396 {
397         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
398         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
399         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
400         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
401         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
402
403         platform_device_register(&tegra_i2c_device5);
404         platform_device_register(&tegra_i2c_device4);
405         platform_device_register(&tegra_i2c_device3);
406         platform_device_register(&tegra_i2c_device2);
407         platform_device_register(&tegra_i2c_device1);
408
409         i2c_register_board_info(4, &cardhu_codec_wm8903_info, 1);
410         i2c_register_board_info(4, &cardhu_codec_max98095_info, 1);
411         i2c_register_board_info(4, &cardhu_codec_aic326x_info, 1);
412
413         i2c_register_board_info(2, cardhu_i2c_bus3_board_info, 1);
414 }
415
416 static struct platform_device *cardhu_uart_devices[] __initdata = {
417         &tegra_uarta_device,
418         &tegra_uartb_device,
419         &tegra_uartc_device,
420         &tegra_uartd_device,
421         &tegra_uarte_device,
422 };
423 static struct uart_clk_parent uart_parent_clk[] = {
424         [0] = {.name = "clk_m"},
425         [1] = {.name = "pll_p"},
426 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
427         [2] = {.name = "pll_m"},
428 #endif
429 };
430
431 static struct tegra_uart_platform_data cardhu_uart_pdata;
432 static struct tegra_uart_platform_data cardhu_loopback_uart_pdata;
433
434 static void __init uart_debug_init(void)
435 {
436         struct board_info board_info;
437         int debug_port_id;
438
439         tegra_get_board_info(&board_info);
440
441         debug_port_id = get_tegra_uart_debug_port_id();
442         if (debug_port_id < 0) {
443                 debug_port_id = 0;
444                         /* UARTB is debug port
445                          *       for SLT - E1186/E1187/PM269
446                          *       for E1256/E1257
447                          */
448                 if (((board_info.sku & SKU_SLT_ULPI_SUPPORT) &&
449                         ((board_info.board_id == BOARD_E1186) ||
450                         (board_info.board_id == BOARD_E1187) ||
451                         (board_info.board_id == BOARD_PM269))) ||
452                         (board_info.board_id == BOARD_E1256) ||
453                         (board_info.board_id == BOARD_E1257))
454                                 debug_port_id = 1;
455         }
456
457         switch (debug_port_id) {
458         case 0:
459                 /* UARTA is the debug port. */
460                 pr_info("Selecting UARTA as the debug console\n");
461                 cardhu_uart_devices[0] = &debug_uarta_device;
462                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
463                 debug_uart_port_base = ((struct plat_serial8250_port *)(
464                         debug_uarta_device.dev.platform_data))->mapbase;
465                 break;
466
467         case 1:
468                 /* UARTB is the debug port. */
469                 pr_info("Selecting UARTB as the debug console\n");
470                 cardhu_uart_devices[1] = &debug_uartb_device;
471                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartb");
472                 debug_uart_port_base = ((struct plat_serial8250_port *)(
473                         debug_uartb_device.dev.platform_data))->mapbase;
474                 break;
475
476         case 2:
477                 /* UARTC is the debug port. */
478                 pr_info("Selecting UARTC as the debug console\n");
479                 cardhu_uart_devices[2] = &debug_uartc_device;
480                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartc");
481                 debug_uart_port_base = ((struct plat_serial8250_port *)(
482                         debug_uartc_device.dev.platform_data))->mapbase;
483                 break;
484
485         case 3:
486                 /* UARTD is the debug port. */
487                 pr_info("Selecting UARTD as the debug console\n");
488                 cardhu_uart_devices[3] = &debug_uartd_device;
489                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartd");
490                 debug_uart_port_base = ((struct plat_serial8250_port *)(
491                         debug_uartd_device.dev.platform_data))->mapbase;
492                 break;
493
494         case 4:
495                 /* UARTE is the debug port. */
496                 pr_info("Selecting UARTE as the debug console\n");
497                 cardhu_uart_devices[4] = &debug_uarte_device;
498                 debug_uart_clk =  clk_get_sys("serial8250.0", "uarte");
499                 debug_uart_port_base = ((struct plat_serial8250_port *)(
500                         debug_uarte_device.dev.platform_data))->mapbase;
501                 break;
502
503         default:
504                 pr_info("The debug console id %d is invalid, Assuming UARTA", debug_port_id);
505                 cardhu_uart_devices[0] = &debug_uarta_device;
506                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
507                 debug_uart_port_base = ((struct plat_serial8250_port *)(
508                         debug_uarta_device.dev.platform_data))->mapbase;
509                 break;
510         }
511         return;
512 }
513
514 static void __init cardhu_uart_init(void)
515 {
516         struct clk *c;
517         int i;
518
519         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
520                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
521                 if (IS_ERR_OR_NULL(c)) {
522                         pr_err("Not able to get the clock for %s\n",
523                                                 uart_parent_clk[i].name);
524                         continue;
525                 }
526                 uart_parent_clk[i].parent_clk = c;
527                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
528         }
529         cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
530         cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
531         cardhu_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
532         cardhu_loopback_uart_pdata.parent_clk_count =
533                                                 ARRAY_SIZE(uart_parent_clk);
534         cardhu_loopback_uart_pdata.is_loopback = true;
535         tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
536         tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
537         tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
538         tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
539         /* UARTE is used for loopback test purpose */
540         tegra_uarte_device.dev.platform_data = &cardhu_loopback_uart_pdata;
541
542         /* Register low speed only if it is selected */
543         if (!is_tegra_debug_uartport_hs()) {
544                 uart_debug_init();
545                 /* Clock enable for the debug channel */
546                 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
547                         pr_info("The debug console clock name is %s\n",
548                                                 debug_uart_clk->name);
549                         c = tegra_get_clock_by_name("pll_p");
550                         if (IS_ERR_OR_NULL(c))
551                                 pr_err("Not getting the parent clock pll_p\n");
552                         else
553                                 clk_set_parent(debug_uart_clk, c);
554
555                         clk_enable(debug_uart_clk);
556                         clk_set_rate(debug_uart_clk, clk_get_rate(c));
557                 } else {
558                         pr_err("Not getting the clock %s for debug console\n",
559                                         debug_uart_clk->name);
560                 }
561         }
562
563         platform_add_devices(cardhu_uart_devices,
564                                 ARRAY_SIZE(cardhu_uart_devices));
565 }
566
567 static struct platform_device tegra_camera = {
568         .name = "tegra_camera",
569         .id = -1,
570 };
571
572 static struct platform_device *cardhu_spi_devices[] __initdata = {
573         &tegra_spi_device4,
574 };
575
576 static struct platform_device *touch_spi_device[] __initdata = {
577         &tegra_spi_device1,
578 };
579
580 struct spi_clk_parent spi_parent_clk[] = {
581         [0] = {.name = "pll_p"},
582 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
583         [1] = {.name = "pll_m"},
584         [2] = {.name = "clk_m"},
585 #else
586         [1] = {.name = "clk_m"},
587 #endif
588 };
589
590 static struct tegra_spi_platform_data cardhu_spi_pdata = {
591         .is_dma_based           = true,
592         .max_dma_buffer         = (16 * 1024),
593         .is_clkon_always        = false,
594         .max_rate               = 100000000,
595 };
596
597 static void __init cardhu_spi_init(void)
598 {
599         int i;
600         struct clk *c;
601         struct board_info board_info, display_board_info;
602
603         tegra_get_board_info(&board_info);
604         tegra_get_display_board_info(&display_board_info);
605
606         for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
607                 c = tegra_get_clock_by_name(spi_parent_clk[i].name);
608                 if (IS_ERR_OR_NULL(c)) {
609                         pr_err("Not able to get the clock for %s\n",
610                                                 spi_parent_clk[i].name);
611                         continue;
612                 }
613                 spi_parent_clk[i].parent_clk = c;
614                 spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
615         }
616         cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
617         cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
618         tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
619         platform_add_devices(cardhu_spi_devices,
620                                 ARRAY_SIZE(cardhu_spi_devices));
621
622         if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
623                 platform_add_devices(touch_spi_device,
624                                 ARRAY_SIZE(touch_spi_device));
625         }
626         if (board_info.board_id == BOARD_E1198) {
627                 tegra_spi_device2.dev.platform_data = &cardhu_spi_pdata;
628                 platform_device_register(&tegra_spi_device2);
629                 tegra_spi_slave_device1.dev.platform_data = &cardhu_spi_pdata;
630                 platform_device_register(&tegra_spi_slave_device1);
631         }
632 }
633
634 static void __init cardhu_dtv_init(void)
635 {
636         struct board_info board_info;
637
638         tegra_get_board_info(&board_info);
639
640         if (board_info.board_id == BOARD_E1186)
641                 platform_device_register(&tegra_dtv_device);
642 }
643
644 static struct resource tegra_rtc_resources[] = {
645         [0] = {
646                 .start = TEGRA_RTC_BASE,
647                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
648                 .flags = IORESOURCE_MEM,
649         },
650         [1] = {
651                 .start = INT_RTC,
652                 .end = INT_RTC,
653                 .flags = IORESOURCE_IRQ,
654         },
655 };
656
657 static struct platform_device tegra_rtc_device = {
658         .name = "tegra_rtc",
659         .id   = -1,
660         .resource = tegra_rtc_resources,
661         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
662 };
663
664 static struct tegra_wm8903_platform_data cardhu_audio_wm8903_pdata = {
665         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
666         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
667         .gpio_hp_mute           = -1,
668         .gpio_int_mic_en        = -1,
669         .gpio_ext_mic_en        = -1,
670 };
671
672 static struct tegra_asoc_platform_data cardhu_audio_max98095_pdata = {
673         .gpio_spkr_en           = -1,
674         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
675         .gpio_hp_mute           = -1,
676         .gpio_int_mic_en        = -1,
677         .gpio_ext_mic_en        = -1,
678 };
679
680 static struct platform_device cardhu_audio_wm8903_device = {
681         .name   = "tegra-snd-wm8903",
682         .id     = 0,
683         .dev    = {
684                 .platform_data = &cardhu_audio_wm8903_pdata,
685         },
686 };
687
688 static struct platform_device cardhu_audio_max98095_device = {
689         .name   = "tegra-snd-max98095",
690         .id     = 0,
691         .dev    = {
692                 .platform_data = &cardhu_audio_max98095_pdata,
693         },
694 };
695
696 static struct tegra_asoc_platform_data cardhu_audio_aic326x_pdata = {
697         .gpio_spkr_en           = -1,
698         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
699         .gpio_hp_mute           = -1,
700         .gpio_int_mic_en        = -1,
701         .gpio_ext_mic_en        = -1,
702         /*defaults for Verbier-Cardhu board with TI AIC326X codec*/
703         .audio_port_id          = {
704                 [HIFI_CODEC] = 0,
705                 [BASEBAND] = -1,
706                 [BT_SCO] = 3,
707         },
708         .baseband_param         = {
709                 .rate = -1,
710                 .channels = -1,
711         },
712 };
713
714 static struct platform_device cardhu_audio_aic326x_device = {
715         .name   = "tegra-snd-aic326x",
716         .id     = 0,
717         .dev    = {
718                 .platform_data  = &cardhu_audio_aic326x_pdata,
719         },
720 };
721
722 static struct platform_device *cardhu_devices[] __initdata = {
723         &tegra_pmu_device,
724         &tegra_rtc_device,
725         &tegra_udc_device,
726 #if defined(CONFIG_TEGRA_IOVMM_SMMU) ||  defined(CONFIG_TEGRA_IOMMU_SMMU)
727         &tegra_smmu_device,
728 #endif
729         &tegra_wdt_device,
730 #if defined(CONFIG_TEGRA_AVP)
731         &tegra_avp_device,
732 #endif
733         &tegra_camera,
734 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
735         &tegra_se_device,
736 #endif
737         &tegra_ahub_device,
738         &tegra_dam_device0,
739         &tegra_dam_device1,
740         &tegra_dam_device2,
741         &tegra_i2s_device0,
742         &tegra_i2s_device1,
743         &tegra_i2s_device3,
744         &tegra_spdif_device,
745         &spdif_dit_device,
746         &bluetooth_dit_device,
747         &baseband_dit_device,
748         &cardhu_bcm4329_rfkill_device,
749         &tegra_pcm_device,
750         &cardhu_audio_wm8903_device,
751         &cardhu_audio_max98095_device,
752         &cardhu_audio_aic326x_device,
753         &tegra_hda_device,
754 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
755         &tegra_aes_device,
756 #endif
757 };
758
759 #define MXT_CONFIG_CRC  0xD62DE8
760 static const u8 config[] = {
761         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
762         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
763         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
764         0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
765         0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
766         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
767         0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
768         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
769         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
770         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
771         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
772         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
773         0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
774         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
775         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
776         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
777         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
778         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
779         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
780         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
781 };
782
783 #define MXT_CONFIG_CRC_SKU2000  0xA24D9A
784 static const u8 config_sku2000[] = {
785         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
786         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
787         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
788         0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00,  //23=thr  2 di
789         0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
790         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
791         0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00,  //0A=limit
792         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
793         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
794         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
795         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
796         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
797         0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
798         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
799         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
800         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
801         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
802         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
803         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
804         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
805 };
806
807 static struct mxt_platform_data atmel_mxt_info = {
808         .x_line         = 27,
809         .y_line         = 42,
810         .x_size         = 768,
811         .y_size         = 1366,
812         .blen           = 0x20,
813         .threshold      = 0x3C,
814         .voltage        = 3300000,              /* 3.3V */
815         .orient         = 5,
816         .config         = config,
817         .config_length  = 157,
818         .config_crc     = MXT_CONFIG_CRC,
819         .irqflags       = IRQF_TRIGGER_FALLING,
820 /*      .read_chg       = &read_chg, */
821         .read_chg       = NULL,
822 };
823
824 static struct i2c_board_info __initdata atmel_i2c_info[] = {
825         {
826                 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
827                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PH4),
828                 .platform_data = &atmel_mxt_info,
829         }
830 };
831
832 static __initdata struct tegra_clk_init_table spi_clk_init_table[] = {
833         /* name         parent          rate            enabled */
834         { "sbc1",       "pll_p",        52000000,       true},
835         { NULL,         NULL,           0,              0},
836 };
837
838 static int __init cardhu_touch_init(void)
839 {
840         struct board_info BoardInfo;
841
842         tegra_get_display_board_info(&BoardInfo);
843         if (BoardInfo.board_id == BOARD_DISPLAY_PM313) {
844                 tegra_clk_init_from_table(spi_clk_init_table);
845
846                 touch_init_raydium(TEGRA_GPIO_PH4, TEGRA_GPIO_PH6, 2);
847         } else {
848                 tegra_gpio_enable(TEGRA_GPIO_PH4);
849                 tegra_gpio_enable(TEGRA_GPIO_PH6);
850
851                 gpio_request(TEGRA_GPIO_PH4, "atmel-irq");
852                 gpio_direction_input(TEGRA_GPIO_PH4);
853
854                 gpio_request(TEGRA_GPIO_PH6, "atmel-reset");
855                 gpio_direction_output(TEGRA_GPIO_PH6, 0);
856                 msleep(1);
857                 gpio_set_value(TEGRA_GPIO_PH6, 1);
858                 msleep(100);
859
860                 tegra_get_board_info(&BoardInfo);
861                 if ((BoardInfo.sku & SKU_TOUCH_MASK) == SKU_TOUCH_2000) {
862                         atmel_mxt_info.config = config_sku2000;
863                         atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
864                 }
865
866                 i2c_register_board_info(1, atmel_i2c_info, 1);
867         }
868
869         return 0;
870 }
871
872 static struct tegra_uhsic_config uhsic_phy_config = {
873         .enable_gpio = EN_HSIC_GPIO,
874         .reset_gpio = -1,
875         .sync_start_delay = 9,
876         .idle_wait_delay = 17,
877         .term_range_adj = 0,
878         .elastic_underrun_limit = 16,
879         .elastic_overrun_limit = 16,
880 };
881
882 static struct tegra_ehci_platform_data tegra_ehci_uhsic_pdata = {
883         .phy_type = TEGRA_USB_PHY_TYPE_HSIC,
884         .phy_config = &uhsic_phy_config,
885         .operating_mode = TEGRA_USB_HOST,
886         .power_down_on_bus_suspend = 1,
887         .default_enable = true,
888 };
889
890 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
891         [0] = {
892                         .phy_config = &utmi_phy_config[0],
893                         .operating_mode = TEGRA_USB_HOST,
894                         .power_down_on_bus_suspend = 1,
895                         .default_enable = true,
896         },
897         [1] = {
898                         .phy_config = &utmi_phy_config[1],
899                         .operating_mode = TEGRA_USB_HOST,
900                         .power_down_on_bus_suspend = 1,
901                         .default_enable = true,
902         },
903         [2] = {
904                         .phy_config = &utmi_phy_config[2],
905                         .operating_mode = TEGRA_USB_HOST,
906                         .power_down_on_bus_suspend = 1,
907                         .hotplug = 1,
908                         .default_enable = true,
909         },
910 };
911
912 static struct tegra_otg_platform_data tegra_otg_pdata = {
913         .ehci_device = &tegra_ehci1_device,
914         .ehci_pdata = &tegra_ehci_pdata[0],
915 };
916
917 #ifdef CONFIG_USB_SUPPORT
918 static struct usb_phy_plat_data tegra_usb_phy_pdata[] = {
919         [0] = {
920                         .instance = 0,
921                         .vbus_gpio = -1,
922                         .vbus_reg_supply = "vdd_vbus_micro_usb",
923         },
924         [1] = {
925                         .instance = 1,
926                         .vbus_gpio = -1,
927         },
928         [2] = {
929                         .instance = 2,
930                         .vbus_gpio = -1,
931                         .vbus_reg_supply = "vdd_vbus_typea_usb",
932         },
933 };
934
935 static int cardhu_usb_hsic_postsupend(void)
936 {
937 #ifdef CONFIG_TEGRA_BB_XMM_POWER
938         baseband_xmm_set_power_status(BBXMM_PS_L2);
939 #endif
940         return 0;
941 }
942
943 static int cardhu_usb_hsic_preresume(void)
944 {
945 #ifdef CONFIG_TEGRA_BB_XMM_POWER
946         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
947 #endif
948         return 0;
949 }
950
951 static int cardhu_usb_hsic_phy_ready(void)
952 {
953 #ifdef CONFIG_TEGRA_BB_XMM_POWER
954         baseband_xmm_set_power_status(BBXMM_PS_L0);
955 #endif
956         return 0;
957 }
958
959 static int cardhu_usb_hsic_phy_off(void)
960 {
961 #ifdef CONFIG_TEGRA_BB_XMM_POWER
962         baseband_xmm_set_power_status(BBXMM_PS_L3);
963 #endif
964         return 0;
965 }
966
967 static void cardhu_usb_init(void)
968 {
969         struct board_info bi;
970
971         tegra_get_board_info(&bi);
972
973         tegra_usb_phy_init(tegra_usb_phy_pdata,
974                         ARRAY_SIZE(tegra_usb_phy_pdata));
975
976         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
977         platform_device_register(&tegra_otg_device);
978         if (bi.board_id == BOARD_PM267) {
979                 uhsic_phy_config.reset_gpio =
980                         PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
981                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
982                 platform_device_register(&tegra_ehci2_device);
983         } else if (bi.board_id == BOARD_E1256) {
984                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
985                 platform_device_register(&tegra_ehci2_device);
986         } else if (bi.board_id == BOARD_E1186) {
987                 /* for baseband devices do not switch off phy during suspend */
988                 tegra_ehci_uhsic_pdata.power_down_on_bus_suspend = 0;
989                 uhsic_phy_config.postsuspend = cardhu_usb_hsic_postsupend;
990                 uhsic_phy_config.preresume = cardhu_usb_hsic_preresume;
991                 uhsic_phy_config.usb_phy_ready = cardhu_usb_hsic_phy_ready;
992                 uhsic_phy_config.post_phy_off = cardhu_usb_hsic_phy_off;
993                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
994                 /* baseband registration happens in baseband-xmm-power  */
995         } else {
996                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_pdata[1];
997                 platform_device_register(&tegra_ehci2_device);
998         }
999
1000         tegra_ehci3_device.dev.platform_data = &tegra_ehci_pdata[2];
1001         platform_device_register(&tegra_ehci3_device);
1002
1003 }
1004 #else
1005 static void cardhu_usb_init(void) { }
1006 #endif
1007
1008 static void cardhu_gps_init(void)
1009 {
1010         tegra_gpio_enable(TEGRA_GPIO_PU2);
1011         tegra_gpio_enable(TEGRA_GPIO_PU3);
1012 }
1013
1014 static void cardhu_nfc_init(void)
1015 {
1016         tegra_gpio_enable(TEGRA_GPIO_PX0);
1017         tegra_gpio_enable(TEGRA_GPIO_PP3);
1018         tegra_gpio_enable(TEGRA_GPIO_PO7);
1019 }
1020
1021 static struct baseband_power_platform_data tegra_baseband_power_data = {
1022         .baseband_type = BASEBAND_XMM,
1023         .modem = {
1024         .xmm = {
1025                         .bb_rst = XMM_GPIO_BB_RST,
1026                         .bb_on = XMM_GPIO_BB_ON,
1027                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1028                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1029                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1030                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1031                         .hsic_device = &tegra_ehci2_device,
1032                 },
1033         },
1034 };
1035
1036 static struct platform_device tegra_baseband_power_device = {
1037         .name = "baseband_xmm_power",
1038         .id = -1,
1039         .dev = {
1040                 .platform_data = &tegra_baseband_power_data,
1041         },
1042 };
1043
1044 static struct platform_device tegra_baseband_power2_device = {
1045         .name = "baseband_xmm_power2",
1046         .id = -1,
1047         .dev = {
1048                 .platform_data = &tegra_baseband_power_data,
1049         },
1050 };
1051
1052
1053 static struct tegra_pci_platform_data cardhu_pci_platform_data = {
1054         .port_status[0] = 1,
1055         .port_status[1] = 1,
1056         .port_status[2] = 1,
1057         .use_dock_detect        = 0,
1058         .gpio           = 0,
1059 };
1060
1061 static void cardhu_pci_init(void)
1062 {
1063         struct board_info board_info;
1064
1065         tegra_get_board_info(&board_info);
1066         if (board_info.board_id == BOARD_E1291) {
1067                 cardhu_pci_platform_data.port_status[0] = 0;
1068                 cardhu_pci_platform_data.port_status[1] = 0;
1069                 cardhu_pci_platform_data.port_status[2] = 1;
1070                 cardhu_pci_platform_data.use_dock_detect = 1;
1071                 cardhu_pci_platform_data.gpio = DOCK_DETECT_GPIO;
1072         }
1073         if ((board_info.board_id == BOARD_E1186) ||
1074                 (board_info.board_id == BOARD_E1187) ||
1075                 (board_info.board_id == BOARD_E1291)) {
1076                 tegra_pci_device.dev.platform_data = &cardhu_pci_platform_data;
1077                 platform_device_register(&tegra_pci_device);
1078         }
1079 }
1080
1081 static void cardhu_modem_init(void)
1082 {
1083         struct board_info board_info;
1084         int w_disable_gpio, ret;
1085
1086         tegra_get_board_info(&board_info);
1087         switch (board_info.board_id) {
1088         case BOARD_E1291:
1089         case BOARD_E1198:
1090                 if (((board_info.board_id == BOARD_E1291) &&
1091                                 (board_info.fab < BOARD_FAB_A03)) ||
1092                         ((board_info.board_id == BOARD_E1198) &&
1093                                         (board_info.fab < BOARD_FAB_A02))) {
1094                         w_disable_gpio = TEGRA_GPIO_PH5;
1095                 } else {
1096                         w_disable_gpio = TEGRA_GPIO_PDD5;
1097                 }
1098                 tegra_gpio_enable(w_disable_gpio);
1099                 ret = gpio_request(w_disable_gpio, "w_disable_gpio");
1100                 if (ret < 0)
1101                         pr_err("%s: gpio_request failed for gpio %d\n",
1102                                 __func__, w_disable_gpio);
1103                 else
1104                         gpio_direction_input(w_disable_gpio);
1105
1106                 /* E1291-A04 & E1198:A02: Set PERST signal to high */
1107                 if (((board_info.board_id == BOARD_E1291) &&
1108                                 (board_info.fab >= BOARD_FAB_A04)) ||
1109                         ((board_info.board_id == BOARD_E1198) &&
1110                                         (board_info.fab >= BOARD_FAB_A02))) {
1111                         ret = gpio_request(TEGRA_GPIO_PH7, "modem_perst");
1112                         if (ret < 0) {
1113                                 pr_err("%s(): Error in allocating gpio "
1114                                         "TEGRA_GPIO_PH7\n", __func__);
1115                                 break;
1116                         }
1117                         gpio_direction_output(TEGRA_GPIO_PH7, 1);
1118                         tegra_gpio_enable(TEGRA_GPIO_PH7);
1119                 }
1120                 break;
1121         case BOARD_E1186:
1122                 tegra_gpio_enable(
1123                         tegra_baseband_power_data.modem.xmm.bb_rst);
1124                 tegra_gpio_enable(
1125                         tegra_baseband_power_data.modem.xmm.bb_on);
1126                 tegra_gpio_enable(
1127                         tegra_baseband_power_data.modem.xmm.ipc_bb_wake);
1128                 tegra_gpio_enable(
1129                         tegra_baseband_power_data.modem.xmm.ipc_ap_wake);
1130                 tegra_gpio_enable(
1131                         tegra_baseband_power_data.modem.xmm.ipc_hsic_active);
1132                 tegra_gpio_enable(
1133                         tegra_baseband_power_data.modem.xmm.ipc_hsic_sus_req);
1134                 platform_device_register(&tegra_baseband_power_device);
1135                 platform_device_register(&tegra_baseband_power2_device);
1136                 break;
1137         default:
1138                 break;
1139         }
1140
1141 }
1142
1143 #ifdef CONFIG_SATA_AHCI_TEGRA
1144 static void cardhu_sata_init(void)
1145 {
1146         platform_device_register(&tegra_sata_device);
1147 }
1148 #else
1149 static void cardhu_sata_init(void) { }
1150 #endif
1151
1152 static void __init tegra_cardhu_init(void)
1153 {
1154         tegra_thermal_init(&thermal_data);
1155         tegra_clk_init_from_table(cardhu_clk_init_table);
1156         cardhu_pinmux_init();
1157         cardhu_i2c_init();
1158         cardhu_spi_init();
1159         cardhu_usb_init();
1160 #ifdef CONFIG_TEGRA_EDP_LIMITS
1161         cardhu_edp_init();
1162 #endif
1163         cardhu_uart_init();
1164         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
1165         tegra_ram_console_debug_init();
1166         cardhu_sdhci_init();
1167         cardhu_regulator_init();
1168         cardhu_dtv_init();
1169         cardhu_suspend_init();
1170         cardhu_touch_init();
1171         cardhu_gps_init();
1172         cardhu_modem_init();
1173         cardhu_kbc_init();
1174         cardhu_scroll_init();
1175         cardhu_keys_init();
1176         cardhu_panel_init();
1177         cardhu_pmon_init();
1178         cardhu_sensors_init();
1179         cardhu_setup_bluesleep();
1180         cardhu_sata_init();
1181         //audio_wired_jack_init();
1182         cardhu_pins_state_init();
1183         cardhu_emc_init();
1184         tegra_release_bootloader_fb();
1185         cardhu_nfc_init();
1186         cardhu_pci_init();
1187 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1188         tegra_wdt_recovery_init();
1189 #endif
1190 }
1191
1192 static void __init tegra_cardhu_reserve(void)
1193 {
1194 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1195         /* support 1920X1200 with 24bpp */
1196         tegra_reserve(0, SZ_8M + SZ_1M, SZ_8M + SZ_1M);
1197 #else
1198         tegra_reserve(SZ_128M, SZ_8M, SZ_8M);
1199 #endif
1200         tegra_ram_console_debug_reserve(SZ_1M);
1201 }
1202
1203 MACHINE_START(CARDHU, "cardhu")
1204         .boot_params    = 0x80000100,
1205         .map_io         = tegra_map_common_io,
1206         .reserve        = tegra_cardhu_reserve,
1207         .init_early     = tegra_init_early,
1208         .init_irq       = tegra_init_irq,
1209         .timer          = &tegra_timer,
1210         .init_machine   = tegra_cardhu_init,
1211 MACHINE_END