arm: tegra: cardhu: Enabling Security Engine
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <linux/spi/spi.h>
37 #include <mach/clk.h>
38 #include <mach/iomap.h>
39 #include <mach/irqs.h>
40 #include <mach/pinmux.h>
41 #include <mach/iomap.h>
42 #include <mach/io.h>
43 #include <mach/i2s.h>
44 #include <mach/audio.h>
45 #include <asm/mach-types.h>
46 #include <asm/mach/arch.h>
47 #include <mach/usb_phy.h>
48
49 #include "board.h"
50 #include "clock.h"
51 #include "board-cardhu.h"
52 #include "devices.h"
53 #include "gpio-names.h"
54 #include "fuse.h"
55
56
57 static struct plat_serial8250_port debug_uart_platform_data[] = {
58         {
59                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
60                 .mapbase        = TEGRA_UARTA_BASE,
61                 .irq            = INT_UARTA,
62                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
63                 .type           = PORT_TEGRA,
64                 .iotype         = UPIO_MEM,
65                 .regshift       = 2,
66                 .uartclk        = 216000000,
67         }, {
68                 .flags          = 0,
69         }
70 };
71
72 static struct platform_device debug_uart = {
73         .name = "serial8250",
74         .id = PLAT8250_DEV_PLATFORM,
75         .dev = {
76                 .platform_data = debug_uart_platform_data,
77         },
78 };
79
80 /* !!!TODO: Change for cardhu (Taken from Ventana) */
81 static struct tegra_utmip_config utmi_phy_config[] = {
82         [0] = {
83                         .hssync_start_delay = 0,
84                         .idle_wait_delay = 17,
85                         .elastic_limit = 16,
86                         .term_range_adj = 6,
87                         .xcvr_setup = 15,
88                         .xcvr_lsfslew = 2,
89                         .xcvr_lsrslew = 2,
90         },
91         [1] = {
92                         .hssync_start_delay = 0,
93                         .idle_wait_delay = 17,
94                         .elastic_limit = 16,
95                         .term_range_adj = 6,
96                         .xcvr_setup = 15,
97                         .xcvr_lsfslew = 2,
98                         .xcvr_lsrslew = 2,
99         },
100         [2] = {
101                         .hssync_start_delay = 0,
102                         .idle_wait_delay = 17,
103                         .elastic_limit = 16,
104                         .term_range_adj = 6,
105                         .xcvr_setup = 8,
106                         .xcvr_lsfslew = 2,
107                         .xcvr_lsrslew = 2,
108         },
109 };
110
111 #ifdef CONFIG_BCM4329_RFKILL
112 static struct resource cardhu_bcm4329_rfkill_resources[] = {
113         {
114                 .name   = "bcm4329_nshutdown_gpio",
115                 .start  = TEGRA_GPIO_PU0,
116                 .end    = TEGRA_GPIO_PU0,
117                 .flags  = IORESOURCE_IO,
118         },
119 };
120
121 static struct platform_device cardhu_bcm4329_rfkill_device = {
122         .name = "bcm4329_rfkill",
123         .id             = -1,
124         .num_resources  = ARRAY_SIZE(cardhu_bcm4329_rfkill_resources),
125         .resource       = cardhu_bcm4329_rfkill_resources,
126 };
127
128 static noinline void __init cardhu_bt_rfkill(void)
129 {
130         platform_device_register(&cardhu_bcm4329_rfkill_device);
131
132         return;
133 }
134 #else
135 static inline void cardhu_bt_rfkill(void) { }
136 #endif
137
138 #ifdef CONFIG_BT_BLUESLEEP
139 static noinline void __init tegra_setup_bluesleep(void)
140 {
141         struct platform_device *pdev = NULL;
142         struct resource *res;
143
144         pdev = platform_device_alloc("bluesleep", 0);
145         if (!pdev) {
146                 pr_err("unable to allocate platform device for bluesleep");
147                 return;
148         }
149
150         res = kzalloc(sizeof(struct resource) * 3, GFP_KERNEL);
151         if (!res) {
152                 pr_err("unable to allocate resource for bluesleep\n");
153                 goto err_free_dev;
154         }
155
156         res[0].name   = "gpio_host_wake";
157         res[0].start  = TEGRA_GPIO_PU6;
158         res[0].end    = TEGRA_GPIO_PU6;
159         res[0].flags  = IORESOURCE_IO;
160
161         res[1].name   = "gpio_ext_wake";
162         res[1].start  = TEGRA_GPIO_PU1;
163         res[1].end    = TEGRA_GPIO_PU1;
164         res[1].flags  = IORESOURCE_IO;
165
166         res[2].name   = "host_wake";
167         res[2].start  = gpio_to_irq(TEGRA_GPIO_PU6);
168         res[2].end    = gpio_to_irq(TEGRA_GPIO_PU6);
169         res[2].flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE ;
170
171         if (platform_device_add_resources(pdev, res, 3)) {
172                 pr_err("unable to add resources to bluesleep device\n");
173                 goto err_free_res;
174         }
175
176         if (platform_device_add(pdev)) {
177                 pr_err("unable to add bluesleep device\n");
178                 goto err_free_res;
179         }
180         tegra_gpio_enable(TEGRA_GPIO_PU6);
181         tegra_gpio_enable(TEGRA_GPIO_PU1);
182
183 return;
184
185 err_free_res:
186         kfree(res);
187 err_free_dev:
188         platform_device_put(pdev);
189         return;
190 }
191 #else
192 static inline void tegra_setup_bluesleep(void) { }
193 #endif
194
195 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
196         /* name         parent          rate            enabled */
197         { "uarta",      "pll_p",        216000000,      true},
198         { "uartb",      "pll_p",        216000000,      false},
199         { "uartc",      "pll_p",        216000000,      false},
200         { "uartd",      "pll_p",        216000000,      false},
201         { "uarte",      "pll_p",        216000000,      false},
202         { "pll_m",      NULL,           0,              true},
203         { "hda",        "pll_p",        108000000,      false},
204         { "hda2codec_2x","pll_p",       48000000,       false},
205         { "pwm",        "clk_32k",      32768,          false},
206         { "blink",      "clk_32k",      32768,          true},
207         { "pll_a",      NULL,           56448000,       true},
208         { "pll_a_out0", NULL,           11289600,       true},
209         { "i2s1",       "pll_a_out0",   11289600,       true},
210         { "i2s2",       "pll_a_out0",   11289600,       true},
211         { "audio",      "pll_a_out0",   11289600,       true},
212         { "audio_2x",   "audio",        22579200,       true},
213         { "se", "pll_p",        216000000,      true},
214         { NULL,         NULL,           0,              0},
215 };
216
217 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
218         .adapter_nr     = 0,
219         .bus_count      = 1,
220         .bus_clk_rate   = { 100000, 0 },
221 };
222
223 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
224         .adapter_nr     = 1,
225         .bus_count      = 1,
226         .bus_clk_rate   = { 100000, 0 },
227         .is_clkon_always = true,
228 };
229
230 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
231         .adapter_nr     = 2,
232         .bus_count      = 1,
233         .bus_clk_rate   = { 100000, 0 },
234 };
235
236 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
237         .adapter_nr     = 3,
238         .bus_count      = 1,
239         .bus_clk_rate   = { 100000, 0 },
240 };
241
242 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
243         .adapter_nr     = 4,
244         .bus_count      = 1,
245         .bus_clk_rate   = { 100000, 0 },
246 };
247
248
249 struct tegra_wired_jack_conf audio_wr_jack_conf = {
250         .hp_det_n = TEGRA_GPIO_PW2,
251         .en_mic_ext = TEGRA_GPIO_PX1,
252         .en_mic_int = TEGRA_GPIO_PX0,
253 };
254
255 static void cardhu_i2c_init(void)
256 {
257         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
258         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
259         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
260         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
261         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
262
263         platform_device_register(&tegra_i2c_device5);
264         platform_device_register(&tegra_i2c_device4);
265         platform_device_register(&tegra_i2c_device3);
266         platform_device_register(&tegra_i2c_device2);
267         platform_device_register(&tegra_i2c_device1);
268 }
269
270 #if defined(CONFIG_RTC_DRV_TEGRA)
271 static struct resource tegra_rtc_resources[] = {
272         [0] = {
273                 .start = TEGRA_RTC_BASE,
274                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
275                 .flags = IORESOURCE_MEM,
276         },
277         [1] = {
278                 .start = INT_RTC,
279                 .end = INT_RTC,
280                 .flags = IORESOURCE_IRQ,
281         },
282 };
283
284 static struct platform_device tegra_rtc_device = {
285         .name = "tegra_rtc",
286         .id   = -1,
287         .resource = tegra_rtc_resources,
288         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
289 };
290 #endif
291
292 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
293
294 static u64 tegra_se_dma_mask = DMA_BIT_MASK(32);
295
296 static struct resource tegra_se_resources[] = {
297         [0] = {
298                 .start = TEGRA_SE_BASE,
299                 .end = TEGRA_SE_BASE + TEGRA_SE_SIZE - 1,
300                 .flags = IORESOURCE_MEM,
301         },
302         [1] = {
303                 .start = INT_SE,
304                 .end = INT_SE,
305                 .flags = IORESOURCE_IRQ,
306         },
307 };
308
309 static struct platform_device tegra_se_device = {
310         .name = "tegra-se",
311         .id = 0,
312         .dev = {
313                 .coherent_dma_mask = DMA_BIT_MASK(32),
314                 .dma_mask = &tegra_se_dma_mask,
315         },
316         .resource = tegra_se_resources,
317         .num_resources = ARRAY_SIZE(tegra_se_resources),
318 };
319
320 #endif
321
322 static struct platform_device tegra_camera = {
323         .name = "tegra_camera",
324         .id = -1,
325 };
326
327 static struct platform_device *cardhu_devices[] __initdata = {
328         &debug_uart,
329         &tegra_uartb_device,
330         &tegra_uartc_device,
331         &tegra_uartd_device,
332         &tegra_uarte_device,
333         &pmu_device,
334 #if defined(CONFIG_RTC_DRV_TEGRA)
335         &tegra_rtc_device,
336 #endif
337         &tegra_udc_device,
338 #if defined(CONFIG_SND_HDA_TEGRA)
339         &tegra_hda_device,
340 #endif
341 #if defined(CONFIG_TEGRA_IOVMM_SMMU)
342         &tegra_smmu_device,
343 #endif
344         &tegra_wdt_device,
345         &tegra_avp_device,
346         &tegra_camera,
347         &tegra_spi_device4,
348 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
349         &tegra_se_device,
350 #endif
351
352 };
353
354 static int __init cardhu_touch_init(void)
355 {
356         return 0;
357 }
358
359 static struct usb_phy_plat_data tegra_usb_phy_pdata[] = {
360         [0] = {
361                         .instance = 0,
362                         .vbus_gpio = -1,
363                         .vbus_reg_supply = "vdd_vbus_micro_usb",
364         },
365         [1] = {
366                         .instance = 1,
367                         .vbus_gpio = -1,
368         },
369         [2] = {
370                         .instance = 2,
371                         .vbus_gpio = -1,
372                         .vbus_reg_supply = "vdd_vbus_typea_usb",
373         },
374 };
375
376 static struct tegra_ulpi_config uhsic_phy_config = {
377         .enable_gpio = EN_HSIC_GPIO,
378         .reset_gpio = PM267_SMSC4640_HSIC_HUB_RESET_GPIO,
379 };
380
381 static struct tegra_ehci_platform_data tegra_ehci_uhsic_pdata = {
382         .phy_type = TEGRA_USB_PHY_TYPE_HSIC,
383         .phy_config = &uhsic_phy_config,
384         .operating_mode = TEGRA_USB_HOST,
385         .power_down_on_bus_suspend = 1,
386 };
387
388 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
389         [0] = {
390                         .phy_config = &utmi_phy_config[0],
391                         .operating_mode = TEGRA_USB_HOST,
392                         .power_down_on_bus_suspend = 1,
393         },
394         [1] = {
395                         .phy_config = &utmi_phy_config[1],
396                         .operating_mode = TEGRA_USB_HOST,
397                         .power_down_on_bus_suspend = 1,
398         },
399         [2] = {
400                         .phy_config = &utmi_phy_config[2],
401                         .operating_mode = TEGRA_USB_HOST,
402                         .power_down_on_bus_suspend = 1,
403         },
404 };
405
406 struct platform_device *tegra_usb_otg_host_register(void)
407 {
408         struct platform_device *pdev;
409         void *platform_data;
410         int val;
411
412         pdev = platform_device_alloc(tegra_ehci1_device.name,
413                 tegra_ehci1_device.id);
414         if (!pdev)
415                 return NULL;
416
417         val = platform_device_add_resources(pdev, tegra_ehci1_device.resource,
418                 tegra_ehci1_device.num_resources);
419         if (val)
420                 goto error;
421
422         pdev->dev.dma_mask =  tegra_ehci1_device.dev.dma_mask;
423         pdev->dev.coherent_dma_mask = tegra_ehci1_device.dev.coherent_dma_mask;
424
425         platform_data = kmalloc(sizeof(struct tegra_ehci_platform_data),
426                 GFP_KERNEL);
427         if (!platform_data)
428                 goto error;
429
430         memcpy(platform_data, &tegra_ehci_pdata[0],
431                                 sizeof(struct tegra_ehci_platform_data));
432         pdev->dev.platform_data = platform_data;
433
434         val = platform_device_add(pdev);
435         if (val)
436                 goto error_add;
437
438         return pdev;
439
440 error_add:
441         kfree(platform_data);
442 error:
443         pr_err("%s: failed to add the host contoller device\n", __func__);
444         platform_device_put(pdev);
445         return NULL;
446 }
447
448 void tegra_usb_otg_host_unregister(struct platform_device *pdev)
449 {
450         platform_device_unregister(pdev);
451 }
452
453 static struct tegra_otg_platform_data tegra_otg_pdata = {
454         .host_register = &tegra_usb_otg_host_register,
455         .host_unregister = &tegra_usb_otg_host_unregister,
456 };
457
458 static void cardhu_usb_init(void)
459 {
460         struct board_info bi;
461
462         tegra_get_board_info(&bi);
463
464         tegra_usb_phy_init(tegra_usb_phy_pdata, ARRAY_SIZE(tegra_usb_phy_pdata));
465
466         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
467         platform_device_register(&tegra_otg_device);
468
469         if ((bi.board_id == BOARD_PM267) || (bi.board_id == BOARD_E1186)) {
470                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
471         } else {
472                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_pdata[1];
473         }
474         platform_device_register(&tegra_ehci2_device);
475
476         tegra_ehci3_device.dev.platform_data = &tegra_ehci_pdata[2];
477         platform_device_register(&tegra_ehci3_device);
478
479 }
480
481 static void cardhu_gps_init(void)
482 {
483         tegra_gpio_enable(TEGRA_GPIO_PU2);
484         tegra_gpio_enable(TEGRA_GPIO_PU3);
485 }
486
487 static void cardhu_modem_init(void)
488 {
489         tegra_gpio_enable(TEGRA_GPIO_PH5);
490 }
491
492 #ifdef CONFIG_SATA_AHCI_TEGRA
493 static void cardhu_sata_init(void)
494 {
495         platform_device_register(&tegra_sata_device);
496 }
497 #else
498 static void cardhu_sata_init(void) { }
499 #endif
500
501 static void __init tegra_cardhu_init(void)
502 {
503         tegra_common_init();
504         tegra_clk_init_from_table(cardhu_clk_init_table);
505         cardhu_pinmux_init();
506         cardhu_i2c_init();
507         cardhu_usb_init();
508 #ifdef CONFIG_TEGRA_EDP_LIMITS
509         cardhu_edp_init();
510 #endif
511         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
512         cardhu_sdhci_init();
513         cardhu_regulator_init();
514         cardhu_gpio_switch_regulator_init();
515         cardhu_suspend_init();
516         cardhu_power_off_init();
517         cardhu_touch_init();
518         cardhu_gps_init();
519         cardhu_modem_init();
520         cardhu_kbc_init();
521         cardhu_scroll_init();
522         cardhu_keys_init();
523         cardhu_panel_init();
524         cardhu_sensors_init();
525         cardhu_bt_rfkill();
526         tegra_setup_bluesleep();
527         cardhu_sata_init();
528         audio_wired_jack_init();
529         cardhu_pins_state_init();
530         cardhu_emc_init();
531 }
532
533 static void __init tegra_cardhu_reserve(void)
534 {
535 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
536         tegra_reserve(0, SZ_4M, SZ_8M);
537 #else
538         tegra_reserve(SZ_128M, SZ_4M, SZ_8M);
539 #endif
540 }
541
542 MACHINE_START(CARDHU, "cardhu")
543         .boot_params    = 0x80000100,
544         .phys_io        = IO_APB_PHYS,
545         .io_pg_offst    = ((IO_APB_VIRT) >> 18) & 0xfffc,
546         .init_irq       = tegra_init_irq,
547         .init_machine   = tegra_cardhu_init,
548         .map_io         = tegra_map_common_io,
549         .reserve        = tegra_cardhu_reserve,
550         .timer          = &tegra_timer,
551 MACHINE_END