2 * arch/arm/mach-tegra/board-cardhu.c
4 * Copyright (c) 2011, NVIDIA Corporation.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <linux/spi/spi.h>
37 #include <linux/i2c/atmel_mxt_ts.h>
38 #include <linux/tegra_uart.h>
39 #include <linux/memblock.h>
40 #include <linux/spi-tegra.h>
42 #include <sound/wm8903.h>
45 #include <mach/iomap.h>
46 #include <mach/irqs.h>
47 #include <mach/pinmux.h>
48 #include <mach/iomap.h>
51 #include <mach/tegra_wm8903_pdata.h>
52 #include <asm/mach-types.h>
53 #include <asm/mach/arch.h>
54 #include <mach/usb_phy.h>
55 #include <linux/nfc/pn544.h>
59 #include "board-cardhu.h"
61 #include "gpio-names.h"
64 #include "baseband-xmm-power.h"
66 /* !!!TODO: Change for cardhu (Taken from Ventana) */
67 static struct tegra_utmip_config utmi_phy_config[] = {
69 .hssync_start_delay = 0,
70 .idle_wait_delay = 17,
74 .xcvr_setup_offset = 0,
80 .hssync_start_delay = 0,
81 .idle_wait_delay = 17,
85 .xcvr_setup_offset = 0,
91 .hssync_start_delay = 0,
92 .idle_wait_delay = 17,
96 .xcvr_setup_offset = 0,
103 #ifdef CONFIG_BCM4329_RFKILL
104 static struct resource cardhu_bcm4329_rfkill_resources[] = {
106 .name = "bcm4329_nshutdown_gpio",
107 .start = TEGRA_GPIO_PU0,
108 .end = TEGRA_GPIO_PU0,
109 .flags = IORESOURCE_IO,
113 static struct platform_device cardhu_bcm4329_rfkill_device = {
114 .name = "bcm4329_rfkill",
116 .num_resources = ARRAY_SIZE(cardhu_bcm4329_rfkill_resources),
117 .resource = cardhu_bcm4329_rfkill_resources,
120 static noinline void __init cardhu_bt_rfkill(void)
122 platform_device_register(&cardhu_bcm4329_rfkill_device);
127 static inline void cardhu_bt_rfkill(void) { }
130 #ifdef CONFIG_BT_BLUESLEEP
131 static noinline void __init tegra_setup_bluesleep(void)
133 struct platform_device *pdev = NULL;
134 struct resource *res;
136 pdev = platform_device_alloc("bluesleep", 0);
138 pr_err("unable to allocate platform device for bluesleep");
142 res = kzalloc(sizeof(struct resource) * 3, GFP_KERNEL);
144 pr_err("unable to allocate resource for bluesleep\n");
148 res[0].name = "gpio_host_wake";
149 res[0].start = TEGRA_GPIO_PU6;
150 res[0].end = TEGRA_GPIO_PU6;
151 res[0].flags = IORESOURCE_IO;
153 res[1].name = "gpio_ext_wake";
154 res[1].start = TEGRA_GPIO_PU1;
155 res[1].end = TEGRA_GPIO_PU1;
156 res[1].flags = IORESOURCE_IO;
158 res[2].name = "host_wake";
159 res[2].start = gpio_to_irq(TEGRA_GPIO_PU6);
160 res[2].end = gpio_to_irq(TEGRA_GPIO_PU6);
161 res[2].flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE ;
163 if (platform_device_add_resources(pdev, res, 3)) {
164 pr_err("unable to add resources to bluesleep device\n");
168 if (platform_device_add(pdev)) {
169 pr_err("unable to add bluesleep device\n");
172 tegra_gpio_enable(TEGRA_GPIO_PU6);
173 tegra_gpio_enable(TEGRA_GPIO_PU1);
180 platform_device_put(pdev);
184 static inline void tegra_setup_bluesleep(void) { }
187 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
188 /* name parent rate enabled */
189 { "pll_m", NULL, 0, false},
190 { "hda", "pll_p", 108000000, false},
191 { "hda2codec_2x","pll_p", 48000000, false},
192 { "pwm", "pll_p", 3187500, false},
193 { "blink", "clk_32k", 32768, true},
194 { "i2s1", "pll_a_out0", 0, false},
195 { "i2s3", "pll_a_out0", 0, false},
196 { "spdif_out", "pll_a_out0", 0, false},
197 { "d_audio", "pll_a_out0", 0, false},
198 { "dam0", "pll_a_out0", 0, false},
199 { "dam1", "pll_a_out0", 0, false},
200 { "dam2", "pll_a_out0", 0, false},
201 { "sdmmc3", "clk_m", 12000000, true},
202 { "vi_sensor", "pll_p", 150000000, false},
203 { "i2c1", "pll_p", 3200000, false},
204 { "i2c2", "pll_p", 3200000, false},
205 { "i2c3", "pll_p", 3200000, false},
206 { "i2c4", "pll_p", 3200000, false},
207 { "i2c5", "pll_p", 3200000, false},
211 static struct pn544_i2c_platform_data nfc_pdata = {
212 .irq_gpio = TEGRA_GPIO_PX0,
213 .ven_gpio = TEGRA_GPIO_PP3,
214 .firm_gpio = TEGRA_GPIO_PO7,
217 static struct i2c_board_info __initdata cardhu_i2c_bus3_board_info[] = {
219 I2C_BOARD_INFO("pn544", 0x28),
220 .platform_data = &nfc_pdata,
221 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PX0),
224 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
227 .bus_clk_rate = { 100000, 0 },
228 .scl_gpio = {TEGRA_GPIO_PC4, 0},
229 .sda_gpio = {TEGRA_GPIO_PC5, 0},
230 .arb_recovery = arb_lost_recovery,
233 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
236 .bus_clk_rate = { 100000, 0 },
237 .is_clkon_always = true,
238 .scl_gpio = {TEGRA_GPIO_PT5, 0},
239 .sda_gpio = {TEGRA_GPIO_PT6, 0},
240 .arb_recovery = arb_lost_recovery,
243 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
246 .bus_clk_rate = { 100000, 0 },
247 .scl_gpio = {TEGRA_GPIO_PBB1, 0},
248 .sda_gpio = {TEGRA_GPIO_PBB2, 0},
249 .arb_recovery = arb_lost_recovery,
252 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
255 .bus_clk_rate = { 100000, 0 },
256 .scl_gpio = {TEGRA_GPIO_PV4, 0},
257 .sda_gpio = {TEGRA_GPIO_PV5, 0},
258 .arb_recovery = arb_lost_recovery,
261 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
264 .bus_clk_rate = { 400000, 0 },
265 .scl_gpio = {TEGRA_GPIO_PZ6, 0},
266 .sda_gpio = {TEGRA_GPIO_PZ7, 0},
267 .arb_recovery = arb_lost_recovery,
272 struct tegra_wired_jack_conf audio_wr_jack_conf = {
273 .hp_det_n = TEGRA_GPIO_PW2,
274 .en_mic_ext = TEGRA_GPIO_PX1,
275 .en_mic_int = TEGRA_GPIO_PX0,
279 static struct wm8903_platform_data cardhu_wm8903_pdata = {
283 .gpio_base = CARDHU_GPIO_WM8903(0),
285 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP1_FN_SHIFT),
286 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP2_FN_SHIFT) |
289 WM8903_GPIO_NO_CONFIG,
290 WM8903_GPIO_NO_CONFIG,
294 static struct i2c_board_info __initdata wm8903_board_info = {
295 I2C_BOARD_INFO("wm8903", 0x1a),
296 .platform_data = &cardhu_wm8903_pdata,
297 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
300 static void cardhu_i2c_init(void)
302 tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
303 tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
304 tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
305 tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
306 tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
308 platform_device_register(&tegra_i2c_device5);
309 platform_device_register(&tegra_i2c_device4);
310 platform_device_register(&tegra_i2c_device3);
311 platform_device_register(&tegra_i2c_device2);
312 platform_device_register(&tegra_i2c_device1);
314 i2c_register_board_info(4, &wm8903_board_info, 1);
315 i2c_register_board_info(2, cardhu_i2c_bus3_board_info, 1);
318 static struct platform_device *cardhu_uart_devices[] __initdata = {
325 static struct uart_clk_parent uart_parent_clk[] = {
326 [0] = {.name = "clk_m"},
327 [1] = {.name = "pll_p"},
328 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
329 [2] = {.name = "pll_m"},
333 static struct tegra_uart_platform_data cardhu_uart_pdata;
335 static void __init uart_debug_init(void)
337 struct board_info board_info;
340 tegra_get_board_info(&board_info);
342 debug_port_id = get_tegra_uart_debug_port_id();
343 if (debug_port_id < 0) {
345 /* UARTB is debug port
346 * for SLT - E1186/E1187/PM269
349 if (((board_info.sku & SKU_SLT_ULPI_SUPPORT) &&
350 ((board_info.board_id == BOARD_E1186) ||
351 (board_info.board_id == BOARD_E1187) ||
352 (board_info.board_id == BOARD_PM269))) ||
353 (board_info.board_id == BOARD_E1256) ||
354 (board_info.board_id == BOARD_E1257))
357 switch (debug_port_id) {
359 /* UARTA is the debug port. */
360 pr_info("Selecting UARTA as the debug console\n");
361 cardhu_uart_devices[0] = &debug_uarta_device;
362 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
363 debug_uart_port_base = ((struct plat_serial8250_port *)(
364 debug_uarta_device.dev.platform_data))->mapbase;
368 /* UARTB is the debug port. */
369 pr_info("Selecting UARTB as the debug console\n");
370 cardhu_uart_devices[1] = &debug_uartb_device;
371 debug_uart_clk = clk_get_sys("serial8250.0", "uartb");
372 debug_uart_port_base = ((struct plat_serial8250_port *)(
373 debug_uartb_device.dev.platform_data))->mapbase;
377 /* UARTC is the debug port. */
378 pr_info("Selecting UARTC as the debug console\n");
379 cardhu_uart_devices[2] = &debug_uartc_device;
380 debug_uart_clk = clk_get_sys("serial8250.0", "uartc");
381 debug_uart_port_base = ((struct plat_serial8250_port *)(
382 debug_uartc_device.dev.platform_data))->mapbase;
386 /* UARTD is the debug port. */
387 pr_info("Selecting UARTD as the debug console\n");
388 cardhu_uart_devices[3] = &debug_uartd_device;
389 debug_uart_clk = clk_get_sys("serial8250.0", "uartd");
390 debug_uart_port_base = ((struct plat_serial8250_port *)(
391 debug_uartd_device.dev.platform_data))->mapbase;
395 /* UARTE is the debug port. */
396 pr_info("Selecting UARTE as the debug console\n");
397 cardhu_uart_devices[4] = &debug_uarte_device;
398 debug_uart_clk = clk_get_sys("serial8250.0", "uarte");
399 debug_uart_port_base = ((struct plat_serial8250_port *)(
400 debug_uarte_device.dev.platform_data))->mapbase;
404 pr_info("The debug console id %d is invalid, Assuming UARTA", debug_port_id);
405 cardhu_uart_devices[0] = &debug_uarta_device;
406 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
407 debug_uart_port_base = ((struct plat_serial8250_port *)(
408 debug_uarta_device.dev.platform_data))->mapbase;
414 static void __init cardhu_uart_init(void)
419 for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
420 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
421 if (IS_ERR_OR_NULL(c)) {
422 pr_err("Not able to get the clock for %s\n",
423 uart_parent_clk[i].name);
426 uart_parent_clk[i].parent_clk = c;
427 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
429 cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
430 cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
431 tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
432 tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
433 tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
434 tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
435 tegra_uarte_device.dev.platform_data = &cardhu_uart_pdata;
437 /* Register low speed only if it is selected */
438 if (!is_tegra_debug_uartport_hs()) {
440 /* Clock enable for the debug channel */
441 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
442 pr_info("The debug console clock name is %s\n",
443 debug_uart_clk->name);
444 c = tegra_get_clock_by_name("pll_p");
445 if (IS_ERR_OR_NULL(c))
446 pr_err("Not getting the parent clock pll_p\n");
448 clk_set_parent(debug_uart_clk, c);
450 clk_enable(debug_uart_clk);
451 clk_set_rate(debug_uart_clk, clk_get_rate(c));
453 pr_err("Not getting the clock %s for debug console\n",
454 debug_uart_clk->name);
458 platform_add_devices(cardhu_uart_devices,
459 ARRAY_SIZE(cardhu_uart_devices));
462 static struct platform_device tegra_camera = {
463 .name = "tegra_camera",
467 static struct platform_device *cardhu_spi_devices[] __initdata = {
471 struct spi_clk_parent spi_parent_clk[] = {
472 [0] = {.name = "pll_p"},
473 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
474 [1] = {.name = "pll_m"},
475 [2] = {.name = "clk_m"},
477 [1] = {.name = "clk_m"},
481 static struct tegra_spi_platform_data cardhu_spi_pdata = {
482 .is_dma_based = true,
483 .max_dma_buffer = (16 * 1024),
484 .is_clkon_always = false,
485 .max_rate = 100000000,
488 static void __init cardhu_spi_init(void)
492 struct board_info board_info;
494 tegra_get_board_info(&board_info);
496 for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
497 c = tegra_get_clock_by_name(spi_parent_clk[i].name);
498 if (IS_ERR_OR_NULL(c)) {
499 pr_err("Not able to get the clock for %s\n",
500 spi_parent_clk[i].name);
503 spi_parent_clk[i].parent_clk = c;
504 spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
506 cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
507 cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
508 tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
509 platform_add_devices(cardhu_spi_devices,
510 ARRAY_SIZE(cardhu_spi_devices));
512 if (board_info.board_id == BOARD_E1198) {
513 tegra_spi_device2.dev.platform_data = &cardhu_spi_pdata;
514 platform_device_register(&tegra_spi_device2);
518 static struct resource tegra_rtc_resources[] = {
520 .start = TEGRA_RTC_BASE,
521 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
522 .flags = IORESOURCE_MEM,
527 .flags = IORESOURCE_IRQ,
531 static struct platform_device tegra_rtc_device = {
534 .resource = tegra_rtc_resources,
535 .num_resources = ARRAY_SIZE(tegra_rtc_resources),
538 static struct tegra_wm8903_platform_data cardhu_audio_pdata = {
539 .gpio_spkr_en = TEGRA_GPIO_SPKR_EN,
540 .gpio_hp_det = TEGRA_GPIO_HP_DET,
542 .gpio_int_mic_en = -1,
543 .gpio_ext_mic_en = -1,
546 static struct platform_device cardhu_audio_device = {
547 .name = "tegra-snd-wm8903",
550 .platform_data = &cardhu_audio_pdata,
554 static struct resource ram_console_resources[] = {
556 .flags = IORESOURCE_MEM,
560 static struct platform_device ram_console_device = {
561 .name = "ram_console",
563 .num_resources = ARRAY_SIZE(ram_console_resources),
564 .resource = ram_console_resources,
567 static struct platform_device *cardhu_devices[] __initdata = {
571 #if defined(CONFIG_TEGRA_IOVMM_SMMU)
575 #if defined(CONFIG_TEGRA_AVP)
579 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
590 &bluetooth_dit_device,
592 &cardhu_audio_device,
594 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
600 #define MXT_CONFIG_CRC 0xD62DE8
601 static const u8 config[] = {
602 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
603 0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
604 0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
605 0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
606 0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
607 0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
608 0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
609 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
610 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
611 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
612 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
613 0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
614 0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
615 0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
616 0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
617 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
618 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
619 0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
620 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
621 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
624 #define MXT_CONFIG_CRC_SKU2000 0xA24D9A
625 static const u8 config_sku2000[] = {
626 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
627 0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
628 0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
629 0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00, //23=thr 2 di
630 0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
631 0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
632 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00, //0A=limit
633 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
634 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
635 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
636 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
637 0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
638 0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
639 0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
640 0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
641 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
642 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
643 0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
644 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
645 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
648 static struct mxt_platform_data atmel_mxt_info = {
655 .voltage = 3300000, /* 3.3V */
658 .config_length = 157,
659 .config_crc = MXT_CONFIG_CRC,
660 .irqflags = IRQF_TRIGGER_FALLING,
661 /* .read_chg = &read_chg, */
665 static struct i2c_board_info __initdata atmel_i2c_info[] = {
667 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
668 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PH4),
669 .platform_data = &atmel_mxt_info,
673 static int __init cardhu_touch_init(void)
675 struct board_info BoardInfo;
677 tegra_gpio_enable(TEGRA_GPIO_PH4);
678 tegra_gpio_enable(TEGRA_GPIO_PH6);
680 gpio_request(TEGRA_GPIO_PH4, "atmel-irq");
681 gpio_direction_input(TEGRA_GPIO_PH4);
683 gpio_request(TEGRA_GPIO_PH6, "atmel-reset");
684 gpio_direction_output(TEGRA_GPIO_PH6, 0);
686 gpio_set_value(TEGRA_GPIO_PH6, 1);
689 tegra_get_board_info(&BoardInfo);
690 if ((BoardInfo.sku & SKU_TOUCH_MASK) == SKU_TOUCH_2000) {
691 atmel_mxt_info.config = config_sku2000;
692 atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
695 i2c_register_board_info(1, atmel_i2c_info, 1);
700 static struct tegra_uhsic_config uhsic_phy_config = {
701 .enable_gpio = EN_HSIC_GPIO,
703 .sync_start_delay = 9,
704 .idle_wait_delay = 17,
706 .elastic_underrun_limit = 16,
707 .elastic_overrun_limit = 16,
710 static struct tegra_ehci_platform_data tegra_ehci_uhsic_pdata = {
711 .phy_type = TEGRA_USB_PHY_TYPE_HSIC,
712 .phy_config = &uhsic_phy_config,
713 .operating_mode = TEGRA_USB_HOST,
714 .power_down_on_bus_suspend = 1,
717 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
719 .phy_config = &utmi_phy_config[0],
720 .operating_mode = TEGRA_USB_HOST,
721 .power_down_on_bus_suspend = 1,
724 .phy_config = &utmi_phy_config[1],
725 .operating_mode = TEGRA_USB_HOST,
726 .power_down_on_bus_suspend = 1,
729 .phy_config = &utmi_phy_config[2],
730 .operating_mode = TEGRA_USB_HOST,
731 .power_down_on_bus_suspend = 1,
736 static struct tegra_otg_platform_data tegra_otg_pdata = {
737 .ehci_device = &tegra_ehci1_device,
738 .ehci_pdata = &tegra_ehci_pdata[0],
741 #ifdef CONFIG_USB_SUPPORT
742 static struct usb_phy_plat_data tegra_usb_phy_pdata[] = {
746 .vbus_reg_supply = "vdd_vbus_micro_usb",
755 .vbus_reg_supply = "vdd_vbus_typea_usb",
759 static int cardu_usb_hsic_postsupend(void)
761 baseband_xmm_set_power_status(BBXMM_PS_L2);
765 static int cardu_usb_hsic_preresume(void)
767 baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
771 static void cardhu_usb_init(void)
773 struct board_info bi;
775 tegra_get_board_info(&bi);
777 tegra_usb_phy_init(tegra_usb_phy_pdata,
778 ARRAY_SIZE(tegra_usb_phy_pdata));
780 tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
781 platform_device_register(&tegra_otg_device);
782 if (bi.board_id == BOARD_PM267) {
783 uhsic_phy_config.reset_gpio =
784 PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
785 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
786 platform_device_register(&tegra_ehci2_device);
787 } else if (bi.board_id == BOARD_E1256) {
788 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
789 platform_device_register(&tegra_ehci2_device);
790 } else if (bi.board_id == BOARD_E1186) {
791 /* for baseband devices do not switch off phy during suspend */
792 tegra_ehci_uhsic_pdata.power_down_on_bus_suspend = 0;
793 uhsic_phy_config.postsuspend = cardu_usb_hsic_postsupend;
794 uhsic_phy_config.preresume = cardu_usb_hsic_preresume;
795 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
796 /* baseband registration happens in baseband-xmm-power */
798 tegra_ehci2_device.dev.platform_data = &tegra_ehci_pdata[1];
799 platform_device_register(&tegra_ehci2_device);
802 tegra_ehci3_device.dev.platform_data = &tegra_ehci_pdata[2];
803 platform_device_register(&tegra_ehci3_device);
807 static void cardhu_usb_init(void) { }
810 static void cardhu_gps_init(void)
812 tegra_gpio_enable(TEGRA_GPIO_PU2);
813 tegra_gpio_enable(TEGRA_GPIO_PU3);
816 static void cardhu_nfc_init(void)
818 tegra_gpio_enable(TEGRA_GPIO_PX0);
819 tegra_gpio_enable(TEGRA_GPIO_PP3);
820 tegra_gpio_enable(TEGRA_GPIO_PO7);
823 static struct baseband_power_platform_data tegra_baseband_power_data = {
824 .baseband_type = BASEBAND_XMM,
827 .bb_rst = XMM_GPIO_BB_RST,
828 .bb_on = XMM_GPIO_BB_ON,
829 .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
830 .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
831 .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
832 .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
833 .hsic_device = &tegra_ehci2_device,
838 static struct platform_device tegra_baseband_power_device = {
839 .name = "baseband_xmm_power",
842 .platform_data = &tegra_baseband_power_data,
846 static struct platform_device tegra_baseband_power2_device = {
847 .name = "baseband_xmm_power2",
850 .platform_data = &tegra_baseband_power_data,
854 static void cardhu_modem_init(void)
856 struct board_info board_info;
857 int w_disable_gpio, ret;
859 tegra_get_board_info(&board_info);
860 switch (board_info.board_id) {
863 if (((board_info.board_id == BOARD_E1291) &&
864 (board_info.fab < BOARD_FAB_A03)) ||
865 ((board_info.board_id == BOARD_E1198) &&
866 (board_info.fab < BOARD_FAB_A02))) {
867 w_disable_gpio = TEGRA_GPIO_PH5;
869 w_disable_gpio = TEGRA_GPIO_PDD5;
871 tegra_gpio_enable(w_disable_gpio);
872 ret = gpio_request(w_disable_gpio, "w_disable_gpio");
874 pr_err("%s: gpio_request failed for gpio %d\n",
875 __func__, w_disable_gpio);
877 gpio_direction_input(w_disable_gpio);
879 /* E1291-A04 & E1198:A02: Set PERST signal to high */
880 if (((board_info.board_id == BOARD_E1291) &&
881 (board_info.fab >= BOARD_FAB_A04)) ||
882 ((board_info.board_id == BOARD_E1198) &&
883 (board_info.fab >= BOARD_FAB_A02))) {
884 ret = gpio_request(TEGRA_GPIO_PH7, "modem_perst");
886 pr_err("%s(): Error in allocating gpio "
887 "TEGRA_GPIO_PH7\n", __func__);
890 gpio_direction_output(TEGRA_GPIO_PH7, 1);
891 tegra_gpio_enable(TEGRA_GPIO_PH7);
896 tegra_baseband_power_data.modem.xmm.bb_rst);
898 tegra_baseband_power_data.modem.xmm.bb_on);
900 tegra_baseband_power_data.modem.xmm.ipc_bb_wake);
902 tegra_baseband_power_data.modem.xmm.ipc_ap_wake);
904 tegra_baseband_power_data.modem.xmm.ipc_hsic_active);
906 tegra_baseband_power_data.modem.xmm.ipc_hsic_sus_req);
907 platform_device_register(&tegra_baseband_power_device);
908 platform_device_register(&tegra_baseband_power2_device);
916 #ifdef CONFIG_SATA_AHCI_TEGRA
917 static void cardhu_sata_init(void)
919 platform_device_register(&tegra_sata_device);
922 static void cardhu_sata_init(void) { }
925 static void __init tegra_cardhu_init(void)
927 tegra_clk_init_from_table(cardhu_clk_init_table);
928 cardhu_pinmux_init();
932 #ifdef CONFIG_TEGRA_EDP_LIMITS
936 cardhu_tsensor_init();
937 platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
939 cardhu_regulator_init();
940 cardhu_gpio_switch_regulator_init();
941 cardhu_suspend_init();
942 cardhu_power_off_init();
947 cardhu_scroll_init();
951 cardhu_sensors_init();
953 tegra_setup_bluesleep();
955 //audio_wired_jack_init();
956 cardhu_pins_state_init();
958 tegra_release_bootloader_fb();
962 static void __init cardhu_ramconsole_reserve(unsigned long size)
964 struct resource *res;
967 res = platform_get_resource(&ram_console_device, IORESOURCE_MEM, 0);
969 pr_err("Failed to find memory resource for ram console\n");
972 res->start = memblock_end_of_DRAM() - size;
973 res->end = res->start + size - 1;
974 ret = memblock_remove(res->start, size);
976 ram_console_device.resource = NULL;
977 ram_console_device.num_resources = 0;
978 pr_err("Failed to reserve memory block for ram console\n");
982 static void __init tegra_cardhu_reserve(void)
984 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
985 /* support 1920X1200 with 24bpp */
986 tegra_reserve(0, SZ_8M + SZ_1M, SZ_8M + SZ_1M);
988 tegra_reserve(SZ_128M, SZ_8M, SZ_8M);
990 cardhu_ramconsole_reserve(SZ_1M);
993 MACHINE_START(CARDHU, "cardhu")
994 .boot_params = 0x80000100,
995 .map_io = tegra_map_common_io,
996 .reserve = tegra_cardhu_reserve,
997 .init_early = tegra_init_early,
998 .init_irq = tegra_init_irq,
999 .timer = &tegra_timer,
1000 .init_machine = tegra_cardhu_init,