arm: tegra: use rfkill-gpio driver to register bluetooth rfkill
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <linux/spi/spi.h>
37 #include <linux/i2c/atmel_mxt_ts.h>
38 #include <linux/tegra_uart.h>
39 #include <linux/memblock.h>
40 #include <linux/spi-tegra.h>
41 #include <linux/nfc/pn544.h>
42 #include <linux/rfkill-gpio.h>
43
44 #include <sound/wm8903.h>
45 #include <sound/max98095.h>
46 #include <media/tegra_dtv.h>
47
48 #include <mach/clk.h>
49 #include <mach/iomap.h>
50 #include <mach/irqs.h>
51 #include <mach/pinmux.h>
52 #include <mach/iomap.h>
53 #include <mach/io.h>
54 #include <mach/i2s.h>
55 #include <mach/tegra_asoc_pdata.h>
56 #include <mach/tegra_wm8903_pdata.h>
57 #include <asm/mach-types.h>
58 #include <asm/mach/arch.h>
59 #include <mach/usb_phy.h>
60 #include <mach/thermal.h>
61 #include <mach/pci.h>
62
63 #include "board.h"
64 #include "clock.h"
65 #include "board-cardhu.h"
66 #include "board-touch.h"
67 #include "devices.h"
68 #include "gpio-names.h"
69 #include "fuse.h"
70 #include "pm.h"
71 #include "baseband-xmm-power.h"
72 #include "wdt-recovery.h"
73
74 /* All units are in millicelsius */
75 static struct tegra_thermal_data thermal_data = {
76         .temp_shutdown = 90000,
77         .temp_offset = TDIODE_OFFSET, /* temps based on tdiode */
78 #ifdef CONFIG_TEGRA_EDP_LIMITS
79         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
80         .hysteresis_edp = 3000,
81 #endif
82 #ifdef CONFIG_TEGRA_THERMAL_THROTTLE
83         .temp_throttle = 85000,
84         .tc1 = 0,
85         .tc2 = 1,
86         .passive_delay = 2000,
87 #endif
88 };
89
90 static struct rfkill_gpio_platform_data cardhu_bt_rfkill_pdata[] = {
91         {
92                 .name           = "bt_rfkill",
93                 .shutdown_gpio  = TEGRA_GPIO_PU0,
94                 .reset_gpio     = TEGRA_GPIO_INVALID,
95                 .type           = RFKILL_TYPE_BLUETOOTH,
96         },
97 };
98
99 static struct platform_device cardhu_bt_rfkill_device = {
100         .name = "rfkill_gpio",
101         .id             = -1,
102         .dev = {
103                 .platform_data = &cardhu_bt_rfkill_pdata,
104         },
105 };
106
107 static struct resource cardhu_bluesleep_resources[] = {
108         [0] = {
109                 .name = "gpio_host_wake",
110                         .start  = TEGRA_GPIO_PU6,
111                         .end    = TEGRA_GPIO_PU6,
112                         .flags  = IORESOURCE_IO,
113         },
114         [1] = {
115                 .name = "gpio_ext_wake",
116                         .start  = TEGRA_GPIO_PU1,
117                         .end    = TEGRA_GPIO_PU1,
118                         .flags  = IORESOURCE_IO,
119         },
120         [2] = {
121                 .name = "host_wake",
122                         .start  = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PU6),
123                         .end    = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PU6),
124                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
125         },
126 };
127
128 static struct platform_device cardhu_bluesleep_device = {
129         .name           = "bluesleep",
130         .id             = -1,
131         .num_resources  = ARRAY_SIZE(cardhu_bluesleep_resources),
132         .resource       = cardhu_bluesleep_resources,
133 };
134
135 static noinline void __init cardhu_setup_bluesleep(void)
136 {
137         platform_device_register(&cardhu_bluesleep_device);
138         return;
139 }
140
141 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
142         /* name         parent          rate            enabled */
143         { "pll_m",      NULL,           0,              false},
144         { "hda",        "pll_p",        108000000,      false},
145         { "hda2codec_2x","pll_p",       48000000,       false},
146         { "pwm",        "pll_p",        3187500,        false},
147         { "blink",      "clk_32k",      32768,          true},
148         { "i2s0",       "pll_a_out0",   0,              false},
149         { "i2s1",       "pll_a_out0",   0,              false},
150         { "i2s3",       "pll_a_out0",   0,              false},
151         { "spdif_out",  "pll_a_out0",   0,              false},
152         { "d_audio",    "clk_m",        12000000,       false},
153         { "dam0",       "clk_m",        12000000,       false},
154         { "dam1",       "clk_m",        12000000,       false},
155         { "dam2",       "clk_m",        12000000,       false},
156         { "audio1",     "i2s1_sync",    0,              false},
157         { "audio3",     "i2s3_sync",    0,              false},
158         { "vi_sensor",  "pll_p",        150000000,      false},
159         { "i2c1",       "pll_p",        3200000,        false},
160         { "i2c2",       "pll_p",        3200000,        false},
161         { "i2c3",       "pll_p",        3200000,        false},
162         { "i2c4",       "pll_p",        3200000,        false},
163         { "i2c5",       "pll_p",        3200000,        false},
164         { NULL,         NULL,           0,              0},
165 };
166
167 static struct pn544_i2c_platform_data nfc_pdata = {
168         .irq_gpio = TEGRA_GPIO_PX0,
169         .ven_gpio = TEGRA_GPIO_PP3,
170         .firm_gpio = TEGRA_GPIO_PO7,
171         };
172
173 static struct i2c_board_info __initdata cardhu_i2c_bus3_board_info[] = {
174         {
175                 I2C_BOARD_INFO("pn544", 0x28),
176                 .platform_data = &nfc_pdata,
177                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PX0),
178         },
179 };
180 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
181         .adapter_nr     = 0,
182         .bus_count      = 1,
183         .bus_clk_rate   = { 100000, 0 },
184         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
185         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
186         .arb_recovery = arb_lost_recovery,
187 };
188
189 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
190         .adapter_nr     = 1,
191         .bus_count      = 1,
192         .bus_clk_rate   = { 400000, 0 },
193         .is_clkon_always = true,
194         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
195         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
196         .arb_recovery = arb_lost_recovery,
197 };
198
199 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
200         .adapter_nr     = 2,
201         .bus_count      = 1,
202         .bus_clk_rate   = { 100000, 0 },
203         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
204         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
205         .arb_recovery = arb_lost_recovery,
206 };
207
208 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
209         .adapter_nr     = 3,
210         .bus_count      = 1,
211         .bus_clk_rate   = { 10000, 0 },
212         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
213         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
214         .arb_recovery = arb_lost_recovery,
215 };
216
217 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
218         .adapter_nr     = 4,
219         .bus_count      = 1,
220         .bus_clk_rate   = { 400000, 0 },
221         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
222         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
223         .arb_recovery = arb_lost_recovery,
224 };
225
226
227 #if 0
228 struct tegra_wired_jack_conf audio_wr_jack_conf = {
229         .hp_det_n = TEGRA_GPIO_PW2,
230         .en_mic_ext = TEGRA_GPIO_PX1,
231         .en_mic_int = TEGRA_GPIO_PX0,
232 };
233 #endif
234
235 static struct wm8903_platform_data cardhu_wm8903_pdata = {
236         .irq_active_low = 0,
237         .micdet_cfg = 0,
238         .micdet_delay = 100,
239         .gpio_base = CARDHU_GPIO_WM8903(0),
240         .gpio_cfg = {
241                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP1_FN_SHIFT),
242                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP2_FN_SHIFT) |
243                         WM8903_GP2_DIR,
244                 0,
245                 WM8903_GPIO_NO_CONFIG,
246                 WM8903_GPIO_NO_CONFIG,
247         },
248 };
249
250 /* Equalizer filter coefs generated from the MAXIM MAX98095
251  * evkit software tool */
252 static struct max98095_eq_cfg max98095_eq_cfg[] = {
253         {
254                 .name = "FLAT",
255                 .rate = 44100,
256                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
257                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
258                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
259                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
260                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
261         },
262         {
263                 .name = "LOWPASS1K",
264                 .rate = 44100,
265                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
266                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
267                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
268                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
269                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
270         },
271         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
272                 .name = "HIBOOST",
273                 .rate = 44100,
274                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
275                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
276                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
277                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
278                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
279         },
280         { /* BASS=12dB, TREBLE=+12dB */
281                 .name = "LOUD12DB",
282                 .rate = 44100,
283                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
284                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
285                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
286                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
287                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
288         },
289         {
290                 .name = "FLAT",
291                 .rate = 16000,
292                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
293                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
294                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
295                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
296                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
297         },
298         {
299                 .name = "LOWPASS1K",
300                 .rate = 16000,
301                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
302                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
303                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
304                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
305                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
306         },
307         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
308                 .name = "HIBOOST",
309                 .rate = 16000,
310                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
311                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
312                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
313                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
314                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
315         },
316         { /* BASS=12dB, TREBLE=+12dB */
317                 .name = "LOUD12DB",
318                 .rate = 16000,
319                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
320                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
321                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
322                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
323                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
324         },
325 };
326
327 static struct max98095_pdata cardhu_max98095_pdata = {
328         /* equalizer configuration */
329         .eq_cfg = max98095_eq_cfg,
330         .eq_cfgcnt = ARRAY_SIZE(max98095_eq_cfg),
331
332         /* Biquad filter response configuration */
333         .bq_cfg = NULL,
334         .bq_cfgcnt = 0,
335
336         /* microphone configuration */
337         .digmic_left_mode = 1,
338         .digmic_right_mode = 1,
339 };
340
341 static struct i2c_board_info __initdata cardhu_codec_wm8903_info = {
342         I2C_BOARD_INFO("wm8903", 0x1a),
343         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
344         .platform_data = &cardhu_wm8903_pdata,
345 };
346
347 static struct i2c_board_info __initdata cardhu_codec_aic326x_info = {
348         I2C_BOARD_INFO("aic3262-codec", 0x18),
349         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
350 };
351
352 static struct i2c_board_info __initdata cardhu_codec_max98095_info = {
353         I2C_BOARD_INFO("max98095", 0x10),
354         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
355         .platform_data = &cardhu_max98095_pdata,
356 };
357
358 static void cardhu_i2c_init(void)
359 {
360         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
361         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
362         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
363         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
364         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
365
366         platform_device_register(&tegra_i2c_device5);
367         platform_device_register(&tegra_i2c_device4);
368         platform_device_register(&tegra_i2c_device3);
369         platform_device_register(&tegra_i2c_device2);
370         platform_device_register(&tegra_i2c_device1);
371
372         i2c_register_board_info(4, &cardhu_codec_wm8903_info, 1);
373         i2c_register_board_info(4, &cardhu_codec_max98095_info, 1);
374         i2c_register_board_info(4, &cardhu_codec_aic326x_info, 1);
375
376         i2c_register_board_info(2, cardhu_i2c_bus3_board_info, 1);
377 }
378
379 static struct platform_device *cardhu_uart_devices[] __initdata = {
380         &tegra_uarta_device,
381         &tegra_uartb_device,
382         &tegra_uartc_device,
383         &tegra_uartd_device,
384         &tegra_uarte_device,
385 };
386 static struct uart_clk_parent uart_parent_clk[] = {
387         [0] = {.name = "clk_m"},
388         [1] = {.name = "pll_p"},
389 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
390         [2] = {.name = "pll_m"},
391 #endif
392 };
393
394 static struct tegra_uart_platform_data cardhu_uart_pdata;
395 static struct tegra_uart_platform_data cardhu_loopback_uart_pdata;
396
397 static void __init uart_debug_init(void)
398 {
399         struct board_info board_info;
400         int debug_port_id;
401
402         tegra_get_board_info(&board_info);
403
404         debug_port_id = get_tegra_uart_debug_port_id();
405         if (debug_port_id < 0) {
406                 debug_port_id = 0;
407                         /* UARTB is debug port
408                          *       for SLT - E1186/E1187/PM269
409                          *       for E1256/E1257
410                          */
411                 if (((board_info.sku & SKU_SLT_ULPI_SUPPORT) &&
412                         ((board_info.board_id == BOARD_E1186) ||
413                         (board_info.board_id == BOARD_E1187) ||
414                         (board_info.board_id == BOARD_PM269))) ||
415                         (board_info.board_id == BOARD_E1256) ||
416                         (board_info.board_id == BOARD_E1257))
417                                 debug_port_id = 1;
418         }
419
420         switch (debug_port_id) {
421         case 0:
422                 /* UARTA is the debug port. */
423                 pr_info("Selecting UARTA as the debug console\n");
424                 cardhu_uart_devices[0] = &debug_uarta_device;
425                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
426                 debug_uart_port_base = ((struct plat_serial8250_port *)(
427                         debug_uarta_device.dev.platform_data))->mapbase;
428                 break;
429
430         case 1:
431                 /* UARTB is the debug port. */
432                 pr_info("Selecting UARTB as the debug console\n");
433                 cardhu_uart_devices[1] = &debug_uartb_device;
434                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartb");
435                 debug_uart_port_base = ((struct plat_serial8250_port *)(
436                         debug_uartb_device.dev.platform_data))->mapbase;
437                 break;
438
439         case 2:
440                 /* UARTC is the debug port. */
441                 pr_info("Selecting UARTC as the debug console\n");
442                 cardhu_uart_devices[2] = &debug_uartc_device;
443                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartc");
444                 debug_uart_port_base = ((struct plat_serial8250_port *)(
445                         debug_uartc_device.dev.platform_data))->mapbase;
446                 break;
447
448         case 3:
449                 /* UARTD is the debug port. */
450                 pr_info("Selecting UARTD as the debug console\n");
451                 cardhu_uart_devices[3] = &debug_uartd_device;
452                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartd");
453                 debug_uart_port_base = ((struct plat_serial8250_port *)(
454                         debug_uartd_device.dev.platform_data))->mapbase;
455                 break;
456
457         case 4:
458                 /* UARTE is the debug port. */
459                 pr_info("Selecting UARTE as the debug console\n");
460                 cardhu_uart_devices[4] = &debug_uarte_device;
461                 debug_uart_clk =  clk_get_sys("serial8250.0", "uarte");
462                 debug_uart_port_base = ((struct plat_serial8250_port *)(
463                         debug_uarte_device.dev.platform_data))->mapbase;
464                 break;
465
466         default:
467                 pr_info("The debug console id %d is invalid, Assuming UARTA", debug_port_id);
468                 cardhu_uart_devices[0] = &debug_uarta_device;
469                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
470                 debug_uart_port_base = ((struct plat_serial8250_port *)(
471                         debug_uarta_device.dev.platform_data))->mapbase;
472                 break;
473         }
474         return;
475 }
476
477 static void __init cardhu_uart_init(void)
478 {
479         struct clk *c;
480         int i;
481
482         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
483                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
484                 if (IS_ERR_OR_NULL(c)) {
485                         pr_err("Not able to get the clock for %s\n",
486                                                 uart_parent_clk[i].name);
487                         continue;
488                 }
489                 uart_parent_clk[i].parent_clk = c;
490                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
491         }
492         cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
493         cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
494         cardhu_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
495         cardhu_loopback_uart_pdata.parent_clk_count =
496                                                 ARRAY_SIZE(uart_parent_clk);
497         cardhu_loopback_uart_pdata.is_loopback = true;
498         tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
499         tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
500         tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
501         tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
502         /* UARTE is used for loopback test purpose */
503         tegra_uarte_device.dev.platform_data = &cardhu_loopback_uart_pdata;
504
505         /* Register low speed only if it is selected */
506         if (!is_tegra_debug_uartport_hs()) {
507                 uart_debug_init();
508                 /* Clock enable for the debug channel */
509                 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
510                         pr_info("The debug console clock name is %s\n",
511                                                 debug_uart_clk->name);
512                         c = tegra_get_clock_by_name("pll_p");
513                         if (IS_ERR_OR_NULL(c))
514                                 pr_err("Not getting the parent clock pll_p\n");
515                         else
516                                 clk_set_parent(debug_uart_clk, c);
517
518                         clk_enable(debug_uart_clk);
519                         clk_set_rate(debug_uart_clk, clk_get_rate(c));
520                 } else {
521                         pr_err("Not getting the clock %s for debug console\n",
522                                         debug_uart_clk->name);
523                 }
524         }
525
526         platform_add_devices(cardhu_uart_devices,
527                                 ARRAY_SIZE(cardhu_uart_devices));
528 }
529
530 static struct platform_device tegra_camera = {
531         .name = "tegra_camera",
532         .id = -1,
533 };
534
535 static struct platform_device *cardhu_spi_devices[] __initdata = {
536         &tegra_spi_device4,
537 };
538
539 static struct platform_device *touch_spi_device[] __initdata = {
540         &tegra_spi_device1,
541 };
542
543 struct spi_clk_parent spi_parent_clk[] = {
544         [0] = {.name = "pll_p"},
545 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
546         [1] = {.name = "pll_m"},
547         [2] = {.name = "clk_m"},
548 #else
549         [1] = {.name = "clk_m"},
550 #endif
551 };
552
553 static struct tegra_spi_platform_data cardhu_spi_pdata = {
554         .is_dma_based           = true,
555         .max_dma_buffer         = (16 * 1024),
556         .is_clkon_always        = false,
557         .max_rate               = 100000000,
558 };
559
560 static void __init cardhu_spi_init(void)
561 {
562         int i;
563         struct clk *c;
564         struct board_info board_info, display_board_info;
565
566         tegra_get_board_info(&board_info);
567         tegra_get_display_board_info(&display_board_info);
568
569         for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
570                 c = tegra_get_clock_by_name(spi_parent_clk[i].name);
571                 if (IS_ERR_OR_NULL(c)) {
572                         pr_err("Not able to get the clock for %s\n",
573                                                 spi_parent_clk[i].name);
574                         continue;
575                 }
576                 spi_parent_clk[i].parent_clk = c;
577                 spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
578         }
579         cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
580         cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
581         tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
582         platform_add_devices(cardhu_spi_devices,
583                                 ARRAY_SIZE(cardhu_spi_devices));
584
585         if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
586                 platform_add_devices(touch_spi_device,
587                                 ARRAY_SIZE(touch_spi_device));
588         }
589         if (board_info.board_id == BOARD_E1198) {
590                 tegra_spi_device2.dev.platform_data = &cardhu_spi_pdata;
591                 platform_device_register(&tegra_spi_device2);
592                 tegra_spi_slave_device1.dev.platform_data = &cardhu_spi_pdata;
593                 platform_device_register(&tegra_spi_slave_device1);
594         }
595 }
596
597 static void __init cardhu_dtv_init(void)
598 {
599         struct board_info board_info;
600
601         tegra_get_board_info(&board_info);
602
603         if (board_info.board_id == BOARD_E1186)
604                 platform_device_register(&tegra_dtv_device);
605 }
606
607 static struct resource tegra_rtc_resources[] = {
608         [0] = {
609                 .start = TEGRA_RTC_BASE,
610                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
611                 .flags = IORESOURCE_MEM,
612         },
613         [1] = {
614                 .start = INT_RTC,
615                 .end = INT_RTC,
616                 .flags = IORESOURCE_IRQ,
617         },
618 };
619
620 static struct platform_device tegra_rtc_device = {
621         .name = "tegra_rtc",
622         .id   = -1,
623         .resource = tegra_rtc_resources,
624         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
625 };
626
627 static struct tegra_wm8903_platform_data cardhu_audio_wm8903_pdata = {
628         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
629         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
630         .gpio_hp_mute           = -1,
631         .gpio_int_mic_en        = -1,
632         .gpio_ext_mic_en        = -1,
633 };
634
635 static struct tegra_asoc_platform_data cardhu_audio_max98095_pdata = {
636         .gpio_spkr_en           = -1,
637         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
638         .gpio_hp_mute           = -1,
639         .gpio_int_mic_en        = -1,
640         .gpio_ext_mic_en        = -1,
641 };
642
643 static struct platform_device cardhu_audio_wm8903_device = {
644         .name   = "tegra-snd-wm8903",
645         .id     = 0,
646         .dev    = {
647                 .platform_data = &cardhu_audio_wm8903_pdata,
648         },
649 };
650
651 static struct platform_device cardhu_audio_max98095_device = {
652         .name   = "tegra-snd-max98095",
653         .id     = 0,
654         .dev    = {
655                 .platform_data = &cardhu_audio_max98095_pdata,
656         },
657 };
658
659 static struct tegra_asoc_platform_data cardhu_audio_aic326x_pdata = {
660         .gpio_spkr_en           = -1,
661         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
662         .gpio_hp_mute           = -1,
663         .gpio_int_mic_en        = -1,
664         .gpio_ext_mic_en        = -1,
665         /*defaults for Verbier-Cardhu board with TI AIC326X codec*/
666         .audio_port_id          = {
667                 [HIFI_CODEC] = 0,
668                 [BASEBAND] = -1,
669                 [BT_SCO] = 3,
670         },
671         .baseband_param         = {
672                 .rate = -1,
673                 .channels = -1,
674         },
675 };
676
677 static struct platform_device cardhu_audio_aic326x_device = {
678         .name   = "tegra-snd-aic326x",
679         .id     = 0,
680         .dev    = {
681                 .platform_data  = &cardhu_audio_aic326x_pdata,
682         },
683 };
684
685 static struct platform_device *cardhu_devices[] __initdata = {
686         &tegra_pmu_device,
687         &tegra_rtc_device,
688         &tegra_udc_device,
689 #if defined(CONFIG_TEGRA_IOVMM_SMMU) ||  defined(CONFIG_TEGRA_IOMMU_SMMU)
690         &tegra_smmu_device,
691 #endif
692         &tegra_wdt_device,
693 #if defined(CONFIG_TEGRA_AVP)
694         &tegra_avp_device,
695 #endif
696         &tegra_camera,
697 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
698         &tegra_se_device,
699 #endif
700         &tegra_ahub_device,
701         &tegra_dam_device0,
702         &tegra_dam_device1,
703         &tegra_dam_device2,
704         &tegra_i2s_device0,
705         &tegra_i2s_device1,
706         &tegra_i2s_device3,
707         &tegra_spdif_device,
708         &spdif_dit_device,
709         &bluetooth_dit_device,
710         &baseband_dit_device,
711         &cardhu_bt_rfkill_device,
712         &tegra_pcm_device,
713         &cardhu_audio_wm8903_device,
714         &cardhu_audio_max98095_device,
715         &cardhu_audio_aic326x_device,
716         &tegra_hda_device,
717 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
718         &tegra_aes_device,
719 #endif
720 };
721
722 #define E1506_MXT_CONFIG_CRC 0x62F903
723 static const u8 e1506_config[] = {
724         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
725         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x05, 0x01, 0x00,
726         0x00, 0x1E, 0x0A, 0x8B, 0x00, 0x00, 0x13, 0x0B,
727         0x00, 0x10, 0x32, 0x03, 0x03, 0x00, 0x03, 0x01,
728         0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xBF, 0x03, 0x1B,
729         0x02, 0x00, 0x00, 0x37, 0x37, 0x00, 0x00, 0x00,
730         0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
731         0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
732         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
733         0x00, 0x00, 0x00, 0xA9, 0x7F, 0x9A, 0x0E, 0x00,
734         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
735         0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00,
736         0x00, 0x00, 0x03, 0x23, 0x00, 0x00, 0x00, 0x0A,
737         0x0F, 0x14, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00,
738         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
739         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
740         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
741         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
742         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
743         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
744         0x00, 0x00, 0x00, 0x01, 0x00, 0x03, 0x08, 0x10,
745         0x00
746 };
747
748 #define MXT_CONFIG_CRC  0xD62DE8
749 static const u8 config[] = {
750         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
751         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
752         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
753         0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
754         0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
755         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
756         0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
757         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
758         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
759         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
760         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
761         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
762         0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
763         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
764         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
765         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
766         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
767         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
768         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
769         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
770 };
771
772 #define MXT_CONFIG_CRC_SKU2000  0xA24D9A
773 static const u8 config_sku2000[] = {
774         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
775         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
776         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
777         0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00,  //23=thr  2 di
778         0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
779         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
780         0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00,  //0A=limit
781         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
782         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
783         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
784         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
785         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
786         0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
787         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
788         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
789         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
790         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
791         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
792         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
793         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
794 };
795
796 static struct mxt_platform_data atmel_mxt_info = {
797         .x_line         = 27,
798         .y_line         = 42,
799         .x_size         = 768,
800         .y_size         = 1366,
801         .blen           = 0x20,
802         .threshold      = 0x3C,
803         .voltage        = 3300000,              /* 3.3V */
804         .orient         = 5,
805         .config         = config,
806         .config_length  = 157,
807         .config_crc     = MXT_CONFIG_CRC,
808         .irqflags       = IRQF_TRIGGER_FALLING,
809 /*      .read_chg       = &read_chg, */
810         .read_chg       = NULL,
811 };
812
813 static struct mxt_platform_data e1506_atmel_mxt_info = {
814         .x_line         = 19,
815         .y_line         = 11,
816         .x_size         = 960,
817         .y_size         = 540,
818         .blen           = 0x10,
819         .threshold      = 0x32,
820         .voltage        = 3300000,              /* 3.3V */
821         .orient         = 3,
822         .config         = e1506_config,
823         .config_length  = 168,
824         .config_crc     = E1506_MXT_CONFIG_CRC,
825         .irqflags       = IRQF_TRIGGER_FALLING,
826 /*      .read_chg       = &read_chg, */
827         .read_chg       = NULL,
828 };
829
830 static struct i2c_board_info __initdata atmel_i2c_info[] = {
831         {
832                 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
833                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PH4),
834                 .platform_data = &atmel_mxt_info,
835         }
836 };
837
838 static struct i2c_board_info __initdata e1506_atmel_i2c_info[] = {
839         {
840                 I2C_BOARD_INFO("atmel_mxt_ts", 0x4A),
841                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PH4),
842                 .platform_data = &e1506_atmel_mxt_info,
843         }
844 };
845
846 static __initdata struct tegra_clk_init_table spi_clk_init_table[] = {
847         /* name         parent          rate            enabled */
848         { "sbc1",       "pll_p",        52000000,       true},
849         { NULL,         NULL,           0,              0},
850 };
851
852 static int __init cardhu_touch_init(void)
853 {
854         struct board_info BoardInfo, DisplayBoardInfo;
855
856         tegra_get_board_info(&BoardInfo);
857         tegra_get_display_board_info(&DisplayBoardInfo);
858         if (DisplayBoardInfo.board_id == BOARD_DISPLAY_PM313) {
859                 tegra_clk_init_from_table(spi_clk_init_table);
860
861                 touch_init_raydium(TEGRA_GPIO_PH4, TEGRA_GPIO_PH6, 2);
862         } else {
863                 gpio_request(TEGRA_GPIO_PH4, "atmel-irq");
864                 gpio_direction_input(TEGRA_GPIO_PH4);
865
866                 gpio_request(TEGRA_GPIO_PH6, "atmel-reset");
867                 gpio_direction_output(TEGRA_GPIO_PH6, 0);
868                 msleep(1);
869                 gpio_set_value(TEGRA_GPIO_PH6, 1);
870                 msleep(100);
871
872                 if ((BoardInfo.sku & SKU_TOUCH_MASK) == SKU_TOUCH_2000) {
873                         atmel_mxt_info.config = config_sku2000;
874                         atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
875                 }
876
877                 if (DisplayBoardInfo.board_id == BOARD_DISPLAY_E1506)
878                         i2c_register_board_info(1, e1506_atmel_i2c_info, 1);
879                 else
880                         i2c_register_board_info(1, atmel_i2c_info, 1);
881         }
882
883         return 0;
884 }
885
886 #if defined(CONFIG_USB_SUPPORT)
887
888 static void cardu_usb_hsic_postsupend(void)
889 {
890 #ifdef CONFIG_TEGRA_BB_XMM_POWER
891         baseband_xmm_set_power_status(BBXMM_PS_L2);
892 #endif
893 }
894
895 static void cardu_usb_hsic_preresume(void)
896 {
897 #ifdef CONFIG_TEGRA_BB_XMM_POWER
898         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
899 #endif
900 }
901
902 static void cardu_usb_hsic_phy_ready(void)
903 {
904 #ifdef CONFIG_TEGRA_BB_XMM_POWER
905         baseband_xmm_set_power_status(BBXMM_PS_L0);
906 #endif
907 }
908
909 static void cardu_usb_hsic_phy_off(void)
910 {
911 #ifdef CONFIG_TEGRA_BB_XMM_POWER
912         baseband_xmm_set_power_status(BBXMM_PS_L3);
913 #endif
914 }
915
916 static struct tegra_usb_phy_platform_ops hsic_xmm_plat_ops = {
917         .post_suspend = cardu_usb_hsic_postsupend,
918         .pre_resume = cardu_usb_hsic_preresume,
919         .port_power = cardu_usb_hsic_phy_ready,
920         .post_phy_off = cardu_usb_hsic_phy_off,
921 };
922
923 static struct tegra_usb_platform_data tegra_ehci2_hsic_xmm_pdata = {
924         .port_otg = false,
925         .has_hostpc = true,
926         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
927         .op_mode        = TEGRA_USB_OPMODE_HOST,
928         .u_data.host = {
929                 .vbus_gpio = -1,
930                 .hot_plug = false,
931                 .remote_wakeup_supported = false,
932                 .power_off_on_suspend = false,
933         },
934         .u_cfg.hsic = {
935                 .sync_start_delay = 9,
936                 .idle_wait_delay = 17,
937                 .term_range_adj = 0,
938                 .elastic_underrun_limit = 16,
939                 .elastic_overrun_limit = 16,
940         },
941         .ops = &hsic_xmm_plat_ops,
942 };
943 #endif
944
945 static int hsic_enable_gpio = -1;
946 static int hsic_reset_gpio = -1;
947
948 void hsic_platform_open(void)
949 {
950         int reset_gpio = 0, enable_gpio = 0;
951
952         if (hsic_enable_gpio != -1)
953                 enable_gpio = gpio_request(hsic_enable_gpio, "uhsic_enable");
954         if (hsic_reset_gpio != -1)
955                 reset_gpio = gpio_request(hsic_reset_gpio, "uhsic_reset");
956         /* hsic enable signal deasserted, hsic reset asserted */
957         if (!enable_gpio)
958                 gpio_direction_output(hsic_enable_gpio, 0 /* deasserted */);
959         if (!reset_gpio)
960                 gpio_direction_output(hsic_reset_gpio, 0 /* asserted */);
961         if (!enable_gpio)
962                 tegra_gpio_enable(hsic_enable_gpio);
963         if (!reset_gpio)
964                 tegra_gpio_enable(hsic_reset_gpio);
965         /* keep hsic reset asserted for 1 ms */
966         udelay(1000);
967         /* enable (power on) hsic */
968         if (!enable_gpio)
969                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
970         udelay(1000);
971         /* deassert reset */
972         if (!reset_gpio)
973                 gpio_set_value_cansleep(hsic_reset_gpio, 1);
974
975 }
976
977 void hsic_platform_close(void)
978 {
979         if (hsic_enable_gpio != -1) {
980                 gpio_set_value(hsic_enable_gpio, 0);
981                 gpio_free(hsic_enable_gpio);
982         }
983         if (hsic_reset_gpio != -1) {
984                 gpio_set_value(hsic_reset_gpio, 0);
985                 gpio_free(hsic_reset_gpio);
986         }
987 }
988
989 void hsic_power_on(void)
990 {
991         if (hsic_enable_gpio != -1) {
992                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
993                 udelay(1000);
994         }
995 }
996
997 void hsic_power_off(void)
998 {
999         if (hsic_enable_gpio != -1) {
1000                 gpio_set_value_cansleep(hsic_enable_gpio, 0);
1001                 udelay(1000);
1002         }
1003 }
1004
1005 #if defined(CONFIG_USB_SUPPORT)
1006 static struct tegra_usb_phy_platform_ops hsic_plat_ops = {
1007         .open = hsic_platform_open,
1008         .close = hsic_platform_close,
1009         .pre_phy_on = hsic_power_on,
1010         .post_phy_off = hsic_power_off,
1011 };
1012
1013 static struct tegra_usb_platform_data tegra_ehci2_hsic_pdata = {
1014         .port_otg = false,
1015         .has_hostpc = true,
1016         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
1017         .op_mode        = TEGRA_USB_OPMODE_HOST,
1018         .u_data.host = {
1019                 .vbus_gpio = -1,
1020                 .hot_plug = false,
1021                 .remote_wakeup_supported = false,
1022                 .power_off_on_suspend = false,
1023         },
1024         .u_cfg.hsic = {
1025                 .sync_start_delay = 9,
1026                 .idle_wait_delay = 17,
1027                 .term_range_adj = 0,
1028                 .elastic_underrun_limit = 16,
1029                 .elastic_overrun_limit = 16,
1030         },
1031         .ops = &hsic_plat_ops,
1032 };
1033
1034 static struct tegra_usb_platform_data tegra_udc_pdata = {
1035         .port_otg = true,
1036         .has_hostpc = true,
1037         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1038         .op_mode = TEGRA_USB_OPMODE_DEVICE,
1039         .u_data.dev = {
1040                 .vbus_pmu_irq = 0,
1041                 .vbus_gpio = -1,
1042                 .charging_supported = false,
1043                 .remote_wakeup_supported = false,
1044         },
1045         .u_cfg.utmi = {
1046                 .hssync_start_delay = 0,
1047                 .elastic_limit = 16,
1048                 .idle_wait_delay = 17,
1049                 .term_range_adj = 6,
1050                 .xcvr_setup = 8,
1051                 .xcvr_lsfslew = 2,
1052                 .xcvr_lsrslew = 2,
1053                 .xcvr_setup_offset = 0,
1054                 .xcvr_use_fuses = 1,
1055         },
1056 };
1057
1058 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
1059         .port_otg = false,
1060         .has_hostpc = true,
1061         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1062         .op_mode        = TEGRA_USB_OPMODE_HOST,
1063         .u_data.host = {
1064                 .vbus_gpio = -1,
1065                 .hot_plug = false,
1066                 .remote_wakeup_supported = true,
1067                 .power_off_on_suspend = true,
1068         },
1069         .u_cfg.utmi = {
1070                 .hssync_start_delay = 0,
1071                 .elastic_limit = 16,
1072                 .idle_wait_delay = 17,
1073                 .term_range_adj = 6,
1074                 .xcvr_setup = 15,
1075                 .xcvr_lsfslew = 2,
1076                 .xcvr_lsrslew = 2,
1077                 .xcvr_setup_offset = 0,
1078                 .xcvr_use_fuses = 1,
1079         },
1080 };
1081
1082 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
1083         .port_otg = false,
1084         .has_hostpc = true,
1085         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1086         .op_mode = TEGRA_USB_OPMODE_HOST,
1087         .u_data.host = {
1088                 .vbus_gpio = -1,
1089                 .vbus_reg = "vdd_vbus_typea_usb",
1090                 .hot_plug = true,
1091                 .remote_wakeup_supported = true,
1092                 .power_off_on_suspend = true,
1093         },
1094         .u_cfg.utmi = {
1095                 .hssync_start_delay = 0,
1096                 .elastic_limit = 16,
1097                 .idle_wait_delay = 17,
1098                 .term_range_adj = 6,
1099                 .xcvr_setup = 8,
1100                 .xcvr_lsfslew = 2,
1101                 .xcvr_lsrslew = 2,
1102                 .xcvr_setup_offset = 0,
1103                 .xcvr_use_fuses = 1,
1104         },
1105 };
1106
1107 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
1108         .port_otg = true,
1109         .has_hostpc = true,
1110         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1111         .op_mode = TEGRA_USB_OPMODE_HOST,
1112         .u_data.host = {
1113                 .vbus_gpio = -1,
1114                 .vbus_reg = "vdd_vbus_micro_usb",
1115                 .hot_plug = true,
1116                 .remote_wakeup_supported = true,
1117                 .power_off_on_suspend = true,
1118         },
1119         .u_cfg.utmi = {
1120                 .hssync_start_delay = 0,
1121                 .elastic_limit = 16,
1122                 .idle_wait_delay = 17,
1123                 .term_range_adj = 6,
1124                 .xcvr_setup = 15,
1125                 .xcvr_lsfslew = 2,
1126                 .xcvr_lsrslew = 2,
1127                 .xcvr_setup_offset = 0,
1128                 .xcvr_use_fuses = 1,
1129         },
1130 };
1131
1132 static struct tegra_usb_otg_data tegra_otg_pdata = {
1133         .ehci_device = &tegra_ehci1_device,
1134         .ehci_pdata = &tegra_ehci1_utmi_pdata,
1135 };
1136 #endif
1137
1138 #if defined(CONFIG_USB_SUPPORT)
1139 static void cardhu_usb_init(void)
1140 {
1141         struct board_info bi;
1142
1143         tegra_get_board_info(&bi);
1144
1145         /* OTG should be the first to be registered */
1146         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1147         platform_device_register(&tegra_otg_device);
1148
1149         /* setup the udc platform data */
1150         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1151
1152         if (bi.board_id == BOARD_PM267) {
1153                 hsic_enable_gpio = EN_HSIC_GPIO;
1154                 hsic_reset_gpio = PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
1155                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1156                 platform_device_register(&tegra_ehci2_device);
1157         } else if (bi.board_id == BOARD_E1256) {
1158                 hsic_enable_gpio = EN_HSIC_GPIO;
1159                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1160                 platform_device_register(&tegra_ehci2_device);
1161         } else if (bi.board_id == BOARD_E1186) {
1162                 tegra_ehci2_device.dev.platform_data =
1163                                                 &tegra_ehci2_hsic_xmm_pdata;
1164                 /* ehci2 registration happens in baseband-xmm-power  */
1165         } else {
1166                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_utmi_pdata;
1167                 platform_device_register(&tegra_ehci2_device);
1168         }
1169
1170         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
1171         platform_device_register(&tegra_ehci3_device);
1172
1173 }
1174 #else
1175 static void cardhu_usb_init(void) { }
1176 #endif
1177
1178 static struct baseband_power_platform_data tegra_baseband_power_data = {
1179         .baseband_type = BASEBAND_XMM,
1180         .modem = {
1181         .xmm = {
1182                         .bb_rst = XMM_GPIO_BB_RST,
1183                         .bb_on = XMM_GPIO_BB_ON,
1184                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1185                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1186                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1187                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1188                         .hsic_device = &tegra_ehci2_device,
1189                 },
1190         },
1191 };
1192
1193 static struct platform_device tegra_baseband_power_device = {
1194         .name = "baseband_xmm_power",
1195         .id = -1,
1196         .dev = {
1197                 .platform_data = &tegra_baseband_power_data,
1198         },
1199 };
1200
1201 static struct platform_device tegra_baseband_power2_device = {
1202         .name = "baseband_xmm_power2",
1203         .id = -1,
1204         .dev = {
1205                 .platform_data = &tegra_baseband_power_data,
1206         },
1207 };
1208
1209
1210 static struct tegra_pci_platform_data cardhu_pci_platform_data = {
1211         .port_status[0] = 1,
1212         .port_status[1] = 1,
1213         .port_status[2] = 1,
1214         .use_dock_detect        = 0,
1215         .gpio           = 0,
1216 };
1217
1218 static void cardhu_pci_init(void)
1219 {
1220         struct board_info board_info;
1221
1222         tegra_get_board_info(&board_info);
1223         if (board_info.board_id == BOARD_E1291) {
1224                 cardhu_pci_platform_data.port_status[0] = 0;
1225                 cardhu_pci_platform_data.port_status[1] = 0;
1226                 cardhu_pci_platform_data.port_status[2] = 1;
1227                 cardhu_pci_platform_data.use_dock_detect = 1;
1228                 cardhu_pci_platform_data.gpio = DOCK_DETECT_GPIO;
1229         }
1230         if ((board_info.board_id == BOARD_E1186) ||
1231                 (board_info.board_id == BOARD_E1187) ||
1232                 (board_info.board_id == BOARD_E1291)) {
1233                 tegra_pci_device.dev.platform_data = &cardhu_pci_platform_data;
1234                 platform_device_register(&tegra_pci_device);
1235         }
1236 }
1237
1238 static void cardhu_modem_init(void)
1239 {
1240         struct board_info board_info;
1241         int w_disable_gpio, ret;
1242
1243         tegra_get_board_info(&board_info);
1244         switch (board_info.board_id) {
1245         case BOARD_E1291:
1246         case BOARD_E1198:
1247                 if (((board_info.board_id == BOARD_E1291) &&
1248                                 (board_info.fab < BOARD_FAB_A03)) ||
1249                         ((board_info.board_id == BOARD_E1198) &&
1250                                         (board_info.fab < BOARD_FAB_A02))) {
1251                         w_disable_gpio = TEGRA_GPIO_PH5;
1252                 } else {
1253                         w_disable_gpio = TEGRA_GPIO_PDD5;
1254                 }
1255
1256                 ret = gpio_request(w_disable_gpio, "w_disable_gpio");
1257                 if (ret < 0)
1258                         pr_err("%s: gpio_request failed for gpio %d\n",
1259                                 __func__, w_disable_gpio);
1260                 else
1261                         gpio_direction_input(w_disable_gpio);
1262
1263                 /* E1291-A04 & E1198:A02: Set PERST signal to high */
1264                 if (((board_info.board_id == BOARD_E1291) &&
1265                                 (board_info.fab >= BOARD_FAB_A04)) ||
1266                         ((board_info.board_id == BOARD_E1198) &&
1267                                         (board_info.fab >= BOARD_FAB_A02))) {
1268                         ret = gpio_request(TEGRA_GPIO_PH7, "modem_perst");
1269                         if (ret < 0) {
1270                                 pr_err("%s(): Error in allocating gpio "
1271                                         "TEGRA_GPIO_PH7\n", __func__);
1272                                 break;
1273                         }
1274                         gpio_direction_output(TEGRA_GPIO_PH7, 1);
1275                 }
1276                 break;
1277         case BOARD_E1186:
1278                 platform_device_register(&tegra_baseband_power_device);
1279                 platform_device_register(&tegra_baseband_power2_device);
1280                 break;
1281         default:
1282                 break;
1283         }
1284
1285 }
1286
1287 #ifdef CONFIG_SATA_AHCI_TEGRA
1288 static void cardhu_sata_init(void)
1289 {
1290         platform_device_register(&tegra_sata_device);
1291 }
1292 #else
1293 static void cardhu_sata_init(void) { }
1294 #endif
1295
1296 static void __init tegra_cardhu_init(void)
1297 {
1298         tegra_thermal_init(&thermal_data);
1299         tegra_clk_init_from_table(cardhu_clk_init_table);
1300         cardhu_pinmux_init();
1301         cardhu_i2c_init();
1302         cardhu_spi_init();
1303         cardhu_usb_init();
1304 #ifdef CONFIG_TEGRA_EDP_LIMITS
1305         cardhu_edp_init();
1306 #endif
1307         cardhu_uart_init();
1308         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
1309         tegra_ram_console_debug_init();
1310         cardhu_sdhci_init();
1311         cardhu_regulator_init();
1312         cardhu_dtv_init();
1313         cardhu_suspend_init();
1314         cardhu_touch_init();
1315         cardhu_modem_init();
1316         cardhu_kbc_init();
1317         cardhu_scroll_init();
1318         cardhu_keys_init();
1319         cardhu_panel_init();
1320         cardhu_pmon_init();
1321         cardhu_sensors_init();
1322         cardhu_setup_bluesleep();
1323         cardhu_sata_init();
1324         //audio_wired_jack_init();
1325         cardhu_pins_state_init();
1326         cardhu_emc_init();
1327         tegra_release_bootloader_fb();
1328         cardhu_pci_init();
1329 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1330         tegra_wdt_recovery_init();
1331 #endif
1332 }
1333
1334 static void __init tegra_cardhu_reserve(void)
1335 {
1336 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1337         /* support 1920X1200 with 24bpp */
1338         tegra_reserve(0, SZ_8M + SZ_1M, SZ_8M + SZ_1M);
1339 #else
1340         tegra_reserve(SZ_128M, SZ_8M, SZ_8M);
1341 #endif
1342         tegra_ram_console_debug_reserve(SZ_1M);
1343 }
1344
1345 MACHINE_START(CARDHU, "cardhu")
1346         .boot_params    = 0x80000100,
1347         .map_io         = tegra_map_common_io,
1348         .reserve        = tegra_cardhu_reserve,
1349         .init_early     = tegra_init_early,
1350         .init_irq       = tegra_init_irq,
1351         .timer          = &tegra_timer,
1352         .init_machine   = tegra_cardhu_init,
1353 MACHINE_END