arm: tegra: cardhu: separate pinmux and gpio init
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <linux/spi/spi.h>
37 #include <linux/spi/rm31080a_ts.h>
38 #include <linux/i2c/atmel_mxt_ts.h>
39 #include <linux/tegra_uart.h>
40 #include <linux/memblock.h>
41 #include <linux/spi-tegra.h>
42 #include <linux/nfc/pn544.h>
43 #include <linux/rfkill-gpio.h>
44 #include <linux/of_platform.h>
45
46 #include <sound/wm8903.h>
47 #include <sound/max98095.h>
48 #include <media/tegra_dtv.h>
49
50 #include <asm/hardware/gic.h>
51
52 #include <mach/edp.h>
53 #include <mach/clk.h>
54 #include <mach/iomap.h>
55 #include <mach/irqs.h>
56 #include <mach/pinmux.h>
57 #include <mach/iomap.h>
58 #include <mach/io_dpd.h>
59 #include <mach/io.h>
60 #include <mach/i2s.h>
61 #include <mach/tegra_asoc_pdata.h>
62 #include <mach/tegra_wm8903_pdata.h>
63 #include <mach/usb_phy.h>
64 #include <mach/thermal.h>
65 #include <mach/pci.h>
66 #include <mach/gpio-tegra.h>
67 #include <mach/tegra_fiq_debugger.h>
68 #include <linux/thermal.h>
69
70 #include <asm/hardware/gic.h>
71 #include <asm/mach-types.h>
72 #include <asm/mach/arch.h>
73
74 #include "board.h"
75 #include "board-common.h"
76 #include "clock.h"
77 #include "board-cardhu.h"
78 #include "board-touch-raydium.h"
79 #include "devices.h"
80 #include "gpio-names.h"
81 #include "fuse.h"
82 #include "pm.h"
83 #include "baseband-xmm-power.h"
84 #include "wdt-recovery.h"
85 #include "common.h"
86
87 static struct balanced_throttle throttle_list[] = {
88         {
89                 .tegra_cdev = {
90                         .id = CDEV_BTHROT_ID_TJ,
91                 },
92                 .throt_tab_size = 10,
93                 .throt_tab = {
94                         {      0, 1000 },
95                         { 640000, 1000 },
96                         { 640000, 1000 },
97                         { 640000, 1000 },
98                         { 640000, 1000 },
99                         { 640000, 1000 },
100                         { 760000, 1000 },
101                         { 760000, 1050 },
102                         {1000000, 1050 },
103                         {1000000, 1100 },
104                 },
105         },
106 };
107
108 static struct tegra_thermal_bind thermal_binds[] = {
109         /* Thermal Throttling */
110         {
111                 .tdev_id = THERMAL_DEVICE_ID_NCT_EXT,
112                 .cdev_id = CDEV_BTHROT_ID_TJ,
113                 .type = THERMAL_TRIP_PASSIVE,
114                 .passive = {
115                         .trip_temp = 85000,
116                         .tc1 = 0,
117                         .tc2 = 1,
118                         .passive_delay = 2000,
119                 }
120         },
121         /* EDP Capping */
122         {
123                 .tdev_id = THERMAL_DEVICE_ID_NCT_EXT,
124                 .cdev_id = CDEV_EDPTABLE_ID_EDP,
125                 .type = THERMAL_TRIP_ACTIVE,
126                 .get_trip_temp = tegra_edp_get_trip_temp,
127                 .get_trip_size = tegra_edp_get_trip_size,
128         },
129         {
130                 .tdev_id = THERMAL_DEVICE_ID_NULL,
131         },
132 };
133
134 static struct rfkill_gpio_platform_data cardhu_bt_rfkill_pdata[] = {
135         {
136                 .name           = "bt_rfkill",
137                 .shutdown_gpio  = TEGRA_GPIO_PU0,
138                 .reset_gpio     = TEGRA_GPIO_INVALID,
139                 .type           = RFKILL_TYPE_BLUETOOTH,
140         },
141 };
142
143 static struct platform_device cardhu_bt_rfkill_device = {
144         .name = "rfkill_gpio",
145         .id             = -1,
146         .dev = {
147                 .platform_data = &cardhu_bt_rfkill_pdata,
148         },
149 };
150
151 static struct resource cardhu_bluesleep_resources[] = {
152         [0] = {
153                 .name = "gpio_host_wake",
154                         .start  = TEGRA_GPIO_PU6,
155                         .end    = TEGRA_GPIO_PU6,
156                         .flags  = IORESOURCE_IO,
157         },
158         [1] = {
159                 .name = "gpio_ext_wake",
160                         .start  = TEGRA_GPIO_PU1,
161                         .end    = TEGRA_GPIO_PU1,
162                         .flags  = IORESOURCE_IO,
163         },
164         [2] = {
165                 .name = "host_wake",
166                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
167         },
168 };
169
170 static struct platform_device cardhu_bluesleep_device = {
171         .name           = "bluesleep",
172         .id             = -1,
173         .num_resources  = ARRAY_SIZE(cardhu_bluesleep_resources),
174         .resource       = cardhu_bluesleep_resources,
175 };
176
177 static noinline void __init cardhu_setup_bluesleep(void)
178 {
179         cardhu_bluesleep_resources[2].start =
180                 cardhu_bluesleep_resources[2].end =
181                         gpio_to_irq(TEGRA_GPIO_PU6);
182         platform_device_register(&cardhu_bluesleep_device);
183         return;
184 }
185
186 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
187         /* name         parent          rate            enabled */
188         { "pll_m",      NULL,           0,              false},
189         { "hda",        "pll_p",        108000000,      false},
190         { "hda2codec_2x","pll_p",       48000000,       false},
191         { "pwm",        "pll_p",        3187500,        false},
192         { "blink",      "clk_32k",      32768,          true},
193         { "i2s0",       "pll_a_out0",   0,              false},
194         { "i2s1",       "pll_a_out0",   0,              false},
195         { "i2s3",       "pll_a_out0",   0,              false},
196         { "spdif_out",  "pll_a_out0",   0,              false},
197         { "d_audio",    "clk_m",        12000000,       false},
198         { "dam0",       "clk_m",        12000000,       false},
199         { "dam1",       "clk_m",        12000000,       false},
200         { "dam2",       "clk_m",        12000000,       false},
201         { "audio1",     "i2s1_sync",    0,              false},
202         { "audio3",     "i2s3_sync",    0,              false},
203         { "vi_sensor",  "pll_p",        150000000,      false},
204         { "i2c1",       "pll_p",        3200000,        false},
205         { "i2c2",       "pll_p",        3200000,        false},
206         { "i2c3",       "pll_p",        3200000,        false},
207         { "i2c4",       "pll_p",        3200000,        false},
208         { "i2c5",       "pll_p",        3200000,        false},
209         { "vi",         "pll_p",        0,              false},
210         { NULL,         NULL,           0,              0},
211 };
212
213 static struct pn544_i2c_platform_data nfc_pdata = {
214         .irq_gpio = TEGRA_GPIO_PX0,
215         .ven_gpio = TEGRA_GPIO_PP3,
216         .firm_gpio = TEGRA_GPIO_PO7,
217         };
218
219 static struct i2c_board_info __initdata cardhu_i2c_bus3_board_info[] = {
220         {
221                 I2C_BOARD_INFO("pn544", 0x28),
222                 .platform_data = &nfc_pdata,
223         },
224 };
225 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
226         .adapter_nr     = 0,
227         .bus_count      = 1,
228         .bus_clk_rate   = { 100000, 0 },
229         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
230         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
231         .arb_recovery = arb_lost_recovery,
232 };
233
234 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
235         .adapter_nr     = 1,
236         .bus_count      = 1,
237         .bus_clk_rate   = { 400000, 0 },
238         .is_clkon_always = true,
239         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
240         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
241         .arb_recovery = arb_lost_recovery,
242 };
243
244 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
245         .adapter_nr     = 2,
246         .bus_count      = 1,
247         .bus_clk_rate   = { 100000, 0 },
248         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
249         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
250         .arb_recovery = arb_lost_recovery,
251 };
252
253 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
254         .adapter_nr     = 3,
255         .bus_count      = 1,
256         .bus_clk_rate   = { 10000, 0 },
257         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
258         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
259         .arb_recovery = arb_lost_recovery,
260 };
261
262 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
263         .adapter_nr     = 4,
264         .bus_count      = 1,
265         .bus_clk_rate   = { 400000, 0 },
266         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
267         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
268         .arb_recovery = arb_lost_recovery,
269 };
270
271
272 #if 0
273 struct tegra_wired_jack_conf audio_wr_jack_conf = {
274         .hp_det_n = TEGRA_GPIO_PW2,
275         .en_mic_ext = TEGRA_GPIO_PX1,
276         .en_mic_int = TEGRA_GPIO_PX0,
277 };
278 #endif
279
280 static struct wm8903_platform_data cardhu_wm8903_pdata = {
281         .irq_active_low = 0,
282         .micdet_cfg = 0,
283         .micdet_delay = 100,
284         .gpio_base = CARDHU_GPIO_WM8903(0),
285         .gpio_cfg = {
286                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP1_FN_SHIFT),
287                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP2_FN_SHIFT) |
288                         WM8903_GP2_DIR,
289                 WM8903_GPIO_CONFIG_ZERO,
290                 0,
291                 0,
292         },
293 };
294
295 /* Equalizer filter coefs generated from the MAXIM MAX98095
296  * evkit software tool */
297 static struct max98095_eq_cfg max98095_eq_cfg[] = {
298         {
299                 .name = "FLAT",
300                 .rate = 44100,
301                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
302                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
303                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
304                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
305                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
306         },
307         {
308                 .name = "LOWPASS1K",
309                 .rate = 44100,
310                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
311                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
312                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
313                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
314                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
315         },
316         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
317                 .name = "HIBOOST",
318                 .rate = 44100,
319                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
320                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
321                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
322                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
323                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
324         },
325         { /* BASS=12dB, TREBLE=+12dB */
326                 .name = "LOUD12DB",
327                 .rate = 44100,
328                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
329                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
330                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
331                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
332                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
333         },
334         {
335                 .name = "FLAT",
336                 .rate = 16000,
337                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
338                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
339                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
340                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
341                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
342         },
343         {
344                 .name = "LOWPASS1K",
345                 .rate = 16000,
346                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
347                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
348                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
349                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
350                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
351         },
352         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
353                 .name = "HIBOOST",
354                 .rate = 16000,
355                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
356                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
357                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
358                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
359                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
360         },
361         { /* BASS=12dB, TREBLE=+12dB */
362                 .name = "LOUD12DB",
363                 .rate = 16000,
364                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
365                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
366                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
367                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
368                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
369         },
370 };
371
372 static struct max98095_pdata cardhu_max98095_pdata = {
373         /* equalizer configuration */
374         .eq_cfg = max98095_eq_cfg,
375         .eq_cfgcnt = ARRAY_SIZE(max98095_eq_cfg),
376
377         /* Biquad filter response configuration */
378         .bq_cfg = NULL,
379         .bq_cfgcnt = 0,
380
381         /* microphone configuration */
382         .digmic_left_mode = 1,
383         .digmic_right_mode = 1,
384 };
385
386 static struct i2c_board_info __initdata cardhu_codec_wm8903_info = {
387         I2C_BOARD_INFO("wm8903", 0x1a),
388         .platform_data = &cardhu_wm8903_pdata,
389 };
390
391 static struct i2c_board_info __initdata cardhu_codec_aic326x_info = {
392         I2C_BOARD_INFO("aic3262-codec", 0x18),
393 };
394
395 static struct i2c_board_info __initdata cardhu_codec_max98095_info = {
396         I2C_BOARD_INFO("max98095", 0x10),
397         .platform_data = &cardhu_max98095_pdata,
398 };
399
400 static void cardhu_i2c_init(void)
401 {
402         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
403         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
404         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
405         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
406         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
407
408         platform_device_register(&tegra_i2c_device5);
409         platform_device_register(&tegra_i2c_device4);
410         platform_device_register(&tegra_i2c_device3);
411         platform_device_register(&tegra_i2c_device2);
412         platform_device_register(&tegra_i2c_device1);
413
414         cardhu_codec_wm8903_info.irq = cardhu_codec_max98095_info.irq =
415                 cardhu_codec_aic326x_info.irq = gpio_to_irq(TEGRA_GPIO_CDC_IRQ);
416         i2c_register_board_info(4, &cardhu_codec_wm8903_info, 1);
417         i2c_register_board_info(4, &cardhu_codec_max98095_info, 1);
418         i2c_register_board_info(4, &cardhu_codec_aic326x_info, 1);
419
420         cardhu_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PX0);
421         i2c_register_board_info(2, cardhu_i2c_bus3_board_info, 1);
422 }
423
424 static struct platform_device *cardhu_uart_devices[] __initdata = {
425         &tegra_uarta_device,
426         &tegra_uartb_device,
427         &tegra_uartc_device,
428         &tegra_uartd_device,
429         &tegra_uarte_device,
430 };
431 static struct uart_clk_parent uart_parent_clk[] = {
432         [0] = {.name = "clk_m"},
433         [1] = {.name = "pll_p"},
434 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
435         [2] = {.name = "pll_m"},
436 #endif
437 };
438
439 static struct tegra_uart_platform_data cardhu_uart_pdata;
440 static struct tegra_uart_platform_data cardhu_loopback_uart_pdata;
441
442 static int __init uart_debug_init(void)
443 {
444         struct board_info board_info;
445         int debug_port_id;
446         int default_debug_port = 0;
447
448         tegra_get_board_info(&board_info);
449
450         /* UARTB is debug port
451          *       for SLT - E1186/E1187/PM269
452          *       for E1256/E1257
453          */
454         if (((board_info.sku & SKU_SLT_ULPI_SUPPORT) &&
455                 ((board_info.board_id == BOARD_E1186) ||
456                 (board_info.board_id == BOARD_E1187) ||
457                 (board_info.board_id == BOARD_PM269))) ||
458                 (board_info.board_id == BOARD_E1256) ||
459                 (board_info.board_id == BOARD_E1257))
460                         default_debug_port = 1;
461
462         debug_port_id = uart_console_debug_init(default_debug_port);
463         if (debug_port_id < 0)
464                 return debug_port_id;
465
466 #ifdef CONFIG_TEGRA_IRDA
467         if ((board_info.board_id == BOARD_E1186) ||
468                 (board_info.board_id == BOARD_E1198)) {
469                 if (debug_port_id == 1) {
470                         cardhu_irda_pdata.is_irda = false;
471                         pr_err("UARTB is not available for IrDA\n");
472                 }
473         }
474 #endif
475         cardhu_uart_devices[debug_port_id] = uart_console_debug_device;
476         return debug_port_id;
477 }
478
479 static void __init cardhu_uart_init(void)
480 {
481         struct clk *c;
482         int i;
483         struct board_info board_info;
484
485         tegra_get_board_info(&board_info);
486
487         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
488                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
489                 if (IS_ERR_OR_NULL(c)) {
490                         pr_err("Not able to get the clock for %s\n",
491                                                 uart_parent_clk[i].name);
492                         continue;
493                 }
494                 uart_parent_clk[i].parent_clk = c;
495                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
496         }
497         cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
498         cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
499         cardhu_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
500         cardhu_loopback_uart_pdata.parent_clk_count =
501                                                 ARRAY_SIZE(uart_parent_clk);
502         cardhu_loopback_uart_pdata.is_loopback = true;
503         tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
504         tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
505         tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
506         tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
507         /* UARTE is used for loopback test purpose */
508         tegra_uarte_device.dev.platform_data = &cardhu_loopback_uart_pdata;
509
510         /* Register low speed only if it is selected */
511         if (!is_tegra_debug_uartport_hs())
512                 uart_debug_init();
513
514 #ifdef CONFIG_TEGRA_IRDA
515         if (((board_info.board_id == BOARD_E1186) ||
516                 (board_info.board_id == BOARD_E1198)) &&
517                         cardhu_irda_pdata.is_irda) {
518                 cardhu_irda_pdata.parent_clk_list = uart_parent_clk;
519                 cardhu_irda_pdata.parent_clk_count =
520                                         ARRAY_SIZE(uart_parent_clk);
521
522                 tegra_uartb_device.dev.platform_data = &cardhu_irda_pdata;
523         }
524 #endif
525
526         platform_add_devices(cardhu_uart_devices,
527                                 ARRAY_SIZE(cardhu_uart_devices));
528 }
529
530 static struct platform_device tegra_camera = {
531         .name = "tegra_camera",
532         .id = -1,
533 };
534
535 static struct platform_device *cardhu_spi_devices[] __initdata = {
536         &tegra_spi_device4,
537 };
538
539 /*-----------------------------------------------------*/
540 /* Force Cardhu Direct Touch:
541         Valid Choices:
542         0 : Do not force Direct Touch
543         2 : RM_PLATFORM_C210 : Cardhu 10" J-Touch Panel
544         4 : RM_PLATFORM_P005 ; Pluto 5" J-Touch Panel
545 */
546 #define CARDHU_DT_PLATFORM      0 /* RM_PLATFORM_C210 */
547
548 static struct platform_device *touch_spi_device[] __initdata = {
549         &tegra_spi_device1,
550 };
551
552 struct spi_clk_parent spi_parent_clk[] = {
553         [0] = {.name = "pll_p"},
554 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
555         [1] = {.name = "pll_m"},
556         [2] = {.name = "clk_m"},
557 #else
558         [1] = {.name = "clk_m"},
559 #endif
560 };
561
562 static struct tegra_spi_platform_data cardhu_spi_pdata = {
563         .is_dma_based           = true,
564         .max_dma_buffer         = (16 * 1024),
565         .is_clkon_always        = false,
566         .max_rate               = 100000000,
567 };
568
569 static void __init cardhu_spi_init(void)
570 {
571         int i;
572         struct clk *c;
573         struct board_info board_info, display_board_info;
574
575         tegra_get_board_info(&board_info);
576         tegra_get_display_board_info(&display_board_info);
577
578         for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
579                 c = tegra_get_clock_by_name(spi_parent_clk[i].name);
580                 if (IS_ERR_OR_NULL(c)) {
581                         pr_err("Not able to get the clock for %s\n",
582                                                 spi_parent_clk[i].name);
583                         continue;
584                 }
585                 spi_parent_clk[i].parent_clk = c;
586                 spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
587         }
588         cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
589         cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
590         tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
591         platform_add_devices(cardhu_spi_devices,
592                                 ARRAY_SIZE(cardhu_spi_devices));
593
594         if ((display_board_info.board_id == BOARD_DISPLAY_PM313)
595                                                 || CARDHU_DT_PLATFORM) {
596                 platform_add_devices(touch_spi_device,
597                                 ARRAY_SIZE(touch_spi_device));
598         }
599
600         if (board_info.board_id == BOARD_E1198) {
601                 tegra_spi_device2.dev.platform_data = &cardhu_spi_pdata;
602                 platform_device_register(&tegra_spi_device2);
603                 tegra_spi_slave_device1.dev.platform_data = &cardhu_spi_pdata;
604                 platform_device_register(&tegra_spi_slave_device1);
605         }
606 }
607
608 static void __init cardhu_dtv_init(void)
609 {
610         struct board_info board_info;
611
612         tegra_get_board_info(&board_info);
613
614         if (board_info.board_id == BOARD_E1186)
615                 platform_device_register(&tegra_dtv_device);
616 }
617
618 static struct resource tegra_rtc_resources[] = {
619         [0] = {
620                 .start = TEGRA_RTC_BASE,
621                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
622                 .flags = IORESOURCE_MEM,
623         },
624         [1] = {
625                 .start = INT_RTC,
626                 .end = INT_RTC,
627                 .flags = IORESOURCE_IRQ,
628         },
629 };
630
631 static struct platform_device tegra_rtc_device = {
632         .name = "tegra_rtc",
633         .id   = -1,
634         .resource = tegra_rtc_resources,
635         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
636 };
637
638 static struct tegra_asoc_platform_data cardhu_audio_wm8903_pdata = {
639         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
640         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
641         .gpio_hp_mute           = -1,
642         .gpio_int_mic_en        = -1,
643         .gpio_ext_mic_en        = -1,
644         .i2s_param[HIFI_CODEC]  = {
645                 .audio_port_id  = 0,
646                 .is_i2s_master  = 1,
647                 .i2s_mode       = TEGRA_DAIFMT_I2S,
648         },
649         .i2s_param[BASEBAND]    = {
650                 .audio_port_id  = -1,
651         },
652         .i2s_param[BT_SCO]      = {
653                 .audio_port_id  = 3,
654                 .is_i2s_master  = 1,
655                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
656         },
657 };
658
659 static struct tegra_asoc_platform_data cardhu_audio_max98095_pdata = {
660         .gpio_spkr_en           = -1,
661         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
662         .gpio_hp_mute           = -1,
663         .gpio_int_mic_en        = -1,
664         .gpio_ext_mic_en        = -1,
665         .i2s_param[HIFI_CODEC]  = {
666                 .audio_port_id  = 0,
667                 .is_i2s_master  = 1,
668                 .i2s_mode       = TEGRA_DAIFMT_I2S,
669         },
670         .i2s_param[BASEBAND]    = {
671                 .audio_port_id  = -1,
672         },
673         .i2s_param[BT_SCO]      = {
674                 .audio_port_id  = 3,
675                 .is_i2s_master  = 1,
676                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
677         },
678 };
679
680 static struct platform_device cardhu_audio_wm8903_device = {
681         .name   = "tegra-snd-wm8903",
682         .id     = 0,
683         .dev    = {
684                 .platform_data = &cardhu_audio_wm8903_pdata,
685         },
686 };
687
688 static struct platform_device cardhu_audio_max98095_device = {
689         .name   = "tegra-snd-max98095",
690         .id     = 0,
691         .dev    = {
692                 .platform_data = &cardhu_audio_max98095_pdata,
693         },
694 };
695
696 static struct tegra_asoc_platform_data cardhu_audio_aic326x_pdata = {
697         .gpio_spkr_en           = -1,
698         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
699         .gpio_hp_mute           = -1,
700         .gpio_int_mic_en        = -1,
701         .gpio_ext_mic_en        = -1,
702         /*defaults for Verbier-Cardhu board with TI AIC326X codec*/
703         .i2s_param[HIFI_CODEC]  = {
704                 .audio_port_id  = 0,
705                 .is_i2s_master  = 1,
706                 .i2s_mode       = TEGRA_DAIFMT_I2S,
707                 .sample_size    = 16,
708         },
709         .i2s_param[BT_SCO]      = {
710                 .sample_size    = 16,
711                 .audio_port_id  = 3,
712                 .is_i2s_master  = 1,
713                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
714         },
715 };
716
717 static struct platform_device cardhu_audio_aic326x_device = {
718         .name   = "tegra-snd-aic326x",
719         .id     = 0,
720         .dev    = {
721                 .platform_data  = &cardhu_audio_aic326x_pdata,
722         },
723 };
724
725 static struct platform_device *cardhu_devices[] __initdata = {
726         &tegra_pmu_device,
727         &tegra_rtc_device,
728         &tegra_udc_device,
729         &tegra_wdt0_device,
730         &tegra_wdt1_device,
731         &tegra_wdt2_device,
732 #if defined(CONFIG_TEGRA_AVP)
733         &tegra_avp_device,
734 #endif
735         &tegra_camera,
736 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
737         &tegra_se_device,
738 #endif
739         &tegra_ahub_device,
740         &tegra_dam_device0,
741         &tegra_dam_device1,
742         &tegra_dam_device2,
743         &tegra_i2s_device0,
744         &tegra_i2s_device1,
745         &tegra_i2s_device3,
746         &tegra_spdif_device,
747         &spdif_dit_device,
748         &bluetooth_dit_device,
749         &baseband_dit_device,
750         &cardhu_bt_rfkill_device,
751         &tegra_pcm_device,
752         &cardhu_audio_wm8903_device,
753         &cardhu_audio_max98095_device,
754         &cardhu_audio_aic326x_device,
755         &tegra_hda_device,
756         &tegra_cec_device,
757 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
758         &tegra_aes_device,
759 #endif
760 };
761
762 #define E1506_MXT_CONFIG_CRC 0x62F903
763 static const u8 e1506_config[] = {
764         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
765         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x05, 0x01, 0x00,
766         0x00, 0x1E, 0x0A, 0x8B, 0x00, 0x00, 0x13, 0x0B,
767         0x00, 0x10, 0x32, 0x03, 0x03, 0x00, 0x03, 0x01,
768         0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xBF, 0x03, 0x1B,
769         0x02, 0x00, 0x00, 0x37, 0x37, 0x00, 0x00, 0x00,
770         0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
771         0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
772         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
773         0x00, 0x00, 0x00, 0xA9, 0x7F, 0x9A, 0x0E, 0x00,
774         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
775         0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00,
776         0x00, 0x00, 0x03, 0x23, 0x00, 0x00, 0x00, 0x0A,
777         0x0F, 0x14, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00,
778         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
779         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
780         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
781         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
782         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
783         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
784         0x00, 0x00, 0x00, 0x01, 0x00, 0x03, 0x08, 0x10,
785         0x00
786 };
787
788 #define MXT_CONFIG_CRC  0xD62DE8
789 static const u8 config[] = {
790         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
791         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
792         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
793         0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
794         0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
795         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
796         0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
797         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
798         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
799         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
800         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
801         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
802         0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
803         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
804         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
805         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
806         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
807         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
808         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
809         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
810 };
811
812 #define MXT_CONFIG_CRC_SKU2000  0xA24D9A
813 static const u8 config_sku2000[] = {
814         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
815         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
816         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
817         0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00,  //23=thr  2 di
818         0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
819         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
820         0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00,  //0A=limit
821         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
822         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
823         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
824         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
825         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
826         0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
827         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
828         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
829         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
830         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
831         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
832         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
833         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
834 };
835
836 static struct mxt_platform_data atmel_mxt_info = {
837         .x_line         = 27,
838         .y_line         = 42,
839         .x_size         = 768,
840         .y_size         = 1366,
841         .blen           = 0x20,
842         .threshold      = 0x3C,
843         .voltage        = 3300000,              /* 3.3V */
844         .orient         = 5,
845         .config         = config,
846         .config_length  = 157,
847         .config_crc     = MXT_CONFIG_CRC,
848         .irqflags       = IRQF_TRIGGER_FALLING,
849 /*      .read_chg       = &read_chg, */
850         .read_chg       = NULL,
851 };
852
853 static struct mxt_platform_data e1506_atmel_mxt_info = {
854         .x_line         = 19,
855         .y_line         = 11,
856         .x_size         = 960,
857         .y_size         = 540,
858         .blen           = 0x10,
859         .threshold      = 0x32,
860         .voltage        = 3300000,              /* 3.3V */
861         .orient         = 3,
862         .config         = e1506_config,
863         .config_length  = 168,
864         .config_crc     = E1506_MXT_CONFIG_CRC,
865         .irqflags       = IRQF_TRIGGER_FALLING,
866 /*      .read_chg       = &read_chg, */
867         .read_chg       = NULL,
868 };
869
870 static struct i2c_board_info __initdata atmel_i2c_info[] = {
871         {
872                 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
873                 .platform_data = &atmel_mxt_info,
874         }
875 };
876
877 static struct i2c_board_info __initdata e1506_atmel_i2c_info[] = {
878         {
879                 I2C_BOARD_INFO("atmel_mxt_ts", 0x4A),
880                 .platform_data = &e1506_atmel_mxt_info,
881         }
882 };
883
884 /* Raydium touchscreen                     Driver data */
885 static __initdata struct tegra_clk_init_table spi_clk_init_table[] = {
886         /* name         parent          rate            enabled */
887         { "sbc1",       "pll_p",        52000000,       true},
888         { NULL,         NULL,           0,              0},
889 };
890
891 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
892         /* name         parent          rate            enabled */
893         { "extern3",    "pll_p",        41000000,       true},
894         { "clk_out_3",  "extern3",      40800000,       true},
895         { NULL,         NULL,           0,              0},
896 };
897
898 struct rm_spi_ts_platform_data rm31080ts_cardhu_data = {
899         .gpio_reset = 0,
900         .config = 0,
901 };
902
903 struct spi_board_info rm31080a_cardhu_spi_board[1] = {
904         {
905          .modalias = "rm_ts_spidev",
906          .bus_num = 0,
907          .chip_select = 0,
908          .max_speed_hz = 13 * 1000 * 1000,
909          .mode = SPI_MODE_0,
910          .platform_data = &rm31080ts_cardhu_data,
911          },
912 };
913
914 static int __init cardhu_touch_init(void)
915 {
916         struct board_info BoardInfo, DisplayBoardInfo;
917         int ret;
918
919         tegra_get_board_info(&BoardInfo);
920         tegra_get_display_board_info(&DisplayBoardInfo);
921         if ((DisplayBoardInfo.board_id == BOARD_DISPLAY_PM313)
922                                                 || CARDHU_DT_PLATFORM) {
923                 tegra_clk_init_from_table(spi_clk_init_table);
924                 tegra_clk_init_from_table(touch_clk_init_table);
925                 clk_enable(tegra_get_clock_by_name("clk_out_3"));
926                 rm31080ts_cardhu_data.platform_id = CARDHU_DT_PLATFORM;
927                 rm31080a_cardhu_spi_board[0].irq = gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
928                 touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
929                                         TOUCH_GPIO_RST_RAYDIUM_SPI,
930                                         &rm31080ts_cardhu_data,
931                                         &rm31080a_cardhu_spi_board[0],
932                                         ARRAY_SIZE(rm31080a_cardhu_spi_board));
933         } else {
934                 ret = gpio_request(TEGRA_GPIO_PH4, "atmel-irq");
935                 if (ret < 0) {
936                         pr_err("%s() Error in gpio_request() for gpio %d\n",
937                                         __func__, ret);
938                 }
939                 ret = gpio_direction_input(TEGRA_GPIO_PH4);
940                 if (ret < 0) {
941                         pr_err("%s() Error in setting gpio %d to in/out\n",
942                                          __func__, ret);
943                         gpio_free(TEGRA_GPIO_PH4);
944                 }
945                 ret = gpio_request(TEGRA_GPIO_PH6, "atmel-reset");
946                 if (ret < 0) {
947                         pr_err("%s() Error in gpio_request() for gpio %d\n",
948                                         __func__, ret);
949                 }
950                 ret = gpio_direction_output(TEGRA_GPIO_PH6, 0);
951                 if (ret < 0) {
952                         pr_err("%s() Error in setting gpio %d to in/out\n",
953                                          __func__, ret);
954                         gpio_free(TEGRA_GPIO_PH6);
955                 }
956                 msleep(1);
957                 gpio_set_value(TEGRA_GPIO_PH6, 1);
958                 msleep(100);
959
960                 if ((BoardInfo.sku & SKU_TOUCH_MASK) == SKU_TOUCH_2000) {
961                         atmel_mxt_info.config = config_sku2000;
962                         atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
963                 }
964
965                 if (DisplayBoardInfo.board_id == BOARD_DISPLAY_E1506) {
966                         e1506_atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH4);
967                         i2c_register_board_info(1, e1506_atmel_i2c_info, 1);
968                 } else {
969                         atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH4);
970                         i2c_register_board_info(1, atmel_i2c_info, 1);
971                 }
972         }
973
974         return 0;
975 }
976
977 #if defined(CONFIG_USB_SUPPORT)
978
979 static void cardu_usb_hsic_postsupend(void)
980 {
981 #ifdef CONFIG_TEGRA_BB_XMM_POWER
982         baseband_xmm_set_power_status(BBXMM_PS_L2);
983 #endif
984 }
985
986 static void cardu_usb_hsic_preresume(void)
987 {
988 #ifdef CONFIG_TEGRA_BB_XMM_POWER
989         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
990 #endif
991 }
992
993 static void cardu_usb_hsic_phy_ready(void)
994 {
995 #ifdef CONFIG_TEGRA_BB_XMM_POWER
996         baseband_xmm_set_power_status(BBXMM_PS_L0);
997 #endif
998 }
999
1000 static void cardu_usb_hsic_phy_off(void)
1001 {
1002 #ifdef CONFIG_TEGRA_BB_XMM_POWER
1003         baseband_xmm_set_power_status(BBXMM_PS_L3);
1004 #endif
1005 }
1006
1007 static struct tegra_usb_phy_platform_ops hsic_xmm_plat_ops = {
1008         .post_suspend = cardu_usb_hsic_postsupend,
1009         .pre_resume = cardu_usb_hsic_preresume,
1010         .port_power = cardu_usb_hsic_phy_ready,
1011         .post_phy_off = cardu_usb_hsic_phy_off,
1012 };
1013
1014 static struct tegra_usb_platform_data tegra_ehci2_hsic_xmm_pdata = {
1015         .port_otg = false,
1016         .has_hostpc = true,
1017         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
1018         .op_mode        = TEGRA_USB_OPMODE_HOST,
1019         .u_data.host = {
1020                 .vbus_gpio = -1,
1021                 .hot_plug = false,
1022                 .remote_wakeup_supported = false,
1023                 .power_off_on_suspend = false,
1024         },
1025         .ops = &hsic_xmm_plat_ops,
1026 };
1027 #endif
1028
1029 static int hsic_enable_gpio = -1;
1030 static int hsic_reset_gpio = -1;
1031
1032 void hsic_platform_open(void)
1033 {
1034         int reset_gpio = -1, enable_gpio = -1;
1035
1036         if (hsic_enable_gpio != -1)
1037                 enable_gpio = gpio_request(hsic_enable_gpio, "uhsic_enable");
1038         if (hsic_reset_gpio != -1)
1039                 reset_gpio = gpio_request(hsic_reset_gpio, "uhsic_reset");
1040         /* hsic enable signal deasserted, hsic reset asserted */
1041         if (!enable_gpio)
1042                 gpio_direction_output(hsic_enable_gpio, 0 /* deasserted */);
1043         if (!reset_gpio)
1044                 gpio_direction_output(hsic_reset_gpio, 0 /* asserted */);
1045         /* keep hsic reset asserted for 1 ms */
1046         udelay(1000);
1047         /* enable (power on) hsic */
1048         if (!enable_gpio)
1049                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
1050         udelay(1000);
1051         /* deassert reset */
1052         if (!reset_gpio)
1053                 gpio_set_value_cansleep(hsic_reset_gpio, 1);
1054
1055 }
1056
1057 void hsic_platform_close(void)
1058 {
1059         if (hsic_enable_gpio != -1) {
1060                 gpio_set_value(hsic_enable_gpio, 0);
1061                 gpio_free(hsic_enable_gpio);
1062         }
1063         if (hsic_reset_gpio != -1) {
1064                 gpio_set_value(hsic_reset_gpio, 0);
1065                 gpio_free(hsic_reset_gpio);
1066         }
1067 }
1068
1069 void hsic_power_on(void)
1070 {
1071         if (hsic_enable_gpio != -1) {
1072                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
1073                 udelay(1000);
1074         }
1075 }
1076
1077 void hsic_power_off(void)
1078 {
1079         if (hsic_enable_gpio != -1) {
1080                 gpio_set_value_cansleep(hsic_enable_gpio, 0);
1081                 udelay(1000);
1082         }
1083 }
1084
1085 #if defined(CONFIG_USB_SUPPORT)
1086 static struct tegra_usb_phy_platform_ops hsic_plat_ops = {
1087         .open = hsic_platform_open,
1088         .close = hsic_platform_close,
1089         .pre_phy_on = hsic_power_on,
1090         .post_phy_off = hsic_power_off,
1091 };
1092
1093 static struct tegra_usb_platform_data tegra_ehci2_hsic_pdata = {
1094         .port_otg = false,
1095         .has_hostpc = true,
1096         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
1097         .op_mode        = TEGRA_USB_OPMODE_HOST,
1098         .u_data.host = {
1099                 .vbus_gpio = -1,
1100                 .hot_plug = false,
1101                 .remote_wakeup_supported = false,
1102                 .power_off_on_suspend = false,
1103         },
1104         .ops = &hsic_plat_ops,
1105 };
1106
1107 static struct tegra_usb_platform_data tegra_udc_pdata = {
1108         .port_otg = true,
1109         .has_hostpc = true,
1110         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1111         .op_mode = TEGRA_USB_OPMODE_DEVICE,
1112         .u_data.dev = {
1113                 .vbus_pmu_irq = 0,
1114                 .vbus_gpio = -1,
1115                 .charging_supported = false,
1116                 .remote_wakeup_supported = false,
1117         },
1118         .u_cfg.utmi = {
1119                 .hssync_start_delay = 0,
1120                 .elastic_limit = 16,
1121                 .idle_wait_delay = 17,
1122                 .term_range_adj = 6,
1123                 .xcvr_setup = 8,
1124                 .xcvr_lsfslew = 2,
1125                 .xcvr_lsrslew = 2,
1126                 .xcvr_setup_offset = 0,
1127                 .xcvr_use_fuses = 1,
1128         },
1129 };
1130
1131 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
1132         .port_otg = false,
1133         .has_hostpc = true,
1134         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1135         .op_mode        = TEGRA_USB_OPMODE_HOST,
1136         .u_data.host = {
1137                 .vbus_gpio = -1,
1138                 .hot_plug = false,
1139                 .remote_wakeup_supported = true,
1140                 .power_off_on_suspend = true,
1141         },
1142         .u_cfg.utmi = {
1143                 .hssync_start_delay = 0,
1144                 .elastic_limit = 16,
1145                 .idle_wait_delay = 17,
1146                 .term_range_adj = 6,
1147                 .xcvr_setup = 15,
1148                 .xcvr_lsfslew = 2,
1149                 .xcvr_lsrslew = 2,
1150                 .xcvr_setup_offset = 0,
1151                 .xcvr_use_fuses = 1,
1152         },
1153 };
1154
1155 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
1156         .port_otg = false,
1157         .has_hostpc = true,
1158         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1159         .op_mode = TEGRA_USB_OPMODE_HOST,
1160         .u_data.host = {
1161                 .vbus_gpio = -1,
1162                 .hot_plug = true,
1163                 .remote_wakeup_supported = true,
1164                 .power_off_on_suspend = true,
1165         },
1166         .u_cfg.utmi = {
1167                 .hssync_start_delay = 0,
1168                 .elastic_limit = 16,
1169                 .idle_wait_delay = 17,
1170                 .term_range_adj = 6,
1171                 .xcvr_setup = 8,
1172                 .xcvr_lsfslew = 2,
1173                 .xcvr_lsrslew = 2,
1174                 .xcvr_setup_offset = 0,
1175                 .xcvr_use_fuses = 1,
1176         },
1177 };
1178
1179 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
1180         .port_otg = true,
1181         .has_hostpc = true,
1182         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1183         .op_mode = TEGRA_USB_OPMODE_HOST,
1184         .u_data.host = {
1185                 .vbus_gpio = -1,
1186                 .hot_plug = true,
1187                 .remote_wakeup_supported = true,
1188                 .power_off_on_suspend = true,
1189         },
1190         .u_cfg.utmi = {
1191                 .hssync_start_delay = 0,
1192                 .elastic_limit = 16,
1193                 .idle_wait_delay = 17,
1194                 .term_range_adj = 6,
1195                 .xcvr_setup = 15,
1196                 .xcvr_lsfslew = 2,
1197                 .xcvr_lsrslew = 2,
1198                 .xcvr_setup_offset = 0,
1199                 .xcvr_use_fuses = 1,
1200         },
1201 };
1202
1203 static struct tegra_usb_otg_data tegra_otg_pdata = {
1204         .ehci_device = &tegra_ehci1_device,
1205         .ehci_pdata = &tegra_ehci1_utmi_pdata,
1206 };
1207 #endif
1208
1209 #if defined(CONFIG_USB_SUPPORT)
1210 static void cardhu_usb_init(void)
1211 {
1212         struct board_info bi;
1213
1214         tegra_get_board_info(&bi);
1215
1216         /* OTG should be the first to be registered */
1217         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1218         platform_device_register(&tegra_otg_device);
1219
1220         /* setup the udc platform data */
1221         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1222
1223         if (bi.board_id == BOARD_PM267) {
1224                 hsic_enable_gpio = EN_HSIC_GPIO;
1225                 hsic_reset_gpio = PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
1226                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1227                 platform_device_register(&tegra_ehci2_device);
1228         } else if (bi.board_id == BOARD_E1256) {
1229                 hsic_enable_gpio = EN_HSIC_GPIO;
1230                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1231                 platform_device_register(&tegra_ehci2_device);
1232         } else if (bi.board_id == BOARD_E1186) {
1233                 tegra_ehci2_device.dev.platform_data =
1234                                                 &tegra_ehci2_hsic_xmm_pdata;
1235                 /* ehci2 registration happens in baseband-xmm-power  */
1236         } else {
1237                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_utmi_pdata;
1238                 platform_device_register(&tegra_ehci2_device);
1239         }
1240
1241         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
1242         platform_device_register(&tegra_ehci3_device);
1243
1244 }
1245 #else
1246 static void cardhu_usb_init(void) { }
1247 #endif
1248
1249 static struct baseband_power_platform_data tegra_baseband_power_data = {
1250         .baseband_type = BASEBAND_XMM,
1251         .modem = {
1252         .xmm = {
1253                         .bb_rst = XMM_GPIO_BB_RST,
1254                         .bb_on = XMM_GPIO_BB_ON,
1255                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1256                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1257                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1258                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1259                         .hsic_device = &tegra_ehci2_device,
1260                 },
1261         },
1262 };
1263
1264 static struct platform_device tegra_baseband_power_device = {
1265         .name = "baseband_xmm_power",
1266         .id = -1,
1267         .dev = {
1268                 .platform_data = &tegra_baseband_power_data,
1269         },
1270 };
1271
1272 static struct platform_device tegra_baseband_power2_device = {
1273         .name = "baseband_xmm_power2",
1274         .id = -1,
1275         .dev = {
1276                 .platform_data = &tegra_baseband_power_data,
1277         },
1278 };
1279
1280
1281 static struct tegra_pci_platform_data cardhu_pci_platform_data = {
1282         .port_status[0] = 1,
1283         .port_status[1] = 1,
1284         .port_status[2] = 1,
1285         .use_dock_detect        = 0,
1286         .gpio           = 0,
1287 };
1288
1289 static void cardhu_pci_init(void)
1290 {
1291         struct board_info board_info;
1292
1293         tegra_get_board_info(&board_info);
1294         if (board_info.board_id == BOARD_E1291) {
1295                 cardhu_pci_platform_data.port_status[0] = 0;
1296                 cardhu_pci_platform_data.port_status[1] = 0;
1297                 cardhu_pci_platform_data.port_status[2] = 1;
1298                 cardhu_pci_platform_data.use_dock_detect = 1;
1299                 cardhu_pci_platform_data.gpio = DOCK_DETECT_GPIO;
1300         }
1301         if ((board_info.board_id == BOARD_E1186) ||
1302                 (board_info.board_id == BOARD_E1187) ||
1303                 (board_info.board_id == BOARD_E1291)) {
1304                 tegra_pci_device.dev.platform_data = &cardhu_pci_platform_data;
1305                 platform_device_register(&tegra_pci_device);
1306         }
1307 }
1308
1309 static void cardhu_modem_init(void)
1310 {
1311         struct board_info board_info;
1312         int w_disable_gpio, ret;
1313
1314         tegra_get_board_info(&board_info);
1315         switch (board_info.board_id) {
1316         case BOARD_E1291:
1317         case BOARD_E1198:
1318                 if (((board_info.board_id == BOARD_E1291) &&
1319                                 (board_info.fab < BOARD_FAB_A03)) ||
1320                         ((board_info.board_id == BOARD_E1198) &&
1321                                         (board_info.fab < BOARD_FAB_A02))) {
1322                         w_disable_gpio = TEGRA_GPIO_PH5;
1323                 } else {
1324                         w_disable_gpio = TEGRA_GPIO_PDD5;
1325                 }
1326
1327                 ret = gpio_request(w_disable_gpio, "w_disable_gpio");
1328                 if (ret < 0)
1329                         pr_err("%s: gpio_request failed for gpio %d\n",
1330                                 __func__, w_disable_gpio);
1331                 else
1332                         gpio_direction_input(w_disable_gpio);
1333
1334                 /* E1291-A04 & E1198:A02: Set PERST signal to high */
1335                 if (((board_info.board_id == BOARD_E1291) &&
1336                                 (board_info.fab >= BOARD_FAB_A04)) ||
1337                         ((board_info.board_id == BOARD_E1198) &&
1338                                         (board_info.fab >= BOARD_FAB_A02))) {
1339                         ret = gpio_request(TEGRA_GPIO_PH7, "modem_perst");
1340                         if (ret < 0) {
1341                                 pr_err("%s(): Error in allocating gpio "
1342                                         "TEGRA_GPIO_PH7\n", __func__);
1343                                 break;
1344                         }
1345                         gpio_direction_output(TEGRA_GPIO_PH7, 1);
1346                 }
1347                 break;
1348         case BOARD_E1186:
1349                 platform_device_register(&tegra_baseband_power_device);
1350                 platform_device_register(&tegra_baseband_power2_device);
1351                 break;
1352         default:
1353                 break;
1354         }
1355
1356 }
1357
1358 #ifdef CONFIG_SATA_AHCI_TEGRA
1359 static void cardhu_sata_init(void)
1360 {
1361         platform_device_register(&tegra_sata_device);
1362 }
1363 #else
1364 static void cardhu_sata_init(void) { }
1365 #endif
1366
1367 /* This needs to be inialized later hand */
1368 static int __init cardhu_throttle_list_init(void)
1369 {
1370         int i;
1371         for (i = 0; i < ARRAY_SIZE(throttle_list); i++)
1372                 if (balanced_throttle_register(&throttle_list[i]))
1373                         return -ENODEV;
1374
1375         return 0;
1376 }
1377 late_initcall(cardhu_throttle_list_init);
1378
1379 static void __init tegra_cardhu_init(void)
1380 {
1381         tegra_thermal_init(thermal_binds);
1382         tegra_clk_init_from_table(cardhu_clk_init_table);
1383         tegra_enable_pinmux();
1384         tegra_smmu_init();
1385         tegra_soc_device_init("cardhu");
1386         cardhu_pinmux_init();
1387         cardhu_gpio_init();
1388         cardhu_i2c_init();
1389         cardhu_spi_init();
1390         cardhu_usb_init();
1391 #ifdef CONFIG_TEGRA_EDP_LIMITS
1392         cardhu_edp_init();
1393 #endif
1394         cardhu_uart_init();
1395         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
1396         tegra_ram_console_debug_init();
1397         tegra_io_dpd_init();
1398         cardhu_sdhci_init();
1399         cardhu_regulator_init();
1400         cardhu_dtv_init();
1401         cardhu_suspend_init();
1402         cardhu_touch_init();
1403         cardhu_modem_init();
1404         cardhu_kbc_init();
1405         cardhu_scroll_init();
1406         cardhu_keys_init();
1407         cardhu_panel_init();
1408         cardhu_pmon_init();
1409         cardhu_sensors_init();
1410         cardhu_setup_bluesleep();
1411         cardhu_sata_init();
1412         cardhu_pins_state_init();
1413         cardhu_emc_init();
1414         tegra_release_bootloader_fb();
1415         cardhu_pci_init();
1416 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1417         tegra_wdt_recovery_init();
1418 #endif
1419         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1420 }
1421
1422 static void __init tegra_cardhu_dt_init(void)
1423 {
1424         tegra_cardhu_init();
1425
1426         of_platform_populate(NULL,
1427                 of_default_bus_match_table, NULL, NULL);
1428 }
1429
1430 static void __init tegra_cardhu_reserve(void)
1431 {
1432 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1433         /* support 1920X1200 with 24bpp */
1434         tegra_reserve(0, SZ_8M + SZ_1M, SZ_16M);
1435 #else
1436         tegra_reserve(SZ_128M, SZ_8M, SZ_16M);
1437 #endif
1438 }
1439
1440 static const char *cardhu_dt_board_compat[] = {
1441         "nvidia,cardhu",
1442         NULL
1443 };
1444
1445 MACHINE_START(CARDHU, "cardhu")
1446         .atag_offset    = 0x100,
1447         .soc            = &tegra_soc_desc,
1448         .map_io         = tegra_map_common_io,
1449         .reserve        = tegra_cardhu_reserve,
1450         .init_early     = tegra30_init_early,
1451         .init_irq       = tegra_init_irq,
1452         .handle_irq     = gic_handle_irq,
1453         .timer          = &tegra_timer,
1454         .init_machine   = tegra_cardhu_dt_init,
1455         .restart        = tegra_assert_system_reset,
1456         .dt_compat      = cardhu_dt_board_compat,
1457 MACHINE_END