ARM: tegra: clock: Auto-detect PLLP rate in uart init
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <linux/spi/spi.h>
37 #include <linux/i2c/atmel_mxt_ts.h>
38 #include <linux/tegra_uart.h>
39 #include <linux/spi-tegra.h>
40 #include <linux/nfc/pn544.h>
41
42 #include <sound/wm8903.h>
43 #include <media/tegra_dtv.h>
44
45 #include <mach/clk.h>
46 #include <mach/iomap.h>
47 #include <mach/irqs.h>
48 #include <mach/pinmux.h>
49 #include <mach/iomap.h>
50 #include <mach/io.h>
51 #include <mach/i2s.h>
52 #include <mach/tegra_wm8903_pdata.h>
53 #include <asm/mach-types.h>
54 #include <asm/mach/arch.h>
55 #include <mach/usb_phy.h>
56 #include <mach/thermal.h>
57 #include <mach/pci.h>
58
59 #include "board.h"
60 #include "clock.h"
61 #include "board-cardhu.h"
62 #include "devices.h"
63 #include "gpio-names.h"
64 #include "fuse.h"
65 #include "pm.h"
66 #include "baseband-xmm-power.h"
67 #include "wdt-recovery.h"
68
69 /* All units are in millicelsius */
70 static struct tegra_thermal_data thermal_data = {
71         .temp_throttle = 85000,
72         .temp_shutdown = 90000,
73         .temp_offset = TDIODE_OFFSET, /* temps based on tdiode */
74 #ifdef CONFIG_TEGRA_EDP_LIMITS
75         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
76         .hysteresis_edp = 3000,
77 #endif
78 #ifdef CONFIG_TEGRA_THERMAL_SYSFS
79         .tc1 = 0,
80         .tc2 = 1,
81         .passive_delay = 2000,
82 #else
83         .hysteresis_throttle = 1000,
84 #endif
85 };
86
87 /* !!!TODO: Change for cardhu (Taken from Ventana) */
88 static struct tegra_utmip_config utmi_phy_config[] = {
89         [0] = {
90                         .hssync_start_delay = 0,
91                         .idle_wait_delay = 17,
92                         .elastic_limit = 16,
93                         .term_range_adj = 6,
94                         .xcvr_setup = 15,
95                         .xcvr_setup_offset = 0,
96                         .xcvr_use_fuses = 1,
97                         .xcvr_lsfslew = 2,
98                         .xcvr_lsrslew = 2,
99         },
100         [1] = {
101                         .hssync_start_delay = 0,
102                         .idle_wait_delay = 17,
103                         .elastic_limit = 16,
104                         .term_range_adj = 6,
105                         .xcvr_setup = 15,
106                         .xcvr_setup_offset = 0,
107                         .xcvr_use_fuses = 1,
108                         .xcvr_lsfslew = 2,
109                         .xcvr_lsrslew = 2,
110         },
111         [2] = {
112                         .hssync_start_delay = 0,
113                         .idle_wait_delay = 17,
114                         .elastic_limit = 16,
115                         .term_range_adj = 6,
116                         .xcvr_setup = 8,
117                         .xcvr_setup_offset = 0,
118                         .xcvr_use_fuses = 1,
119                         .xcvr_lsfslew = 2,
120                         .xcvr_lsrslew = 2,
121         },
122 };
123
124 #ifdef CONFIG_BCM4329_RFKILL
125 static struct resource cardhu_bcm4329_rfkill_resources[] = {
126         {
127                 .name   = "bcm4329_nshutdown_gpio",
128                 .start  = TEGRA_GPIO_PU0,
129                 .end    = TEGRA_GPIO_PU0,
130                 .flags  = IORESOURCE_IO,
131         },
132 };
133
134 static struct platform_device cardhu_bcm4329_rfkill_device = {
135         .name = "bcm4329_rfkill",
136         .id             = -1,
137         .num_resources  = ARRAY_SIZE(cardhu_bcm4329_rfkill_resources),
138         .resource       = cardhu_bcm4329_rfkill_resources,
139 };
140
141 static noinline void __init cardhu_bt_rfkill(void)
142 {
143         platform_device_register(&cardhu_bcm4329_rfkill_device);
144
145         return;
146 }
147 #else
148 static inline void cardhu_bt_rfkill(void) { }
149 #endif
150
151 #ifdef CONFIG_BT_BLUESLEEP
152 static noinline void __init tegra_setup_bluesleep(void)
153 {
154         struct platform_device *pdev = NULL;
155         struct resource *res;
156
157         pdev = platform_device_alloc("bluesleep", 0);
158         if (!pdev) {
159                 pr_err("unable to allocate platform device for bluesleep");
160                 return;
161         }
162
163         res = kzalloc(sizeof(struct resource) * 3, GFP_KERNEL);
164         if (!res) {
165                 pr_err("unable to allocate resource for bluesleep\n");
166                 goto err_free_dev;
167         }
168
169         res[0].name   = "gpio_host_wake";
170         res[0].start  = TEGRA_GPIO_PU6;
171         res[0].end    = TEGRA_GPIO_PU6;
172         res[0].flags  = IORESOURCE_IO;
173
174         res[1].name   = "gpio_ext_wake";
175         res[1].start  = TEGRA_GPIO_PU1;
176         res[1].end    = TEGRA_GPIO_PU1;
177         res[1].flags  = IORESOURCE_IO;
178
179         res[2].name   = "host_wake";
180         res[2].start  = gpio_to_irq(TEGRA_GPIO_PU6);
181         res[2].end    = gpio_to_irq(TEGRA_GPIO_PU6);
182         res[2].flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE ;
183
184         if (platform_device_add_resources(pdev, res, 3)) {
185                 pr_err("unable to add resources to bluesleep device\n");
186                 goto err_free_res;
187         }
188
189         if (platform_device_add(pdev)) {
190                 pr_err("unable to add bluesleep device\n");
191                 goto err_free_res;
192         }
193         tegra_gpio_enable(TEGRA_GPIO_PU6);
194         tegra_gpio_enable(TEGRA_GPIO_PU1);
195
196 return;
197
198 err_free_res:
199         kfree(res);
200 err_free_dev:
201         platform_device_put(pdev);
202         return;
203 }
204 #else
205 static inline void tegra_setup_bluesleep(void) { }
206 #endif
207
208 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
209         /* name         parent          rate            enabled */
210         { "pll_m",      NULL,           0,              false},
211         { "hda",        "pll_p",        108000000,      false},
212         { "hda2codec_2x","pll_p",       48000000,       false},
213         { "pwm",        "pll_p",        3187500,        false},
214         { "blink",      "clk_32k",      32768,          true},
215         { "i2s1",       "pll_a_out0",   0,              false},
216         { "i2s3",       "pll_a_out0",   0,              false},
217         { "spdif_out",  "pll_a_out0",   0,              false},
218         { "d_audio",    "pll_a_out0",   0,              false},
219         { "dam0",       "pll_a_out0",   0,              false},
220         { "dam1",       "pll_a_out0",   0,              false},
221         { "dam2",       "pll_a_out0",   0,              false},
222         { "audio1",     "i2s1_sync",    0,              false},
223         { "audio3",     "i2s3_sync",    0,              false},
224         { "vi_sensor",  "pll_p",        150000000,      false},
225         { "i2c1",       "pll_p",        3200000,        false},
226         { "i2c2",       "pll_p",        3200000,        false},
227         { "i2c3",       "pll_p",        3200000,        false},
228         { "i2c4",       "pll_p",        3200000,        false},
229         { "i2c5",       "pll_p",        3200000,        false},
230         { NULL,         NULL,           0,              0},
231 };
232
233 static struct pn544_i2c_platform_data nfc_pdata = {
234         .irq_gpio = TEGRA_GPIO_PX0,
235         .ven_gpio = TEGRA_GPIO_PP3,
236         .firm_gpio = TEGRA_GPIO_PO7,
237         };
238
239 static struct i2c_board_info __initdata cardhu_i2c_bus3_board_info[] = {
240         {
241                 I2C_BOARD_INFO("pn544", 0x28),
242                 .platform_data = &nfc_pdata,
243                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PX0),
244         },
245 };
246 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
247         .adapter_nr     = 0,
248         .bus_count      = 1,
249         .bus_clk_rate   = { 100000, 0 },
250         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
251         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
252         .arb_recovery = arb_lost_recovery,
253 };
254
255 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
256         .adapter_nr     = 1,
257         .bus_count      = 1,
258         .bus_clk_rate   = { 100000, 0 },
259         .is_clkon_always = true,
260         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
261         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
262         .arb_recovery = arb_lost_recovery,
263 };
264
265 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
266         .adapter_nr     = 2,
267         .bus_count      = 1,
268         .bus_clk_rate   = { 100000, 0 },
269         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
270         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
271         .arb_recovery = arb_lost_recovery,
272 };
273
274 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
275         .adapter_nr     = 3,
276         .bus_count      = 1,
277         .bus_clk_rate   = { 100000, 0 },
278         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
279         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
280         .arb_recovery = arb_lost_recovery,
281 };
282
283 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
284         .adapter_nr     = 4,
285         .bus_count      = 1,
286         .bus_clk_rate   = { 400000, 0 },
287         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
288         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
289         .arb_recovery = arb_lost_recovery,
290 };
291
292
293 #if 0
294 struct tegra_wired_jack_conf audio_wr_jack_conf = {
295         .hp_det_n = TEGRA_GPIO_PW2,
296         .en_mic_ext = TEGRA_GPIO_PX1,
297         .en_mic_int = TEGRA_GPIO_PX0,
298 };
299 #endif
300
301 static struct wm8903_platform_data cardhu_wm8903_pdata = {
302         .irq_active_low = 0,
303         .micdet_cfg = 0,
304         .micdet_delay = 100,
305         .gpio_base = CARDHU_GPIO_WM8903(0),
306         .gpio_cfg = {
307                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP1_FN_SHIFT),
308                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP2_FN_SHIFT) |
309                         WM8903_GP2_DIR,
310                 0,
311                 WM8903_GPIO_NO_CONFIG,
312                 WM8903_GPIO_NO_CONFIG,
313         },
314 };
315
316 static struct i2c_board_info __initdata wm8903_board_info = {
317         I2C_BOARD_INFO("wm8903", 0x1a),
318         .platform_data = &cardhu_wm8903_pdata,
319         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
320 };
321
322 static void cardhu_i2c_init(void)
323 {
324         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
325         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
326         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
327         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
328         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
329
330         platform_device_register(&tegra_i2c_device5);
331         platform_device_register(&tegra_i2c_device4);
332         platform_device_register(&tegra_i2c_device3);
333         platform_device_register(&tegra_i2c_device2);
334         platform_device_register(&tegra_i2c_device1);
335
336         i2c_register_board_info(4, &wm8903_board_info, 1);
337         i2c_register_board_info(2, cardhu_i2c_bus3_board_info, 1);
338 }
339
340 static struct platform_device *cardhu_uart_devices[] __initdata = {
341         &tegra_uarta_device,
342         &tegra_uartb_device,
343         &tegra_uartc_device,
344         &tegra_uartd_device,
345         &tegra_uarte_device,
346 };
347 static struct uart_clk_parent uart_parent_clk[] = {
348         [0] = {.name = "clk_m"},
349         [1] = {.name = "pll_p"},
350 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
351         [2] = {.name = "pll_m"},
352 #endif
353 };
354
355 static struct tegra_uart_platform_data cardhu_uart_pdata;
356 static struct tegra_uart_platform_data cardhu_loopback_uart_pdata;
357
358 static void __init uart_debug_init(void)
359 {
360         struct board_info board_info;
361         int debug_port_id;
362
363         tegra_get_board_info(&board_info);
364
365         debug_port_id = get_tegra_uart_debug_port_id();
366         if (debug_port_id < 0) {
367                 debug_port_id = 0;
368                         /* UARTB is debug port
369                          *       for SLT - E1186/E1187/PM269
370                          *       for E1256/E1257
371                          */
372                 if (((board_info.sku & SKU_SLT_ULPI_SUPPORT) &&
373                         ((board_info.board_id == BOARD_E1186) ||
374                         (board_info.board_id == BOARD_E1187) ||
375                         (board_info.board_id == BOARD_PM269))) ||
376                         (board_info.board_id == BOARD_E1256) ||
377                         (board_info.board_id == BOARD_E1257))
378                                 debug_port_id = 1;
379         }
380
381         tegra_init_debug_uart_rate();
382         switch (debug_port_id) {
383         case 0:
384                 /* UARTA is the debug port. */
385                 pr_info("Selecting UARTA as the debug console\n");
386                 cardhu_uart_devices[0] = &debug_uarta_device;
387                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
388                 debug_uart_port_base = ((struct plat_serial8250_port *)(
389                         debug_uarta_device.dev.platform_data))->mapbase;
390                 break;
391
392         case 1:
393                 /* UARTB is the debug port. */
394                 pr_info("Selecting UARTB as the debug console\n");
395                 cardhu_uart_devices[1] = &debug_uartb_device;
396                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartb");
397                 debug_uart_port_base = ((struct plat_serial8250_port *)(
398                         debug_uartb_device.dev.platform_data))->mapbase;
399                 break;
400
401         case 2:
402                 /* UARTC is the debug port. */
403                 pr_info("Selecting UARTC as the debug console\n");
404                 cardhu_uart_devices[2] = &debug_uartc_device;
405                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartc");
406                 debug_uart_port_base = ((struct plat_serial8250_port *)(
407                         debug_uartc_device.dev.platform_data))->mapbase;
408                 break;
409
410         case 3:
411                 /* UARTD is the debug port. */
412                 pr_info("Selecting UARTD as the debug console\n");
413                 cardhu_uart_devices[3] = &debug_uartd_device;
414                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartd");
415                 debug_uart_port_base = ((struct plat_serial8250_port *)(
416                         debug_uartd_device.dev.platform_data))->mapbase;
417                 break;
418
419         case 4:
420                 /* UARTE is the debug port. */
421                 pr_info("Selecting UARTE as the debug console\n");
422                 cardhu_uart_devices[4] = &debug_uarte_device;
423                 debug_uart_clk =  clk_get_sys("serial8250.0", "uarte");
424                 debug_uart_port_base = ((struct plat_serial8250_port *)(
425                         debug_uarte_device.dev.platform_data))->mapbase;
426                 break;
427
428         default:
429                 pr_info("The debug console id %d is invalid, Assuming UARTA", debug_port_id);
430                 cardhu_uart_devices[0] = &debug_uarta_device;
431                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
432                 debug_uart_port_base = ((struct plat_serial8250_port *)(
433                         debug_uarta_device.dev.platform_data))->mapbase;
434                 break;
435         }
436         return;
437 }
438
439 static void __init cardhu_uart_init(void)
440 {
441         struct clk *c;
442         int i;
443
444         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
445                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
446                 if (IS_ERR_OR_NULL(c)) {
447                         pr_err("Not able to get the clock for %s\n",
448                                                 uart_parent_clk[i].name);
449                         continue;
450                 }
451                 uart_parent_clk[i].parent_clk = c;
452                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
453         }
454         cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
455         cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
456         cardhu_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
457         cardhu_loopback_uart_pdata.parent_clk_count =
458                                                 ARRAY_SIZE(uart_parent_clk);
459         cardhu_loopback_uart_pdata.is_loopback = true;
460         tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
461         tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
462         tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
463         tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
464         /* UARTE is used for loopback test purpose */
465         tegra_uarte_device.dev.platform_data = &cardhu_loopback_uart_pdata;
466
467         /* Register low speed only if it is selected */
468         if (!is_tegra_debug_uartport_hs()) {
469                 uart_debug_init();
470                 /* Clock enable for the debug channel */
471                 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
472                         pr_info("The debug console clock name is %s\n",
473                                                 debug_uart_clk->name);
474                         c = tegra_get_clock_by_name("pll_p");
475                         if (IS_ERR_OR_NULL(c))
476                                 pr_err("Not getting the parent clock pll_p\n");
477                         else
478                                 clk_set_parent(debug_uart_clk, c);
479
480                         clk_enable(debug_uart_clk);
481                         clk_set_rate(debug_uart_clk, clk_get_rate(c));
482                 } else {
483                         pr_err("Not getting the clock %s for debug console\n",
484                                         debug_uart_clk->name);
485                 }
486         }
487
488         platform_add_devices(cardhu_uart_devices,
489                                 ARRAY_SIZE(cardhu_uart_devices));
490 }
491
492 static struct platform_device tegra_camera = {
493         .name = "tegra_camera",
494         .id = -1,
495 };
496
497 static struct platform_device *cardhu_spi_devices[] __initdata = {
498         &tegra_spi_device4,
499 };
500
501 struct spi_clk_parent spi_parent_clk[] = {
502         [0] = {.name = "pll_p"},
503 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
504         [1] = {.name = "pll_m"},
505         [2] = {.name = "clk_m"},
506 #else
507         [1] = {.name = "clk_m"},
508 #endif
509 };
510
511 static struct tegra_spi_platform_data cardhu_spi_pdata = {
512         .is_dma_based           = true,
513         .max_dma_buffer         = (16 * 1024),
514         .is_clkon_always        = false,
515         .max_rate               = 100000000,
516 };
517
518 static void __init cardhu_spi_init(void)
519 {
520         int i;
521         struct clk *c;
522         struct board_info board_info;
523
524         tegra_get_board_info(&board_info);
525
526         for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
527                 c = tegra_get_clock_by_name(spi_parent_clk[i].name);
528                 if (IS_ERR_OR_NULL(c)) {
529                         pr_err("Not able to get the clock for %s\n",
530                                                 spi_parent_clk[i].name);
531                         continue;
532                 }
533                 spi_parent_clk[i].parent_clk = c;
534                 spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
535         }
536         cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
537         cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
538         tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
539         platform_add_devices(cardhu_spi_devices,
540                                 ARRAY_SIZE(cardhu_spi_devices));
541
542         if (board_info.board_id == BOARD_E1198) {
543                 tegra_spi_device2.dev.platform_data = &cardhu_spi_pdata;
544                 platform_device_register(&tegra_spi_device2);
545                 tegra_spi_slave_device1.dev.platform_data = &cardhu_spi_pdata;
546                 platform_device_register(&tegra_spi_slave_device1);
547         }
548 }
549
550 static void __init cardhu_dtv_init(void)
551 {
552         struct board_info board_info;
553
554         tegra_get_board_info(&board_info);
555
556         if (board_info.board_id == BOARD_E1186)
557                 platform_device_register(&tegra_dtv_device);
558 }
559
560 static struct resource tegra_rtc_resources[] = {
561         [0] = {
562                 .start = TEGRA_RTC_BASE,
563                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
564                 .flags = IORESOURCE_MEM,
565         },
566         [1] = {
567                 .start = INT_RTC,
568                 .end = INT_RTC,
569                 .flags = IORESOURCE_IRQ,
570         },
571 };
572
573 static struct platform_device tegra_rtc_device = {
574         .name = "tegra_rtc",
575         .id   = -1,
576         .resource = tegra_rtc_resources,
577         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
578 };
579
580 static struct tegra_wm8903_platform_data cardhu_audio_pdata = {
581         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
582         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
583         .gpio_hp_mute           = -1,
584         .gpio_int_mic_en        = -1,
585         .gpio_ext_mic_en        = -1,
586 };
587
588 static struct platform_device cardhu_audio_device = {
589         .name   = "tegra-snd-wm8903",
590         .id     = 0,
591         .dev    = {
592                 .platform_data  = &cardhu_audio_pdata,
593         },
594 };
595
596 static struct platform_device *cardhu_devices[] __initdata = {
597         &tegra_pmu_device,
598         &tegra_rtc_device,
599         &tegra_udc_device,
600 #if defined(CONFIG_TEGRA_IOVMM_SMMU) ||  defined(CONFIG_TEGRA_IOMMU_SMMU)
601         &tegra_smmu_device,
602 #endif
603         &tegra_wdt_device,
604 #if defined(CONFIG_TEGRA_AVP)
605         &tegra_avp_device,
606 #endif
607         &tegra_camera,
608 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
609         &tegra_se_device,
610 #endif
611         &tegra_ahub_device,
612         &tegra_dam_device0,
613         &tegra_dam_device1,
614         &tegra_dam_device2,
615         &tegra_i2s_device1,
616         &tegra_i2s_device3,
617         &tegra_spdif_device,
618         &spdif_dit_device,
619         &bluetooth_dit_device,
620         &tegra_pcm_device,
621         &cardhu_audio_device,
622         &tegra_hda_device,
623 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
624         &tegra_aes_device,
625 #endif
626 };
627
628 #define MXT_CONFIG_CRC  0xD62DE8
629 static const u8 config[] = {
630         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
631         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
632         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
633         0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
634         0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
635         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
636         0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
637         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
638         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
639         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
640         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
641         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
642         0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
643         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
644         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
645         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
646         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
647         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
648         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
649         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
650 };
651
652 #define MXT_CONFIG_CRC_SKU2000  0xA24D9A
653 static const u8 config_sku2000[] = {
654         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
655         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
656         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
657         0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00,  //23=thr  2 di
658         0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
659         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
660         0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00,  //0A=limit
661         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
662         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
663         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
664         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
665         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
666         0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
667         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
668         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
669         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
670         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
671         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
672         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
673         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
674 };
675
676 static struct mxt_platform_data atmel_mxt_info = {
677         .x_line         = 27,
678         .y_line         = 42,
679         .x_size         = 768,
680         .y_size         = 1366,
681         .blen           = 0x20,
682         .threshold      = 0x3C,
683         .voltage        = 3300000,              /* 3.3V */
684         .orient         = 5,
685         .config         = config,
686         .config_length  = 157,
687         .config_crc     = MXT_CONFIG_CRC,
688         .irqflags       = IRQF_TRIGGER_FALLING,
689 /*      .read_chg       = &read_chg, */
690         .read_chg       = NULL,
691 };
692
693 static struct i2c_board_info __initdata atmel_i2c_info[] = {
694         {
695                 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
696                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PH4),
697                 .platform_data = &atmel_mxt_info,
698         }
699 };
700
701 static int __init cardhu_touch_init(void)
702 {
703         struct board_info BoardInfo;
704
705         tegra_gpio_enable(TEGRA_GPIO_PH4);
706         tegra_gpio_enable(TEGRA_GPIO_PH6);
707
708         gpio_request(TEGRA_GPIO_PH4, "atmel-irq");
709         gpio_direction_input(TEGRA_GPIO_PH4);
710
711         gpio_request(TEGRA_GPIO_PH6, "atmel-reset");
712         gpio_direction_output(TEGRA_GPIO_PH6, 0);
713         msleep(1);
714         gpio_set_value(TEGRA_GPIO_PH6, 1);
715         msleep(100);
716
717         tegra_get_board_info(&BoardInfo);
718         if ((BoardInfo.sku & SKU_TOUCH_MASK) == SKU_TOUCH_2000) {
719                 atmel_mxt_info.config = config_sku2000;
720                 atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
721         }
722
723         i2c_register_board_info(1, atmel_i2c_info, 1);
724
725         return 0;
726 }
727
728 static struct tegra_uhsic_config uhsic_phy_config = {
729         .enable_gpio = EN_HSIC_GPIO,
730         .reset_gpio = -1,
731         .sync_start_delay = 9,
732         .idle_wait_delay = 17,
733         .term_range_adj = 0,
734         .elastic_underrun_limit = 16,
735         .elastic_overrun_limit = 16,
736 };
737
738 static struct tegra_ehci_platform_data tegra_ehci_uhsic_pdata = {
739         .phy_type = TEGRA_USB_PHY_TYPE_HSIC,
740         .phy_config = &uhsic_phy_config,
741         .operating_mode = TEGRA_USB_HOST,
742         .power_down_on_bus_suspend = 1,
743         .default_enable = true,
744 };
745
746 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
747         [0] = {
748                         .phy_config = &utmi_phy_config[0],
749                         .operating_mode = TEGRA_USB_HOST,
750                         .power_down_on_bus_suspend = 1,
751                         .default_enable = true,
752         },
753         [1] = {
754                         .phy_config = &utmi_phy_config[1],
755                         .operating_mode = TEGRA_USB_HOST,
756                         .power_down_on_bus_suspend = 1,
757                         .default_enable = true,
758         },
759         [2] = {
760                         .phy_config = &utmi_phy_config[2],
761                         .operating_mode = TEGRA_USB_HOST,
762                         .power_down_on_bus_suspend = 1,
763                         .hotplug = 1,
764                         .default_enable = true,
765         },
766 };
767
768 static struct tegra_otg_platform_data tegra_otg_pdata = {
769         .ehci_device = &tegra_ehci1_device,
770         .ehci_pdata = &tegra_ehci_pdata[0],
771 };
772
773 #ifdef CONFIG_USB_SUPPORT
774 static struct usb_phy_plat_data tegra_usb_phy_pdata[] = {
775         [0] = {
776                         .instance = 0,
777                         .vbus_gpio = -1,
778                         .vbus_reg_supply = "vdd_vbus_micro_usb",
779         },
780         [1] = {
781                         .instance = 1,
782                         .vbus_gpio = -1,
783         },
784         [2] = {
785                         .instance = 2,
786                         .vbus_gpio = -1,
787                         .vbus_reg_supply = "vdd_vbus_typea_usb",
788         },
789 };
790
791 static void cardhu_usb_init(void)
792 {
793         struct board_info bi;
794
795         tegra_get_board_info(&bi);
796
797         tegra_usb_phy_init(tegra_usb_phy_pdata,
798                         ARRAY_SIZE(tegra_usb_phy_pdata));
799
800         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
801         platform_device_register(&tegra_otg_device);
802         if (bi.board_id == BOARD_PM267) {
803                 uhsic_phy_config.reset_gpio =
804                         PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
805                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
806                 platform_device_register(&tegra_ehci2_device);
807         } else if (bi.board_id == BOARD_E1256) {
808                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
809                 platform_device_register(&tegra_ehci2_device);
810         } else if (bi.board_id == BOARD_E1186) {
811                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
812                 /* baseband registration happens in baseband-xmm-power  */
813         } else {
814                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_pdata[1];
815                 platform_device_register(&tegra_ehci2_device);
816         }
817
818         tegra_ehci3_device.dev.platform_data = &tegra_ehci_pdata[2];
819         platform_device_register(&tegra_ehci3_device);
820
821 }
822 #else
823 static void cardhu_usb_init(void) { }
824 #endif
825
826 static void cardhu_gps_init(void)
827 {
828         tegra_gpio_enable(TEGRA_GPIO_PU2);
829         tegra_gpio_enable(TEGRA_GPIO_PU3);
830 }
831
832 static void cardhu_nfc_init(void)
833 {
834         tegra_gpio_enable(TEGRA_GPIO_PX0);
835         tegra_gpio_enable(TEGRA_GPIO_PP3);
836         tegra_gpio_enable(TEGRA_GPIO_PO7);
837 }
838
839 static struct baseband_power_platform_data tegra_baseband_power_data = {
840         .baseband_type = BASEBAND_XMM,
841         .modem = {
842         .xmm = {
843                         .bb_rst = XMM_GPIO_BB_RST,
844                         .bb_on = XMM_GPIO_BB_ON,
845                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
846                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
847                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
848                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
849                         .hsic_device = &tegra_ehci2_device,
850                 },
851         },
852 };
853
854 static struct platform_device tegra_baseband_power_device = {
855         .name = "baseband_xmm_power",
856         .id = -1,
857         .dev = {
858                 .platform_data = &tegra_baseband_power_data,
859         },
860 };
861
862 static struct platform_device tegra_baseband_power2_device = {
863         .name = "baseband_xmm_power2",
864         .id = -1,
865         .dev = {
866                 .platform_data = &tegra_baseband_power_data,
867         },
868 };
869
870
871 static struct tegra_pci_platform_data cardhu_pci_platform_data = {
872         .port_status[0] = 1,
873         .port_status[1] = 1,
874         .port_status[2] = 1,
875         .use_dock_detect        = 0,
876         .gpio           = 0,
877 };
878
879 static void cardhu_pci_init(void)
880 {
881         struct board_info board_info;
882
883         tegra_get_board_info(&board_info);
884         if (board_info.board_id == BOARD_E1291) {
885                 cardhu_pci_platform_data.port_status[0] = 0;
886                 cardhu_pci_platform_data.port_status[1] = 0;
887                 cardhu_pci_platform_data.port_status[2] = 1;
888                 cardhu_pci_platform_data.use_dock_detect = 1;
889                 cardhu_pci_platform_data.gpio = DOCK_DETECT_GPIO;
890         }
891         tegra_pci_device.dev.platform_data = &cardhu_pci_platform_data;
892         platform_device_register(&tegra_pci_device);
893 }
894
895 static void cardhu_modem_init(void)
896 {
897         struct board_info board_info;
898         int w_disable_gpio, ret;
899
900         tegra_get_board_info(&board_info);
901         switch (board_info.board_id) {
902         case BOARD_E1291:
903         case BOARD_E1198:
904                 if (((board_info.board_id == BOARD_E1291) &&
905                                 (board_info.fab < BOARD_FAB_A03)) ||
906                         ((board_info.board_id == BOARD_E1198) &&
907                                         (board_info.fab < BOARD_FAB_A02))) {
908                         w_disable_gpio = TEGRA_GPIO_PH5;
909                 } else {
910                         w_disable_gpio = TEGRA_GPIO_PDD5;
911                 }
912                 tegra_gpio_enable(w_disable_gpio);
913                 ret = gpio_request(w_disable_gpio, "w_disable_gpio");
914                 if (ret < 0)
915                         pr_err("%s: gpio_request failed for gpio %d\n",
916                                 __func__, w_disable_gpio);
917                 else
918                         gpio_direction_input(w_disable_gpio);
919
920                 /* E1291-A04 & E1198:A02: Set PERST signal to high */
921                 if (((board_info.board_id == BOARD_E1291) &&
922                                 (board_info.fab >= BOARD_FAB_A04)) ||
923                         ((board_info.board_id == BOARD_E1198) &&
924                                         (board_info.fab >= BOARD_FAB_A02))) {
925                         ret = gpio_request(TEGRA_GPIO_PH7, "modem_perst");
926                         if (ret < 0) {
927                                 pr_err("%s(): Error in allocating gpio "
928                                         "TEGRA_GPIO_PH7\n", __func__);
929                                 break;
930                         }
931                         gpio_direction_output(TEGRA_GPIO_PH7, 1);
932                         tegra_gpio_enable(TEGRA_GPIO_PH7);
933                 }
934                 break;
935         case BOARD_E1186:
936                 tegra_gpio_enable(
937                         tegra_baseband_power_data.modem.xmm.bb_rst);
938                 tegra_gpio_enable(
939                         tegra_baseband_power_data.modem.xmm.bb_on);
940                 tegra_gpio_enable(
941                         tegra_baseband_power_data.modem.xmm.ipc_bb_wake);
942                 tegra_gpio_enable(
943                         tegra_baseband_power_data.modem.xmm.ipc_ap_wake);
944                 tegra_gpio_enable(
945                         tegra_baseband_power_data.modem.xmm.ipc_hsic_active);
946                 tegra_gpio_enable(
947                         tegra_baseband_power_data.modem.xmm.ipc_hsic_sus_req);
948                 platform_device_register(&tegra_baseband_power_device);
949                 platform_device_register(&tegra_baseband_power2_device);
950                 break;
951         default:
952                 break;
953         }
954
955 }
956
957 #ifdef CONFIG_SATA_AHCI_TEGRA
958 static void cardhu_sata_init(void)
959 {
960         platform_device_register(&tegra_sata_device);
961 }
962 #else
963 static void cardhu_sata_init(void) { }
964 #endif
965
966 static void __init tegra_cardhu_init(void)
967 {
968         tegra_thermal_init(&thermal_data);
969         tegra_clk_init_from_table(cardhu_clk_init_table);
970         cardhu_pinmux_init();
971         cardhu_i2c_init();
972         cardhu_spi_init();
973         cardhu_usb_init();
974 #ifdef CONFIG_TEGRA_EDP_LIMITS
975         cardhu_edp_init();
976 #endif
977         cardhu_uart_init();
978         cardhu_tsensor_init();
979         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
980         cardhu_sdhci_init();
981         cardhu_regulator_init();
982         cardhu_dtv_init();
983         cardhu_suspend_init();
984         cardhu_power_off_init();
985         cardhu_touch_init();
986         cardhu_gps_init();
987         cardhu_modem_init();
988         cardhu_kbc_init();
989         cardhu_scroll_init();
990         cardhu_keys_init();
991         cardhu_panel_init();
992         cardhu_pmon_init();
993         cardhu_sensors_init();
994         cardhu_bt_rfkill();
995         tegra_setup_bluesleep();
996         cardhu_sata_init();
997         //audio_wired_jack_init();
998         cardhu_pins_state_init();
999         cardhu_emc_init();
1000         tegra_release_bootloader_fb();
1001         cardhu_nfc_init();
1002         cardhu_pci_init();
1003 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1004         tegra_wdt_recovery_init();
1005 #endif
1006 }
1007
1008 static void __init tegra_cardhu_reserve(void)
1009 {
1010 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1011         /* support 1920X1200 with 24bpp */
1012         tegra_reserve(0, SZ_8M + SZ_1M, SZ_8M + SZ_1M);
1013 #else
1014         tegra_reserve(SZ_128M, SZ_8M, SZ_8M);
1015 #endif
1016 }
1017
1018 MACHINE_START(CARDHU, "cardhu")
1019         .boot_params    = 0x80000100,
1020         .map_io         = tegra_map_common_io,
1021         .reserve        = tegra_cardhu_reserve,
1022         .init_early     = tegra_init_early,
1023         .init_irq       = tegra_init_irq,
1024         .timer          = &tegra_timer,
1025         .init_machine   = tegra_cardhu_init,
1026 MACHINE_END