Fix compilation errors due to merge
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA Corporation.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <linux/spi/spi.h>
37 #include <linux/i2c/atmel_mxt_ts.h>
38 #include <linux/tegra_uart.h>
39 #include <linux/memblock.h>
40 #include <linux/spi-tegra.h>
41 #include <linux/nfc/pn544.h>
42 #include <linux/rfkill-gpio.h>
43
44 #include <sound/wm8903.h>
45 #include <sound/max98095.h>
46 #include <media/tegra_dtv.h>
47
48 #include <asm/hardware/gic.h>
49
50 #include <mach/clk.h>
51 #include <mach/iomap.h>
52 #include <mach/irqs.h>
53 #include <mach/pinmux.h>
54 #include <mach/iomap.h>
55 #include <mach/io_dpd.h>
56 #include <mach/io.h>
57 #include <mach/i2s.h>
58 #include <mach/tegra_asoc_pdata.h>
59 #include <mach/tegra_wm8903_pdata.h>
60 #include <mach/usb_phy.h>
61 #include <mach/thermal.h>
62 #include <mach/pci.h>
63 #include <mach/gpio-tegra.h>
64 #include <mach/tegra_fiq_debugger.h>
65
66 #include <asm/hardware/gic.h>
67 #include <asm/mach-types.h>
68 #include <asm/mach/arch.h>
69
70 #include "board.h"
71 #include "clock.h"
72 #include "board-cardhu.h"
73 #include "board-touch.h"
74 #include "devices.h"
75 #include "gpio-names.h"
76 #include "fuse.h"
77 #include "pm.h"
78 #include "baseband-xmm-power.h"
79 #include "wdt-recovery.h"
80 #include "common.h"
81
82 static struct balanced_throttle throttle_list[] = {
83 #ifdef CONFIG_TEGRA_THERMAL_THROTTLE
84         {
85                 .id = BALANCED_THROTTLE_ID_TJ,
86                 .throt_tab_size = 10,
87                 .throt_tab = {
88                         {      0, 1000 },
89                         { 640000, 1000 },
90                         { 640000, 1000 },
91                         { 640000, 1000 },
92                         { 640000, 1000 },
93                         { 640000, 1000 },
94                         { 760000, 1000 },
95                         { 760000, 1050 },
96                         {1000000, 1050 },
97                         {1000000, 1100 },
98                 },
99         },
100 #endif
101 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
102         {
103                 .id = BALANCED_THROTTLE_ID_SKIN,
104                 .throt_tab_size = 6,
105                 .throt_tab = {
106                         { 640000, 1200 },
107                         { 640000, 1200 },
108                         { 760000, 1200 },
109                         { 760000, 1200 },
110                         {1000000, 1200 },
111                         {1000000, 1200 },
112                 },
113         },
114 #endif
115 };
116
117 /* All units are in millicelsius */
118 static struct tegra_thermal_data thermal_data = {
119         .shutdown_device_id = THERMAL_DEVICE_ID_NCT_EXT,
120         .temp_shutdown = 90000,
121
122 #if defined(CONFIG_TEGRA_EDP_LIMITS) || defined(CONFIG_TEGRA_THERMAL_THROTTLE)
123         .throttle_edp_device_id = THERMAL_DEVICE_ID_NCT_EXT,
124 #endif
125 #ifdef CONFIG_TEGRA_EDP_LIMITS
126         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
127         .hysteresis_edp = 3000,
128 #endif
129 #ifdef CONFIG_TEGRA_THERMAL_THROTTLE
130         .temp_throttle = 85000,
131         .tc1 = 0,
132         .tc2 = 1,
133         .passive_delay = 2000,
134 #endif
135 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
136         .skin_device_id = THERMAL_DEVICE_ID_SKIN,
137         .temp_throttle_skin = 43000,
138         .tc1_skin = 0,
139         .tc2_skin = 1,
140         .passive_delay_skin = 5000,
141
142         .skin_temp_offset = 9793,
143         .skin_period = 1100,
144         .skin_devs_size = 2,
145         .skin_devs = {
146                 {
147                         THERMAL_DEVICE_ID_NCT_EXT,
148                         {
149                                 2, 1, 1, 1,
150                                 1, 1, 1, 1,
151                                 1, 1, 1, 0,
152                                 1, 1, 0, 0,
153                                 0, 0, -1, -7
154                         }
155                 },
156                 {
157                         THERMAL_DEVICE_ID_NCT_INT,
158                         {
159                                 -11, -7, -5, -3,
160                                 -3, -2, -1, 0,
161                                 0, 0, 1, 1,
162                                 1, 2, 2, 3,
163                                 4, 6, 11, 18
164                         }
165                 },
166         },
167 #endif
168 };
169
170 static struct rfkill_gpio_platform_data cardhu_bt_rfkill_pdata[] = {
171         {
172                 .name           = "bt_rfkill",
173                 .shutdown_gpio  = TEGRA_GPIO_PU0,
174                 .reset_gpio     = TEGRA_GPIO_INVALID,
175                 .type           = RFKILL_TYPE_BLUETOOTH,
176         },
177 };
178
179 static struct platform_device cardhu_bt_rfkill_device = {
180         .name = "rfkill_gpio",
181         .id             = -1,
182         .dev = {
183                 .platform_data = &cardhu_bt_rfkill_pdata,
184         },
185 };
186
187 static struct resource cardhu_bluesleep_resources[] = {
188         [0] = {
189                 .name = "gpio_host_wake",
190                         .start  = TEGRA_GPIO_PU6,
191                         .end    = TEGRA_GPIO_PU6,
192                         .flags  = IORESOURCE_IO,
193         },
194         [1] = {
195                 .name = "gpio_ext_wake",
196                         .start  = TEGRA_GPIO_PU1,
197                         .end    = TEGRA_GPIO_PU1,
198                         .flags  = IORESOURCE_IO,
199         },
200         [2] = {
201                 .name = "host_wake",
202                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
203         },
204 };
205
206 static struct platform_device cardhu_bluesleep_device = {
207         .name           = "bluesleep",
208         .id             = -1,
209         .num_resources  = ARRAY_SIZE(cardhu_bluesleep_resources),
210         .resource       = cardhu_bluesleep_resources,
211 };
212
213 static noinline void __init cardhu_setup_bluesleep(void)
214 {
215         cardhu_bluesleep_resources[2].start =
216                 cardhu_bluesleep_resources[2].end =
217                         gpio_to_irq(TEGRA_GPIO_PU6);
218         platform_device_register(&cardhu_bluesleep_device);
219         return;
220 }
221
222 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
223         /* name         parent          rate            enabled */
224         { "pll_m",      NULL,           0,              false},
225         { "hda",        "pll_p",        108000000,      false},
226         { "hda2codec_2x","pll_p",       48000000,       false},
227         { "pwm",        "pll_p",        3187500,        false},
228         { "blink",      "clk_32k",      32768,          true},
229         { "i2s0",       "pll_a_out0",   0,              false},
230         { "i2s1",       "pll_a_out0",   0,              false},
231         { "i2s3",       "pll_a_out0",   0,              false},
232         { "spdif_out",  "pll_a_out0",   0,              false},
233         { "d_audio",    "clk_m",        12000000,       false},
234         { "dam0",       "clk_m",        12000000,       false},
235         { "dam1",       "clk_m",        12000000,       false},
236         { "dam2",       "clk_m",        12000000,       false},
237         { "audio1",     "i2s1_sync",    0,              false},
238         { "audio3",     "i2s3_sync",    0,              false},
239         { "vi_sensor",  "pll_p",        150000000,      false},
240         { "i2c1",       "pll_p",        3200000,        false},
241         { "i2c2",       "pll_p",        3200000,        false},
242         { "i2c3",       "pll_p",        3200000,        false},
243         { "i2c4",       "pll_p",        3200000,        false},
244         { "i2c5",       "pll_p",        3200000,        false},
245         { "vi",         "pll_p",        0,              false},
246         { NULL,         NULL,           0,              0},
247 };
248
249 static struct pn544_i2c_platform_data nfc_pdata = {
250         .irq_gpio = TEGRA_GPIO_PX0,
251         .ven_gpio = TEGRA_GPIO_PP3,
252         .firm_gpio = TEGRA_GPIO_PO7,
253         };
254
255 static struct i2c_board_info __initdata cardhu_i2c_bus3_board_info[] = {
256         {
257                 I2C_BOARD_INFO("pn544", 0x28),
258                 .platform_data = &nfc_pdata,
259         },
260 };
261 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
262         .adapter_nr     = 0,
263         .bus_count      = 1,
264         .bus_clk_rate   = { 100000, 0 },
265         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
266         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
267         .arb_recovery = arb_lost_recovery,
268 };
269
270 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
271         .adapter_nr     = 1,
272         .bus_count      = 1,
273         .bus_clk_rate   = { 400000, 0 },
274         .is_clkon_always = true,
275         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
276         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
277         .arb_recovery = arb_lost_recovery,
278 };
279
280 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
281         .adapter_nr     = 2,
282         .bus_count      = 1,
283         .bus_clk_rate   = { 100000, 0 },
284         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
285         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
286         .arb_recovery = arb_lost_recovery,
287 };
288
289 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
290         .adapter_nr     = 3,
291         .bus_count      = 1,
292         .bus_clk_rate   = { 10000, 0 },
293         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
294         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
295         .arb_recovery = arb_lost_recovery,
296 };
297
298 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
299         .adapter_nr     = 4,
300         .bus_count      = 1,
301         .bus_clk_rate   = { 400000, 0 },
302         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
303         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
304         .arb_recovery = arb_lost_recovery,
305 };
306
307
308 #if 0
309 struct tegra_wired_jack_conf audio_wr_jack_conf = {
310         .hp_det_n = TEGRA_GPIO_PW2,
311         .en_mic_ext = TEGRA_GPIO_PX1,
312         .en_mic_int = TEGRA_GPIO_PX0,
313 };
314 #endif
315
316 static struct wm8903_platform_data cardhu_wm8903_pdata = {
317         .irq_active_low = 0,
318         .micdet_cfg = 0,
319         .micdet_delay = 100,
320         .gpio_base = CARDHU_GPIO_WM8903(0),
321         .gpio_cfg = {
322                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP1_FN_SHIFT),
323                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP2_FN_SHIFT) |
324                         WM8903_GP2_DIR,
325                 WM8903_GPIO_CONFIG_ZERO,
326                 0,
327                 0,
328         },
329 };
330
331 /* Equalizer filter coefs generated from the MAXIM MAX98095
332  * evkit software tool */
333 static struct max98095_eq_cfg max98095_eq_cfg[] = {
334         {
335                 .name = "FLAT",
336                 .rate = 44100,
337                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
338                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
339                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
340                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
341                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
342         },
343         {
344                 .name = "LOWPASS1K",
345                 .rate = 44100,
346                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
347                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
348                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
349                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
350                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
351         },
352         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
353                 .name = "HIBOOST",
354                 .rate = 44100,
355                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
356                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
357                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
358                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
359                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
360         },
361         { /* BASS=12dB, TREBLE=+12dB */
362                 .name = "LOUD12DB",
363                 .rate = 44100,
364                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
365                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
366                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
367                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
368                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
369         },
370         {
371                 .name = "FLAT",
372                 .rate = 16000,
373                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
374                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
375                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
376                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
377                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
378         },
379         {
380                 .name = "LOWPASS1K",
381                 .rate = 16000,
382                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
383                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
384                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
385                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
386                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
387         },
388         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
389                 .name = "HIBOOST",
390                 .rate = 16000,
391                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
392                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
393                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
394                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
395                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
396         },
397         { /* BASS=12dB, TREBLE=+12dB */
398                 .name = "LOUD12DB",
399                 .rate = 16000,
400                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
401                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
402                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
403                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
404                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
405         },
406 };
407
408 static struct max98095_pdata cardhu_max98095_pdata = {
409         /* equalizer configuration */
410         .eq_cfg = max98095_eq_cfg,
411         .eq_cfgcnt = ARRAY_SIZE(max98095_eq_cfg),
412
413         /* Biquad filter response configuration */
414         .bq_cfg = NULL,
415         .bq_cfgcnt = 0,
416
417         /* microphone configuration */
418         .digmic_left_mode = 1,
419         .digmic_right_mode = 1,
420 };
421
422 static struct i2c_board_info __initdata cardhu_codec_wm8903_info = {
423         I2C_BOARD_INFO("wm8903", 0x1a),
424         .platform_data = &cardhu_wm8903_pdata,
425 };
426
427 static struct i2c_board_info __initdata cardhu_codec_aic326x_info = {
428         I2C_BOARD_INFO("aic3262-codec", 0x18),
429 };
430
431 static struct i2c_board_info __initdata cardhu_codec_max98095_info = {
432         I2C_BOARD_INFO("max98095", 0x10),
433         .platform_data = &cardhu_max98095_pdata,
434 };
435
436 static void cardhu_i2c_init(void)
437 {
438         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
439         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
440         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
441         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
442         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
443
444         platform_device_register(&tegra_i2c_device5);
445         platform_device_register(&tegra_i2c_device4);
446         platform_device_register(&tegra_i2c_device3);
447         platform_device_register(&tegra_i2c_device2);
448         platform_device_register(&tegra_i2c_device1);
449
450         cardhu_codec_wm8903_info.irq = cardhu_codec_max98095_info.irq =
451                 cardhu_codec_aic326x_info.irq = gpio_to_irq(TEGRA_GPIO_CDC_IRQ);
452         i2c_register_board_info(4, &cardhu_codec_wm8903_info, 1);
453         i2c_register_board_info(4, &cardhu_codec_max98095_info, 1);
454         i2c_register_board_info(4, &cardhu_codec_aic326x_info, 1);
455
456         cardhu_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PX0);
457         i2c_register_board_info(2, cardhu_i2c_bus3_board_info, 1);
458 }
459
460 static struct platform_device *cardhu_uart_devices[] __initdata = {
461         &tegra_uarta_device,
462         &tegra_uartb_device,
463         &tegra_uartc_device,
464         &tegra_uartd_device,
465         &tegra_uarte_device,
466 };
467 static struct uart_clk_parent uart_parent_clk[] = {
468         [0] = {.name = "clk_m"},
469         [1] = {.name = "pll_p"},
470 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
471         [2] = {.name = "pll_m"},
472 #endif
473 };
474
475 static struct tegra_uart_platform_data cardhu_uart_pdata;
476 static struct tegra_uart_platform_data cardhu_loopback_uart_pdata;
477
478 static void __init uart_debug_init(void)
479 {
480         struct board_info board_info;
481         int debug_port_id;
482
483         tegra_get_board_info(&board_info);
484
485         debug_port_id = get_tegra_uart_debug_port_id();
486         if (debug_port_id < 0) {
487                 debug_port_id = 0;
488                         /* UARTB is debug port
489                          *       for SLT - E1186/E1187/PM269
490                          *       for E1256/E1257
491                          */
492                 if (((board_info.sku & SKU_SLT_ULPI_SUPPORT) &&
493                         ((board_info.board_id == BOARD_E1186) ||
494                         (board_info.board_id == BOARD_E1187) ||
495                         (board_info.board_id == BOARD_PM269))) ||
496                         (board_info.board_id == BOARD_E1256) ||
497                         (board_info.board_id == BOARD_E1257))
498                                 debug_port_id = 1;
499         }
500
501 #ifdef CONFIG_TEGRA_IRDA
502         if ((board_info.board_id == BOARD_E1186) ||
503                 (board_info.board_id == BOARD_E1198)) {
504                 if (debug_port_id == 1) {
505                         cardhu_irda_pdata.is_irda = false;
506                         pr_err("UARTB is not available for IrDA\n");
507                 }
508         }
509 #endif
510
511         switch (debug_port_id) {
512         case 0:
513                 /* UARTA is the debug port. */
514                 pr_info("Selecting UARTA as the debug console\n");
515                 cardhu_uart_devices[0] = &debug_uarta_device;
516                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
517                 debug_uart_port_base = ((struct plat_serial8250_port *)(
518                         debug_uarta_device.dev.platform_data))->mapbase;
519                 break;
520
521         case 1:
522                 /* UARTB is the debug port. */
523                 pr_info("Selecting UARTB as the debug console\n");
524                 cardhu_uart_devices[1] = &debug_uartb_device;
525                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartb");
526                 debug_uart_port_base = ((struct plat_serial8250_port *)(
527                         debug_uartb_device.dev.platform_data))->mapbase;
528                 break;
529
530         case 2:
531                 /* UARTC is the debug port. */
532                 pr_info("Selecting UARTC as the debug console\n");
533                 cardhu_uart_devices[2] = &debug_uartc_device;
534                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartc");
535                 debug_uart_port_base = ((struct plat_serial8250_port *)(
536                         debug_uartc_device.dev.platform_data))->mapbase;
537                 break;
538
539         case 3:
540                 /* UARTD is the debug port. */
541                 pr_info("Selecting UARTD as the debug console\n");
542                 cardhu_uart_devices[3] = &debug_uartd_device;
543                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartd");
544                 debug_uart_port_base = ((struct plat_serial8250_port *)(
545                         debug_uartd_device.dev.platform_data))->mapbase;
546                 break;
547
548         case 4:
549                 /* UARTE is the debug port. */
550                 pr_info("Selecting UARTE as the debug console\n");
551                 cardhu_uart_devices[4] = &debug_uarte_device;
552                 debug_uart_clk =  clk_get_sys("serial8250.0", "uarte");
553                 debug_uart_port_base = ((struct plat_serial8250_port *)(
554                         debug_uarte_device.dev.platform_data))->mapbase;
555                 break;
556
557         default:
558                 pr_info("The debug console id %d is invalid, Assuming UARTA", debug_port_id);
559                 cardhu_uart_devices[0] = &debug_uarta_device;
560                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
561                 debug_uart_port_base = ((struct plat_serial8250_port *)(
562                         debug_uarta_device.dev.platform_data))->mapbase;
563                 break;
564         }
565         return;
566 }
567
568 static void __init cardhu_uart_init(void)
569 {
570         struct clk *c;
571         int i;
572         struct board_info board_info;
573
574         tegra_get_board_info(&board_info);
575
576         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
577                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
578                 if (IS_ERR_OR_NULL(c)) {
579                         pr_err("Not able to get the clock for %s\n",
580                                                 uart_parent_clk[i].name);
581                         continue;
582                 }
583                 uart_parent_clk[i].parent_clk = c;
584                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
585         }
586         cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
587         cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
588         cardhu_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
589         cardhu_loopback_uart_pdata.parent_clk_count =
590                                                 ARRAY_SIZE(uart_parent_clk);
591         cardhu_loopback_uart_pdata.is_loopback = true;
592         tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
593         tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
594         tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
595         tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
596         /* UARTE is used for loopback test purpose */
597         tegra_uarte_device.dev.platform_data = &cardhu_loopback_uart_pdata;
598
599         /* Register low speed only if it is selected */
600         if (!is_tegra_debug_uartport_hs()) {
601                 uart_debug_init();
602                 /* Clock enable for the debug channel */
603                 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
604                         pr_info("The debug console clock name is %s\n",
605                                                 debug_uart_clk->name);
606                         c = tegra_get_clock_by_name("pll_p");
607                         if (IS_ERR_OR_NULL(c))
608                                 pr_err("Not getting the parent clock pll_p\n");
609                         else
610                                 clk_set_parent(debug_uart_clk, c);
611
612                         clk_enable(debug_uart_clk);
613                         clk_set_rate(debug_uart_clk, clk_get_rate(c));
614                 } else {
615                         pr_err("Not getting the clock %s for debug console\n",
616                                         debug_uart_clk->name);
617                 }
618         }
619
620 #ifdef CONFIG_TEGRA_IRDA
621         if (((board_info.board_id == BOARD_E1186) ||
622                 (board_info.board_id == BOARD_E1198)) &&
623                         cardhu_irda_pdata.is_irda) {
624                 cardhu_irda_pdata.parent_clk_list = uart_parent_clk;
625                 cardhu_irda_pdata.parent_clk_count =
626                                         ARRAY_SIZE(uart_parent_clk);
627
628                 tegra_uartb_device.dev.platform_data = &cardhu_irda_pdata;
629         }
630 #endif
631
632         platform_add_devices(cardhu_uart_devices,
633                                 ARRAY_SIZE(cardhu_uart_devices));
634 }
635
636 static struct platform_device tegra_camera = {
637         .name = "tegra_camera",
638         .id = -1,
639 };
640
641 static struct platform_device *cardhu_spi_devices[] __initdata = {
642         &tegra_spi_device4,
643 };
644
645 static struct platform_device *touch_spi_device[] __initdata = {
646         &tegra_spi_device1,
647 };
648
649 struct spi_clk_parent spi_parent_clk[] = {
650         [0] = {.name = "pll_p"},
651 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
652         [1] = {.name = "pll_m"},
653         [2] = {.name = "clk_m"},
654 #else
655         [1] = {.name = "clk_m"},
656 #endif
657 };
658
659 static struct tegra_spi_platform_data cardhu_spi_pdata = {
660         .is_dma_based           = true,
661         .max_dma_buffer         = (16 * 1024),
662         .is_clkon_always        = false,
663         .max_rate               = 100000000,
664 };
665
666 static void __init cardhu_spi_init(void)
667 {
668         int i;
669         struct clk *c;
670         struct board_info board_info, display_board_info;
671
672         tegra_get_board_info(&board_info);
673         tegra_get_display_board_info(&display_board_info);
674
675         for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
676                 c = tegra_get_clock_by_name(spi_parent_clk[i].name);
677                 if (IS_ERR_OR_NULL(c)) {
678                         pr_err("Not able to get the clock for %s\n",
679                                                 spi_parent_clk[i].name);
680                         continue;
681                 }
682                 spi_parent_clk[i].parent_clk = c;
683                 spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
684         }
685         cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
686         cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
687         tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
688         platform_add_devices(cardhu_spi_devices,
689                                 ARRAY_SIZE(cardhu_spi_devices));
690
691         if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
692                 platform_add_devices(touch_spi_device,
693                                 ARRAY_SIZE(touch_spi_device));
694         }
695         if (board_info.board_id == BOARD_E1198) {
696                 tegra_spi_device2.dev.platform_data = &cardhu_spi_pdata;
697                 platform_device_register(&tegra_spi_device2);
698                 tegra_spi_slave_device1.dev.platform_data = &cardhu_spi_pdata;
699                 platform_device_register(&tegra_spi_slave_device1);
700         }
701 }
702
703 static void __init cardhu_dtv_init(void)
704 {
705         struct board_info board_info;
706
707         tegra_get_board_info(&board_info);
708
709         if (board_info.board_id == BOARD_E1186)
710                 platform_device_register(&tegra_dtv_device);
711 }
712
713 static struct resource tegra_rtc_resources[] = {
714         [0] = {
715                 .start = TEGRA_RTC_BASE,
716                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
717                 .flags = IORESOURCE_MEM,
718         },
719         [1] = {
720                 .start = INT_RTC,
721                 .end = INT_RTC,
722                 .flags = IORESOURCE_IRQ,
723         },
724 };
725
726 static struct platform_device tegra_rtc_device = {
727         .name = "tegra_rtc",
728         .id   = -1,
729         .resource = tegra_rtc_resources,
730         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
731 };
732
733 static struct tegra_asoc_platform_data cardhu_audio_wm8903_pdata = {
734         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
735         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
736         .gpio_hp_mute           = -1,
737         .gpio_int_mic_en        = -1,
738         .gpio_ext_mic_en        = -1,
739         .i2s_param[HIFI_CODEC]  = {
740                 .audio_port_id  = 0,
741                 .is_i2s_master  = 1,
742                 .i2s_mode       = TEGRA_DAIFMT_I2S,
743         },
744         .i2s_param[BASEBAND]    = {
745                 .audio_port_id  = -1,
746         },
747         .i2s_param[BT_SCO]      = {
748                 .audio_port_id  = 3,
749                 .is_i2s_master  = 1,
750                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
751         },
752 };
753
754 static struct tegra_asoc_platform_data cardhu_audio_max98095_pdata = {
755         .gpio_spkr_en           = -1,
756         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
757         .gpio_hp_mute           = -1,
758         .gpio_int_mic_en        = -1,
759         .gpio_ext_mic_en        = -1,
760         .i2s_param[HIFI_CODEC]  = {
761                 .audio_port_id  = 0,
762                 .is_i2s_master  = 1,
763                 .i2s_mode       = TEGRA_DAIFMT_I2S,
764         },
765         .i2s_param[BASEBAND]    = {
766                 .audio_port_id  = -1,
767         },
768         .i2s_param[BT_SCO]      = {
769                 .audio_port_id  = 3,
770                 .is_i2s_master  = 1,
771                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
772         },
773 };
774
775 static struct platform_device cardhu_audio_wm8903_device = {
776         .name   = "tegra-snd-wm8903",
777         .id     = 0,
778         .dev    = {
779                 .platform_data = &cardhu_audio_wm8903_pdata,
780         },
781 };
782
783 static struct platform_device cardhu_audio_max98095_device = {
784         .name   = "tegra-snd-max98095",
785         .id     = 0,
786         .dev    = {
787                 .platform_data = &cardhu_audio_max98095_pdata,
788         },
789 };
790
791 static struct tegra_asoc_platform_data cardhu_audio_aic326x_pdata = {
792         .gpio_spkr_en           = -1,
793         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
794         .gpio_hp_mute           = -1,
795         .gpio_int_mic_en        = -1,
796         .gpio_ext_mic_en        = -1,
797         /*defaults for Verbier-Cardhu board with TI AIC326X codec*/
798         .i2s_param[HIFI_CODEC]  = {
799                 .audio_port_id  = 0,
800                 .is_i2s_master  = 1,
801                 .i2s_mode       = TEGRA_DAIFMT_I2S,
802                 .sample_size    = 16,
803         },
804         .i2s_param[BT_SCO]      = {
805                 .sample_size    = 16,
806                 .audio_port_id  = 3,
807                 .is_i2s_master  = 1,
808                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
809         },
810 };
811
812 static struct platform_device cardhu_audio_aic326x_device = {
813         .name   = "tegra-snd-aic326x",
814         .id     = 0,
815         .dev    = {
816                 .platform_data  = &cardhu_audio_aic326x_pdata,
817         },
818 };
819
820 static struct platform_device *cardhu_devices[] __initdata = {
821         &tegra_pmu_device,
822         &tegra_rtc_device,
823         &tegra_udc_device,
824 #if defined(CONFIG_TEGRA_IOVMM_SMMU) ||  defined(CONFIG_TEGRA_IOMMU_SMMU)
825         &tegra_smmu_device,
826 #endif
827         &tegra_wdt0_device,
828         &tegra_wdt1_device,
829         &tegra_wdt2_device,
830 #if defined(CONFIG_TEGRA_AVP)
831         &tegra_avp_device,
832 #endif
833         &tegra_camera,
834 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
835         &tegra_se_device,
836 #endif
837         &tegra_ahub_device,
838         &tegra_dam_device0,
839         &tegra_dam_device1,
840         &tegra_dam_device2,
841         &tegra_i2s_device0,
842         &tegra_i2s_device1,
843         &tegra_i2s_device3,
844         &tegra_spdif_device,
845         &spdif_dit_device,
846         &bluetooth_dit_device,
847         &baseband_dit_device,
848         &cardhu_bt_rfkill_device,
849         &tegra_pcm_device,
850         &cardhu_audio_wm8903_device,
851         &cardhu_audio_max98095_device,
852         &cardhu_audio_aic326x_device,
853         &tegra_hda_device,
854         &tegra_cec_device,
855 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
856         &tegra_aes_device,
857 #endif
858 };
859
860 #define E1506_MXT_CONFIG_CRC 0x62F903
861 static const u8 e1506_config[] = {
862         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
863         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x05, 0x01, 0x00,
864         0x00, 0x1E, 0x0A, 0x8B, 0x00, 0x00, 0x13, 0x0B,
865         0x00, 0x10, 0x32, 0x03, 0x03, 0x00, 0x03, 0x01,
866         0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xBF, 0x03, 0x1B,
867         0x02, 0x00, 0x00, 0x37, 0x37, 0x00, 0x00, 0x00,
868         0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
869         0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
870         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
871         0x00, 0x00, 0x00, 0xA9, 0x7F, 0x9A, 0x0E, 0x00,
872         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
873         0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00,
874         0x00, 0x00, 0x03, 0x23, 0x00, 0x00, 0x00, 0x0A,
875         0x0F, 0x14, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00,
876         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
877         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
878         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
879         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
880         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
881         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
882         0x00, 0x00, 0x00, 0x01, 0x00, 0x03, 0x08, 0x10,
883         0x00
884 };
885
886 #define MXT_CONFIG_CRC  0xD62DE8
887 static const u8 config[] = {
888         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
889         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
890         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
891         0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
892         0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
893         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
894         0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
895         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
896         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
897         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
898         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
899         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
900         0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
901         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
902         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
903         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
904         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
905         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
906         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
907         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
908 };
909
910 #define MXT_CONFIG_CRC_SKU2000  0xA24D9A
911 static const u8 config_sku2000[] = {
912         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
913         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
914         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
915         0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00,  //23=thr  2 di
916         0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
917         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
918         0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00,  //0A=limit
919         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
920         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
921         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
922         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
923         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
924         0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
925         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
926         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
927         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
928         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
929         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
930         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
931         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
932 };
933
934 static struct mxt_platform_data atmel_mxt_info = {
935         .x_line         = 27,
936         .y_line         = 42,
937         .x_size         = 768,
938         .y_size         = 1366,
939         .blen           = 0x20,
940         .threshold      = 0x3C,
941         .voltage        = 3300000,              /* 3.3V */
942         .orient         = 5,
943         .config         = config,
944         .config_length  = 157,
945         .config_crc     = MXT_CONFIG_CRC,
946         .irqflags       = IRQF_TRIGGER_FALLING,
947 /*      .read_chg       = &read_chg, */
948         .read_chg       = NULL,
949 };
950
951 static struct mxt_platform_data e1506_atmel_mxt_info = {
952         .x_line         = 19,
953         .y_line         = 11,
954         .x_size         = 960,
955         .y_size         = 540,
956         .blen           = 0x10,
957         .threshold      = 0x32,
958         .voltage        = 3300000,              /* 3.3V */
959         .orient         = 3,
960         .config         = e1506_config,
961         .config_length  = 168,
962         .config_crc     = E1506_MXT_CONFIG_CRC,
963         .irqflags       = IRQF_TRIGGER_FALLING,
964 /*      .read_chg       = &read_chg, */
965         .read_chg       = NULL,
966 };
967
968 static struct i2c_board_info __initdata atmel_i2c_info[] = {
969         {
970                 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
971                 .platform_data = &atmel_mxt_info,
972         }
973 };
974
975 static struct i2c_board_info __initdata e1506_atmel_i2c_info[] = {
976         {
977                 I2C_BOARD_INFO("atmel_mxt_ts", 0x4A),
978                 .platform_data = &e1506_atmel_mxt_info,
979         }
980 };
981
982 static __initdata struct tegra_clk_init_table spi_clk_init_table[] = {
983         /* name         parent          rate            enabled */
984         { "sbc1",       "pll_p",        52000000,       true},
985         { NULL,         NULL,           0,              0},
986 };
987
988 static int __init cardhu_touch_init(void)
989 {
990         struct board_info BoardInfo, DisplayBoardInfo;
991
992         tegra_get_board_info(&BoardInfo);
993         tegra_get_display_board_info(&DisplayBoardInfo);
994         if (DisplayBoardInfo.board_id == BOARD_DISPLAY_PM313) {
995                 tegra_clk_init_from_table(spi_clk_init_table);
996
997                 touch_init_raydium(TEGRA_GPIO_PH4, TEGRA_GPIO_PH6, 2);
998         } else {
999                 gpio_request(TEGRA_GPIO_PH4, "atmel-irq");
1000                 gpio_direction_input(TEGRA_GPIO_PH4);
1001
1002                 gpio_request(TEGRA_GPIO_PH6, "atmel-reset");
1003                 gpio_direction_output(TEGRA_GPIO_PH6, 0);
1004                 msleep(1);
1005                 gpio_set_value(TEGRA_GPIO_PH6, 1);
1006                 msleep(100);
1007
1008                 if ((BoardInfo.sku & SKU_TOUCH_MASK) == SKU_TOUCH_2000) {
1009                         atmel_mxt_info.config = config_sku2000;
1010                         atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
1011                 }
1012
1013                 if (DisplayBoardInfo.board_id == BOARD_DISPLAY_E1506) {
1014                         e1506_atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH4);
1015                         i2c_register_board_info(1, e1506_atmel_i2c_info, 1);
1016                 } else {
1017                         atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH4);
1018                         i2c_register_board_info(1, atmel_i2c_info, 1);
1019                 }
1020         }
1021
1022         return 0;
1023 }
1024
1025 #if defined(CONFIG_USB_SUPPORT)
1026
1027 static void cardu_usb_hsic_postsupend(void)
1028 {
1029 #ifdef CONFIG_TEGRA_BB_XMM_POWER
1030         baseband_xmm_set_power_status(BBXMM_PS_L2);
1031 #endif
1032 }
1033
1034 static void cardu_usb_hsic_preresume(void)
1035 {
1036 #ifdef CONFIG_TEGRA_BB_XMM_POWER
1037         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
1038 #endif
1039 }
1040
1041 static void cardu_usb_hsic_phy_ready(void)
1042 {
1043 #ifdef CONFIG_TEGRA_BB_XMM_POWER
1044         baseband_xmm_set_power_status(BBXMM_PS_L0);
1045 #endif
1046 }
1047
1048 static void cardu_usb_hsic_phy_off(void)
1049 {
1050 #ifdef CONFIG_TEGRA_BB_XMM_POWER
1051         baseband_xmm_set_power_status(BBXMM_PS_L3);
1052 #endif
1053 }
1054
1055 static struct tegra_usb_phy_platform_ops hsic_xmm_plat_ops = {
1056         .post_suspend = cardu_usb_hsic_postsupend,
1057         .pre_resume = cardu_usb_hsic_preresume,
1058         .port_power = cardu_usb_hsic_phy_ready,
1059         .post_phy_off = cardu_usb_hsic_phy_off,
1060 };
1061
1062 static struct tegra_usb_platform_data tegra_ehci2_hsic_xmm_pdata = {
1063         .port_otg = false,
1064         .has_hostpc = true,
1065         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
1066         .op_mode        = TEGRA_USB_OPMODE_HOST,
1067         .u_data.host = {
1068                 .vbus_gpio = -1,
1069                 .hot_plug = false,
1070                 .remote_wakeup_supported = false,
1071                 .power_off_on_suspend = false,
1072         },
1073         .ops = &hsic_xmm_plat_ops,
1074 };
1075 #endif
1076
1077 static int hsic_enable_gpio = -1;
1078 static int hsic_reset_gpio = -1;
1079
1080 void hsic_platform_open(void)
1081 {
1082         int reset_gpio = 0, enable_gpio = 0;
1083
1084         if (hsic_enable_gpio != -1)
1085                 enable_gpio = gpio_request(hsic_enable_gpio, "uhsic_enable");
1086         if (hsic_reset_gpio != -1)
1087                 reset_gpio = gpio_request(hsic_reset_gpio, "uhsic_reset");
1088         /* hsic enable signal deasserted, hsic reset asserted */
1089         if (!enable_gpio)
1090                 gpio_direction_output(hsic_enable_gpio, 0 /* deasserted */);
1091         if (!reset_gpio)
1092                 gpio_direction_output(hsic_reset_gpio, 0 /* asserted */);
1093         /* keep hsic reset asserted for 1 ms */
1094         udelay(1000);
1095         /* enable (power on) hsic */
1096         if (!enable_gpio)
1097                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
1098         udelay(1000);
1099         /* deassert reset */
1100         if (!reset_gpio)
1101                 gpio_set_value_cansleep(hsic_reset_gpio, 1);
1102
1103 }
1104
1105 void hsic_platform_close(void)
1106 {
1107         if (hsic_enable_gpio != -1) {
1108                 gpio_set_value(hsic_enable_gpio, 0);
1109                 gpio_free(hsic_enable_gpio);
1110         }
1111         if (hsic_reset_gpio != -1) {
1112                 gpio_set_value(hsic_reset_gpio, 0);
1113                 gpio_free(hsic_reset_gpio);
1114         }
1115 }
1116
1117 void hsic_power_on(void)
1118 {
1119         if (hsic_enable_gpio != -1) {
1120                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
1121                 udelay(1000);
1122         }
1123 }
1124
1125 void hsic_power_off(void)
1126 {
1127         if (hsic_enable_gpio != -1) {
1128                 gpio_set_value_cansleep(hsic_enable_gpio, 0);
1129                 udelay(1000);
1130         }
1131 }
1132
1133 #if defined(CONFIG_USB_SUPPORT)
1134 static struct tegra_usb_phy_platform_ops hsic_plat_ops = {
1135         .open = hsic_platform_open,
1136         .close = hsic_platform_close,
1137         .pre_phy_on = hsic_power_on,
1138         .post_phy_off = hsic_power_off,
1139 };
1140
1141 static struct tegra_usb_platform_data tegra_ehci2_hsic_pdata = {
1142         .port_otg = false,
1143         .has_hostpc = true,
1144         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
1145         .op_mode        = TEGRA_USB_OPMODE_HOST,
1146         .u_data.host = {
1147                 .vbus_gpio = -1,
1148                 .hot_plug = false,
1149                 .remote_wakeup_supported = false,
1150                 .power_off_on_suspend = false,
1151         },
1152         .ops = &hsic_plat_ops,
1153 };
1154
1155 static struct tegra_usb_platform_data tegra_udc_pdata = {
1156         .port_otg = true,
1157         .has_hostpc = true,
1158         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1159         .op_mode = TEGRA_USB_OPMODE_DEVICE,
1160         .u_data.dev = {
1161                 .vbus_pmu_irq = 0,
1162                 .vbus_gpio = -1,
1163                 .charging_supported = false,
1164                 .remote_wakeup_supported = false,
1165         },
1166         .u_cfg.utmi = {
1167                 .hssync_start_delay = 0,
1168                 .elastic_limit = 16,
1169                 .idle_wait_delay = 17,
1170                 .term_range_adj = 6,
1171                 .xcvr_setup = 8,
1172                 .xcvr_lsfslew = 2,
1173                 .xcvr_lsrslew = 2,
1174                 .xcvr_setup_offset = 0,
1175                 .xcvr_use_fuses = 1,
1176         },
1177 };
1178
1179 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
1180         .port_otg = false,
1181         .has_hostpc = true,
1182         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1183         .op_mode        = TEGRA_USB_OPMODE_HOST,
1184         .u_data.host = {
1185                 .vbus_gpio = -1,
1186                 .hot_plug = false,
1187                 .remote_wakeup_supported = true,
1188                 .power_off_on_suspend = true,
1189         },
1190         .u_cfg.utmi = {
1191                 .hssync_start_delay = 0,
1192                 .elastic_limit = 16,
1193                 .idle_wait_delay = 17,
1194                 .term_range_adj = 6,
1195                 .xcvr_setup = 15,
1196                 .xcvr_lsfslew = 2,
1197                 .xcvr_lsrslew = 2,
1198                 .xcvr_setup_offset = 0,
1199                 .xcvr_use_fuses = 1,
1200         },
1201 };
1202
1203 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
1204         .port_otg = false,
1205         .has_hostpc = true,
1206         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1207         .op_mode = TEGRA_USB_OPMODE_HOST,
1208         .u_data.host = {
1209                 .vbus_gpio = -1,
1210                 .vbus_reg = "vdd_vbus_typea_usb",
1211                 .hot_plug = true,
1212                 .remote_wakeup_supported = true,
1213                 .power_off_on_suspend = true,
1214         },
1215         .u_cfg.utmi = {
1216                 .hssync_start_delay = 0,
1217                 .elastic_limit = 16,
1218                 .idle_wait_delay = 17,
1219                 .term_range_adj = 6,
1220                 .xcvr_setup = 8,
1221                 .xcvr_lsfslew = 2,
1222                 .xcvr_lsrslew = 2,
1223                 .xcvr_setup_offset = 0,
1224                 .xcvr_use_fuses = 1,
1225         },
1226 };
1227
1228 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
1229         .port_otg = true,
1230         .has_hostpc = true,
1231         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1232         .op_mode = TEGRA_USB_OPMODE_HOST,
1233         .u_data.host = {
1234                 .vbus_gpio = -1,
1235                 .vbus_reg = "vdd_vbus_micro_usb",
1236                 .hot_plug = true,
1237                 .remote_wakeup_supported = true,
1238                 .power_off_on_suspend = true,
1239         },
1240         .u_cfg.utmi = {
1241                 .hssync_start_delay = 0,
1242                 .elastic_limit = 16,
1243                 .idle_wait_delay = 17,
1244                 .term_range_adj = 6,
1245                 .xcvr_setup = 15,
1246                 .xcvr_lsfslew = 2,
1247                 .xcvr_lsrslew = 2,
1248                 .xcvr_setup_offset = 0,
1249                 .xcvr_use_fuses = 1,
1250         },
1251 };
1252
1253 static struct tegra_usb_otg_data tegra_otg_pdata = {
1254         .ehci_device = &tegra_ehci1_device,
1255         .ehci_pdata = &tegra_ehci1_utmi_pdata,
1256 };
1257 #endif
1258
1259 #if defined(CONFIG_USB_SUPPORT)
1260 static void cardhu_usb_init(void)
1261 {
1262         struct board_info bi;
1263
1264         tegra_get_board_info(&bi);
1265
1266         /* OTG should be the first to be registered */
1267         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1268         platform_device_register(&tegra_otg_device);
1269
1270         /* setup the udc platform data */
1271         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1272
1273         if (bi.board_id == BOARD_PM267) {
1274                 hsic_enable_gpio = EN_HSIC_GPIO;
1275                 hsic_reset_gpio = PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
1276                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1277                 platform_device_register(&tegra_ehci2_device);
1278         } else if (bi.board_id == BOARD_E1256) {
1279                 hsic_enable_gpio = EN_HSIC_GPIO;
1280                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1281                 platform_device_register(&tegra_ehci2_device);
1282         } else if (bi.board_id == BOARD_E1186) {
1283                 tegra_ehci2_device.dev.platform_data =
1284                                                 &tegra_ehci2_hsic_xmm_pdata;
1285                 /* ehci2 registration happens in baseband-xmm-power  */
1286         } else {
1287                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_utmi_pdata;
1288                 platform_device_register(&tegra_ehci2_device);
1289         }
1290
1291         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
1292         platform_device_register(&tegra_ehci3_device);
1293
1294 }
1295 #else
1296 static void cardhu_usb_init(void) { }
1297 #endif
1298
1299 static struct baseband_power_platform_data tegra_baseband_power_data = {
1300         .baseband_type = BASEBAND_XMM,
1301         .modem = {
1302         .xmm = {
1303                         .bb_rst = XMM_GPIO_BB_RST,
1304                         .bb_on = XMM_GPIO_BB_ON,
1305                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1306                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1307                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1308                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1309                         .hsic_device = &tegra_ehci2_device,
1310                 },
1311         },
1312 };
1313
1314 static struct platform_device tegra_baseband_power_device = {
1315         .name = "baseband_xmm_power",
1316         .id = -1,
1317         .dev = {
1318                 .platform_data = &tegra_baseband_power_data,
1319         },
1320 };
1321
1322 static struct platform_device tegra_baseband_power2_device = {
1323         .name = "baseband_xmm_power2",
1324         .id = -1,
1325         .dev = {
1326                 .platform_data = &tegra_baseband_power_data,
1327         },
1328 };
1329
1330
1331 static struct tegra_pci_platform_data cardhu_pci_platform_data = {
1332         .port_status[0] = 1,
1333         .port_status[1] = 1,
1334         .port_status[2] = 1,
1335         .use_dock_detect        = 0,
1336         .gpio           = 0,
1337 };
1338
1339 static void cardhu_pci_init(void)
1340 {
1341         struct board_info board_info;
1342
1343         tegra_get_board_info(&board_info);
1344         if (board_info.board_id == BOARD_E1291) {
1345                 cardhu_pci_platform_data.port_status[0] = 0;
1346                 cardhu_pci_platform_data.port_status[1] = 0;
1347                 cardhu_pci_platform_data.port_status[2] = 1;
1348                 cardhu_pci_platform_data.use_dock_detect = 1;
1349                 cardhu_pci_platform_data.gpio = DOCK_DETECT_GPIO;
1350         }
1351         if ((board_info.board_id == BOARD_E1186) ||
1352                 (board_info.board_id == BOARD_E1187) ||
1353                 (board_info.board_id == BOARD_E1291)) {
1354                 tegra_pci_device.dev.platform_data = &cardhu_pci_platform_data;
1355                 platform_device_register(&tegra_pci_device);
1356         }
1357 }
1358
1359 static void cardhu_modem_init(void)
1360 {
1361         struct board_info board_info;
1362         int w_disable_gpio, ret;
1363
1364         tegra_get_board_info(&board_info);
1365         switch (board_info.board_id) {
1366         case BOARD_E1291:
1367         case BOARD_E1198:
1368                 if (((board_info.board_id == BOARD_E1291) &&
1369                                 (board_info.fab < BOARD_FAB_A03)) ||
1370                         ((board_info.board_id == BOARD_E1198) &&
1371                                         (board_info.fab < BOARD_FAB_A02))) {
1372                         w_disable_gpio = TEGRA_GPIO_PH5;
1373                 } else {
1374                         w_disable_gpio = TEGRA_GPIO_PDD5;
1375                 }
1376
1377                 ret = gpio_request(w_disable_gpio, "w_disable_gpio");
1378                 if (ret < 0)
1379                         pr_err("%s: gpio_request failed for gpio %d\n",
1380                                 __func__, w_disable_gpio);
1381                 else
1382                         gpio_direction_input(w_disable_gpio);
1383
1384                 /* E1291-A04 & E1198:A02: Set PERST signal to high */
1385                 if (((board_info.board_id == BOARD_E1291) &&
1386                                 (board_info.fab >= BOARD_FAB_A04)) ||
1387                         ((board_info.board_id == BOARD_E1198) &&
1388                                         (board_info.fab >= BOARD_FAB_A02))) {
1389                         ret = gpio_request(TEGRA_GPIO_PH7, "modem_perst");
1390                         if (ret < 0) {
1391                                 pr_err("%s(): Error in allocating gpio "
1392                                         "TEGRA_GPIO_PH7\n", __func__);
1393                                 break;
1394                         }
1395                         gpio_direction_output(TEGRA_GPIO_PH7, 1);
1396                 }
1397                 break;
1398         case BOARD_E1186:
1399                 platform_device_register(&tegra_baseband_power_device);
1400                 platform_device_register(&tegra_baseband_power2_device);
1401                 break;
1402         default:
1403                 break;
1404         }
1405
1406 }
1407
1408 #ifdef CONFIG_SATA_AHCI_TEGRA
1409 static void cardhu_sata_init(void)
1410 {
1411         platform_device_register(&tegra_sata_device);
1412 }
1413 #else
1414 static void cardhu_sata_init(void) { }
1415 #endif
1416
1417 static void __init tegra_cardhu_init(void)
1418 {
1419         tegra_thermal_init(&thermal_data,
1420                                 throttle_list,
1421                                 ARRAY_SIZE(throttle_list));
1422         tegra_clk_init_from_table(cardhu_clk_init_table);
1423         tegra_enable_pinmux();
1424         cardhu_pinmux_init();
1425         cardhu_i2c_init();
1426         cardhu_spi_init();
1427         cardhu_usb_init();
1428 #ifdef CONFIG_TEGRA_EDP_LIMITS
1429         cardhu_edp_init();
1430 #endif
1431         cardhu_uart_init();
1432         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
1433         tegra_ram_console_debug_init();
1434         tegra_io_dpd_init();
1435         cardhu_sdhci_init();
1436         cardhu_regulator_init();
1437         cardhu_dtv_init();
1438         cardhu_suspend_init();
1439         cardhu_touch_init();
1440         cardhu_modem_init();
1441         cardhu_kbc_init();
1442         cardhu_scroll_init();
1443         cardhu_keys_init();
1444         cardhu_panel_init();
1445         cardhu_pmon_init();
1446         cardhu_sensors_init();
1447         cardhu_setup_bluesleep();
1448         cardhu_sata_init();
1449         //audio_wired_jack_init();
1450         cardhu_pins_state_init();
1451         cardhu_emc_init();
1452         tegra_release_bootloader_fb();
1453         cardhu_pci_init();
1454 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1455         tegra_wdt_recovery_init();
1456 #endif
1457         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1458 }
1459
1460 static void __init tegra_cardhu_reserve(void)
1461 {
1462 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1463         /* support 1920X1200 with 24bpp */
1464         tegra_reserve(0, SZ_8M + SZ_1M, SZ_8M + SZ_1M);
1465 #else
1466         tegra_reserve(SZ_128M, SZ_8M, SZ_8M);
1467 #endif
1468         tegra_ram_console_debug_reserve(SZ_1M);
1469 }
1470
1471 static const char *cardhu_dt_board_compat[] = {
1472         "nvidia,cardhu",
1473         NULL
1474 };
1475
1476 MACHINE_START(CARDHU, "cardhu")
1477         .atag_offset    = 0x100,
1478         .soc            = &tegra_soc_desc,
1479         .map_io         = tegra_map_common_io,
1480         .reserve        = tegra_cardhu_reserve,
1481         .init_early     = tegra30_init_early,
1482         .init_irq       = tegra_init_irq,
1483         .handle_irq     = gic_handle_irq,
1484         .timer          = &tegra_timer,
1485         .init_machine   = tegra_cardhu_init,
1486         .restart        = tegra_assert_system_reset,
1487         .dt_compat      = cardhu_dt_board_compat,
1488 MACHINE_END