arm: tegra: cardhu: Select debug console from kernel command line
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <linux/spi/spi.h>
37 #include <linux/i2c/atmel_mxt_ts.h>
38 #include <linux/tegra_uart.h>
39 #include <linux/spi-tegra.h>
40
41 #include <sound/wm8903.h>
42
43 #include <mach/clk.h>
44 #include <mach/iomap.h>
45 #include <mach/irqs.h>
46 #include <mach/pinmux.h>
47 #include <mach/iomap.h>
48 #include <mach/io.h>
49 #include <mach/i2s.h>
50 #include <mach/tegra_wm8903_pdata.h>
51 #include <asm/mach-types.h>
52 #include <asm/mach/arch.h>
53 #include <mach/usb_phy.h>
54
55 #include "board.h"
56 #include "clock.h"
57 #include "board-cardhu.h"
58 #include "devices.h"
59 #include "gpio-names.h"
60 #include "fuse.h"
61 #include "pm.h"
62 #include "baseband-xmm-power.h"
63
64
65 /* !!!TODO: Change for cardhu (Taken from Ventana) */
66 static struct tegra_utmip_config utmi_phy_config[] = {
67         [0] = {
68                         .hssync_start_delay = 0,
69                         .idle_wait_delay = 17,
70                         .elastic_limit = 16,
71                         .term_range_adj = 6,
72                         .xcvr_setup = 15,
73                         .xcvr_setup_offset = 0,
74                         .xcvr_use_fuses = 1,
75                         .xcvr_lsfslew = 2,
76                         .xcvr_lsrslew = 2,
77         },
78         [1] = {
79                         .hssync_start_delay = 0,
80                         .idle_wait_delay = 17,
81                         .elastic_limit = 16,
82                         .term_range_adj = 6,
83                         .xcvr_setup = 15,
84                         .xcvr_setup_offset = 0,
85                         .xcvr_use_fuses = 1,
86                         .xcvr_lsfslew = 2,
87                         .xcvr_lsrslew = 2,
88         },
89         [2] = {
90                         .hssync_start_delay = 0,
91                         .idle_wait_delay = 17,
92                         .elastic_limit = 16,
93                         .term_range_adj = 6,
94                         .xcvr_setup = 8,
95                         .xcvr_setup_offset = 0,
96                         .xcvr_use_fuses = 1,
97                         .xcvr_lsfslew = 2,
98                         .xcvr_lsrslew = 2,
99         },
100 };
101
102 #ifdef CONFIG_BCM4329_RFKILL
103 static struct resource cardhu_bcm4329_rfkill_resources[] = {
104         {
105                 .name   = "bcm4329_nshutdown_gpio",
106                 .start  = TEGRA_GPIO_PU0,
107                 .end    = TEGRA_GPIO_PU0,
108                 .flags  = IORESOURCE_IO,
109         },
110 };
111
112 static struct platform_device cardhu_bcm4329_rfkill_device = {
113         .name = "bcm4329_rfkill",
114         .id             = -1,
115         .num_resources  = ARRAY_SIZE(cardhu_bcm4329_rfkill_resources),
116         .resource       = cardhu_bcm4329_rfkill_resources,
117 };
118
119 static noinline void __init cardhu_bt_rfkill(void)
120 {
121         platform_device_register(&cardhu_bcm4329_rfkill_device);
122
123         return;
124 }
125 #else
126 static inline void cardhu_bt_rfkill(void) { }
127 #endif
128
129 #ifdef CONFIG_BT_BLUESLEEP
130 static noinline void __init tegra_setup_bluesleep(void)
131 {
132         struct platform_device *pdev = NULL;
133         struct resource *res;
134
135         pdev = platform_device_alloc("bluesleep", 0);
136         if (!pdev) {
137                 pr_err("unable to allocate platform device for bluesleep");
138                 return;
139         }
140
141         res = kzalloc(sizeof(struct resource) * 3, GFP_KERNEL);
142         if (!res) {
143                 pr_err("unable to allocate resource for bluesleep\n");
144                 goto err_free_dev;
145         }
146
147         res[0].name   = "gpio_host_wake";
148         res[0].start  = TEGRA_GPIO_PU6;
149         res[0].end    = TEGRA_GPIO_PU6;
150         res[0].flags  = IORESOURCE_IO;
151
152         res[1].name   = "gpio_ext_wake";
153         res[1].start  = TEGRA_GPIO_PU1;
154         res[1].end    = TEGRA_GPIO_PU1;
155         res[1].flags  = IORESOURCE_IO;
156
157         res[2].name   = "host_wake";
158         res[2].start  = gpio_to_irq(TEGRA_GPIO_PU6);
159         res[2].end    = gpio_to_irq(TEGRA_GPIO_PU6);
160         res[2].flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE ;
161
162         if (platform_device_add_resources(pdev, res, 3)) {
163                 pr_err("unable to add resources to bluesleep device\n");
164                 goto err_free_res;
165         }
166
167         if (platform_device_add(pdev)) {
168                 pr_err("unable to add bluesleep device\n");
169                 goto err_free_res;
170         }
171         tegra_gpio_enable(TEGRA_GPIO_PU6);
172         tegra_gpio_enable(TEGRA_GPIO_PU1);
173
174 return;
175
176 err_free_res:
177         kfree(res);
178 err_free_dev:
179         platform_device_put(pdev);
180         return;
181 }
182 #else
183 static inline void tegra_setup_bluesleep(void) { }
184 #endif
185
186 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
187         /* name         parent          rate            enabled */
188         { "pll_m",      NULL,           0,              false},
189         { "hda",        "pll_p",        108000000,      false},
190         { "hda2codec_2x","pll_p",       48000000,       false},
191         { "pwm",        "pll_p",        3187500,        false},
192         { "blink",      "clk_32k",      32768,          true},
193         { "i2s1",       "pll_a_out0",   0,              false},
194         { "spdif_out",  "pll_a_out0",   0,              false},
195         { "d_audio",    "pll_a_out0",   0,              false},
196         { "dam0",       "pll_a_out0",   0,              false},
197         { "dam1",       "pll_a_out0",   0,              false},
198         { "dam2",       "pll_a_out0",   0,              false},
199         { "vi_sensor",  "pll_p",        150000000,      false},
200         { "i2c1",       "pll_p",        3200000,        false},
201         { "i2c2",       "pll_p",        3200000,        false},
202         { "i2c3",       "pll_p",        3200000,        false},
203         { "i2c4",       "pll_p",        3200000,        false},
204         { "i2c5",       "pll_p",        3200000,        false},
205         { NULL,         NULL,           0,              0},
206 };
207
208 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
209         .adapter_nr     = 0,
210         .bus_count      = 1,
211         .bus_clk_rate   = { 100000, 0 },
212         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
213         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
214         .arb_recovery = arb_lost_recovery,
215 };
216
217 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
218         .adapter_nr     = 1,
219         .bus_count      = 1,
220         .bus_clk_rate   = { 100000, 0 },
221         .is_clkon_always = true,
222         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
223         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
224         .arb_recovery = arb_lost_recovery,
225 };
226
227 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
228         .adapter_nr     = 2,
229         .bus_count      = 1,
230         .bus_clk_rate   = { 100000, 0 },
231         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
232         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
233         .arb_recovery = arb_lost_recovery,
234 };
235
236 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
237         .adapter_nr     = 3,
238         .bus_count      = 1,
239         .bus_clk_rate   = { 100000, 0 },
240         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
241         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
242         .arb_recovery = arb_lost_recovery,
243 };
244
245 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
246         .adapter_nr     = 4,
247         .bus_count      = 1,
248         .bus_clk_rate   = { 400000, 0 },
249         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
250         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
251         .arb_recovery = arb_lost_recovery,
252 };
253
254
255 #if 0
256 struct tegra_wired_jack_conf audio_wr_jack_conf = {
257         .hp_det_n = TEGRA_GPIO_PW2,
258         .en_mic_ext = TEGRA_GPIO_PX1,
259         .en_mic_int = TEGRA_GPIO_PX0,
260 };
261 #endif
262
263 static struct wm8903_platform_data cardhu_wm8903_pdata = {
264         .irq_active_low = 0,
265         .micdet_cfg = 0,
266         .micdet_delay = 100,
267         .gpio_base = CARDHU_GPIO_WM8903(0),
268         .gpio_cfg = {
269                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP1_FN_SHIFT),
270                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP2_FN_SHIFT) |
271                         WM8903_GP2_DIR,
272                 0,
273                 WM8903_GPIO_NO_CONFIG,
274                 WM8903_GPIO_NO_CONFIG,
275         },
276 };
277
278 static struct i2c_board_info __initdata wm8903_board_info = {
279         I2C_BOARD_INFO("wm8903", 0x1a),
280         .platform_data = &cardhu_wm8903_pdata,
281         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
282 };
283
284 static void cardhu_i2c_init(void)
285 {
286         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
287         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
288         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
289         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
290         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
291
292         platform_device_register(&tegra_i2c_device5);
293         platform_device_register(&tegra_i2c_device4);
294         platform_device_register(&tegra_i2c_device3);
295         platform_device_register(&tegra_i2c_device2);
296         platform_device_register(&tegra_i2c_device1);
297
298         i2c_register_board_info(4, &wm8903_board_info, 1);
299 }
300
301 static struct platform_device *cardhu_uart_devices[] __initdata = {
302         &tegra_uarta_device,
303         &tegra_uartb_device,
304         &tegra_uartc_device,
305         &tegra_uartd_device,
306         &tegra_uarte_device,
307 };
308 static struct uart_clk_parent uart_parent_clk[] = {
309         [0] = {.name = "clk_m"},
310         [1] = {.name = "pll_p"},
311         [2] = {.name = "pll_m"},
312 };
313
314 static struct tegra_uart_platform_data cardhu_uart_pdata;
315
316 static void __init uart_debug_init(void)
317 {
318         struct board_info board_info;
319         int debug_port_id;
320
321         tegra_get_board_info(&board_info);
322
323         debug_port_id = get_tegra_uart_debug_port_id();
324         if (debug_port_id < 0) {
325                 debug_port_id = 0;
326                         /* UARTB is debug port
327                          *       for SLT - E1186/E1187/PM269
328                          *       for E1256/E1257
329                          */
330                 if (((board_info.sku & SKU_SLT_ULPI_SUPPORT) &&
331                         ((board_info.board_id == BOARD_E1186) ||
332                         (board_info.board_id == BOARD_E1187) ||
333                         (board_info.board_id == BOARD_PM269))) ||
334                         (board_info.board_id == BOARD_E1256) ||
335                         (board_info.board_id == BOARD_E1257))
336                                 debug_port_id = 1;
337         }
338         switch (debug_port_id) {
339         case 0:
340                 /* UARTA is the debug port. */
341                 pr_info("Selecting UARTA as the debug console\n");
342                 cardhu_uart_devices[0] = &debug_uarta_device;
343                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
344                 debug_uart_port_base = ((struct plat_serial8250_port *)(
345                         debug_uarta_device.dev.platform_data))->mapbase;
346                 break;
347
348         case 1:
349                 /* UARTB is the debug port. */
350                 pr_info("Selecting UARTB as the debug console\n");
351                 cardhu_uart_devices[1] = &debug_uartb_device;
352                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartb");
353                 debug_uart_port_base = ((struct plat_serial8250_port *)(
354                         debug_uartb_device.dev.platform_data))->mapbase;
355                 break;
356
357         case 2:
358                 /* UARTC is the debug port. */
359                 pr_info("Selecting UARTC as the debug console\n");
360                 cardhu_uart_devices[2] = &debug_uartc_device;
361                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartc");
362                 debug_uart_port_base = ((struct plat_serial8250_port *)(
363                         debug_uartc_device.dev.platform_data))->mapbase;
364                 break;
365
366         case 3:
367                 /* UARTD is the debug port. */
368                 pr_info("Selecting UARTD as the debug console\n");
369                 cardhu_uart_devices[3] = &debug_uartd_device;
370                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartd");
371                 debug_uart_port_base = ((struct plat_serial8250_port *)(
372                         debug_uartd_device.dev.platform_data))->mapbase;
373                 break;
374
375         case 4:
376                 /* UARTE is the debug port. */
377                 pr_info("Selecting UARTE as the debug console\n");
378                 cardhu_uart_devices[4] = &debug_uarte_device;
379                 debug_uart_clk =  clk_get_sys("serial8250.0", "uarte");
380                 debug_uart_port_base = ((struct plat_serial8250_port *)(
381                         debug_uarte_device.dev.platform_data))->mapbase;
382                 break;
383
384         default:
385                 pr_info("The debug console id %d is invalid, Assuming UARTA", debug_port_id);
386                 cardhu_uart_devices[0] = &debug_uarta_device;
387                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
388                 debug_uart_port_base = ((struct plat_serial8250_port *)(
389                         debug_uarta_device.dev.platform_data))->mapbase;
390                 break;
391         }
392         return;
393 }
394
395 static void __init cardhu_uart_init(void)
396 {
397         struct clk *c;
398         int i;
399
400         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
401                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
402                 if (IS_ERR_OR_NULL(c)) {
403                         pr_err("Not able to get the clock for %s\n",
404                                                 uart_parent_clk[i].name);
405                         continue;
406                 }
407                 uart_parent_clk[i].parent_clk = c;
408                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
409         }
410         cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
411         cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
412         tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
413         tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
414         tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
415         tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
416         tegra_uarte_device.dev.platform_data = &cardhu_uart_pdata;
417
418         /* Register low speed only if it is selected */
419         if (!is_tegra_debug_uartport_hs()) {
420                 uart_debug_init();
421                 /* Clock enable for the debug channel */
422                 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
423                         pr_info("The debug console clock name is %s\n",
424                                                 debug_uart_clk->name);
425                         c = tegra_get_clock_by_name("pll_p");
426                         if (IS_ERR_OR_NULL(c))
427                                 pr_err("Not getting the parent clock pll_p\n");
428                         else
429                                 clk_set_parent(debug_uart_clk, c);
430
431                         clk_enable(debug_uart_clk);
432                         clk_set_rate(debug_uart_clk, clk_get_rate(c));
433                 } else {
434                         pr_err("Not getting the clock %s for debug console\n",
435                                         debug_uart_clk->name);
436                 }
437         }
438
439         platform_add_devices(cardhu_uart_devices,
440                                 ARRAY_SIZE(cardhu_uart_devices));
441 }
442
443 static struct platform_device tegra_camera = {
444         .name = "tegra_camera",
445         .id = -1,
446 };
447
448 static struct platform_device *cardhu_spi_devices[] __initdata = {
449         &tegra_spi_device4,
450 };
451
452 struct spi_clk_parent spi_parent_clk[] = {
453         [0] = {.name = "pll_p"},
454         [1] = {.name = "pll_m"},
455         [2] = {.name = "clk_m"},
456 };
457
458 static struct tegra_spi_platform_data cardhu_spi_pdata = {
459         .is_dma_based           = true,
460         .max_dma_buffer         = (16 * 1024),
461         .is_clkon_always        = false,
462         .max_rate               = 100000000,
463 };
464
465 static void __init cardhu_spi_init(void)
466 {
467         int i;
468         struct clk *c;
469         struct board_info board_info;
470
471         tegra_get_board_info(&board_info);
472
473         for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
474                 c = tegra_get_clock_by_name(spi_parent_clk[i].name);
475                 if (IS_ERR_OR_NULL(c)) {
476                         pr_err("Not able to get the clock for %s\n",
477                                                 spi_parent_clk[i].name);
478                         continue;
479                 }
480                 spi_parent_clk[i].parent_clk = c;
481                 spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
482         }
483         cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
484         cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
485         tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
486         platform_add_devices(cardhu_spi_devices,
487                                 ARRAY_SIZE(cardhu_spi_devices));
488
489         if (board_info.board_id == BOARD_E1198) {
490                 tegra_spi_device2.dev.platform_data = &cardhu_spi_pdata;
491                 platform_device_register(&tegra_spi_device2);
492         }
493 }
494
495 static struct resource tegra_rtc_resources[] = {
496         [0] = {
497                 .start = TEGRA_RTC_BASE,
498                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
499                 .flags = IORESOURCE_MEM,
500         },
501         [1] = {
502                 .start = INT_RTC,
503                 .end = INT_RTC,
504                 .flags = IORESOURCE_IRQ,
505         },
506 };
507
508 static struct platform_device tegra_rtc_device = {
509         .name = "tegra_rtc",
510         .id   = -1,
511         .resource = tegra_rtc_resources,
512         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
513 };
514
515 static struct tegra_wm8903_platform_data cardhu_audio_pdata = {
516         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
517         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
518         .gpio_hp_mute           = -1,
519         .gpio_int_mic_en        = -1,
520         .gpio_ext_mic_en        = -1,
521 };
522
523 static struct platform_device cardhu_audio_device = {
524         .name   = "tegra-snd-wm8903",
525         .id     = 0,
526         .dev    = {
527                 .platform_data  = &cardhu_audio_pdata,
528         },
529 };
530
531 static struct platform_device *cardhu_devices[] __initdata = {
532         &tegra_pmu_device,
533         &tegra_rtc_device,
534         &tegra_udc_device,
535 #if defined(CONFIG_SND_HDA_TEGRA)
536         &tegra_hda_device,
537 #endif
538 #if defined(CONFIG_TEGRA_IOVMM_SMMU)
539         &tegra_smmu_device,
540 #endif
541         &tegra_wdt_device,
542 #if defined(CONFIG_TEGRA_AVP)
543         &tegra_avp_device,
544 #endif
545         &tegra_camera,
546 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
547         &tegra_se_device,
548 #endif
549         &tegra_ahub_device,
550         &tegra_dam_device0,
551         &tegra_dam_device1,
552         &tegra_dam_device2,
553         &tegra_i2s_device1,
554         &tegra_spdif_device,
555         &spdif_dit_device,
556         &tegra_pcm_device,
557         &cardhu_audio_device,
558 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
559         &tegra_aes_device,
560 #endif
561 };
562
563 #define MXT_CONFIG_CRC  0xD62DE8
564 static const u8 config[] = {
565         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
566         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
567         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
568         0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
569         0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
570         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
571         0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
572         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
573         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
574         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
575         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
576         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
577         0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
578         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
579         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
580         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
581         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
582         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
583         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
584         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
585 };
586
587 #define MXT_CONFIG_CRC_SKU2000  0xA24D9A
588 static const u8 config_sku2000[] = {
589         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
590         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
591         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
592         0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00,  //23=thr  2 di
593         0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
594         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
595         0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00,  //0A=limit
596         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
597         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
598         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
599         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
600         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
601         0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
602         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
603         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
604         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
605         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
606         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
607         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
608         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
609 };
610
611 static struct mxt_platform_data atmel_mxt_info = {
612         .x_line         = 27,
613         .y_line         = 42,
614         .x_size         = 768,
615         .y_size         = 1366,
616         .blen           = 0x20,
617         .threshold      = 0x3C,
618         .voltage        = 3300000,              /* 3.3V */
619         .orient         = 5,
620         .config         = config,
621         .config_length  = 157,
622         .config_crc     = MXT_CONFIG_CRC,
623         .irqflags       = IRQF_TRIGGER_FALLING,
624 /*      .read_chg       = &read_chg, */
625         .read_chg       = NULL,
626 };
627
628 static struct i2c_board_info __initdata atmel_i2c_info[] = {
629         {
630                 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
631                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PH4),
632                 .platform_data = &atmel_mxt_info,
633         }
634 };
635
636 static int __init cardhu_touch_init(void)
637 {
638         struct board_info BoardInfo;
639
640         tegra_gpio_enable(TEGRA_GPIO_PH4);
641         tegra_gpio_enable(TEGRA_GPIO_PH6);
642
643         gpio_request(TEGRA_GPIO_PH4, "atmel-irq");
644         gpio_direction_input(TEGRA_GPIO_PH4);
645
646         gpio_request(TEGRA_GPIO_PH6, "atmel-reset");
647         gpio_direction_output(TEGRA_GPIO_PH6, 0);
648         msleep(1);
649         gpio_set_value(TEGRA_GPIO_PH6, 1);
650         msleep(100);
651
652         tegra_get_board_info(&BoardInfo);
653         if ((BoardInfo.sku & SKU_TOUCH_MASK) == SKU_TOUCH_2000) {
654                 atmel_mxt_info.config = config_sku2000;
655                 atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
656         }
657
658         i2c_register_board_info(1, atmel_i2c_info, 1);
659
660         return 0;
661 }
662
663 static struct tegra_uhsic_config uhsic_phy_config = {
664         .enable_gpio = EN_HSIC_GPIO,
665         .reset_gpio = -1,
666         .sync_start_delay = 9,
667         .idle_wait_delay = 17,
668         .term_range_adj = 0,
669         .elastic_underrun_limit = 16,
670         .elastic_overrun_limit = 16,
671 };
672
673 static struct tegra_ehci_platform_data tegra_ehci_uhsic_pdata = {
674         .phy_type = TEGRA_USB_PHY_TYPE_HSIC,
675         .phy_config = &uhsic_phy_config,
676         .operating_mode = TEGRA_USB_HOST,
677         .power_down_on_bus_suspend = 1,
678 };
679
680 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
681         [0] = {
682                         .phy_config = &utmi_phy_config[0],
683                         .operating_mode = TEGRA_USB_HOST,
684                         .power_down_on_bus_suspend = 1,
685         },
686         [1] = {
687                         .phy_config = &utmi_phy_config[1],
688                         .operating_mode = TEGRA_USB_HOST,
689                         .power_down_on_bus_suspend = 1,
690         },
691         [2] = {
692                         .phy_config = &utmi_phy_config[2],
693                         .operating_mode = TEGRA_USB_HOST,
694                         .power_down_on_bus_suspend = 1,
695                         .hotplug = 1,
696         },
697 };
698
699 static struct platform_device *tegra_usb_otg_host_register(void)
700 {
701         struct platform_device *pdev;
702         void *platform_data;
703         int val;
704
705         pdev = platform_device_alloc(tegra_ehci1_device.name,
706                 tegra_ehci1_device.id);
707         if (!pdev)
708                 return NULL;
709
710         val = platform_device_add_resources(pdev, tegra_ehci1_device.resource,
711                 tegra_ehci1_device.num_resources);
712         if (val)
713                 goto error;
714
715         pdev->dev.dma_mask =  tegra_ehci1_device.dev.dma_mask;
716         pdev->dev.coherent_dma_mask = tegra_ehci1_device.dev.coherent_dma_mask;
717
718         platform_data = kmalloc(sizeof(struct tegra_ehci_platform_data),
719                 GFP_KERNEL);
720         if (!platform_data)
721                 goto error;
722
723         memcpy(platform_data, &tegra_ehci_pdata[0],
724                                 sizeof(struct tegra_ehci_platform_data));
725         pdev->dev.platform_data = platform_data;
726
727         val = platform_device_add(pdev);
728         if (val)
729                 goto error_add;
730
731         return pdev;
732
733 error_add:
734         kfree(platform_data);
735 error:
736         pr_err("%s: failed to add the host contoller device\n", __func__);
737         platform_device_put(pdev);
738         return NULL;
739 }
740
741 static void tegra_usb_otg_host_unregister(struct platform_device *pdev)
742 {
743         platform_device_unregister(pdev);
744 }
745
746 #ifdef CONFIG_USB_SUPPORT
747 static struct usb_phy_plat_data tegra_usb_phy_pdata[] = {
748         [0] = {
749                         .instance = 0,
750                         .vbus_gpio = -1,
751                         .vbus_reg_supply = "vdd_vbus_micro_usb",
752         },
753         [1] = {
754                         .instance = 1,
755                         .vbus_gpio = -1,
756         },
757         [2] = {
758                         .instance = 2,
759                         .vbus_gpio = -1,
760                         .vbus_reg_supply = "vdd_vbus_typea_usb",
761         },
762 };
763
764 static struct tegra_otg_platform_data tegra_otg_pdata = {
765         .host_register = &tegra_usb_otg_host_register,
766         .host_unregister = &tegra_usb_otg_host_unregister,
767 };
768
769 static void cardhu_usb_init(void)
770 {
771         struct board_info bi;
772
773         tegra_get_board_info(&bi);
774
775         tegra_usb_phy_init(tegra_usb_phy_pdata,
776                         ARRAY_SIZE(tegra_usb_phy_pdata));
777
778         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
779         platform_device_register(&tegra_otg_device);
780         if (bi.board_id == BOARD_PM267) {
781                 uhsic_phy_config.reset_gpio =
782                         PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
783                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
784                 platform_device_register(&tegra_ehci2_device);
785         } else if (bi.board_id == BOARD_E1256) {
786                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
787                 platform_device_register(&tegra_ehci2_device);
788         } else if (bi.board_id == BOARD_E1186) {
789                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
790                 /* baseband registration happens in baseband-xmm-power  */
791         } else {
792                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_pdata[1];
793                 platform_device_register(&tegra_ehci2_device);
794         }
795
796         tegra_ehci3_device.dev.platform_data = &tegra_ehci_pdata[2];
797         platform_device_register(&tegra_ehci3_device);
798
799 }
800 #else
801 static void cardhu_usb_init(void) { }
802 #endif
803
804 static void cardhu_gps_init(void)
805 {
806         tegra_gpio_enable(TEGRA_GPIO_PU2);
807         tegra_gpio_enable(TEGRA_GPIO_PU3);
808 }
809
810 static struct baseband_power_platform_data tegra_baseband_power_data = {
811         .baseband_type = BASEBAND_XMM,
812         .modem = {
813         .xmm = {
814                         .bb_rst = XMM_GPIO_BB_RST,
815                         .bb_on = XMM_GPIO_BB_ON,
816                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
817                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
818                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
819                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
820                         .hsic_device = &tegra_ehci2_device,
821                 },
822         },
823 };
824
825 static struct platform_device tegra_baseband_power_device = {
826         .name = "baseband_xmm_power",
827         .id = -1,
828         .dev = {
829                 .platform_data = &tegra_baseband_power_data,
830         },
831 };
832
833 static struct platform_device tegra_baseband_power2_device = {
834         .name = "baseband_xmm_power2",
835         .id = -1,
836         .dev = {
837                 .platform_data = &tegra_baseband_power_data,
838         },
839 };
840
841 static void cardhu_modem_init(void)
842 {
843         struct board_info board_info;
844         int w_disable_gpio, ret;
845
846         tegra_get_board_info(&board_info);
847         switch (board_info.board_id) {
848         case BOARD_E1291:
849         case BOARD_E1198:
850                 if (((board_info.board_id == BOARD_E1291) &&
851                                 (board_info.fab < BOARD_FAB_A03)) ||
852                         ((board_info.board_id == BOARD_E1198) &&
853                                         (board_info.fab < BOARD_FAB_A02))) {
854                         w_disable_gpio = TEGRA_GPIO_PH5;
855                 } else {
856                         w_disable_gpio = TEGRA_GPIO_PDD5;
857                 }
858                 tegra_gpio_enable(w_disable_gpio);
859                 ret = gpio_request(w_disable_gpio, "w_disable_gpio");
860                 if (ret < 0)
861                         pr_err("%s: gpio_request failed for gpio %d\n",
862                                 __func__, w_disable_gpio);
863                 else
864                         gpio_direction_input(w_disable_gpio);
865
866                 /* E1291-A04 & E1198:A02: Set PERST signal to high */
867                 if (((board_info.board_id == BOARD_E1291) &&
868                                 (board_info.fab >= BOARD_FAB_A04)) ||
869                         ((board_info.board_id == BOARD_E1198) &&
870                                         (board_info.fab >= BOARD_FAB_A02))) {
871                         ret = gpio_request(TEGRA_GPIO_PH7, "modem_perst");
872                         if (ret < 0) {
873                                 pr_err("%s(): Error in allocating gpio "
874                                         "TEGRA_GPIO_PH7\n", __func__);
875                                 break;
876                         }
877                         gpio_direction_output(TEGRA_GPIO_PH7, 1);
878                         tegra_gpio_enable(TEGRA_GPIO_PH7);
879                 }
880                 break;
881         case BOARD_E1186:
882                 tegra_gpio_enable(
883                         tegra_baseband_power_data.modem.xmm.bb_rst);
884                 tegra_gpio_enable(
885                         tegra_baseband_power_data.modem.xmm.bb_on);
886                 tegra_gpio_enable(
887                         tegra_baseband_power_data.modem.xmm.ipc_bb_wake);
888                 tegra_gpio_enable(
889                         tegra_baseband_power_data.modem.xmm.ipc_ap_wake);
890                 tegra_gpio_enable(
891                         tegra_baseband_power_data.modem.xmm.ipc_hsic_active);
892                 tegra_gpio_enable(
893                         tegra_baseband_power_data.modem.xmm.ipc_hsic_sus_req);
894                 platform_device_register(&tegra_baseband_power_device);
895                 platform_device_register(&tegra_baseband_power2_device);
896                 break;
897         default:
898                 break;
899         }
900
901 }
902
903 #ifdef CONFIG_SATA_AHCI_TEGRA
904 static void cardhu_sata_init(void)
905 {
906         platform_device_register(&tegra_sata_device);
907 }
908 #else
909 static void cardhu_sata_init(void) { }
910 #endif
911
912 static void __init tegra_cardhu_init(void)
913 {
914         tegra_clk_init_from_table(cardhu_clk_init_table);
915         cardhu_pinmux_init();
916         cardhu_i2c_init();
917         cardhu_spi_init();
918         cardhu_usb_init();
919 #ifdef CONFIG_TEGRA_EDP_LIMITS
920         cardhu_edp_init();
921 #endif
922         cardhu_uart_init();
923         cardhu_tsensor_init();
924         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
925         cardhu_sdhci_init();
926         cardhu_regulator_init();
927         cardhu_gpio_switch_regulator_init();
928         cardhu_suspend_init();
929         cardhu_power_off_init();
930         cardhu_touch_init();
931         cardhu_gps_init();
932         cardhu_modem_init();
933         cardhu_kbc_init();
934         cardhu_scroll_init();
935         cardhu_keys_init();
936         cardhu_panel_init();
937         cardhu_pmon_init();
938         cardhu_sensors_init();
939         cardhu_bt_rfkill();
940         tegra_setup_bluesleep();
941         cardhu_sata_init();
942         //audio_wired_jack_init();
943         cardhu_pins_state_init();
944         cardhu_emc_init();
945         tegra_release_bootloader_fb();
946 }
947
948 static void __init tegra_cardhu_reserve(void)
949 {
950 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
951         /* support 1920X1200 with 24bpp */
952         tegra_reserve(0, SZ_8M + SZ_1M, SZ_8M + SZ_1M);
953 #else
954         tegra_reserve(SZ_128M, SZ_8M, SZ_8M);
955 #endif
956 }
957
958 MACHINE_START(CARDHU, "cardhu")
959         .boot_params    = 0x80000100,
960         .map_io         = tegra_map_common_io,
961         .reserve        = tegra_cardhu_reserve,
962         .init_early     = tegra_init_early,
963         .init_irq       = tegra_init_irq,
964         .timer          = &tegra_timer,
965         .init_machine   = tegra_cardhu_init,
966 MACHINE_END