arm: tegra: cardhu: add tegra_aes_device to cardhu_devices[]
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <linux/spi/spi.h>
37 #include <linux/i2c/atmel_mxt_ts.h>
38 #include <linux/tegra_uart.h>
39 #include <linux/spi-tegra.h>
40
41 #include <sound/wm8903.h>
42
43 #include <mach/clk.h>
44 #include <mach/iomap.h>
45 #include <mach/irqs.h>
46 #include <mach/pinmux.h>
47 #include <mach/iomap.h>
48 #include <mach/io.h>
49 #include <mach/i2s.h>
50 #include <mach/tegra_wm8903_pdata.h>
51 #include <asm/mach-types.h>
52 #include <asm/mach/arch.h>
53 #include <mach/usb_phy.h>
54
55 #include "board.h"
56 #include "clock.h"
57 #include "board-cardhu.h"
58 #include "devices.h"
59 #include "gpio-names.h"
60 #include "fuse.h"
61 #include "pm.h"
62 #include "baseband-xmm-power.h"
63
64
65 /* !!!TODO: Change for cardhu (Taken from Ventana) */
66 static struct tegra_utmip_config utmi_phy_config[] = {
67         [0] = {
68                         .hssync_start_delay = 0,
69                         .idle_wait_delay = 17,
70                         .elastic_limit = 16,
71                         .term_range_adj = 6,
72                         .xcvr_setup = 15,
73                         .xcvr_lsfslew = 2,
74                         .xcvr_lsrslew = 2,
75         },
76         [1] = {
77                         .hssync_start_delay = 0,
78                         .idle_wait_delay = 17,
79                         .elastic_limit = 16,
80                         .term_range_adj = 6,
81                         .xcvr_setup = 15,
82                         .xcvr_lsfslew = 2,
83                         .xcvr_lsrslew = 2,
84         },
85         [2] = {
86                         .hssync_start_delay = 0,
87                         .idle_wait_delay = 17,
88                         .elastic_limit = 16,
89                         .term_range_adj = 6,
90                         .xcvr_setup = 8,
91                         .xcvr_lsfslew = 2,
92                         .xcvr_lsrslew = 2,
93         },
94 };
95
96 #ifdef CONFIG_BCM4329_RFKILL
97 static struct resource cardhu_bcm4329_rfkill_resources[] = {
98         {
99                 .name   = "bcm4329_nshutdown_gpio",
100                 .start  = TEGRA_GPIO_PU0,
101                 .end    = TEGRA_GPIO_PU0,
102                 .flags  = IORESOURCE_IO,
103         },
104 };
105
106 static struct platform_device cardhu_bcm4329_rfkill_device = {
107         .name = "bcm4329_rfkill",
108         .id             = -1,
109         .num_resources  = ARRAY_SIZE(cardhu_bcm4329_rfkill_resources),
110         .resource       = cardhu_bcm4329_rfkill_resources,
111 };
112
113 static noinline void __init cardhu_bt_rfkill(void)
114 {
115         platform_device_register(&cardhu_bcm4329_rfkill_device);
116
117         return;
118 }
119 #else
120 static inline void cardhu_bt_rfkill(void) { }
121 #endif
122
123 #ifdef CONFIG_BT_BLUESLEEP
124 static noinline void __init tegra_setup_bluesleep(void)
125 {
126         struct platform_device *pdev = NULL;
127         struct resource *res;
128
129         pdev = platform_device_alloc("bluesleep", 0);
130         if (!pdev) {
131                 pr_err("unable to allocate platform device for bluesleep");
132                 return;
133         }
134
135         res = kzalloc(sizeof(struct resource) * 3, GFP_KERNEL);
136         if (!res) {
137                 pr_err("unable to allocate resource for bluesleep\n");
138                 goto err_free_dev;
139         }
140
141         res[0].name   = "gpio_host_wake";
142         res[0].start  = TEGRA_GPIO_PU6;
143         res[0].end    = TEGRA_GPIO_PU6;
144         res[0].flags  = IORESOURCE_IO;
145
146         res[1].name   = "gpio_ext_wake";
147         res[1].start  = TEGRA_GPIO_PU1;
148         res[1].end    = TEGRA_GPIO_PU1;
149         res[1].flags  = IORESOURCE_IO;
150
151         res[2].name   = "host_wake";
152         res[2].start  = gpio_to_irq(TEGRA_GPIO_PU6);
153         res[2].end    = gpio_to_irq(TEGRA_GPIO_PU6);
154         res[2].flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE ;
155
156         if (platform_device_add_resources(pdev, res, 3)) {
157                 pr_err("unable to add resources to bluesleep device\n");
158                 goto err_free_res;
159         }
160
161         if (platform_device_add(pdev)) {
162                 pr_err("unable to add bluesleep device\n");
163                 goto err_free_res;
164         }
165         tegra_gpio_enable(TEGRA_GPIO_PU6);
166         tegra_gpio_enable(TEGRA_GPIO_PU1);
167
168 return;
169
170 err_free_res:
171         kfree(res);
172 err_free_dev:
173         platform_device_put(pdev);
174         return;
175 }
176 #else
177 static inline void tegra_setup_bluesleep(void) { }
178 #endif
179
180 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
181         /* name         parent          rate            enabled */
182         { "pll_m",      NULL,           0,              true},
183         { "hda",        "pll_p",        108000000,      false},
184         { "hda2codec_2x","pll_p",       48000000,       false},
185         { "pwm",        "pll_p",        3187500,        false},
186         { "blink",      "clk_32k",      32768,          true},
187         { "i2s1",       "pll_a_out0",   0,              false},
188         { NULL,         NULL,           0,              0},
189 };
190
191 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
192         .adapter_nr     = 0,
193         .bus_count      = 1,
194         .bus_clk_rate   = { 100000, 0 },
195         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
196         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
197         .arb_recovery = arb_lost_recovery,
198 };
199
200 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
201         .adapter_nr     = 1,
202         .bus_count      = 1,
203         .bus_clk_rate   = { 100000, 0 },
204         .is_clkon_always = true,
205         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
206         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
207         .arb_recovery = arb_lost_recovery,
208 };
209
210 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
211         .adapter_nr     = 2,
212         .bus_count      = 1,
213         .bus_clk_rate   = { 100000, 0 },
214         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
215         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
216         .arb_recovery = arb_lost_recovery,
217 };
218
219 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
220         .adapter_nr     = 3,
221         .bus_count      = 1,
222         .bus_clk_rate   = { 100000, 0 },
223         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
224         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
225         .arb_recovery = arb_lost_recovery,
226 };
227
228 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
229         .adapter_nr     = 4,
230         .bus_count      = 1,
231         .bus_clk_rate   = { 100000, 0 },
232         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
233         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
234         .arb_recovery = arb_lost_recovery,
235 };
236
237
238 #if 0
239 struct tegra_wired_jack_conf audio_wr_jack_conf = {
240         .hp_det_n = TEGRA_GPIO_PW2,
241         .en_mic_ext = TEGRA_GPIO_PX1,
242         .en_mic_int = TEGRA_GPIO_PX0,
243 };
244 #endif
245
246 static struct wm8903_platform_data cardhu_wm8903_pdata = {
247         .irq_active_low = 0,
248         .micdet_cfg = 0,
249         .micdet_delay = 100,
250         .gpio_base = CARDHU_GPIO_WM8903(0),
251         .gpio_cfg = {
252                 WM8903_GPIO_NO_CONFIG,
253                 WM8903_GPIO_NO_CONFIG,
254                 0,
255                 WM8903_GPIO_NO_CONFIG,
256                 WM8903_GPIO_NO_CONFIG,
257         },
258 };
259
260 static struct i2c_board_info __initdata wm8903_board_info = {
261         I2C_BOARD_INFO("wm8903", 0x1a),
262         .platform_data = &cardhu_wm8903_pdata,
263         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
264 };
265
266 static void cardhu_i2c_init(void)
267 {
268         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
269         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
270         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
271         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
272         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
273
274         platform_device_register(&tegra_i2c_device5);
275         platform_device_register(&tegra_i2c_device4);
276         platform_device_register(&tegra_i2c_device3);
277         platform_device_register(&tegra_i2c_device2);
278         platform_device_register(&tegra_i2c_device1);
279
280         i2c_register_board_info(4, &wm8903_board_info, 1);
281 }
282
283 static struct platform_device *cardhu_uart_devices[] __initdata = {
284         &tegra_uarta_device,
285         &tegra_uartb_device,
286         &tegra_uartc_device,
287         &tegra_uartd_device,
288         &tegra_uarte_device,
289 };
290 static struct uart_clk_parent uart_parent_clk[] = {
291         [0] = {.name = "pll_p"},
292         [1] = {.name = "pll_m"},
293         [2] = {.name = "clk_m"},
294 };
295
296 static struct tegra_uart_platform_data cardhu_uart_pdata;
297
298 static void __init uart_debug_init(void)
299 {
300         struct board_info board_info;
301
302         tegra_get_board_info(&board_info);
303         if (board_info.sku & SKU_SLT_ULPI_SUPPORT) {
304                 if ((board_info.board_id == BOARD_E1186) ||
305                         (board_info.board_id == BOARD_E1187) ||
306                         (board_info.board_id == BOARD_PM269)) {
307                         /* UARTB is the debug port. */
308                         pr_info("Selecting UARTB as the debug console\n");
309                         cardhu_uart_devices[1] = &debug_uartb_device;
310                         debug_uart_clk =  clk_get_sys("serial8250.0", "uartb");
311                         debug_uart_port_base = ((struct plat_serial8250_port *)(
312                                 debug_uartb_device.dev.platform_data))->mapbase;
313                         return;
314                 }
315                 pr_err("%s(): Unhandled SKU information for Board 0x%04x\n",
316                                 __func__, board_info.board_id);
317         }
318         /* UARTA is the debug port. */
319         pr_info("Selecting UARTA as the debug console\n");
320         cardhu_uart_devices[0] = &debug_uarta_device;
321         debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
322         debug_uart_port_base = ((struct plat_serial8250_port *)(
323                         debug_uarta_device.dev.platform_data))->mapbase;
324 }
325
326 static void __init cardhu_uart_init(void)
327 {
328         struct clk *c;
329         int i;
330
331         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
332                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
333                 if (IS_ERR_OR_NULL(c)) {
334                         pr_err("Not able to get the clock for %s\n",
335                                                 uart_parent_clk[i].name);
336                         continue;
337                 }
338                 uart_parent_clk[i].parent_clk = c;
339                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
340         }
341         cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
342         cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
343         tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
344         tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
345         tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
346         tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
347         tegra_uarte_device.dev.platform_data = &cardhu_uart_pdata;
348
349         /* Register low speed only if it is selected */
350         if (!is_tegra_debug_uartport_hs()) {
351                 uart_debug_init();
352                 /* Clock enable for the debug channel */
353                 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
354                         pr_info("The debug console clock name is %s\n",
355                                                 debug_uart_clk->name);
356                         c = tegra_get_clock_by_name("pll_p");
357                         if (IS_ERR_OR_NULL(c))
358                                 pr_err("Not getting the parent clock pll_p\n");
359                         else
360                                 clk_set_parent(debug_uart_clk, c);
361
362                         clk_enable(debug_uart_clk);
363                         clk_set_rate(debug_uart_clk, clk_get_rate(c));
364                 } else {
365                         pr_err("Not getting the clock %s for debug console\n",
366                                         debug_uart_clk->name);
367                 }
368         }
369
370         platform_add_devices(cardhu_uart_devices,
371                                 ARRAY_SIZE(cardhu_uart_devices));
372 }
373
374 static struct platform_device tegra_camera = {
375         .name = "tegra_camera",
376         .id = -1,
377 };
378
379 static struct platform_device *cardhu_spi_devices[] __initdata = {
380         &tegra_spi_device4,
381 };
382
383 struct spi_clk_parent spi_parent_clk[] = {
384         [0] = {.name = "pll_p"},
385         [1] = {.name = "pll_m"},
386         [2] = {.name = "clk_m"},
387 };
388
389 static struct tegra_spi_platform_data cardhu_spi_pdata = {
390         .is_dma_based           = true,
391         .max_dma_buffer         = (16 * 1024),
392         .is_clkon_always        = false,
393         .max_rate               = 100000000,
394 };
395
396 static void __init cardhu_spi_init(void)
397 {
398         int i;
399         struct clk *c;
400
401         for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
402                 c = tegra_get_clock_by_name(spi_parent_clk[i].name);
403                 if (IS_ERR_OR_NULL(c)) {
404                         pr_err("Not able to get the clock for %s\n",
405                                                 spi_parent_clk[i].name);
406                         continue;
407                 }
408                 spi_parent_clk[i].parent_clk = c;
409                 spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
410         }
411         cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
412         cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
413         tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
414         platform_add_devices(cardhu_spi_devices,
415                                 ARRAY_SIZE(cardhu_spi_devices));
416 }
417
418 static struct tegra_wm8903_platform_data cardhu_audio_pdata = {
419         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
420         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
421         .gpio_hp_mute           = -1,
422         .gpio_int_mic_en        = -1,
423         .gpio_ext_mic_en        = -1,
424 };
425
426 static struct platform_device cardhu_audio_device = {
427         .name   = "tegra-snd-wm8903",
428         .id     = 0,
429         .dev    = {
430                 .platform_data  = &cardhu_audio_pdata,
431         },
432 };
433
434 static struct platform_device *cardhu_devices[] __initdata = {
435         &tegra_pmu_device,
436         &tegra_udc_device,
437 #if defined(CONFIG_SND_HDA_TEGRA)
438         &tegra_hda_device,
439 #endif
440 #if defined(CONFIG_TEGRA_IOVMM_SMMU)
441         &tegra_smmu_device,
442 #endif
443         &tegra_wdt_device,
444 #if defined(CONFIG_TEGRA_AVP)
445         &tegra_avp_device,
446 #endif
447         &tegra_camera,
448 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
449         &tegra_se_device,
450 #endif
451         &tegra_ahub_device,
452         &tegra_i2s_device1,
453         &tegra_pcm_device,
454         &cardhu_audio_device,
455 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
456         &tegra_aes_device,
457 #endif
458 };
459
460 #define MXT_CONFIG_CRC  0xD62DE8
461 static const u8 config[] = {
462         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
463         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
464         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
465         0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
466         0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
467         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
468         0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
469         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
470         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
471         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
472         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
473         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
474         0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
475         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
476         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
477         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
478         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
479         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
480         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
481         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
482 };
483
484 #define MXT_CONFIG_CRC_SKU2000  0xA24D9A
485 static const u8 config_sku2000[] = {
486         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
487         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
488         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
489         0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00,  //23=thr  2 di
490         0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
491         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
492         0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00,  //0A=limit
493         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
494         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
495         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
496         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
497         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
498         0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
499         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
500         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
501         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
502         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
503         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
504         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
505         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
506 };
507
508 static struct mxt_platform_data atmel_mxt_info = {
509         .x_line         = 27,
510         .y_line         = 42,
511         .x_size         = 768,
512         .y_size         = 1366,
513         .blen           = 0x20,
514         .threshold      = 0x3C,
515         .voltage        = 3300000,              /* 3.3V */
516         .orient         = 5,
517         .config         = config,
518         .config_length  = 157,
519         .config_crc     = MXT_CONFIG_CRC,
520         .irqflags       = IRQF_TRIGGER_FALLING,
521 /*      .read_chg       = &read_chg, */
522         .read_chg       = NULL,
523 };
524
525 static struct i2c_board_info __initdata atmel_i2c_info[] = {
526         {
527                 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
528                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PH4),
529                 .platform_data = &atmel_mxt_info,
530         }
531 };
532
533 static int __init cardhu_touch_init(void)
534 {
535         struct board_info BoardInfo;
536
537         tegra_gpio_enable(TEGRA_GPIO_PH4);
538         tegra_gpio_enable(TEGRA_GPIO_PH6);
539
540         gpio_request(TEGRA_GPIO_PH4, "atmel-irq");
541         gpio_direction_input(TEGRA_GPIO_PH4);
542
543         gpio_request(TEGRA_GPIO_PH6, "atmel-reset");
544         gpio_direction_output(TEGRA_GPIO_PH6, 0);
545         msleep(1);
546         gpio_set_value(TEGRA_GPIO_PH6, 1);
547         msleep(100);
548
549         tegra_get_board_info(&BoardInfo);
550         if ((BoardInfo.sku & SKU_TOUCH_MASK) == SKU_TOUCH_2000) {
551                 atmel_mxt_info.config = config_sku2000;
552                 atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
553         }
554
555         i2c_register_board_info(1, atmel_i2c_info, 1);
556
557         return 0;
558 }
559
560 static struct tegra_uhsic_config uhsic_phy_config = {
561         .enable_gpio = EN_HSIC_GPIO,
562         .reset_gpio = -1,
563         .sync_start_delay = 9,
564         .idle_wait_delay = 17,
565         .term_range_adj = 0,
566         .elastic_underrun_limit = 16,
567         .elastic_overrun_limit = 16,
568 };
569
570 static struct tegra_ehci_platform_data tegra_ehci_uhsic_pdata = {
571         .phy_type = TEGRA_USB_PHY_TYPE_HSIC,
572         .phy_config = &uhsic_phy_config,
573         .operating_mode = TEGRA_USB_HOST,
574         .power_down_on_bus_suspend = 1,
575 };
576
577 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
578         [0] = {
579                         .phy_config = &utmi_phy_config[0],
580                         .operating_mode = TEGRA_USB_HOST,
581                         .power_down_on_bus_suspend = 1,
582         },
583         [1] = {
584                         .phy_config = &utmi_phy_config[1],
585                         .operating_mode = TEGRA_USB_HOST,
586                         .power_down_on_bus_suspend = 1,
587         },
588         [2] = {
589                         .phy_config = &utmi_phy_config[2],
590                         .operating_mode = TEGRA_USB_HOST,
591                         .power_down_on_bus_suspend = 1,
592         },
593 };
594
595 static struct platform_device *tegra_usb_otg_host_register(void)
596 {
597         struct platform_device *pdev;
598         void *platform_data;
599         int val;
600
601         pdev = platform_device_alloc(tegra_ehci1_device.name,
602                 tegra_ehci1_device.id);
603         if (!pdev)
604                 return NULL;
605
606         val = platform_device_add_resources(pdev, tegra_ehci1_device.resource,
607                 tegra_ehci1_device.num_resources);
608         if (val)
609                 goto error;
610
611         pdev->dev.dma_mask =  tegra_ehci1_device.dev.dma_mask;
612         pdev->dev.coherent_dma_mask = tegra_ehci1_device.dev.coherent_dma_mask;
613
614         platform_data = kmalloc(sizeof(struct tegra_ehci_platform_data),
615                 GFP_KERNEL);
616         if (!platform_data)
617                 goto error;
618
619         memcpy(platform_data, &tegra_ehci_pdata[0],
620                                 sizeof(struct tegra_ehci_platform_data));
621         pdev->dev.platform_data = platform_data;
622
623         val = platform_device_add(pdev);
624         if (val)
625                 goto error_add;
626
627         return pdev;
628
629 error_add:
630         kfree(platform_data);
631 error:
632         pr_err("%s: failed to add the host contoller device\n", __func__);
633         platform_device_put(pdev);
634         return NULL;
635 }
636
637 static void tegra_usb_otg_host_unregister(struct platform_device *pdev)
638 {
639         platform_device_unregister(pdev);
640 }
641
642 #ifdef CONFIG_USB_SUPPORT
643 static struct usb_phy_plat_data tegra_usb_phy_pdata[] = {
644         [0] = {
645                         .instance = 0,
646                         .vbus_gpio = -1,
647                         .vbus_reg_supply = "vdd_vbus_micro_usb",
648         },
649         [1] = {
650                         .instance = 1,
651                         .vbus_gpio = -1,
652         },
653         [2] = {
654                         .instance = 2,
655                         .vbus_gpio = -1,
656                         .vbus_reg_supply = "vdd_vbus_typea_usb",
657         },
658 };
659
660 static struct tegra_otg_platform_data tegra_otg_pdata = {
661         .host_register = &tegra_usb_otg_host_register,
662         .host_unregister = &tegra_usb_otg_host_unregister,
663 };
664
665 static void cardhu_usb_init(void)
666 {
667         struct board_info bi;
668
669         tegra_get_board_info(&bi);
670
671         tegra_usb_phy_init(tegra_usb_phy_pdata,
672                         ARRAY_SIZE(tegra_usb_phy_pdata));
673
674         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
675         platform_device_register(&tegra_otg_device);
676         if (bi.board_id == BOARD_PM267) {
677                 uhsic_phy_config.reset_gpio =
678                         PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
679                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
680                 platform_device_register(&tegra_ehci2_device);
681         } else if (bi.board_id == BOARD_E1256) {
682                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
683                 platform_device_register(&tegra_ehci2_device);
684         } else if (bi.board_id == BOARD_E1186) {
685                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
686                 /* baseband registration happens in baseband-xmm-power  */
687         } else {
688                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_pdata[1];
689                 platform_device_register(&tegra_ehci2_device);
690         }
691
692         tegra_ehci3_device.dev.platform_data = &tegra_ehci_pdata[2];
693         platform_device_register(&tegra_ehci3_device);
694
695 }
696 #else
697 static void cardhu_usb_init(void) { }
698 #endif
699
700 static void cardhu_gps_init(void)
701 {
702         tegra_gpio_enable(TEGRA_GPIO_PU2);
703         tegra_gpio_enable(TEGRA_GPIO_PU3);
704 }
705
706 static struct baseband_power_platform_data tegra_baseband_power_data = {
707         .baseband_type = BASEBAND_XMM,
708         .modem = {
709         .xmm = {
710                         .bb_rst = XMM_GPIO_BB_RST,
711                         .bb_on = XMM_GPIO_BB_ON,
712                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
713                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
714                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
715                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
716                         .hsic_device = &tegra_ehci2_device,
717                 },
718         },
719 };
720
721 static struct platform_device tegra_baseband_power_device = {
722         .name = "baseband_xmm_power",
723         .id = -1,
724         .dev = {
725                 .platform_data = &tegra_baseband_power_data,
726         },
727 };
728
729 static struct platform_device tegra_baseband_power2_device = {
730         .name = "baseband_xmm_power2",
731         .id = -1,
732         .dev = {
733                 .platform_data = &tegra_baseband_power_data,
734         },
735 };
736
737 static void cardhu_modem_init(void)
738 {
739         struct board_info board_info;
740         int w_disable_gpio, ret;
741
742         tegra_get_board_info(&board_info);
743         switch (board_info.board_id) {
744         case BOARD_E1291:
745                 if (board_info.fab < BOARD_FAB_A03) {
746                         w_disable_gpio = TEGRA_GPIO_PH5;
747                 } else {
748                         w_disable_gpio = TEGRA_GPIO_PDD5;
749                 }
750                 tegra_gpio_enable(w_disable_gpio);
751                 ret = gpio_request(w_disable_gpio, "w_disable_gpio");
752                 if (ret < 0)
753                         pr_err("%s: gpio_request failed for gpio %d\n",
754                                 __func__, w_disable_gpio);
755                 else
756                         gpio_direction_input(w_disable_gpio);
757
758                 /* E1291-A04: Set PERST signal to low */
759                 if (board_info.fab >= BOARD_FAB_A04) {
760                         ret = gpio_request(TEGRA_GPIO_PH7, "modem_perst");
761                         if (ret < 0) {
762                                 pr_err("%d(): Error in allocating gpio "
763                                         "TEGRA_GPIO_PH7\n", __func__);
764                                 break;
765                         }
766                         gpio_direction_output(TEGRA_GPIO_PH7, 0);
767                         tegra_gpio_enable(TEGRA_GPIO_PH7);
768                 }
769                 break;
770         case BOARD_E1186:
771                 tegra_gpio_enable(
772                         tegra_baseband_power_data.modem.xmm.bb_rst);
773                 tegra_gpio_enable(
774                         tegra_baseband_power_data.modem.xmm.bb_on);
775                 tegra_gpio_enable(
776                         tegra_baseband_power_data.modem.xmm.ipc_bb_wake);
777                 tegra_gpio_enable(
778                         tegra_baseband_power_data.modem.xmm.ipc_ap_wake);
779                 tegra_gpio_enable(
780                         tegra_baseband_power_data.modem.xmm.ipc_hsic_active);
781                 tegra_gpio_enable(
782                         tegra_baseband_power_data.modem.xmm.ipc_hsic_sus_req);
783                 platform_device_register(&tegra_baseband_power_device);
784                 platform_device_register(&tegra_baseband_power2_device);
785                 break;
786         default:
787                 break;
788         }
789
790 }
791
792 #ifdef CONFIG_SATA_AHCI_TEGRA
793 static void cardhu_sata_init(void)
794 {
795         platform_device_register(&tegra_sata_device);
796 }
797 #else
798 static void cardhu_sata_init(void) { }
799 #endif
800
801 static void __init tegra_cardhu_init(void)
802 {
803         tegra_clk_init_from_table(cardhu_clk_init_table);
804         cardhu_pinmux_init();
805         cardhu_i2c_init();
806         cardhu_spi_init();
807         cardhu_usb_init();
808 #ifdef CONFIG_TEGRA_EDP_LIMITS
809         cardhu_edp_init();
810 #endif
811         cardhu_uart_init();
812         cardhu_tsensor_init();
813         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
814         cardhu_sdhci_init();
815         cardhu_regulator_init();
816         cardhu_gpio_switch_regulator_init();
817         cardhu_suspend_init();
818         cardhu_power_off_init();
819         cardhu_touch_init();
820         cardhu_gps_init();
821         cardhu_modem_init();
822         cardhu_kbc_init();
823         cardhu_scroll_init();
824         cardhu_keys_init();
825         cardhu_panel_init();
826         cardhu_pmon_init();
827         cardhu_sensors_init();
828         cardhu_bt_rfkill();
829         tegra_setup_bluesleep();
830         cardhu_sata_init();
831         //audio_wired_jack_init();
832         cardhu_pins_state_init();
833         cardhu_emc_init();
834         tegra_release_bootloader_fb();
835 }
836
837 static void __init tegra_cardhu_reserve(void)
838 {
839 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
840         tegra_reserve(0, SZ_8M, SZ_8M);
841 #else
842         tegra_reserve(SZ_128M, SZ_8M, SZ_8M);
843 #endif
844 }
845
846 MACHINE_START(CARDHU, "cardhu")
847         .boot_params    = 0x80000100,
848         .map_io         = tegra_map_common_io,
849         .reserve        = tegra_cardhu_reserve,
850         .init_early     = tegra_init_early,
851         .init_irq       = tegra_init_irq,
852         .timer          = &tegra_timer,
853         .init_machine   = tegra_cardhu_init,
854 MACHINE_END