arm: tegra: sd: enable sd dpd
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA Corporation.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <linux/spi/spi.h>
37 #include <linux/i2c/atmel_mxt_ts.h>
38 #include <linux/tegra_uart.h>
39 #include <linux/memblock.h>
40 #include <linux/spi-tegra.h>
41 #include <linux/nfc/pn544.h>
42 #include <linux/rfkill-gpio.h>
43
44 #include <sound/wm8903.h>
45 #include <sound/max98095.h>
46 #include <media/tegra_dtv.h>
47
48 #include <mach/clk.h>
49 #include <mach/iomap.h>
50 #include <mach/irqs.h>
51 #include <mach/pinmux.h>
52 #include <mach/iomap.h>
53 #include <mach/io_dpd.h>
54 #include <mach/io.h>
55 #include <mach/i2s.h>
56 #include <mach/tegra_asoc_pdata.h>
57 #include <mach/tegra_wm8903_pdata.h>
58 #include <asm/mach-types.h>
59 #include <asm/mach/arch.h>
60 #include <mach/usb_phy.h>
61 #include <mach/thermal.h>
62 #include <mach/pci.h>
63 #include <mach/tegra_fiq_debugger.h>
64
65 #include "board.h"
66 #include "clock.h"
67 #include "board-cardhu.h"
68 #include "board-touch.h"
69 #include "devices.h"
70 #include "gpio-names.h"
71 #include "fuse.h"
72 #include "pm.h"
73 #include "baseband-xmm-power.h"
74 #include "wdt-recovery.h"
75
76 static struct balanced_throttle throttle_list[] = {
77 #ifdef CONFIG_TEGRA_THERMAL_THROTTLE
78         {
79                 .id = BALANCED_THROTTLE_ID_TJ,
80                 .throt_tab_size = 10,
81                 .throt_tab = {
82                         {      0, 1000 },
83                         { 640000, 1000 },
84                         { 640000, 1000 },
85                         { 640000, 1000 },
86                         { 640000, 1000 },
87                         { 640000, 1000 },
88                         { 760000, 1000 },
89                         { 760000, 1050 },
90                         {1000000, 1050 },
91                         {1000000, 1100 },
92                 },
93         },
94 #endif
95 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
96         {
97                 .id = BALANCED_THROTTLE_ID_SKIN,
98                 .throt_tab_size = 6,
99                 .throt_tab = {
100                         { 640000, 1200 },
101                         { 640000, 1200 },
102                         { 760000, 1200 },
103                         { 760000, 1200 },
104                         {1000000, 1200 },
105                         {1000000, 1200 },
106                 },
107         },
108 #endif
109 };
110
111 /* All units are in millicelsius */
112 static struct tegra_thermal_data thermal_data = {
113         .shutdown_device_id = THERMAL_DEVICE_ID_NCT_EXT,
114         .temp_shutdown = 90000,
115
116 #if defined(CONFIG_TEGRA_EDP_LIMITS) || defined(CONFIG_TEGRA_THERMAL_THROTTLE)
117         .throttle_edp_device_id = THERMAL_DEVICE_ID_NCT_EXT,
118 #endif
119 #ifdef CONFIG_TEGRA_EDP_LIMITS
120         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
121         .hysteresis_edp = 3000,
122 #endif
123 #ifdef CONFIG_TEGRA_THERMAL_THROTTLE
124         .temp_throttle = 85000,
125         .tc1 = 0,
126         .tc2 = 1,
127         .passive_delay = 2000,
128 #endif
129 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
130         .skin_device_id = THERMAL_DEVICE_ID_SKIN,
131         .temp_throttle_skin = 43000,
132         .tc1_skin = 0,
133         .tc2_skin = 1,
134         .passive_delay_skin = 5000,
135
136         .skin_temp_offset = 9793,
137         .skin_period = 1100,
138         .skin_devs_size = 2,
139         .skin_devs = {
140                 {
141                         THERMAL_DEVICE_ID_NCT_EXT,
142                         {
143                                 2, 1, 1, 1,
144                                 1, 1, 1, 1,
145                                 1, 1, 1, 0,
146                                 1, 1, 0, 0,
147                                 0, 0, -1, -7
148                         }
149                 },
150                 {
151                         THERMAL_DEVICE_ID_NCT_INT,
152                         {
153                                 -11, -7, -5, -3,
154                                 -3, -2, -1, 0,
155                                 0, 0, 1, 1,
156                                 1, 2, 2, 3,
157                                 4, 6, 11, 18
158                         }
159                 },
160         },
161 #endif
162 };
163
164 static struct rfkill_gpio_platform_data cardhu_bt_rfkill_pdata[] = {
165         {
166                 .name           = "bt_rfkill",
167                 .shutdown_gpio  = TEGRA_GPIO_PU0,
168                 .reset_gpio     = TEGRA_GPIO_INVALID,
169                 .type           = RFKILL_TYPE_BLUETOOTH,
170         },
171 };
172
173 static struct platform_device cardhu_bt_rfkill_device = {
174         .name = "rfkill_gpio",
175         .id             = -1,
176         .dev = {
177                 .platform_data = &cardhu_bt_rfkill_pdata,
178         },
179 };
180
181 static struct resource cardhu_bluesleep_resources[] = {
182         [0] = {
183                 .name = "gpio_host_wake",
184                         .start  = TEGRA_GPIO_PU6,
185                         .end    = TEGRA_GPIO_PU6,
186                         .flags  = IORESOURCE_IO,
187         },
188         [1] = {
189                 .name = "gpio_ext_wake",
190                         .start  = TEGRA_GPIO_PU1,
191                         .end    = TEGRA_GPIO_PU1,
192                         .flags  = IORESOURCE_IO,
193         },
194         [2] = {
195                 .name = "host_wake",
196                         .start  = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PU6),
197                         .end    = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PU6),
198                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
199         },
200 };
201
202 static struct platform_device cardhu_bluesleep_device = {
203         .name           = "bluesleep",
204         .id             = -1,
205         .num_resources  = ARRAY_SIZE(cardhu_bluesleep_resources),
206         .resource       = cardhu_bluesleep_resources,
207 };
208
209 static noinline void __init cardhu_setup_bluesleep(void)
210 {
211         platform_device_register(&cardhu_bluesleep_device);
212         return;
213 }
214
215 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
216         /* name         parent          rate            enabled */
217         { "pll_m",      NULL,           0,              false},
218         { "hda",        "pll_p",        108000000,      false},
219         { "hda2codec_2x","pll_p",       48000000,       false},
220         { "pwm",        "pll_p",        3187500,        false},
221         { "blink",      "clk_32k",      32768,          true},
222         { "i2s0",       "pll_a_out0",   0,              false},
223         { "i2s1",       "pll_a_out0",   0,              false},
224         { "i2s3",       "pll_a_out0",   0,              false},
225         { "spdif_out",  "pll_a_out0",   0,              false},
226         { "d_audio",    "clk_m",        12000000,       false},
227         { "dam0",       "clk_m",        12000000,       false},
228         { "dam1",       "clk_m",        12000000,       false},
229         { "dam2",       "clk_m",        12000000,       false},
230         { "audio1",     "i2s1_sync",    0,              false},
231         { "audio3",     "i2s3_sync",    0,              false},
232         { "vi_sensor",  "pll_p",        150000000,      false},
233         { "i2c1",       "pll_p",        3200000,        false},
234         { "i2c2",       "pll_p",        3200000,        false},
235         { "i2c3",       "pll_p",        3200000,        false},
236         { "i2c4",       "pll_p",        3200000,        false},
237         { "i2c5",       "pll_p",        3200000,        false},
238         { "vi",         "pll_p",        0,              false},
239         { NULL,         NULL,           0,              0},
240 };
241
242 static struct pn544_i2c_platform_data nfc_pdata = {
243         .irq_gpio = TEGRA_GPIO_PX0,
244         .ven_gpio = TEGRA_GPIO_PP3,
245         .firm_gpio = TEGRA_GPIO_PO7,
246         };
247
248 static struct i2c_board_info __initdata cardhu_i2c_bus3_board_info[] = {
249         {
250                 I2C_BOARD_INFO("pn544", 0x28),
251                 .platform_data = &nfc_pdata,
252                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PX0),
253         },
254 };
255 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
256         .adapter_nr     = 0,
257         .bus_count      = 1,
258         .bus_clk_rate   = { 100000, 0 },
259         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
260         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
261         .arb_recovery = arb_lost_recovery,
262 };
263
264 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
265         .adapter_nr     = 1,
266         .bus_count      = 1,
267         .bus_clk_rate   = { 400000, 0 },
268         .is_clkon_always = true,
269         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
270         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
271         .arb_recovery = arb_lost_recovery,
272 };
273
274 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
275         .adapter_nr     = 2,
276         .bus_count      = 1,
277         .bus_clk_rate   = { 100000, 0 },
278         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
279         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
280         .arb_recovery = arb_lost_recovery,
281 };
282
283 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
284         .adapter_nr     = 3,
285         .bus_count      = 1,
286         .bus_clk_rate   = { 10000, 0 },
287         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
288         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
289         .arb_recovery = arb_lost_recovery,
290 };
291
292 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
293         .adapter_nr     = 4,
294         .bus_count      = 1,
295         .bus_clk_rate   = { 400000, 0 },
296         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
297         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
298         .arb_recovery = arb_lost_recovery,
299 };
300
301
302 #if 0
303 struct tegra_wired_jack_conf audio_wr_jack_conf = {
304         .hp_det_n = TEGRA_GPIO_PW2,
305         .en_mic_ext = TEGRA_GPIO_PX1,
306         .en_mic_int = TEGRA_GPIO_PX0,
307 };
308 #endif
309
310 static struct wm8903_platform_data cardhu_wm8903_pdata = {
311         .irq_active_low = 0,
312         .micdet_cfg = 0,
313         .micdet_delay = 100,
314         .gpio_base = CARDHU_GPIO_WM8903(0),
315         .gpio_cfg = {
316                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP1_FN_SHIFT),
317                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP2_FN_SHIFT) |
318                         WM8903_GP2_DIR,
319                 0,
320                 WM8903_GPIO_NO_CONFIG,
321                 WM8903_GPIO_NO_CONFIG,
322         },
323 };
324
325 /* Equalizer filter coefs generated from the MAXIM MAX98095
326  * evkit software tool */
327 static struct max98095_eq_cfg max98095_eq_cfg[] = {
328         {
329                 .name = "FLAT",
330                 .rate = 44100,
331                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
332                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
333                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
334                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
335                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
336         },
337         {
338                 .name = "LOWPASS1K",
339                 .rate = 44100,
340                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
341                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
342                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
343                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
344                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
345         },
346         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
347                 .name = "HIBOOST",
348                 .rate = 44100,
349                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
350                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
351                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
352                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
353                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
354         },
355         { /* BASS=12dB, TREBLE=+12dB */
356                 .name = "LOUD12DB",
357                 .rate = 44100,
358                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
359                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
360                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
361                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
362                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
363         },
364         {
365                 .name = "FLAT",
366                 .rate = 16000,
367                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
368                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
369                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
370                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
371                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
372         },
373         {
374                 .name = "LOWPASS1K",
375                 .rate = 16000,
376                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
377                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
378                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
379                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
380                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
381         },
382         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
383                 .name = "HIBOOST",
384                 .rate = 16000,
385                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
386                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
387                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
388                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
389                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
390         },
391         { /* BASS=12dB, TREBLE=+12dB */
392                 .name = "LOUD12DB",
393                 .rate = 16000,
394                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
395                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
396                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
397                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
398                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
399         },
400 };
401
402 static struct max98095_pdata cardhu_max98095_pdata = {
403         /* equalizer configuration */
404         .eq_cfg = max98095_eq_cfg,
405         .eq_cfgcnt = ARRAY_SIZE(max98095_eq_cfg),
406
407         /* Biquad filter response configuration */
408         .bq_cfg = NULL,
409         .bq_cfgcnt = 0,
410
411         /* microphone configuration */
412         .digmic_left_mode = 1,
413         .digmic_right_mode = 1,
414 };
415
416 static struct i2c_board_info __initdata cardhu_codec_wm8903_info = {
417         I2C_BOARD_INFO("wm8903", 0x1a),
418         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
419         .platform_data = &cardhu_wm8903_pdata,
420 };
421
422 static struct i2c_board_info __initdata cardhu_codec_aic326x_info = {
423         I2C_BOARD_INFO("aic3262-codec", 0x18),
424         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
425 };
426
427 static struct i2c_board_info __initdata cardhu_codec_max98095_info = {
428         I2C_BOARD_INFO("max98095", 0x10),
429         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
430         .platform_data = &cardhu_max98095_pdata,
431 };
432
433 static void cardhu_i2c_init(void)
434 {
435         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
436         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
437         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
438         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
439         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
440
441         platform_device_register(&tegra_i2c_device5);
442         platform_device_register(&tegra_i2c_device4);
443         platform_device_register(&tegra_i2c_device3);
444         platform_device_register(&tegra_i2c_device2);
445         platform_device_register(&tegra_i2c_device1);
446
447         i2c_register_board_info(4, &cardhu_codec_wm8903_info, 1);
448         i2c_register_board_info(4, &cardhu_codec_max98095_info, 1);
449         i2c_register_board_info(4, &cardhu_codec_aic326x_info, 1);
450
451         i2c_register_board_info(2, cardhu_i2c_bus3_board_info, 1);
452 }
453
454 static struct platform_device *cardhu_uart_devices[] __initdata = {
455         &tegra_uarta_device,
456         &tegra_uartb_device,
457         &tegra_uartc_device,
458         &tegra_uartd_device,
459         &tegra_uarte_device,
460 };
461 static struct uart_clk_parent uart_parent_clk[] = {
462         [0] = {.name = "clk_m"},
463         [1] = {.name = "pll_p"},
464 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
465         [2] = {.name = "pll_m"},
466 #endif
467 };
468
469 static struct tegra_uart_platform_data cardhu_uart_pdata;
470 static struct tegra_uart_platform_data cardhu_loopback_uart_pdata;
471
472 static void __init uart_debug_init(void)
473 {
474         struct board_info board_info;
475         int debug_port_id;
476
477         tegra_get_board_info(&board_info);
478
479         debug_port_id = get_tegra_uart_debug_port_id();
480         if (debug_port_id < 0) {
481                 debug_port_id = 0;
482                         /* UARTB is debug port
483                          *       for SLT - E1186/E1187/PM269
484                          *       for E1256/E1257
485                          */
486                 if (((board_info.sku & SKU_SLT_ULPI_SUPPORT) &&
487                         ((board_info.board_id == BOARD_E1186) ||
488                         (board_info.board_id == BOARD_E1187) ||
489                         (board_info.board_id == BOARD_PM269))) ||
490                         (board_info.board_id == BOARD_E1256) ||
491                         (board_info.board_id == BOARD_E1257))
492                                 debug_port_id = 1;
493         }
494
495         switch (debug_port_id) {
496         case 0:
497                 /* UARTA is the debug port. */
498                 pr_info("Selecting UARTA as the debug console\n");
499                 cardhu_uart_devices[0] = &debug_uarta_device;
500                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
501                 debug_uart_port_base = ((struct plat_serial8250_port *)(
502                         debug_uarta_device.dev.platform_data))->mapbase;
503                 break;
504
505         case 1:
506                 /* UARTB is the debug port. */
507                 pr_info("Selecting UARTB as the debug console\n");
508                 cardhu_uart_devices[1] = &debug_uartb_device;
509                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartb");
510                 debug_uart_port_base = ((struct plat_serial8250_port *)(
511                         debug_uartb_device.dev.platform_data))->mapbase;
512                 break;
513
514         case 2:
515                 /* UARTC is the debug port. */
516                 pr_info("Selecting UARTC as the debug console\n");
517                 cardhu_uart_devices[2] = &debug_uartc_device;
518                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartc");
519                 debug_uart_port_base = ((struct plat_serial8250_port *)(
520                         debug_uartc_device.dev.platform_data))->mapbase;
521                 break;
522
523         case 3:
524                 /* UARTD is the debug port. */
525                 pr_info("Selecting UARTD as the debug console\n");
526                 cardhu_uart_devices[3] = &debug_uartd_device;
527                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartd");
528                 debug_uart_port_base = ((struct plat_serial8250_port *)(
529                         debug_uartd_device.dev.platform_data))->mapbase;
530                 break;
531
532         case 4:
533                 /* UARTE is the debug port. */
534                 pr_info("Selecting UARTE as the debug console\n");
535                 cardhu_uart_devices[4] = &debug_uarte_device;
536                 debug_uart_clk =  clk_get_sys("serial8250.0", "uarte");
537                 debug_uart_port_base = ((struct plat_serial8250_port *)(
538                         debug_uarte_device.dev.platform_data))->mapbase;
539                 break;
540
541         default:
542                 pr_info("The debug console id %d is invalid, Assuming UARTA", debug_port_id);
543                 cardhu_uart_devices[0] = &debug_uarta_device;
544                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
545                 debug_uart_port_base = ((struct plat_serial8250_port *)(
546                         debug_uarta_device.dev.platform_data))->mapbase;
547                 break;
548         }
549         return;
550 }
551
552 static void __init cardhu_uart_init(void)
553 {
554         struct clk *c;
555         int i;
556
557         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
558                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
559                 if (IS_ERR_OR_NULL(c)) {
560                         pr_err("Not able to get the clock for %s\n",
561                                                 uart_parent_clk[i].name);
562                         continue;
563                 }
564                 uart_parent_clk[i].parent_clk = c;
565                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
566         }
567         cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
568         cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
569         cardhu_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
570         cardhu_loopback_uart_pdata.parent_clk_count =
571                                                 ARRAY_SIZE(uart_parent_clk);
572         cardhu_loopback_uart_pdata.is_loopback = true;
573         tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
574         tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
575         tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
576         tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
577         /* UARTE is used for loopback test purpose */
578         tegra_uarte_device.dev.platform_data = &cardhu_loopback_uart_pdata;
579
580         /* Register low speed only if it is selected */
581         if (!is_tegra_debug_uartport_hs()) {
582                 uart_debug_init();
583                 /* Clock enable for the debug channel */
584                 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
585                         pr_info("The debug console clock name is %s\n",
586                                                 debug_uart_clk->name);
587                         c = tegra_get_clock_by_name("pll_p");
588                         if (IS_ERR_OR_NULL(c))
589                                 pr_err("Not getting the parent clock pll_p\n");
590                         else
591                                 clk_set_parent(debug_uart_clk, c);
592
593                         clk_enable(debug_uart_clk);
594                         clk_set_rate(debug_uart_clk, clk_get_rate(c));
595                 } else {
596                         pr_err("Not getting the clock %s for debug console\n",
597                                         debug_uart_clk->name);
598                 }
599         }
600
601         platform_add_devices(cardhu_uart_devices,
602                                 ARRAY_SIZE(cardhu_uart_devices));
603 }
604
605 static struct platform_device tegra_camera = {
606         .name = "tegra_camera",
607         .id = -1,
608 };
609
610 static struct platform_device *cardhu_spi_devices[] __initdata = {
611         &tegra_spi_device4,
612 };
613
614 static struct platform_device *touch_spi_device[] __initdata = {
615         &tegra_spi_device1,
616 };
617
618 struct spi_clk_parent spi_parent_clk[] = {
619         [0] = {.name = "pll_p"},
620 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
621         [1] = {.name = "pll_m"},
622         [2] = {.name = "clk_m"},
623 #else
624         [1] = {.name = "clk_m"},
625 #endif
626 };
627
628 static struct tegra_spi_platform_data cardhu_spi_pdata = {
629         .is_dma_based           = true,
630         .max_dma_buffer         = (16 * 1024),
631         .is_clkon_always        = false,
632         .max_rate               = 100000000,
633 };
634
635 static void __init cardhu_spi_init(void)
636 {
637         int i;
638         struct clk *c;
639         struct board_info board_info, display_board_info;
640
641         tegra_get_board_info(&board_info);
642         tegra_get_display_board_info(&display_board_info);
643
644         for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
645                 c = tegra_get_clock_by_name(spi_parent_clk[i].name);
646                 if (IS_ERR_OR_NULL(c)) {
647                         pr_err("Not able to get the clock for %s\n",
648                                                 spi_parent_clk[i].name);
649                         continue;
650                 }
651                 spi_parent_clk[i].parent_clk = c;
652                 spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
653         }
654         cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
655         cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
656         tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
657         platform_add_devices(cardhu_spi_devices,
658                                 ARRAY_SIZE(cardhu_spi_devices));
659
660         if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
661                 platform_add_devices(touch_spi_device,
662                                 ARRAY_SIZE(touch_spi_device));
663         }
664         if (board_info.board_id == BOARD_E1198) {
665                 tegra_spi_device2.dev.platform_data = &cardhu_spi_pdata;
666                 platform_device_register(&tegra_spi_device2);
667                 tegra_spi_slave_device1.dev.platform_data = &cardhu_spi_pdata;
668                 platform_device_register(&tegra_spi_slave_device1);
669         }
670 }
671
672 static void __init cardhu_dtv_init(void)
673 {
674         struct board_info board_info;
675
676         tegra_get_board_info(&board_info);
677
678         if (board_info.board_id == BOARD_E1186)
679                 platform_device_register(&tegra_dtv_device);
680 }
681
682 static struct resource tegra_rtc_resources[] = {
683         [0] = {
684                 .start = TEGRA_RTC_BASE,
685                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
686                 .flags = IORESOURCE_MEM,
687         },
688         [1] = {
689                 .start = INT_RTC,
690                 .end = INT_RTC,
691                 .flags = IORESOURCE_IRQ,
692         },
693 };
694
695 static struct platform_device tegra_rtc_device = {
696         .name = "tegra_rtc",
697         .id   = -1,
698         .resource = tegra_rtc_resources,
699         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
700 };
701
702 static struct tegra_wm8903_platform_data cardhu_audio_wm8903_pdata = {
703         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
704         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
705         .gpio_hp_mute           = -1,
706         .gpio_int_mic_en        = -1,
707         .gpio_ext_mic_en        = -1,
708 };
709
710 static struct tegra_asoc_platform_data cardhu_audio_max98095_pdata = {
711         .gpio_spkr_en           = -1,
712         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
713         .gpio_hp_mute           = -1,
714         .gpio_int_mic_en        = -1,
715         .gpio_ext_mic_en        = -1,
716 };
717
718 static struct platform_device cardhu_audio_wm8903_device = {
719         .name   = "tegra-snd-wm8903",
720         .id     = 0,
721         .dev    = {
722                 .platform_data = &cardhu_audio_wm8903_pdata,
723         },
724 };
725
726 static struct platform_device cardhu_audio_max98095_device = {
727         .name   = "tegra-snd-max98095",
728         .id     = 0,
729         .dev    = {
730                 .platform_data = &cardhu_audio_max98095_pdata,
731         },
732 };
733
734 static struct tegra_asoc_platform_data cardhu_audio_aic326x_pdata = {
735         .gpio_spkr_en           = -1,
736         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
737         .gpio_hp_mute           = -1,
738         .gpio_int_mic_en        = -1,
739         .gpio_ext_mic_en        = -1,
740         /*defaults for Verbier-Cardhu board with TI AIC326X codec*/
741         .audio_port_id          = {
742                 [HIFI_CODEC] = 0,
743                 [BASEBAND] = -1,
744                 [BT_SCO] = 3,
745         },
746         .baseband_param         = {
747                 .rate = -1,
748                 .channels = -1,
749         },
750 };
751
752 static struct platform_device cardhu_audio_aic326x_device = {
753         .name   = "tegra-snd-aic326x",
754         .id     = 0,
755         .dev    = {
756                 .platform_data  = &cardhu_audio_aic326x_pdata,
757         },
758 };
759
760 static struct platform_device *cardhu_devices[] __initdata = {
761         &tegra_pmu_device,
762         &tegra_rtc_device,
763         &tegra_udc_device,
764 #if defined(CONFIG_TEGRA_IOVMM_SMMU) ||  defined(CONFIG_TEGRA_IOMMU_SMMU)
765         &tegra_smmu_device,
766 #endif
767         &tegra_wdt0_device,
768         &tegra_wdt1_device,
769         &tegra_wdt2_device,
770 #if defined(CONFIG_TEGRA_AVP)
771         &tegra_avp_device,
772 #endif
773         &tegra_camera,
774 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
775         &tegra_se_device,
776 #endif
777         &tegra_ahub_device,
778         &tegra_dam_device0,
779         &tegra_dam_device1,
780         &tegra_dam_device2,
781         &tegra_i2s_device0,
782         &tegra_i2s_device1,
783         &tegra_i2s_device3,
784         &tegra_spdif_device,
785         &spdif_dit_device,
786         &bluetooth_dit_device,
787         &baseband_dit_device,
788         &cardhu_bt_rfkill_device,
789         &tegra_pcm_device,
790         &cardhu_audio_wm8903_device,
791         &cardhu_audio_max98095_device,
792         &cardhu_audio_aic326x_device,
793         &tegra_hda_device,
794         &tegra_cec_device,
795 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
796         &tegra_aes_device,
797 #endif
798 };
799
800 #define E1506_MXT_CONFIG_CRC 0x62F903
801 static const u8 e1506_config[] = {
802         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
803         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x05, 0x01, 0x00,
804         0x00, 0x1E, 0x0A, 0x8B, 0x00, 0x00, 0x13, 0x0B,
805         0x00, 0x10, 0x32, 0x03, 0x03, 0x00, 0x03, 0x01,
806         0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xBF, 0x03, 0x1B,
807         0x02, 0x00, 0x00, 0x37, 0x37, 0x00, 0x00, 0x00,
808         0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
809         0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
810         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
811         0x00, 0x00, 0x00, 0xA9, 0x7F, 0x9A, 0x0E, 0x00,
812         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
813         0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00,
814         0x00, 0x00, 0x03, 0x23, 0x00, 0x00, 0x00, 0x0A,
815         0x0F, 0x14, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00,
816         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
817         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
818         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
819         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
820         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
821         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
822         0x00, 0x00, 0x00, 0x01, 0x00, 0x03, 0x08, 0x10,
823         0x00
824 };
825
826 #define MXT_CONFIG_CRC  0xD62DE8
827 static const u8 config[] = {
828         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
829         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
830         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
831         0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
832         0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
833         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
834         0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
835         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
836         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
837         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
838         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
839         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
840         0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
841         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
842         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
843         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
844         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
845         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
846         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
847         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
848 };
849
850 #define MXT_CONFIG_CRC_SKU2000  0xA24D9A
851 static const u8 config_sku2000[] = {
852         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
853         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
854         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
855         0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00,  //23=thr  2 di
856         0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
857         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
858         0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00,  //0A=limit
859         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
860         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
861         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
862         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
863         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
864         0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
865         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
866         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
867         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
868         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
869         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
870         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
871         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
872 };
873
874 static struct mxt_platform_data atmel_mxt_info = {
875         .x_line         = 27,
876         .y_line         = 42,
877         .x_size         = 768,
878         .y_size         = 1366,
879         .blen           = 0x20,
880         .threshold      = 0x3C,
881         .voltage        = 3300000,              /* 3.3V */
882         .orient         = 5,
883         .config         = config,
884         .config_length  = 157,
885         .config_crc     = MXT_CONFIG_CRC,
886         .irqflags       = IRQF_TRIGGER_FALLING,
887 /*      .read_chg       = &read_chg, */
888         .read_chg       = NULL,
889 };
890
891 static struct mxt_platform_data e1506_atmel_mxt_info = {
892         .x_line         = 19,
893         .y_line         = 11,
894         .x_size         = 960,
895         .y_size         = 540,
896         .blen           = 0x10,
897         .threshold      = 0x32,
898         .voltage        = 3300000,              /* 3.3V */
899         .orient         = 3,
900         .config         = e1506_config,
901         .config_length  = 168,
902         .config_crc     = E1506_MXT_CONFIG_CRC,
903         .irqflags       = IRQF_TRIGGER_FALLING,
904 /*      .read_chg       = &read_chg, */
905         .read_chg       = NULL,
906 };
907
908 static struct i2c_board_info __initdata atmel_i2c_info[] = {
909         {
910                 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
911                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PH4),
912                 .platform_data = &atmel_mxt_info,
913         }
914 };
915
916 static struct i2c_board_info __initdata e1506_atmel_i2c_info[] = {
917         {
918                 I2C_BOARD_INFO("atmel_mxt_ts", 0x4A),
919                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PH4),
920                 .platform_data = &e1506_atmel_mxt_info,
921         }
922 };
923
924 static __initdata struct tegra_clk_init_table spi_clk_init_table[] = {
925         /* name         parent          rate            enabled */
926         { "sbc1",       "pll_p",        52000000,       true},
927         { NULL,         NULL,           0,              0},
928 };
929
930 static int __init cardhu_touch_init(void)
931 {
932         struct board_info BoardInfo, DisplayBoardInfo;
933
934         tegra_get_board_info(&BoardInfo);
935         tegra_get_display_board_info(&DisplayBoardInfo);
936         if (DisplayBoardInfo.board_id == BOARD_DISPLAY_PM313) {
937                 tegra_clk_init_from_table(spi_clk_init_table);
938
939                 touch_init_raydium(TEGRA_GPIO_PH4, TEGRA_GPIO_PH6, 2);
940         } else {
941                 gpio_request(TEGRA_GPIO_PH4, "atmel-irq");
942                 gpio_direction_input(TEGRA_GPIO_PH4);
943
944                 gpio_request(TEGRA_GPIO_PH6, "atmel-reset");
945                 gpio_direction_output(TEGRA_GPIO_PH6, 0);
946                 msleep(1);
947                 gpio_set_value(TEGRA_GPIO_PH6, 1);
948                 msleep(100);
949
950                 if ((BoardInfo.sku & SKU_TOUCH_MASK) == SKU_TOUCH_2000) {
951                         atmel_mxt_info.config = config_sku2000;
952                         atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
953                 }
954
955                 if (DisplayBoardInfo.board_id == BOARD_DISPLAY_E1506)
956                         i2c_register_board_info(1, e1506_atmel_i2c_info, 1);
957                 else
958                         i2c_register_board_info(1, atmel_i2c_info, 1);
959         }
960
961         return 0;
962 }
963
964 #if defined(CONFIG_USB_SUPPORT)
965
966 static void cardu_usb_hsic_postsupend(void)
967 {
968 #ifdef CONFIG_TEGRA_BB_XMM_POWER
969         baseband_xmm_set_power_status(BBXMM_PS_L2);
970 #endif
971 }
972
973 static void cardu_usb_hsic_preresume(void)
974 {
975 #ifdef CONFIG_TEGRA_BB_XMM_POWER
976         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
977 #endif
978 }
979
980 static void cardu_usb_hsic_phy_ready(void)
981 {
982 #ifdef CONFIG_TEGRA_BB_XMM_POWER
983         baseband_xmm_set_power_status(BBXMM_PS_L0);
984 #endif
985 }
986
987 static void cardu_usb_hsic_phy_off(void)
988 {
989 #ifdef CONFIG_TEGRA_BB_XMM_POWER
990         baseband_xmm_set_power_status(BBXMM_PS_L3);
991 #endif
992 }
993
994 static struct tegra_usb_phy_platform_ops hsic_xmm_plat_ops = {
995         .post_suspend = cardu_usb_hsic_postsupend,
996         .pre_resume = cardu_usb_hsic_preresume,
997         .port_power = cardu_usb_hsic_phy_ready,
998         .post_phy_off = cardu_usb_hsic_phy_off,
999 };
1000
1001 static struct tegra_usb_platform_data tegra_ehci2_hsic_xmm_pdata = {
1002         .port_otg = false,
1003         .has_hostpc = true,
1004         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
1005         .op_mode        = TEGRA_USB_OPMODE_HOST,
1006         .u_data.host = {
1007                 .vbus_gpio = -1,
1008                 .hot_plug = false,
1009                 .remote_wakeup_supported = false,
1010                 .power_off_on_suspend = false,
1011         },
1012         .u_cfg.hsic = {
1013                 .sync_start_delay = 9,
1014                 .idle_wait_delay = 17,
1015                 .term_range_adj = 0,
1016                 .elastic_underrun_limit = 16,
1017                 .elastic_overrun_limit = 16,
1018         },
1019         .ops = &hsic_xmm_plat_ops,
1020 };
1021 #endif
1022
1023 static int hsic_enable_gpio = -1;
1024 static int hsic_reset_gpio = -1;
1025
1026 void hsic_platform_open(void)
1027 {
1028         int reset_gpio = 0, enable_gpio = 0;
1029
1030         if (hsic_enable_gpio != -1)
1031                 enable_gpio = gpio_request(hsic_enable_gpio, "uhsic_enable");
1032         if (hsic_reset_gpio != -1)
1033                 reset_gpio = gpio_request(hsic_reset_gpio, "uhsic_reset");
1034         /* hsic enable signal deasserted, hsic reset asserted */
1035         if (!enable_gpio)
1036                 gpio_direction_output(hsic_enable_gpio, 0 /* deasserted */);
1037         if (!reset_gpio)
1038                 gpio_direction_output(hsic_reset_gpio, 0 /* asserted */);
1039         if (!enable_gpio)
1040                 tegra_gpio_enable(hsic_enable_gpio);
1041         if (!reset_gpio)
1042                 tegra_gpio_enable(hsic_reset_gpio);
1043         /* keep hsic reset asserted for 1 ms */
1044         udelay(1000);
1045         /* enable (power on) hsic */
1046         if (!enable_gpio)
1047                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
1048         udelay(1000);
1049         /* deassert reset */
1050         if (!reset_gpio)
1051                 gpio_set_value_cansleep(hsic_reset_gpio, 1);
1052
1053 }
1054
1055 void hsic_platform_close(void)
1056 {
1057         if (hsic_enable_gpio != -1) {
1058                 gpio_set_value(hsic_enable_gpio, 0);
1059                 gpio_free(hsic_enable_gpio);
1060         }
1061         if (hsic_reset_gpio != -1) {
1062                 gpio_set_value(hsic_reset_gpio, 0);
1063                 gpio_free(hsic_reset_gpio);
1064         }
1065 }
1066
1067 void hsic_power_on(void)
1068 {
1069         if (hsic_enable_gpio != -1) {
1070                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
1071                 udelay(1000);
1072         }
1073 }
1074
1075 void hsic_power_off(void)
1076 {
1077         if (hsic_enable_gpio != -1) {
1078                 gpio_set_value_cansleep(hsic_enable_gpio, 0);
1079                 udelay(1000);
1080         }
1081 }
1082
1083 #if defined(CONFIG_USB_SUPPORT)
1084 static struct tegra_usb_phy_platform_ops hsic_plat_ops = {
1085         .open = hsic_platform_open,
1086         .close = hsic_platform_close,
1087         .pre_phy_on = hsic_power_on,
1088         .post_phy_off = hsic_power_off,
1089 };
1090
1091 static struct tegra_usb_platform_data tegra_ehci2_hsic_pdata = {
1092         .port_otg = false,
1093         .has_hostpc = true,
1094         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
1095         .op_mode        = TEGRA_USB_OPMODE_HOST,
1096         .u_data.host = {
1097                 .vbus_gpio = -1,
1098                 .hot_plug = false,
1099                 .remote_wakeup_supported = false,
1100                 .power_off_on_suspend = false,
1101         },
1102         .u_cfg.hsic = {
1103                 .sync_start_delay = 9,
1104                 .idle_wait_delay = 17,
1105                 .term_range_adj = 0,
1106                 .elastic_underrun_limit = 16,
1107                 .elastic_overrun_limit = 16,
1108         },
1109         .ops = &hsic_plat_ops,
1110 };
1111
1112 static struct tegra_usb_platform_data tegra_udc_pdata = {
1113         .port_otg = true,
1114         .has_hostpc = true,
1115         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1116         .op_mode = TEGRA_USB_OPMODE_DEVICE,
1117         .u_data.dev = {
1118                 .vbus_pmu_irq = 0,
1119                 .vbus_gpio = -1,
1120                 .charging_supported = false,
1121                 .remote_wakeup_supported = false,
1122         },
1123         .u_cfg.utmi = {
1124                 .hssync_start_delay = 0,
1125                 .elastic_limit = 16,
1126                 .idle_wait_delay = 17,
1127                 .term_range_adj = 6,
1128                 .xcvr_setup = 8,
1129                 .xcvr_lsfslew = 2,
1130                 .xcvr_lsrslew = 2,
1131                 .xcvr_setup_offset = 0,
1132                 .xcvr_use_fuses = 1,
1133         },
1134 };
1135
1136 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
1137         .port_otg = false,
1138         .has_hostpc = true,
1139         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1140         .op_mode        = TEGRA_USB_OPMODE_HOST,
1141         .u_data.host = {
1142                 .vbus_gpio = -1,
1143                 .hot_plug = false,
1144                 .remote_wakeup_supported = true,
1145                 .power_off_on_suspend = true,
1146         },
1147         .u_cfg.utmi = {
1148                 .hssync_start_delay = 0,
1149                 .elastic_limit = 16,
1150                 .idle_wait_delay = 17,
1151                 .term_range_adj = 6,
1152                 .xcvr_setup = 15,
1153                 .xcvr_lsfslew = 2,
1154                 .xcvr_lsrslew = 2,
1155                 .xcvr_setup_offset = 0,
1156                 .xcvr_use_fuses = 1,
1157         },
1158 };
1159
1160 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
1161         .port_otg = false,
1162         .has_hostpc = true,
1163         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1164         .op_mode = TEGRA_USB_OPMODE_HOST,
1165         .u_data.host = {
1166                 .vbus_gpio = -1,
1167                 .vbus_reg = "vdd_vbus_typea_usb",
1168                 .hot_plug = true,
1169                 .remote_wakeup_supported = true,
1170                 .power_off_on_suspend = true,
1171         },
1172         .u_cfg.utmi = {
1173                 .hssync_start_delay = 0,
1174                 .elastic_limit = 16,
1175                 .idle_wait_delay = 17,
1176                 .term_range_adj = 6,
1177                 .xcvr_setup = 8,
1178                 .xcvr_lsfslew = 2,
1179                 .xcvr_lsrslew = 2,
1180                 .xcvr_setup_offset = 0,
1181                 .xcvr_use_fuses = 1,
1182         },
1183 };
1184
1185 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
1186         .port_otg = true,
1187         .has_hostpc = true,
1188         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1189         .op_mode = TEGRA_USB_OPMODE_HOST,
1190         .u_data.host = {
1191                 .vbus_gpio = -1,
1192                 .vbus_reg = "vdd_vbus_micro_usb",
1193                 .hot_plug = true,
1194                 .remote_wakeup_supported = true,
1195                 .power_off_on_suspend = true,
1196         },
1197         .u_cfg.utmi = {
1198                 .hssync_start_delay = 0,
1199                 .elastic_limit = 16,
1200                 .idle_wait_delay = 17,
1201                 .term_range_adj = 6,
1202                 .xcvr_setup = 15,
1203                 .xcvr_lsfslew = 2,
1204                 .xcvr_lsrslew = 2,
1205                 .xcvr_setup_offset = 0,
1206                 .xcvr_use_fuses = 1,
1207         },
1208 };
1209
1210 static struct tegra_usb_otg_data tegra_otg_pdata = {
1211         .ehci_device = &tegra_ehci1_device,
1212         .ehci_pdata = &tegra_ehci1_utmi_pdata,
1213 };
1214 #endif
1215
1216 #if defined(CONFIG_USB_SUPPORT)
1217 static void cardhu_usb_init(void)
1218 {
1219         struct board_info bi;
1220
1221         tegra_get_board_info(&bi);
1222
1223         /* OTG should be the first to be registered */
1224         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1225         platform_device_register(&tegra_otg_device);
1226
1227         /* setup the udc platform data */
1228         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1229
1230         if (bi.board_id == BOARD_PM267) {
1231                 hsic_enable_gpio = EN_HSIC_GPIO;
1232                 hsic_reset_gpio = PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
1233                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1234                 platform_device_register(&tegra_ehci2_device);
1235         } else if (bi.board_id == BOARD_E1256) {
1236                 hsic_enable_gpio = EN_HSIC_GPIO;
1237                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1238                 platform_device_register(&tegra_ehci2_device);
1239         } else if (bi.board_id == BOARD_E1186) {
1240                 tegra_ehci2_device.dev.platform_data =
1241                                                 &tegra_ehci2_hsic_xmm_pdata;
1242                 /* ehci2 registration happens in baseband-xmm-power  */
1243         } else {
1244                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_utmi_pdata;
1245                 platform_device_register(&tegra_ehci2_device);
1246         }
1247
1248         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
1249         platform_device_register(&tegra_ehci3_device);
1250
1251 }
1252 #else
1253 static void cardhu_usb_init(void) { }
1254 #endif
1255
1256 static struct baseband_power_platform_data tegra_baseband_power_data = {
1257         .baseband_type = BASEBAND_XMM,
1258         .modem = {
1259         .xmm = {
1260                         .bb_rst = XMM_GPIO_BB_RST,
1261                         .bb_on = XMM_GPIO_BB_ON,
1262                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1263                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1264                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1265                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1266                         .hsic_device = &tegra_ehci2_device,
1267                 },
1268         },
1269 };
1270
1271 static struct platform_device tegra_baseband_power_device = {
1272         .name = "baseband_xmm_power",
1273         .id = -1,
1274         .dev = {
1275                 .platform_data = &tegra_baseband_power_data,
1276         },
1277 };
1278
1279 static struct platform_device tegra_baseband_power2_device = {
1280         .name = "baseband_xmm_power2",
1281         .id = -1,
1282         .dev = {
1283                 .platform_data = &tegra_baseband_power_data,
1284         },
1285 };
1286
1287
1288 static struct tegra_pci_platform_data cardhu_pci_platform_data = {
1289         .port_status[0] = 1,
1290         .port_status[1] = 1,
1291         .port_status[2] = 1,
1292         .use_dock_detect        = 0,
1293         .gpio           = 0,
1294 };
1295
1296 static void cardhu_pci_init(void)
1297 {
1298         struct board_info board_info;
1299
1300         tegra_get_board_info(&board_info);
1301         if (board_info.board_id == BOARD_E1291) {
1302                 cardhu_pci_platform_data.port_status[0] = 0;
1303                 cardhu_pci_platform_data.port_status[1] = 0;
1304                 cardhu_pci_platform_data.port_status[2] = 1;
1305                 cardhu_pci_platform_data.use_dock_detect = 1;
1306                 cardhu_pci_platform_data.gpio = DOCK_DETECT_GPIO;
1307         }
1308         if ((board_info.board_id == BOARD_E1186) ||
1309                 (board_info.board_id == BOARD_E1187) ||
1310                 (board_info.board_id == BOARD_E1291)) {
1311                 tegra_pci_device.dev.platform_data = &cardhu_pci_platform_data;
1312                 platform_device_register(&tegra_pci_device);
1313         }
1314 }
1315
1316 static void cardhu_modem_init(void)
1317 {
1318         struct board_info board_info;
1319         int w_disable_gpio, ret;
1320
1321         tegra_get_board_info(&board_info);
1322         switch (board_info.board_id) {
1323         case BOARD_E1291:
1324         case BOARD_E1198:
1325                 if (((board_info.board_id == BOARD_E1291) &&
1326                                 (board_info.fab < BOARD_FAB_A03)) ||
1327                         ((board_info.board_id == BOARD_E1198) &&
1328                                         (board_info.fab < BOARD_FAB_A02))) {
1329                         w_disable_gpio = TEGRA_GPIO_PH5;
1330                 } else {
1331                         w_disable_gpio = TEGRA_GPIO_PDD5;
1332                 }
1333
1334                 ret = gpio_request(w_disable_gpio, "w_disable_gpio");
1335                 if (ret < 0)
1336                         pr_err("%s: gpio_request failed for gpio %d\n",
1337                                 __func__, w_disable_gpio);
1338                 else
1339                         gpio_direction_input(w_disable_gpio);
1340
1341                 /* E1291-A04 & E1198:A02: Set PERST signal to high */
1342                 if (((board_info.board_id == BOARD_E1291) &&
1343                                 (board_info.fab >= BOARD_FAB_A04)) ||
1344                         ((board_info.board_id == BOARD_E1198) &&
1345                                         (board_info.fab >= BOARD_FAB_A02))) {
1346                         ret = gpio_request(TEGRA_GPIO_PH7, "modem_perst");
1347                         if (ret < 0) {
1348                                 pr_err("%s(): Error in allocating gpio "
1349                                         "TEGRA_GPIO_PH7\n", __func__);
1350                                 break;
1351                         }
1352                         gpio_direction_output(TEGRA_GPIO_PH7, 1);
1353                 }
1354                 break;
1355         case BOARD_E1186:
1356                 platform_device_register(&tegra_baseband_power_device);
1357                 platform_device_register(&tegra_baseband_power2_device);
1358                 break;
1359         default:
1360                 break;
1361         }
1362
1363 }
1364
1365 #ifdef CONFIG_SATA_AHCI_TEGRA
1366 static void cardhu_sata_init(void)
1367 {
1368         platform_device_register(&tegra_sata_device);
1369 }
1370 #else
1371 static void cardhu_sata_init(void) { }
1372 #endif
1373
1374 static void __init tegra_cardhu_init(void)
1375 {
1376         tegra_thermal_init(&thermal_data,
1377                                 throttle_list,
1378                                 ARRAY_SIZE(throttle_list));
1379         tegra_clk_init_from_table(cardhu_clk_init_table);
1380         cardhu_pinmux_init();
1381         cardhu_i2c_init();
1382         cardhu_spi_init();
1383         cardhu_usb_init();
1384 #ifdef CONFIG_TEGRA_EDP_LIMITS
1385         cardhu_edp_init();
1386 #endif
1387         cardhu_uart_init();
1388         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
1389         tegra_ram_console_debug_init();
1390         tegra_io_dpd_init();
1391         cardhu_sdhci_init();
1392         cardhu_regulator_init();
1393         cardhu_dtv_init();
1394         cardhu_suspend_init();
1395         cardhu_touch_init();
1396         cardhu_modem_init();
1397         cardhu_kbc_init();
1398         cardhu_scroll_init();
1399         cardhu_keys_init();
1400         cardhu_panel_init();
1401         cardhu_pmon_init();
1402         cardhu_sensors_init();
1403         cardhu_setup_bluesleep();
1404         cardhu_sata_init();
1405         //audio_wired_jack_init();
1406         cardhu_pins_state_init();
1407         cardhu_emc_init();
1408         tegra_release_bootloader_fb();
1409         cardhu_pci_init();
1410 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1411         tegra_wdt_recovery_init();
1412 #endif
1413         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1414 }
1415
1416 static void __init tegra_cardhu_reserve(void)
1417 {
1418 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1419         /* support 1920X1200 with 24bpp */
1420         tegra_reserve(0, SZ_8M + SZ_1M, SZ_8M + SZ_1M);
1421 #else
1422         tegra_reserve(SZ_128M, SZ_8M, SZ_8M);
1423 #endif
1424         tegra_ram_console_debug_reserve(SZ_1M);
1425 }
1426
1427 MACHINE_START(CARDHU, "cardhu")
1428         .boot_params    = 0x80000100,
1429         .map_io         = tegra_map_common_io,
1430         .reserve        = tegra_cardhu_reserve,
1431         .init_early     = tegra_init_early,
1432         .init_irq       = tegra_init_irq,
1433         .timer          = &tegra_timer,
1434         .init_machine   = tegra_cardhu_init,
1435 MACHINE_END