Input: touch: atmel_mxt_ts, board files for new Atmel touch driver.
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <linux/spi/spi.h>
37 #include <linux/spi/rm31080a_ts.h>
38 #include <linux/i2c/atmel_mxt_ts.h>
39 #include <linux/tegra_uart.h>
40 #include <linux/memblock.h>
41 #include <linux/spi-tegra.h>
42 #include <linux/nfc/pn544.h>
43 #include <linux/rfkill-gpio.h>
44 #include <linux/of_platform.h>
45
46 #include <sound/wm8903.h>
47 #include <sound/max98095.h>
48 #include <media/tegra_dtv.h>
49
50 #include <asm/hardware/gic.h>
51
52 #include <mach/edp.h>
53 #include <mach/clk.h>
54 #include <mach/iomap.h>
55 #include <mach/irqs.h>
56 #include <mach/pinmux.h>
57 #include <mach/iomap.h>
58 #include <mach/io_dpd.h>
59 #include <mach/io.h>
60 #include <mach/i2s.h>
61 #include <mach/tegra_asoc_pdata.h>
62 #include <mach/tegra_wm8903_pdata.h>
63 #include <mach/usb_phy.h>
64 #include <mach/thermal.h>
65 #include <mach/pci.h>
66 #include <mach/gpio-tegra.h>
67 #include <mach/tegra_fiq_debugger.h>
68 #include <linux/thermal.h>
69
70 #include <asm/hardware/gic.h>
71 #include <asm/mach-types.h>
72 #include <asm/mach/arch.h>
73
74 #include "board.h"
75 #include "board-common.h"
76 #include "clock.h"
77 #include "board-cardhu.h"
78 #include "board-touch-raydium.h"
79 #include "devices.h"
80 #include "gpio-names.h"
81 #include "fuse.h"
82 #include "pm.h"
83 #include "baseband-xmm-power.h"
84 #include "wdt-recovery.h"
85 #include "common.h"
86
87 static struct balanced_throttle throttle_list[] = {
88         {
89                 .tegra_cdev = {
90                         .id = CDEV_BTHROT_ID_TJ,
91                 },
92                 .throt_tab_size = 10,
93                 .throt_tab = {
94                         {      0, 1000 },
95                         { 640000, 1000 },
96                         { 640000, 1000 },
97                         { 640000, 1000 },
98                         { 640000, 1000 },
99                         { 640000, 1000 },
100                         { 760000, 1000 },
101                         { 760000, 1050 },
102                         {1000000, 1050 },
103                         {1000000, 1100 },
104                 },
105         },
106 };
107
108 static struct tegra_thermal_bind thermal_binds[] = {
109         /* Thermal Throttling */
110         {
111                 .tdev_id = THERMAL_DEVICE_ID_NCT_EXT,
112                 .cdev_id = CDEV_BTHROT_ID_TJ,
113                 .type = THERMAL_TRIP_PASSIVE,
114                 .passive = {
115                         .trip_temp = 85000,
116                         .tc1 = 0,
117                         .tc2 = 1,
118                         .passive_delay = 2000,
119                 }
120         },
121         /* EDP Capping */
122         {
123                 .tdev_id = THERMAL_DEVICE_ID_NCT_EXT,
124                 .cdev_id = CDEV_EDPTABLE_ID_EDP,
125                 .type = THERMAL_TRIP_ACTIVE,
126                 .get_trip_temp = tegra_edp_get_trip_temp,
127                 .get_trip_size = tegra_edp_get_trip_size,
128         },
129         {
130                 .tdev_id = THERMAL_DEVICE_ID_NULL,
131         },
132 };
133
134 static struct rfkill_gpio_platform_data cardhu_bt_rfkill_pdata[] = {
135         {
136                 .name           = "bt_rfkill",
137                 .shutdown_gpio  = TEGRA_GPIO_PU0,
138                 .reset_gpio     = TEGRA_GPIO_INVALID,
139                 .type           = RFKILL_TYPE_BLUETOOTH,
140         },
141 };
142
143 static struct platform_device cardhu_bt_rfkill_device = {
144         .name = "rfkill_gpio",
145         .id             = -1,
146         .dev = {
147                 .platform_data = &cardhu_bt_rfkill_pdata,
148         },
149 };
150
151 static struct resource cardhu_bluesleep_resources[] = {
152         [0] = {
153                 .name = "gpio_host_wake",
154                         .start  = TEGRA_GPIO_PU6,
155                         .end    = TEGRA_GPIO_PU6,
156                         .flags  = IORESOURCE_IO,
157         },
158         [1] = {
159                 .name = "gpio_ext_wake",
160                         .start  = TEGRA_GPIO_PU1,
161                         .end    = TEGRA_GPIO_PU1,
162                         .flags  = IORESOURCE_IO,
163         },
164         [2] = {
165                 .name = "host_wake",
166                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
167         },
168 };
169
170 static struct platform_device cardhu_bluesleep_device = {
171         .name           = "bluesleep",
172         .id             = -1,
173         .num_resources  = ARRAY_SIZE(cardhu_bluesleep_resources),
174         .resource       = cardhu_bluesleep_resources,
175 };
176
177 static noinline void __init cardhu_setup_bluesleep(void)
178 {
179         cardhu_bluesleep_resources[2].start =
180                 cardhu_bluesleep_resources[2].end =
181                         gpio_to_irq(TEGRA_GPIO_PU6);
182         platform_device_register(&cardhu_bluesleep_device);
183         return;
184 }
185
186 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
187         /* name         parent          rate            enabled */
188         { "pll_m",      NULL,           0,              false},
189         { "hda",        "pll_p",        108000000,      false},
190         { "hda2codec_2x","pll_p",       48000000,       false},
191         { "pwm",        "pll_p",        3187500,        false},
192         { "blink",      "clk_32k",      32768,          true},
193         { "i2s0",       "pll_a_out0",   0,              false},
194         { "i2s1",       "pll_a_out0",   0,              false},
195         { "i2s3",       "pll_a_out0",   0,              false},
196         { "spdif_out",  "pll_a_out0",   0,              false},
197         { "d_audio",    "clk_m",        12000000,       false},
198         { "dam0",       "clk_m",        12000000,       false},
199         { "dam1",       "clk_m",        12000000,       false},
200         { "dam2",       "clk_m",        12000000,       false},
201         { "audio1",     "i2s1_sync",    0,              false},
202         { "audio3",     "i2s3_sync",    0,              false},
203         { "vi_sensor",  "pll_p",        150000000,      false},
204         { "i2c1",       "pll_p",        3200000,        false},
205         { "i2c2",       "pll_p",        3200000,        false},
206         { "i2c3",       "pll_p",        3200000,        false},
207         { "i2c4",       "pll_p",        3200000,        false},
208         { "i2c5",       "pll_p",        3200000,        false},
209         { "vi",         "pll_p",        0,              false},
210         { NULL,         NULL,           0,              0},
211 };
212
213 static struct pn544_i2c_platform_data nfc_pdata = {
214         .irq_gpio = TEGRA_GPIO_PX0,
215         .ven_gpio = TEGRA_GPIO_PP3,
216         .firm_gpio = TEGRA_GPIO_PO7,
217         };
218
219 static struct i2c_board_info __initdata cardhu_i2c_bus3_board_info[] = {
220         {
221                 I2C_BOARD_INFO("pn544", 0x28),
222                 .platform_data = &nfc_pdata,
223         },
224 };
225 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
226         .adapter_nr     = 0,
227         .bus_count      = 1,
228         .bus_clk_rate   = { 100000, 0 },
229         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
230         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
231         .arb_recovery = arb_lost_recovery,
232 };
233
234 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
235         .adapter_nr     = 1,
236         .bus_count      = 1,
237         .bus_clk_rate   = { 400000, 0 },
238         .is_clkon_always = true,
239         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
240         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
241         .arb_recovery = arb_lost_recovery,
242 };
243
244 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
245         .adapter_nr     = 2,
246         .bus_count      = 1,
247         .bus_clk_rate   = { 100000, 0 },
248         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
249         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
250         .arb_recovery = arb_lost_recovery,
251 };
252
253 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
254         .adapter_nr     = 3,
255         .bus_count      = 1,
256         .bus_clk_rate   = { 10000, 0 },
257         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
258         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
259         .arb_recovery = arb_lost_recovery,
260 };
261
262 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
263         .adapter_nr     = 4,
264         .bus_count      = 1,
265         .bus_clk_rate   = { 400000, 0 },
266         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
267         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
268         .arb_recovery = arb_lost_recovery,
269 };
270
271
272 #if 0
273 struct tegra_wired_jack_conf audio_wr_jack_conf = {
274         .hp_det_n = TEGRA_GPIO_PW2,
275         .en_mic_ext = TEGRA_GPIO_PX1,
276         .en_mic_int = TEGRA_GPIO_PX0,
277 };
278 #endif
279
280 static struct wm8903_platform_data cardhu_wm8903_pdata = {
281         .irq_active_low = 0,
282         .micdet_cfg = 0,
283         .micdet_delay = 100,
284         .gpio_base = CARDHU_GPIO_WM8903(0),
285         .gpio_cfg = {
286                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP1_FN_SHIFT),
287                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP2_FN_SHIFT) |
288                         WM8903_GP2_DIR,
289                 WM8903_GPIO_CONFIG_ZERO,
290                 0,
291                 0,
292         },
293 };
294
295 /* Equalizer filter coefs generated from the MAXIM MAX98095
296  * evkit software tool */
297 static struct max98095_eq_cfg max98095_eq_cfg[] = {
298         {
299                 .name = "FLAT",
300                 .rate = 44100,
301                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
302                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
303                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
304                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
305                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
306         },
307         {
308                 .name = "LOWPASS1K",
309                 .rate = 44100,
310                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
311                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
312                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
313                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
314                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
315         },
316         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
317                 .name = "HIBOOST",
318                 .rate = 44100,
319                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
320                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
321                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
322                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
323                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
324         },
325         { /* BASS=12dB, TREBLE=+12dB */
326                 .name = "LOUD12DB",
327                 .rate = 44100,
328                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
329                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
330                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
331                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
332                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
333         },
334         {
335                 .name = "FLAT",
336                 .rate = 16000,
337                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
338                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
339                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
340                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
341                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
342         },
343         {
344                 .name = "LOWPASS1K",
345                 .rate = 16000,
346                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
347                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
348                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
349                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
350                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
351         },
352         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
353                 .name = "HIBOOST",
354                 .rate = 16000,
355                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
356                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
357                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
358                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
359                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
360         },
361         { /* BASS=12dB, TREBLE=+12dB */
362                 .name = "LOUD12DB",
363                 .rate = 16000,
364                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
365                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
366                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
367                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
368                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
369         },
370 };
371
372 static struct max98095_pdata cardhu_max98095_pdata = {
373         /* equalizer configuration */
374         .eq_cfg = max98095_eq_cfg,
375         .eq_cfgcnt = ARRAY_SIZE(max98095_eq_cfg),
376
377         /* Biquad filter response configuration */
378         .bq_cfg = NULL,
379         .bq_cfgcnt = 0,
380
381         /* microphone configuration */
382         .digmic_left_mode = 1,
383         .digmic_right_mode = 1,
384 };
385
386 static struct i2c_board_info __initdata cardhu_codec_wm8903_info = {
387         I2C_BOARD_INFO("wm8903", 0x1a),
388         .platform_data = &cardhu_wm8903_pdata,
389 };
390
391 static struct i2c_board_info __initdata cardhu_codec_aic326x_info = {
392         I2C_BOARD_INFO("aic3262-codec", 0x18),
393 };
394
395 static struct i2c_board_info __initdata cardhu_codec_max98095_info = {
396         I2C_BOARD_INFO("max98095", 0x10),
397         .platform_data = &cardhu_max98095_pdata,
398 };
399
400 static void cardhu_i2c_init(void)
401 {
402         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
403         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
404         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
405         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
406         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
407
408         platform_device_register(&tegra_i2c_device5);
409         platform_device_register(&tegra_i2c_device4);
410         platform_device_register(&tegra_i2c_device3);
411         platform_device_register(&tegra_i2c_device2);
412         platform_device_register(&tegra_i2c_device1);
413
414         cardhu_codec_wm8903_info.irq = cardhu_codec_max98095_info.irq =
415                 cardhu_codec_aic326x_info.irq = gpio_to_irq(TEGRA_GPIO_CDC_IRQ);
416         i2c_register_board_info(4, &cardhu_codec_wm8903_info, 1);
417         i2c_register_board_info(4, &cardhu_codec_max98095_info, 1);
418         i2c_register_board_info(4, &cardhu_codec_aic326x_info, 1);
419
420         cardhu_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PX0);
421         i2c_register_board_info(2, cardhu_i2c_bus3_board_info, 1);
422 }
423
424 static struct platform_device *cardhu_uart_devices[] __initdata = {
425         &tegra_uarta_device,
426         &tegra_uartb_device,
427         &tegra_uartc_device,
428         &tegra_uartd_device,
429         &tegra_uarte_device,
430 };
431 static struct uart_clk_parent uart_parent_clk[] = {
432         [0] = {.name = "clk_m"},
433         [1] = {.name = "pll_p"},
434 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
435         [2] = {.name = "pll_m"},
436 #endif
437 };
438
439 static struct tegra_uart_platform_data cardhu_uart_pdata;
440 static struct tegra_uart_platform_data cardhu_loopback_uart_pdata;
441
442 static int __init uart_debug_init(void)
443 {
444         struct board_info board_info;
445         int debug_port_id;
446         int default_debug_port = 0;
447
448         tegra_get_board_info(&board_info);
449
450         /* UARTB is debug port
451          *       for SLT - E1186/E1187/PM269
452          *       for E1256/E1257
453          */
454         if (((board_info.sku & SKU_SLT_ULPI_SUPPORT) &&
455                 ((board_info.board_id == BOARD_E1186) ||
456                 (board_info.board_id == BOARD_E1187) ||
457                 (board_info.board_id == BOARD_PM269))) ||
458                 (board_info.board_id == BOARD_E1256) ||
459                 (board_info.board_id == BOARD_E1257))
460                         default_debug_port = 1;
461
462         debug_port_id = uart_console_debug_init(default_debug_port);
463         if (debug_port_id < 0)
464                 return debug_port_id;
465
466 #ifdef CONFIG_TEGRA_IRDA
467         if ((board_info.board_id == BOARD_E1186) ||
468                 (board_info.board_id == BOARD_E1198)) {
469                 if (debug_port_id == 1) {
470                         cardhu_irda_pdata.is_irda = false;
471                         pr_err("UARTB is not available for IrDA\n");
472                 }
473         }
474 #endif
475         cardhu_uart_devices[debug_port_id] = uart_console_debug_device;
476         return debug_port_id;
477 }
478
479 static void __init cardhu_uart_init(void)
480 {
481         struct clk *c;
482         int i;
483         struct board_info board_info;
484
485         tegra_get_board_info(&board_info);
486
487         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
488                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
489                 if (IS_ERR_OR_NULL(c)) {
490                         pr_err("Not able to get the clock for %s\n",
491                                                 uart_parent_clk[i].name);
492                         continue;
493                 }
494                 uart_parent_clk[i].parent_clk = c;
495                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
496         }
497         cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
498         cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
499         cardhu_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
500         cardhu_loopback_uart_pdata.parent_clk_count =
501                                                 ARRAY_SIZE(uart_parent_clk);
502         cardhu_loopback_uart_pdata.is_loopback = true;
503         tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
504         tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
505         tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
506         tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
507         /* UARTE is used for loopback test purpose */
508         tegra_uarte_device.dev.platform_data = &cardhu_loopback_uart_pdata;
509
510         /* Register low speed only if it is selected */
511         if (!is_tegra_debug_uartport_hs())
512                 uart_debug_init();
513
514 #ifdef CONFIG_TEGRA_IRDA
515         if (((board_info.board_id == BOARD_E1186) ||
516                 (board_info.board_id == BOARD_E1198)) &&
517                         cardhu_irda_pdata.is_irda) {
518                 cardhu_irda_pdata.parent_clk_list = uart_parent_clk;
519                 cardhu_irda_pdata.parent_clk_count =
520                                         ARRAY_SIZE(uart_parent_clk);
521
522                 tegra_uartb_device.dev.platform_data = &cardhu_irda_pdata;
523         }
524 #endif
525
526         platform_add_devices(cardhu_uart_devices,
527                                 ARRAY_SIZE(cardhu_uart_devices));
528 }
529
530 static struct platform_device tegra_camera = {
531         .name = "tegra_camera",
532         .id = -1,
533 };
534
535 static struct platform_device *cardhu_spi_devices[] __initdata = {
536         &tegra_spi_device4,
537 };
538
539 /*-----------------------------------------------------*/
540 /* Force Cardhu Direct Touch:
541         Valid Choices:
542         0 : Do not force Direct Touch
543         2 : RM_PLATFORM_C210 : Cardhu 10" J-Touch Panel
544         4 : RM_PLATFORM_P005 ; Pluto 5" J-Touch Panel
545 */
546 #define CARDHU_DT_PLATFORM      0 /* RM_PLATFORM_C210 */
547
548 static struct platform_device *touch_spi_device[] __initdata = {
549         &tegra_spi_device1,
550 };
551
552 struct spi_clk_parent spi_parent_clk[] = {
553         [0] = {.name = "pll_p"},
554 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
555         [1] = {.name = "pll_m"},
556         [2] = {.name = "clk_m"},
557 #else
558         [1] = {.name = "clk_m"},
559 #endif
560 };
561
562 static struct tegra_spi_platform_data cardhu_spi_pdata = {
563         .is_dma_based           = true,
564         .max_dma_buffer         = (16 * 1024),
565         .is_clkon_always        = false,
566         .max_rate               = 100000000,
567 };
568
569 static void __init cardhu_spi_init(void)
570 {
571         int i;
572         struct clk *c;
573         struct board_info board_info, display_board_info;
574
575         tegra_get_board_info(&board_info);
576         tegra_get_display_board_info(&display_board_info);
577
578         for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
579                 c = tegra_get_clock_by_name(spi_parent_clk[i].name);
580                 if (IS_ERR_OR_NULL(c)) {
581                         pr_err("Not able to get the clock for %s\n",
582                                                 spi_parent_clk[i].name);
583                         continue;
584                 }
585                 spi_parent_clk[i].parent_clk = c;
586                 spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
587         }
588         cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
589         cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
590         tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
591         platform_add_devices(cardhu_spi_devices,
592                                 ARRAY_SIZE(cardhu_spi_devices));
593
594         if ((display_board_info.board_id == BOARD_DISPLAY_PM313)
595                                                 || CARDHU_DT_PLATFORM) {
596                 platform_add_devices(touch_spi_device,
597                                 ARRAY_SIZE(touch_spi_device));
598         }
599
600         if (board_info.board_id == BOARD_E1198) {
601                 tegra_spi_device2.dev.platform_data = &cardhu_spi_pdata;
602                 platform_device_register(&tegra_spi_device2);
603                 tegra_spi_slave_device1.dev.platform_data = &cardhu_spi_pdata;
604                 platform_device_register(&tegra_spi_slave_device1);
605         }
606 }
607
608 static void __init cardhu_dtv_init(void)
609 {
610         struct board_info board_info;
611
612         tegra_get_board_info(&board_info);
613
614         if (board_info.board_id == BOARD_E1186)
615                 platform_device_register(&tegra_dtv_device);
616 }
617
618 static struct resource tegra_rtc_resources[] = {
619         [0] = {
620                 .start = TEGRA_RTC_BASE,
621                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
622                 .flags = IORESOURCE_MEM,
623         },
624         [1] = {
625                 .start = INT_RTC,
626                 .end = INT_RTC,
627                 .flags = IORESOURCE_IRQ,
628         },
629 };
630
631 static struct platform_device tegra_rtc_device = {
632         .name = "tegra_rtc",
633         .id   = -1,
634         .resource = tegra_rtc_resources,
635         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
636 };
637
638 static struct tegra_asoc_platform_data cardhu_audio_wm8903_pdata = {
639         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
640         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
641         .gpio_hp_mute           = -1,
642         .gpio_int_mic_en        = -1,
643         .gpio_ext_mic_en        = -1,
644         .i2s_param[HIFI_CODEC]  = {
645                 .audio_port_id  = 0,
646                 .is_i2s_master  = 1,
647                 .i2s_mode       = TEGRA_DAIFMT_I2S,
648         },
649         .i2s_param[BASEBAND]    = {
650                 .audio_port_id  = -1,
651         },
652         .i2s_param[BT_SCO]      = {
653                 .audio_port_id  = 3,
654                 .is_i2s_master  = 1,
655                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
656         },
657 };
658
659 static struct tegra_asoc_platform_data cardhu_audio_max98095_pdata = {
660         .gpio_spkr_en           = -1,
661         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
662         .gpio_hp_mute           = -1,
663         .gpio_int_mic_en        = -1,
664         .gpio_ext_mic_en        = -1,
665         .i2s_param[HIFI_CODEC]  = {
666                 .audio_port_id  = 0,
667                 .is_i2s_master  = 1,
668                 .i2s_mode       = TEGRA_DAIFMT_I2S,
669         },
670         .i2s_param[BASEBAND]    = {
671                 .audio_port_id  = -1,
672         },
673         .i2s_param[BT_SCO]      = {
674                 .audio_port_id  = 3,
675                 .is_i2s_master  = 1,
676                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
677         },
678 };
679
680 static struct platform_device cardhu_audio_wm8903_device = {
681         .name   = "tegra-snd-wm8903",
682         .id     = 0,
683         .dev    = {
684                 .platform_data = &cardhu_audio_wm8903_pdata,
685         },
686 };
687
688 static struct platform_device cardhu_audio_max98095_device = {
689         .name   = "tegra-snd-max98095",
690         .id     = 0,
691         .dev    = {
692                 .platform_data = &cardhu_audio_max98095_pdata,
693         },
694 };
695
696 static struct tegra_asoc_platform_data cardhu_audio_aic326x_pdata = {
697         .gpio_spkr_en           = -1,
698         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
699         .gpio_hp_mute           = -1,
700         .gpio_int_mic_en        = -1,
701         .gpio_ext_mic_en        = -1,
702         /*defaults for Verbier-Cardhu board with TI AIC326X codec*/
703         .i2s_param[HIFI_CODEC]  = {
704                 .audio_port_id  = 0,
705                 .is_i2s_master  = 1,
706                 .i2s_mode       = TEGRA_DAIFMT_I2S,
707                 .sample_size    = 16,
708         },
709         .i2s_param[BT_SCO]      = {
710                 .sample_size    = 16,
711                 .audio_port_id  = 3,
712                 .is_i2s_master  = 1,
713                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
714         },
715 };
716
717 static struct platform_device cardhu_audio_aic326x_device = {
718         .name   = "tegra-snd-aic326x",
719         .id     = 0,
720         .dev    = {
721                 .platform_data  = &cardhu_audio_aic326x_pdata,
722         },
723 };
724
725 static struct platform_device *cardhu_devices[] __initdata = {
726         &tegra_pmu_device,
727         &tegra_rtc_device,
728         &tegra_udc_device,
729         &tegra_wdt0_device,
730         &tegra_wdt1_device,
731         &tegra_wdt2_device,
732 #if defined(CONFIG_TEGRA_AVP)
733         &tegra_avp_device,
734 #endif
735         &tegra_camera,
736 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
737         &tegra_se_device,
738 #endif
739         &tegra_ahub_device,
740         &tegra_dam_device0,
741         &tegra_dam_device1,
742         &tegra_dam_device2,
743         &tegra_i2s_device0,
744         &tegra_i2s_device1,
745         &tegra_i2s_device3,
746         &tegra_spdif_device,
747         &spdif_dit_device,
748         &bluetooth_dit_device,
749         &baseband_dit_device,
750         &cardhu_bt_rfkill_device,
751         &tegra_pcm_device,
752         &cardhu_audio_wm8903_device,
753         &cardhu_audio_max98095_device,
754         &cardhu_audio_aic326x_device,
755         &tegra_hda_device,
756         &tegra_cec_device,
757 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
758         &tegra_aes_device,
759 #endif
760 };
761
762 static u8 read_chg(void)
763 {
764         return gpio_get_value(TEGRA_GPIO_PH4);
765 }
766
767 #define MXT_CFG_NAME            "Android_Cardhu_2012-01-31.cfg"
768
769 static struct mxt_platform_data atmel_mxt_info = {
770         .irqflags       = IRQF_TRIGGER_FALLING,
771         .read_chg       = &read_chg,
772         .mxt_cfg_name   = MXT_CFG_NAME,
773 };
774
775 static struct i2c_board_info __initdata atmel_i2c_info[] = {
776         {
777                 I2C_BOARD_INFO("atmel_mxt_ts", MXT1386_I2C_ADDR3),
778                 .flags = I2C_CLIENT_WAKE,
779                 .platform_data = &atmel_mxt_info,
780         }
781 };
782
783 static struct i2c_board_info __initdata e1506_atmel_i2c_info[] = {
784         {
785                 I2C_BOARD_INFO("atmel_mxt_ts", MXT224_I2C_ADDR1),
786                 .flags = I2C_CLIENT_WAKE,
787                 .platform_data = &atmel_mxt_info,
788         }
789 };
790
791 /* Raydium touchscreen                     Driver data */
792 static __initdata struct tegra_clk_init_table spi_clk_init_table[] = {
793         /* name         parent          rate            enabled */
794         { "sbc1",       "pll_p",        52000000,       true},
795         { NULL,         NULL,           0,              0},
796 };
797
798 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
799         /* name         parent          rate            enabled */
800         { "extern3",    "pll_p",        41000000,       true},
801         { "clk_out_3",  "extern3",      40800000,       true},
802         { NULL,         NULL,           0,              0},
803 };
804
805 struct rm_spi_ts_platform_data rm31080ts_cardhu_data = {
806         .gpio_reset = 0,
807         .config = 0,
808 };
809
810 struct spi_board_info rm31080a_cardhu_spi_board[1] = {
811         {
812          .modalias = "rm_ts_spidev",
813          .bus_num = 0,
814          .chip_select = 0,
815          .max_speed_hz = 13 * 1000 * 1000,
816          .mode = SPI_MODE_0,
817          .platform_data = &rm31080ts_cardhu_data,
818          },
819 };
820
821 static int __init cardhu_touch_init(void)
822 {
823         struct board_info BoardInfo, DisplayBoardInfo;
824         int ret;
825
826         tegra_get_board_info(&BoardInfo);
827         tegra_get_display_board_info(&DisplayBoardInfo);
828         if ((DisplayBoardInfo.board_id == BOARD_DISPLAY_PM313)
829                                                 || CARDHU_DT_PLATFORM) {
830                 tegra_clk_init_from_table(spi_clk_init_table);
831                 tegra_clk_init_from_table(touch_clk_init_table);
832                 clk_enable(tegra_get_clock_by_name("clk_out_3"));
833                 rm31080ts_cardhu_data.platform_id = CARDHU_DT_PLATFORM;
834                 rm31080a_cardhu_spi_board[0].irq = gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
835                 touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
836                                         TOUCH_GPIO_RST_RAYDIUM_SPI,
837                                         &rm31080ts_cardhu_data,
838                                         &rm31080a_cardhu_spi_board[0],
839                                         ARRAY_SIZE(rm31080a_cardhu_spi_board));
840         } else {
841                 ret = gpio_request(TEGRA_GPIO_PH4, "atmel-irq");
842                 if (ret < 0) {
843                         pr_err("%s() Error in gpio_request() for gpio %d\n",
844                                         __func__, ret);
845                 }
846                 ret = gpio_direction_input(TEGRA_GPIO_PH4);
847                 if (ret < 0) {
848                         pr_err("%s() Error in setting gpio %d to in/out\n",
849                                          __func__, ret);
850                         gpio_free(TEGRA_GPIO_PH4);
851                 }
852                 ret = gpio_request(TEGRA_GPIO_PH6, "atmel-reset");
853                 if (ret < 0) {
854                         pr_err("%s() Error in gpio_request() for gpio %d\n",
855                                         __func__, ret);
856                 }
857                 ret = gpio_direction_output(TEGRA_GPIO_PH6, 0);
858                 if (ret < 0) {
859                         pr_err("%s() Error in setting gpio %d to in/out\n",
860                                          __func__, ret);
861                         gpio_free(TEGRA_GPIO_PH6);
862                 }
863                 msleep(1);
864                 gpio_set_value(TEGRA_GPIO_PH6, 1);
865                 msleep(100);
866
867                 tegra_get_board_info(&BoardInfo);
868                 if ((BoardInfo.sku & SKU_TOUCH_MASK) == SKU_TOUCH_2000)
869                         strncpy(atmel_mxt_info.mxt_cfg_name,
870                                 "Android_Cardhu_SKU2000_2012-01-31.cfg",
871                                 CFG_NAME_SIZE);
872
873                 if (DisplayBoardInfo.board_id == BOARD_DISPLAY_E1506) {
874                         strncpy(atmel_mxt_info.mxt_cfg_name,
875                         "Android_Cardhu_Verbier_E1506_2012-06-06.cfg",
876                         CFG_NAME_SIZE);
877                         e1506_atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH4);
878                         i2c_register_board_info(1, e1506_atmel_i2c_info, 1);
879                 } else {
880                         atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH4);
881                         i2c_register_board_info(1, atmel_i2c_info, 1);
882                 }
883         }
884
885         return 0;
886 }
887
888 #if defined(CONFIG_USB_SUPPORT)
889
890 static void cardu_usb_hsic_postsupend(void)
891 {
892 #ifdef CONFIG_TEGRA_BB_XMM_POWER
893         baseband_xmm_set_power_status(BBXMM_PS_L2);
894 #endif
895 }
896
897 static void cardu_usb_hsic_preresume(void)
898 {
899 #ifdef CONFIG_TEGRA_BB_XMM_POWER
900         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
901 #endif
902 }
903
904 static void cardu_usb_hsic_phy_ready(void)
905 {
906 #ifdef CONFIG_TEGRA_BB_XMM_POWER
907         baseband_xmm_set_power_status(BBXMM_PS_L0);
908 #endif
909 }
910
911 static void cardu_usb_hsic_phy_off(void)
912 {
913 #ifdef CONFIG_TEGRA_BB_XMM_POWER
914         baseband_xmm_set_power_status(BBXMM_PS_L3);
915 #endif
916 }
917
918 static struct tegra_usb_phy_platform_ops hsic_xmm_plat_ops = {
919         .post_suspend = cardu_usb_hsic_postsupend,
920         .pre_resume = cardu_usb_hsic_preresume,
921         .port_power = cardu_usb_hsic_phy_ready,
922         .post_phy_off = cardu_usb_hsic_phy_off,
923 };
924
925 static struct tegra_usb_platform_data tegra_ehci2_hsic_xmm_pdata = {
926         .port_otg = false,
927         .has_hostpc = true,
928         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
929         .op_mode        = TEGRA_USB_OPMODE_HOST,
930         .u_data.host = {
931                 .vbus_gpio = -1,
932                 .hot_plug = false,
933                 .remote_wakeup_supported = false,
934                 .power_off_on_suspend = false,
935         },
936         .ops = &hsic_xmm_plat_ops,
937 };
938 #endif
939
940 static int hsic_enable_gpio = -1;
941 static int hsic_reset_gpio = -1;
942
943 void hsic_platform_open(void)
944 {
945         int reset_gpio = -1, enable_gpio = -1;
946
947         if (hsic_enable_gpio != -1)
948                 enable_gpio = gpio_request(hsic_enable_gpio, "uhsic_enable");
949         if (hsic_reset_gpio != -1)
950                 reset_gpio = gpio_request(hsic_reset_gpio, "uhsic_reset");
951         /* hsic enable signal deasserted, hsic reset asserted */
952         if (!enable_gpio)
953                 gpio_direction_output(hsic_enable_gpio, 0 /* deasserted */);
954         if (!reset_gpio)
955                 gpio_direction_output(hsic_reset_gpio, 0 /* asserted */);
956         /* keep hsic reset asserted for 1 ms */
957         udelay(1000);
958         /* enable (power on) hsic */
959         if (!enable_gpio)
960                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
961         udelay(1000);
962         /* deassert reset */
963         if (!reset_gpio)
964                 gpio_set_value_cansleep(hsic_reset_gpio, 1);
965
966 }
967
968 void hsic_platform_close(void)
969 {
970         if (hsic_enable_gpio != -1) {
971                 gpio_set_value(hsic_enable_gpio, 0);
972                 gpio_free(hsic_enable_gpio);
973         }
974         if (hsic_reset_gpio != -1) {
975                 gpio_set_value(hsic_reset_gpio, 0);
976                 gpio_free(hsic_reset_gpio);
977         }
978 }
979
980 void hsic_power_on(void)
981 {
982         if (hsic_enable_gpio != -1) {
983                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
984                 udelay(1000);
985         }
986 }
987
988 void hsic_power_off(void)
989 {
990         if (hsic_enable_gpio != -1) {
991                 gpio_set_value_cansleep(hsic_enable_gpio, 0);
992                 udelay(1000);
993         }
994 }
995
996 #if defined(CONFIG_USB_SUPPORT)
997 static struct tegra_usb_phy_platform_ops hsic_plat_ops = {
998         .open = hsic_platform_open,
999         .close = hsic_platform_close,
1000         .pre_phy_on = hsic_power_on,
1001         .post_phy_off = hsic_power_off,
1002 };
1003
1004 static struct tegra_usb_platform_data tegra_ehci2_hsic_pdata = {
1005         .port_otg = false,
1006         .has_hostpc = true,
1007         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
1008         .op_mode        = TEGRA_USB_OPMODE_HOST,
1009         .u_data.host = {
1010                 .vbus_gpio = -1,
1011                 .hot_plug = false,
1012                 .remote_wakeup_supported = false,
1013                 .power_off_on_suspend = false,
1014         },
1015         .ops = &hsic_plat_ops,
1016 };
1017
1018 static struct tegra_usb_platform_data tegra_udc_pdata = {
1019         .port_otg = true,
1020         .has_hostpc = true,
1021         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1022         .op_mode = TEGRA_USB_OPMODE_DEVICE,
1023         .u_data.dev = {
1024                 .vbus_pmu_irq = 0,
1025                 .vbus_gpio = -1,
1026                 .charging_supported = false,
1027                 .remote_wakeup_supported = false,
1028         },
1029         .u_cfg.utmi = {
1030                 .hssync_start_delay = 0,
1031                 .elastic_limit = 16,
1032                 .idle_wait_delay = 17,
1033                 .term_range_adj = 6,
1034                 .xcvr_setup = 8,
1035                 .xcvr_lsfslew = 2,
1036                 .xcvr_lsrslew = 2,
1037                 .xcvr_setup_offset = 0,
1038                 .xcvr_use_fuses = 1,
1039         },
1040 };
1041
1042 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
1043         .port_otg = false,
1044         .has_hostpc = true,
1045         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1046         .op_mode        = TEGRA_USB_OPMODE_HOST,
1047         .u_data.host = {
1048                 .vbus_gpio = -1,
1049                 .hot_plug = false,
1050                 .remote_wakeup_supported = true,
1051                 .power_off_on_suspend = true,
1052         },
1053         .u_cfg.utmi = {
1054                 .hssync_start_delay = 0,
1055                 .elastic_limit = 16,
1056                 .idle_wait_delay = 17,
1057                 .term_range_adj = 6,
1058                 .xcvr_setup = 15,
1059                 .xcvr_lsfslew = 2,
1060                 .xcvr_lsrslew = 2,
1061                 .xcvr_setup_offset = 0,
1062                 .xcvr_use_fuses = 1,
1063         },
1064 };
1065
1066 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
1067         .port_otg = false,
1068         .has_hostpc = true,
1069         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1070         .op_mode = TEGRA_USB_OPMODE_HOST,
1071         .u_data.host = {
1072                 .vbus_gpio = -1,
1073                 .hot_plug = true,
1074                 .remote_wakeup_supported = true,
1075                 .power_off_on_suspend = true,
1076         },
1077         .u_cfg.utmi = {
1078                 .hssync_start_delay = 0,
1079                 .elastic_limit = 16,
1080                 .idle_wait_delay = 17,
1081                 .term_range_adj = 6,
1082                 .xcvr_setup = 8,
1083                 .xcvr_lsfslew = 2,
1084                 .xcvr_lsrslew = 2,
1085                 .xcvr_setup_offset = 0,
1086                 .xcvr_use_fuses = 1,
1087         },
1088 };
1089
1090 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
1091         .port_otg = true,
1092         .has_hostpc = true,
1093         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1094         .op_mode = TEGRA_USB_OPMODE_HOST,
1095         .u_data.host = {
1096                 .vbus_gpio = -1,
1097                 .hot_plug = true,
1098                 .remote_wakeup_supported = true,
1099                 .power_off_on_suspend = true,
1100         },
1101         .u_cfg.utmi = {
1102                 .hssync_start_delay = 0,
1103                 .elastic_limit = 16,
1104                 .idle_wait_delay = 17,
1105                 .term_range_adj = 6,
1106                 .xcvr_setup = 15,
1107                 .xcvr_lsfslew = 2,
1108                 .xcvr_lsrslew = 2,
1109                 .xcvr_setup_offset = 0,
1110                 .xcvr_use_fuses = 1,
1111         },
1112 };
1113
1114 static struct tegra_usb_otg_data tegra_otg_pdata = {
1115         .ehci_device = &tegra_ehci1_device,
1116         .ehci_pdata = &tegra_ehci1_utmi_pdata,
1117 };
1118 #endif
1119
1120 #if defined(CONFIG_USB_SUPPORT)
1121 static void cardhu_usb_init(void)
1122 {
1123         struct board_info bi;
1124
1125         tegra_get_board_info(&bi);
1126
1127         /* OTG should be the first to be registered */
1128         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1129         platform_device_register(&tegra_otg_device);
1130
1131         /* setup the udc platform data */
1132         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1133
1134         if (bi.board_id == BOARD_PM267) {
1135                 hsic_enable_gpio = EN_HSIC_GPIO;
1136                 hsic_reset_gpio = PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
1137                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1138                 platform_device_register(&tegra_ehci2_device);
1139         } else if (bi.board_id == BOARD_E1256) {
1140                 hsic_enable_gpio = EN_HSIC_GPIO;
1141                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1142                 platform_device_register(&tegra_ehci2_device);
1143         } else if (bi.board_id == BOARD_E1186) {
1144                 tegra_ehci2_device.dev.platform_data =
1145                                                 &tegra_ehci2_hsic_xmm_pdata;
1146                 /* ehci2 registration happens in baseband-xmm-power  */
1147         } else {
1148                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_utmi_pdata;
1149                 platform_device_register(&tegra_ehci2_device);
1150         }
1151
1152         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
1153         platform_device_register(&tegra_ehci3_device);
1154
1155 }
1156 #else
1157 static void cardhu_usb_init(void) { }
1158 #endif
1159
1160 static struct baseband_power_platform_data tegra_baseband_power_data = {
1161         .baseband_type = BASEBAND_XMM,
1162         .modem = {
1163         .xmm = {
1164                         .bb_rst = XMM_GPIO_BB_RST,
1165                         .bb_on = XMM_GPIO_BB_ON,
1166                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1167                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1168                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1169                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1170                         .hsic_device = &tegra_ehci2_device,
1171                 },
1172         },
1173 };
1174
1175 static struct platform_device tegra_baseband_power_device = {
1176         .name = "baseband_xmm_power",
1177         .id = -1,
1178         .dev = {
1179                 .platform_data = &tegra_baseband_power_data,
1180         },
1181 };
1182
1183 static struct platform_device tegra_baseband_power2_device = {
1184         .name = "baseband_xmm_power2",
1185         .id = -1,
1186         .dev = {
1187                 .platform_data = &tegra_baseband_power_data,
1188         },
1189 };
1190
1191
1192 static struct tegra_pci_platform_data cardhu_pci_platform_data = {
1193         .port_status[0] = 1,
1194         .port_status[1] = 1,
1195         .port_status[2] = 1,
1196         .use_dock_detect        = 0,
1197         .gpio           = 0,
1198 };
1199
1200 static void cardhu_pci_init(void)
1201 {
1202         struct board_info board_info;
1203
1204         tegra_get_board_info(&board_info);
1205         if (board_info.board_id == BOARD_E1291) {
1206                 cardhu_pci_platform_data.port_status[0] = 0;
1207                 cardhu_pci_platform_data.port_status[1] = 0;
1208                 cardhu_pci_platform_data.port_status[2] = 1;
1209                 cardhu_pci_platform_data.use_dock_detect = 1;
1210                 cardhu_pci_platform_data.gpio = DOCK_DETECT_GPIO;
1211         }
1212         if ((board_info.board_id == BOARD_E1186) ||
1213                 (board_info.board_id == BOARD_E1187) ||
1214                 (board_info.board_id == BOARD_E1291)) {
1215                 tegra_pci_device.dev.platform_data = &cardhu_pci_platform_data;
1216                 platform_device_register(&tegra_pci_device);
1217         }
1218 }
1219
1220 static void cardhu_modem_init(void)
1221 {
1222         struct board_info board_info;
1223         int w_disable_gpio, ret;
1224
1225         tegra_get_board_info(&board_info);
1226         switch (board_info.board_id) {
1227         case BOARD_E1291:
1228         case BOARD_E1198:
1229                 if (((board_info.board_id == BOARD_E1291) &&
1230                                 (board_info.fab < BOARD_FAB_A03)) ||
1231                         ((board_info.board_id == BOARD_E1198) &&
1232                                         (board_info.fab < BOARD_FAB_A02))) {
1233                         w_disable_gpio = TEGRA_GPIO_PH5;
1234                 } else {
1235                         w_disable_gpio = TEGRA_GPIO_PDD5;
1236                 }
1237
1238                 ret = gpio_request(w_disable_gpio, "w_disable_gpio");
1239                 if (ret < 0)
1240                         pr_err("%s: gpio_request failed for gpio %d\n",
1241                                 __func__, w_disable_gpio);
1242                 else
1243                         gpio_direction_input(w_disable_gpio);
1244
1245                 /* E1291-A04 & E1198:A02: Set PERST signal to high */
1246                 if (((board_info.board_id == BOARD_E1291) &&
1247                                 (board_info.fab >= BOARD_FAB_A04)) ||
1248                         ((board_info.board_id == BOARD_E1198) &&
1249                                         (board_info.fab >= BOARD_FAB_A02))) {
1250                         ret = gpio_request(TEGRA_GPIO_PH7, "modem_perst");
1251                         if (ret < 0) {
1252                                 pr_err("%s(): Error in allocating gpio "
1253                                         "TEGRA_GPIO_PH7\n", __func__);
1254                                 break;
1255                         }
1256                         gpio_direction_output(TEGRA_GPIO_PH7, 1);
1257                 }
1258                 break;
1259         case BOARD_E1186:
1260                 platform_device_register(&tegra_baseband_power_device);
1261                 platform_device_register(&tegra_baseband_power2_device);
1262                 break;
1263         default:
1264                 break;
1265         }
1266
1267 }
1268
1269 #ifdef CONFIG_SATA_AHCI_TEGRA
1270 static void cardhu_sata_init(void)
1271 {
1272         platform_device_register(&tegra_sata_device);
1273 }
1274 #else
1275 static void cardhu_sata_init(void) { }
1276 #endif
1277
1278 /* This needs to be inialized later hand */
1279 static int __init cardhu_throttle_list_init(void)
1280 {
1281         int i;
1282         for (i = 0; i < ARRAY_SIZE(throttle_list); i++)
1283                 if (balanced_throttle_register(&throttle_list[i]))
1284                         return -ENODEV;
1285
1286         return 0;
1287 }
1288 late_initcall(cardhu_throttle_list_init);
1289
1290 static void __init tegra_cardhu_init(void)
1291 {
1292         tegra_thermal_init(thermal_binds);
1293         tegra_clk_init_from_table(cardhu_clk_init_table);
1294         tegra_enable_pinmux();
1295         tegra_smmu_init();
1296         tegra_soc_device_init("cardhu");
1297         cardhu_pinmux_init();
1298         cardhu_gpio_init();
1299         cardhu_i2c_init();
1300         cardhu_spi_init();
1301         cardhu_usb_init();
1302 #ifdef CONFIG_TEGRA_EDP_LIMITS
1303         cardhu_edp_init();
1304 #endif
1305         cardhu_uart_init();
1306         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
1307         tegra_ram_console_debug_init();
1308         tegra_io_dpd_init();
1309         cardhu_sdhci_init();
1310         cardhu_regulator_init();
1311         cardhu_dtv_init();
1312         cardhu_suspend_init();
1313         cardhu_touch_init();
1314         cardhu_modem_init();
1315         cardhu_kbc_init();
1316         cardhu_scroll_init();
1317         cardhu_keys_init();
1318         cardhu_panel_init();
1319         cardhu_pmon_init();
1320         cardhu_sensors_init();
1321         cardhu_setup_bluesleep();
1322         cardhu_sata_init();
1323         cardhu_pins_state_init();
1324         cardhu_emc_init();
1325         tegra_release_bootloader_fb();
1326         cardhu_pci_init();
1327 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1328         tegra_wdt_recovery_init();
1329 #endif
1330         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1331         tegra_vibrator_init();
1332 }
1333
1334 static void __init tegra_cardhu_dt_init(void)
1335 {
1336         tegra_cardhu_init();
1337
1338         of_platform_populate(NULL,
1339                 of_default_bus_match_table, NULL, NULL);
1340 }
1341
1342 static void __init tegra_cardhu_reserve(void)
1343 {
1344 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1345         /* support 1920X1200 with 24bpp */
1346         tegra_reserve(0, SZ_8M + SZ_1M, SZ_16M);
1347 #else
1348         tegra_reserve(SZ_128M, SZ_8M, SZ_16M);
1349 #endif
1350 }
1351
1352 static const char *cardhu_dt_board_compat[] = {
1353         "nvidia,cardhu",
1354         NULL
1355 };
1356
1357 MACHINE_START(CARDHU, "cardhu")
1358         .atag_offset    = 0x100,
1359         .soc            = &tegra_soc_desc,
1360         .map_io         = tegra_map_common_io,
1361         .reserve        = tegra_cardhu_reserve,
1362         .init_early     = tegra30_init_early,
1363         .init_irq       = tegra_init_irq,
1364         .handle_irq     = gic_handle_irq,
1365         .timer          = &tegra_timer,
1366         .init_machine   = tegra_cardhu_dt_init,
1367         .restart        = tegra_assert_system_reset,
1368         .dt_compat      = cardhu_dt_board_compat,
1369 MACHINE_END