arm: tegra: cardhu: Supporting power off
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <linux/spi/spi.h>
37 #include <mach/clk.h>
38 #include <mach/iomap.h>
39 #include <mach/irqs.h>
40 #include <mach/pinmux.h>
41 #include <mach/iomap.h>
42 #include <mach/io.h>
43 #include <mach/i2s.h>
44 #include <mach/audio.h>
45 #include <asm/mach-types.h>
46 #include <asm/mach/arch.h>
47 #include <mach/usb_phy.h>
48
49 #include "board.h"
50 #include "clock.h"
51 #include "board-cardhu.h"
52 #include "devices.h"
53 #include "gpio-names.h"
54 #include "fuse.h"
55
56
57 static struct plat_serial8250_port debug_uart_platform_data[] = {
58         {
59                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
60                 .mapbase        = TEGRA_UARTA_BASE,
61                 .irq            = INT_UARTA,
62                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
63                 .type           = PORT_TEGRA,
64                 .iotype         = UPIO_MEM,
65                 .regshift       = 2,
66                 .uartclk        = 216000000,
67         }, {
68                 .flags          = 0,
69         }
70 };
71
72 static struct platform_device debug_uart = {
73         .name = "serial8250",
74         .id = PLAT8250_DEV_PLATFORM,
75         .dev = {
76                 .platform_data = debug_uart_platform_data,
77         },
78 };
79
80 /* !!!TODO: Change for cardhu (Taken from Ventana) */
81 static struct tegra_utmip_config utmi_phy_config[] = {
82         [0] = {
83                         .hssync_start_delay = 0,
84                         .idle_wait_delay = 17,
85                         .elastic_limit = 16,
86                         .term_range_adj = 6,
87                         .xcvr_setup = 15,
88                         .xcvr_lsfslew = 2,
89                         .xcvr_lsrslew = 2,
90         },
91         [1] = {
92                         .hssync_start_delay = 0,
93                         .idle_wait_delay = 17,
94                         .elastic_limit = 16,
95                         .term_range_adj = 6,
96                         .xcvr_setup = 15,
97                         .xcvr_lsfslew = 2,
98                         .xcvr_lsrslew = 2,
99         },
100         [2] = {
101                         .hssync_start_delay = 0,
102                         .idle_wait_delay = 17,
103                         .elastic_limit = 16,
104                         .term_range_adj = 6,
105                         .xcvr_setup = 8,
106                         .xcvr_lsfslew = 2,
107                         .xcvr_lsrslew = 2,
108         },
109 };
110
111 #ifdef CONFIG_BCM4329_RFKILL
112 static struct resource cardhu_bcm4329_rfkill_resources[] = {
113         {
114                 .name   = "bcm4329_nshutdown_gpio",
115                 .start  = TEGRA_GPIO_PU0,
116                 .end    = TEGRA_GPIO_PU0,
117                 .flags  = IORESOURCE_IO,
118         },
119 };
120
121 static struct platform_device cardhu_bcm4329_rfkill_device = {
122         .name = "bcm4329_rfkill",
123         .id             = -1,
124         .num_resources  = ARRAY_SIZE(cardhu_bcm4329_rfkill_resources),
125         .resource       = cardhu_bcm4329_rfkill_resources,
126 };
127
128 static noinline void __init cardhu_bt_rfkill(void)
129 {
130         platform_device_register(&cardhu_bcm4329_rfkill_device);
131
132         return;
133 }
134 #else
135 static inline void cardhu_bt_rfkill(void) { }
136 #endif
137
138 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
139         /* name         parent          rate            enabled */
140         { "uarta",      "pll_p",        216000000,      true},
141         { "uartb",      "pll_p",        216000000,      false},
142         { "uartc",      "pll_p",        216000000,      false},
143         { "uartd",      "pll_p",        216000000,      false},
144         { "uarte",      "pll_p",        216000000,      false},
145         { "pll_m",      NULL,           0,              true},
146         { "hda",        "pll_p",        108000000,      false},
147         { "hda2codec_2x","pll_p",       48000000,       false},
148         { "pll_p_out4", "pll_p",        24000000,       true },
149         { "pwm",        "clk_32k",      32768,          false},
150         { "blink",      "clk_32k",      32768,          true},
151         { "pll_a",      NULL,           56448000,       true},
152         { "pll_a_out0", NULL,           11289600,       true},
153         { "i2s1",       "pll_a_out0",   11289600,       true},
154         { "i2s2",       "pll_a_out0",   11289600,       true},
155         { "audio",      "pll_a_out0",   11289600,       true},
156         { "audio_2x",   "audio",        22579200,       true},
157         { NULL,         NULL,           0,              0},
158 };
159
160 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
161         .adapter_nr     = 0,
162         .bus_count      = 1,
163         .bus_clk_rate   = { 100000, 0 },
164 };
165
166 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
167         .adapter_nr     = 1,
168         .bus_count      = 1,
169         .bus_clk_rate   = { 100000, 0 },
170         .is_clkon_always = true,
171 };
172
173 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
174         .adapter_nr     = 2,
175         .bus_count      = 1,
176         .bus_clk_rate   = { 100000, 0 },
177 };
178
179 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
180         .adapter_nr     = 3,
181         .bus_count      = 1,
182         .bus_clk_rate   = { 100000, 0 },
183 };
184
185 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
186         .adapter_nr     = 4,
187         .bus_count      = 1,
188         .bus_clk_rate   = { 100000, 0 },
189 };
190
191
192 struct tegra_wired_jack_conf audio_wr_jack_conf = {
193         .hp_det_n = TEGRA_GPIO_PW2,
194         .en_mic_ext = TEGRA_GPIO_PX1,
195         .en_mic_int = TEGRA_GPIO_PX0,
196 };
197
198 static void cardhu_i2c_init(void)
199 {
200         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
201         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
202         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
203         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
204         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
205
206         platform_device_register(&tegra_i2c_device5);
207         platform_device_register(&tegra_i2c_device4);
208         platform_device_register(&tegra_i2c_device3);
209         platform_device_register(&tegra_i2c_device2);
210         platform_device_register(&tegra_i2c_device1);
211 }
212
213 static struct resource tegra_rtc_resources[] = {
214         [0] = {
215                 .start = TEGRA_RTC_BASE,
216                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
217                 .flags = IORESOURCE_MEM,
218         },
219         [1] = {
220                 .start = INT_RTC,
221                 .end = INT_RTC,
222                 .flags = IORESOURCE_IRQ,
223         },
224 };
225
226 static struct platform_device tegra_rtc_device = {
227         .name = "tegra_rtc",
228         .id   = -1,
229         .resource = tegra_rtc_resources,
230         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
231 };
232
233 static struct platform_device tegra_camera = {
234         .name = "tegra_camera",
235         .id = -1,
236 };
237
238 static struct platform_device *cardhu_devices[] __initdata = {
239         &debug_uart,
240         &tegra_uartb_device,
241         &tegra_uartc_device,
242         &tegra_uartd_device,
243         &tegra_uarte_device,
244         &pmu_device,
245         &tegra_rtc_device,
246         &tegra_udc_device,
247 #if defined(CONFIG_SND_HDA_TEGRA)
248         &tegra_hda_device,
249 #endif
250 #if defined(CONFIG_TEGRA_IOVMM_SMMU)
251         &tegra_smmu_device,
252 #endif
253         &tegra_wdt_device,
254         &tegra_avp_device,
255         &tegra_camera,
256         &tegra_spi_device4,
257 };
258
259 static int __init cardhu_touch_init(void)
260 {
261         return 0;
262 }
263
264
265 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
266         [0] = {
267                         .phy_config = &utmi_phy_config[0],
268                         .operating_mode = TEGRA_USB_HOST,
269                         .power_down_on_bus_suspend = 1,
270                         .usb_phy_type = TEGRA_USB_PHY_TYPE_UTMIP,
271         },
272         [1] = {
273                         .phy_config = &utmi_phy_config[1],
274                         .operating_mode = TEGRA_USB_HOST,
275                         .power_down_on_bus_suspend = 1,
276                         .usb_phy_type = TEGRA_USB_PHY_TYPE_UTMIP,
277         },
278         [2] = {
279                         .phy_config = &utmi_phy_config[2],
280                         .operating_mode = TEGRA_USB_HOST,
281                         .power_down_on_bus_suspend = 1,
282                         .usb_phy_type = TEGRA_USB_PHY_TYPE_UTMIP,
283         },
284 };
285
286 struct platform_device *tegra_usb_otg_host_register(void)
287 {
288         struct platform_device *pdev;
289         void *platform_data;
290         int val;
291
292         pdev = platform_device_alloc(tegra_ehci1_device.name,
293                 tegra_ehci1_device.id);
294         if (!pdev)
295                 return NULL;
296
297         val = platform_device_add_resources(pdev, tegra_ehci1_device.resource,
298                 tegra_ehci1_device.num_resources);
299         if (val)
300                 goto error;
301
302         pdev->dev.dma_mask =  tegra_ehci1_device.dev.dma_mask;
303         pdev->dev.coherent_dma_mask = tegra_ehci1_device.dev.coherent_dma_mask;
304
305         platform_data = kmalloc(sizeof(struct tegra_ehci_platform_data),
306                 GFP_KERNEL);
307         if (!platform_data)
308                 goto error;
309
310         memcpy(platform_data, &tegra_ehci_pdata[0],
311                                 sizeof(struct tegra_ehci_platform_data));
312         pdev->dev.platform_data = platform_data;
313
314         val = platform_device_add(pdev);
315         if (val)
316                 goto error_add;
317
318         return pdev;
319
320 error_add:
321         kfree(platform_data);
322 error:
323         pr_err("%s: failed to add the host contoller device\n", __func__);
324         platform_device_put(pdev);
325         return NULL;
326 }
327
328 void tegra_usb_otg_host_unregister(struct platform_device *pdev)
329 {
330         platform_device_unregister(pdev);
331 }
332
333 static struct tegra_otg_platform_data tegra_otg_pdata = {
334         .host_register = &tegra_usb_otg_host_register,
335         .host_unregister = &tegra_usb_otg_host_unregister,
336 };
337
338 static void cardhu_usb_init(void)
339 {
340         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
341         platform_device_register(&tegra_otg_device);
342
343         tegra_ehci2_device.dev.platform_data = &tegra_ehci_pdata[1];
344         platform_device_register(&tegra_ehci2_device);
345
346         tegra_ehci3_device.dev.platform_data = &tegra_ehci_pdata[2];
347         platform_device_register(&tegra_ehci3_device);
348 }
349
350 static void cardhu_gps_init(void)
351 {
352         tegra_gpio_enable(TEGRA_GPIO_PU2);
353         tegra_gpio_enable(TEGRA_GPIO_PU3);
354 }
355
356 static void cardhu_modem_init(void)
357 {
358         tegra_gpio_enable(TEGRA_GPIO_PH5);
359 }
360
361 #ifdef CONFIG_SATA_AHCI_TEGRA
362 static void cardhu_sata_init(void)
363 {
364         platform_device_register(&tegra_sata_device);
365 }
366 #else
367 static void cardhu_sata_init(void) { }
368 #endif
369
370 static void __init tegra_cardhu_init(void)
371 {
372         tegra_common_init();
373         tegra_clk_init_from_table(cardhu_clk_init_table);
374         cardhu_pinmux_init();
375         cardhu_i2c_init();
376         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
377         cardhu_sdhci_init();
378         cardhu_regulator_init();
379         cardhu_gpio_switch_regulator_init();
380         cardhu_suspend_init();
381         cardhu_power_off_init();
382         cardhu_touch_init();
383         cardhu_usb_init();
384         cardhu_gps_init();
385         cardhu_modem_init();
386         cardhu_kbc_init();
387         cardhu_scroll_init();
388         cardhu_keys_init();
389         cardhu_panel_init();
390         cardhu_sensors_init();
391         cardhu_bt_rfkill();
392         cardhu_sata_init();
393         audio_wired_jack_init();
394         cardhu_pins_state_init();
395         cardhu_emc_init();
396 }
397
398 static void __init tegra_cardhu_reserve(void)
399 {
400         tegra_reserve(SZ_128M, SZ_4M, SZ_8M);
401 }
402
403 MACHINE_START(CARDHU, "cardhu")
404         .boot_params    = 0x80000100,
405         .phys_io        = IO_APB_PHYS,
406         .io_pg_offst    = ((IO_APB_VIRT) >> 18) & 0xfffc,
407         .init_irq       = tegra_init_irq,
408         .init_machine   = tegra_cardhu_init,
409         .map_io         = tegra_map_common_io,
410         .reserve        = tegra_cardhu_reserve,
411         .timer          = &tegra_timer,
412 MACHINE_END