arm: tegra: board-files: remove usage of TEGRA_GPIO_TO_IRQ
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <linux/spi/spi.h>
37 #include <linux/i2c/atmel_mxt_ts.h>
38 #include <linux/tegra_uart.h>
39 #include <linux/memblock.h>
40 #include <linux/spi-tegra.h>
41 #include <linux/nfc/pn544.h>
42
43 #include <sound/wm8903.h>
44 #include <sound/max98095.h>
45 #include <media/tegra_dtv.h>
46
47 #include <asm/hardware/gic.h>
48
49 #include <mach/clk.h>
50 #include <mach/iomap.h>
51 #include <mach/irqs.h>
52 #include <mach/pinmux.h>
53 #include <mach/iomap.h>
54 #include <mach/io.h>
55 #include <mach/i2s.h>
56 #include <mach/tegra_asoc_pdata.h>
57 #include <mach/tegra_wm8903_pdata.h>
58 #include <asm/mach-types.h>
59 #include <asm/mach/arch.h>
60 #include <mach/usb_phy.h>
61 #include <mach/thermal.h>
62 #include <mach/pci.h>
63 #include <mach/gpio-tegra.h>
64
65 #include "board.h"
66 #include "clock.h"
67 #include "board-cardhu.h"
68 #include "board-touch.h"
69 #include "devices.h"
70 #include "gpio-names.h"
71 #include "fuse.h"
72 #include "pm.h"
73 #include "baseband-xmm-power.h"
74 #include "wdt-recovery.h"
75
76 /* All units are in millicelsius */
77 static struct tegra_thermal_data thermal_data = {
78         .temp_shutdown = 90000,
79         .temp_offset = TDIODE_OFFSET, /* temps based on tdiode */
80 #ifdef CONFIG_TEGRA_EDP_LIMITS
81         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
82         .hysteresis_edp = 3000,
83 #endif
84 #ifdef CONFIG_TEGRA_THERMAL_THROTTLE
85         .temp_throttle = 85000,
86         .tc1 = 0,
87         .tc2 = 1,
88         .passive_delay = 2000,
89 #endif
90 };
91
92 /* !!!TODO: Change for cardhu (Taken from Ventana) */
93 static struct tegra_utmip_config utmi_phy_config[] = {
94         [0] = {
95                         .hssync_start_delay = 0,
96                         .idle_wait_delay = 17,
97                         .elastic_limit = 16,
98                         .term_range_adj = 6,
99                         .xcvr_setup = 15,
100                         .xcvr_setup_offset = 0,
101                         .xcvr_use_fuses = 1,
102                         .xcvr_lsfslew = 2,
103                         .xcvr_lsrslew = 2,
104         },
105         [1] = {
106                         .hssync_start_delay = 0,
107                         .idle_wait_delay = 17,
108                         .elastic_limit = 16,
109                         .term_range_adj = 6,
110                         .xcvr_setup = 15,
111                         .xcvr_setup_offset = 0,
112                         .xcvr_use_fuses = 1,
113                         .xcvr_lsfslew = 2,
114                         .xcvr_lsrslew = 2,
115         },
116         [2] = {
117                         .hssync_start_delay = 0,
118                         .idle_wait_delay = 17,
119                         .elastic_limit = 16,
120                         .term_range_adj = 6,
121                         .xcvr_setup = 8,
122                         .xcvr_setup_offset = 0,
123                         .xcvr_use_fuses = 1,
124                         .xcvr_lsfslew = 2,
125                         .xcvr_lsrslew = 2,
126         },
127 };
128
129 static struct resource cardhu_bcm4329_rfkill_resources[] = {
130         {
131                 .name   = "bcm4329_nshutdown_gpio",
132                 .start  = TEGRA_GPIO_PU0,
133                 .end    = TEGRA_GPIO_PU0,
134                 .flags  = IORESOURCE_IO,
135         },
136 };
137
138 static struct platform_device cardhu_bcm4329_rfkill_device = {
139         .name = "bcm4329_rfkill",
140         .id             = -1,
141         .num_resources  = ARRAY_SIZE(cardhu_bcm4329_rfkill_resources),
142         .resource       = cardhu_bcm4329_rfkill_resources,
143 };
144
145 static struct resource cardhu_bluesleep_resources[] = {
146         [0] = {
147                 .name = "gpio_host_wake",
148                         .start  = TEGRA_GPIO_PU6,
149                         .end    = TEGRA_GPIO_PU6,
150                         .flags  = IORESOURCE_IO,
151         },
152         [1] = {
153                 .name = "gpio_ext_wake",
154                         .start  = TEGRA_GPIO_PU1,
155                         .end    = TEGRA_GPIO_PU1,
156                         .flags  = IORESOURCE_IO,
157         },
158         [2] = {
159                 .name = "host_wake",
160                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
161         },
162 };
163
164 static struct platform_device cardhu_bluesleep_device = {
165         .name           = "bluesleep",
166         .id             = -1,
167         .num_resources  = ARRAY_SIZE(cardhu_bluesleep_resources),
168         .resource       = cardhu_bluesleep_resources,
169 };
170
171 static noinline void __init cardhu_setup_bluesleep(void)
172 {
173         cardhu_bluesleep_resources[2].start =
174                 cardhu_bluesleep_resources[2].end =
175                         gpio_to_irq(TEGRA_GPIO_PU6);
176         platform_device_register(&cardhu_bluesleep_device);
177         return;
178 }
179
180 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
181         /* name         parent          rate            enabled */
182         { "pll_m",      NULL,           0,              false},
183         { "hda",        "pll_p",        108000000,      false},
184         { "hda2codec_2x","pll_p",       48000000,       false},
185         { "pwm",        "pll_p",        3187500,        false},
186         { "blink",      "clk_32k",      32768,          true},
187         { "i2s0",       "pll_a_out0",   0,              false},
188         { "i2s1",       "pll_a_out0",   0,              false},
189         { "i2s3",       "pll_a_out0",   0,              false},
190         { "spdif_out",  "pll_a_out0",   0,              false},
191         { "d_audio",    "clk_m",        12000000,       false},
192         { "dam0",       "clk_m",        12000000,       false},
193         { "dam1",       "clk_m",        12000000,       false},
194         { "dam2",       "clk_m",        12000000,       false},
195         { "audio1",     "i2s1_sync",    0,              false},
196         { "audio3",     "i2s3_sync",    0,              false},
197         { "vi_sensor",  "pll_p",        150000000,      false},
198         { "i2c1",       "pll_p",        3200000,        false},
199         { "i2c2",       "pll_p",        3200000,        false},
200         { "i2c3",       "pll_p",        3200000,        false},
201         { "i2c4",       "pll_p",        3200000,        false},
202         { "i2c5",       "pll_p",        3200000,        false},
203         { NULL,         NULL,           0,              0},
204 };
205
206 static struct pn544_i2c_platform_data nfc_pdata = {
207         .irq_gpio = TEGRA_GPIO_PX0,
208         .ven_gpio = TEGRA_GPIO_PP3,
209         .firm_gpio = TEGRA_GPIO_PO7,
210         };
211
212 static struct i2c_board_info __initdata cardhu_i2c_bus3_board_info[] = {
213         {
214                 I2C_BOARD_INFO("pn544", 0x28),
215                 .platform_data = &nfc_pdata,
216         },
217 };
218 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
219         .adapter_nr     = 0,
220         .bus_count      = 1,
221         .bus_clk_rate   = { 100000, 0 },
222         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
223         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
224         .arb_recovery = arb_lost_recovery,
225 };
226
227 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
228         .adapter_nr     = 1,
229         .bus_count      = 1,
230         .bus_clk_rate   = { 400000, 0 },
231         .is_clkon_always = true,
232         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
233         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
234         .arb_recovery = arb_lost_recovery,
235 };
236
237 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
238         .adapter_nr     = 2,
239         .bus_count      = 1,
240         .bus_clk_rate   = { 100000, 0 },
241         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
242         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
243         .arb_recovery = arb_lost_recovery,
244 };
245
246 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
247         .adapter_nr     = 3,
248         .bus_count      = 1,
249         .bus_clk_rate   = { 10000, 0 },
250         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
251         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
252         .arb_recovery = arb_lost_recovery,
253 };
254
255 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
256         .adapter_nr     = 4,
257         .bus_count      = 1,
258         .bus_clk_rate   = { 400000, 0 },
259         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
260         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
261         .arb_recovery = arb_lost_recovery,
262 };
263
264
265 #if 0
266 struct tegra_wired_jack_conf audio_wr_jack_conf = {
267         .hp_det_n = TEGRA_GPIO_PW2,
268         .en_mic_ext = TEGRA_GPIO_PX1,
269         .en_mic_int = TEGRA_GPIO_PX0,
270 };
271 #endif
272
273 static struct wm8903_platform_data cardhu_wm8903_pdata = {
274         .irq_active_low = 0,
275         .micdet_cfg = 0,
276         .micdet_delay = 100,
277         .gpio_base = CARDHU_GPIO_WM8903(0),
278         .gpio_cfg = {
279                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP1_FN_SHIFT),
280                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP2_FN_SHIFT) |
281                         WM8903_GP2_DIR,
282                 WM8903_GPIO_CONFIG_ZERO,
283                 0,
284                 0,
285         },
286 };
287
288 /* Equalizer filter coefs generated from the MAXIM MAX98095
289  * evkit software tool */
290 static struct max98095_eq_cfg max98095_eq_cfg[] = {
291         {
292                 .name = "FLAT",
293                 .rate = 44100,
294                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
295                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
296                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
297                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
298                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
299         },
300         {
301                 .name = "LOWPASS1K",
302                 .rate = 44100,
303                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
304                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
305                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
306                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
307                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
308         },
309         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
310                 .name = "HIBOOST",
311                 .rate = 44100,
312                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
313                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
314                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
315                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
316                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
317         },
318         { /* BASS=12dB, TREBLE=+12dB */
319                 .name = "LOUD12DB",
320                 .rate = 44100,
321                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
322                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
323                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
324                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
325                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
326         },
327         {
328                 .name = "FLAT",
329                 .rate = 16000,
330                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
331                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
332                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
333                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
334                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
335         },
336         {
337                 .name = "LOWPASS1K",
338                 .rate = 16000,
339                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
340                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
341                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
342                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
343                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
344         },
345         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
346                 .name = "HIBOOST",
347                 .rate = 16000,
348                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
349                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
350                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
351                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
352                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
353         },
354         { /* BASS=12dB, TREBLE=+12dB */
355                 .name = "LOUD12DB",
356                 .rate = 16000,
357                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
358                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
359                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
360                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
361                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
362         },
363 };
364
365 static struct max98095_pdata cardhu_max98095_pdata = {
366         /* equalizer configuration */
367         .eq_cfg = max98095_eq_cfg,
368         .eq_cfgcnt = ARRAY_SIZE(max98095_eq_cfg),
369
370         /* Biquad filter response configuration */
371         .bq_cfg = NULL,
372         .bq_cfgcnt = 0,
373
374         /* microphone configuration */
375         .digmic_left_mode = 1,
376         .digmic_right_mode = 1,
377 };
378
379 static struct i2c_board_info __initdata cardhu_codec_wm8903_info = {
380         I2C_BOARD_INFO("wm8903", 0x1a),
381         .platform_data = &cardhu_wm8903_pdata,
382 };
383
384 static struct i2c_board_info __initdata cardhu_codec_aic326x_info = {
385         I2C_BOARD_INFO("aic3262-codec", 0x18),
386 };
387
388 static struct i2c_board_info __initdata cardhu_codec_max98095_info = {
389         I2C_BOARD_INFO("max98095", 0x10),
390         .platform_data = &cardhu_max98095_pdata,
391 };
392
393 static void cardhu_i2c_init(void)
394 {
395         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
396         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
397         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
398         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
399         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
400
401         platform_device_register(&tegra_i2c_device5);
402         platform_device_register(&tegra_i2c_device4);
403         platform_device_register(&tegra_i2c_device3);
404         platform_device_register(&tegra_i2c_device2);
405         platform_device_register(&tegra_i2c_device1);
406
407         cardhu_codec_wm8903_info.irq = cardhu_codec_max98095_info.irq =
408                 cardhu_codec_aic326x_info.irq = gpio_to_irq(TEGRA_GPIO_CDC_IRQ);
409         i2c_register_board_info(4, &cardhu_codec_wm8903_info, 1);
410         i2c_register_board_info(4, &cardhu_codec_max98095_info, 1);
411         i2c_register_board_info(4, &cardhu_codec_aic326x_info, 1);
412
413         cardhu_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PX0);
414         i2c_register_board_info(2, cardhu_i2c_bus3_board_info, 1);
415 }
416
417 static struct platform_device *cardhu_uart_devices[] __initdata = {
418         &tegra_uarta_device,
419         &tegra_uartb_device,
420         &tegra_uartc_device,
421         &tegra_uartd_device,
422         &tegra_uarte_device,
423 };
424 static struct uart_clk_parent uart_parent_clk[] = {
425         [0] = {.name = "clk_m"},
426         [1] = {.name = "pll_p"},
427 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
428         [2] = {.name = "pll_m"},
429 #endif
430 };
431
432 static struct tegra_uart_platform_data cardhu_uart_pdata;
433 static struct tegra_uart_platform_data cardhu_loopback_uart_pdata;
434
435 static void __init uart_debug_init(void)
436 {
437         struct board_info board_info;
438         int debug_port_id;
439
440         tegra_get_board_info(&board_info);
441
442         debug_port_id = get_tegra_uart_debug_port_id();
443         if (debug_port_id < 0) {
444                 debug_port_id = 0;
445                         /* UARTB is debug port
446                          *       for SLT - E1186/E1187/PM269
447                          *       for E1256/E1257
448                          */
449                 if (((board_info.sku & SKU_SLT_ULPI_SUPPORT) &&
450                         ((board_info.board_id == BOARD_E1186) ||
451                         (board_info.board_id == BOARD_E1187) ||
452                         (board_info.board_id == BOARD_PM269))) ||
453                         (board_info.board_id == BOARD_E1256) ||
454                         (board_info.board_id == BOARD_E1257))
455                                 debug_port_id = 1;
456         }
457
458         switch (debug_port_id) {
459         case 0:
460                 /* UARTA is the debug port. */
461                 pr_info("Selecting UARTA as the debug console\n");
462                 cardhu_uart_devices[0] = &debug_uarta_device;
463                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
464                 debug_uart_port_base = ((struct plat_serial8250_port *)(
465                         debug_uarta_device.dev.platform_data))->mapbase;
466                 break;
467
468         case 1:
469                 /* UARTB is the debug port. */
470                 pr_info("Selecting UARTB as the debug console\n");
471                 cardhu_uart_devices[1] = &debug_uartb_device;
472                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartb");
473                 debug_uart_port_base = ((struct plat_serial8250_port *)(
474                         debug_uartb_device.dev.platform_data))->mapbase;
475                 break;
476
477         case 2:
478                 /* UARTC is the debug port. */
479                 pr_info("Selecting UARTC as the debug console\n");
480                 cardhu_uart_devices[2] = &debug_uartc_device;
481                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartc");
482                 debug_uart_port_base = ((struct plat_serial8250_port *)(
483                         debug_uartc_device.dev.platform_data))->mapbase;
484                 break;
485
486         case 3:
487                 /* UARTD is the debug port. */
488                 pr_info("Selecting UARTD as the debug console\n");
489                 cardhu_uart_devices[3] = &debug_uartd_device;
490                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartd");
491                 debug_uart_port_base = ((struct plat_serial8250_port *)(
492                         debug_uartd_device.dev.platform_data))->mapbase;
493                 break;
494
495         case 4:
496                 /* UARTE is the debug port. */
497                 pr_info("Selecting UARTE as the debug console\n");
498                 cardhu_uart_devices[4] = &debug_uarte_device;
499                 debug_uart_clk =  clk_get_sys("serial8250.0", "uarte");
500                 debug_uart_port_base = ((struct plat_serial8250_port *)(
501                         debug_uarte_device.dev.platform_data))->mapbase;
502                 break;
503
504         default:
505                 pr_info("The debug console id %d is invalid, Assuming UARTA", debug_port_id);
506                 cardhu_uart_devices[0] = &debug_uarta_device;
507                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
508                 debug_uart_port_base = ((struct plat_serial8250_port *)(
509                         debug_uarta_device.dev.platform_data))->mapbase;
510                 break;
511         }
512         return;
513 }
514
515 static void __init cardhu_uart_init(void)
516 {
517         struct clk *c;
518         int i;
519
520         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
521                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
522                 if (IS_ERR_OR_NULL(c)) {
523                         pr_err("Not able to get the clock for %s\n",
524                                                 uart_parent_clk[i].name);
525                         continue;
526                 }
527                 uart_parent_clk[i].parent_clk = c;
528                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
529         }
530         cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
531         cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
532         cardhu_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
533         cardhu_loopback_uart_pdata.parent_clk_count =
534                                                 ARRAY_SIZE(uart_parent_clk);
535         cardhu_loopback_uart_pdata.is_loopback = true;
536         tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
537         tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
538         tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
539         tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
540         /* UARTE is used for loopback test purpose */
541         tegra_uarte_device.dev.platform_data = &cardhu_loopback_uart_pdata;
542
543         /* Register low speed only if it is selected */
544         if (!is_tegra_debug_uartport_hs()) {
545                 uart_debug_init();
546                 /* Clock enable for the debug channel */
547                 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
548                         pr_info("The debug console clock name is %s\n",
549                                                 debug_uart_clk->name);
550                         c = tegra_get_clock_by_name("pll_p");
551                         if (IS_ERR_OR_NULL(c))
552                                 pr_err("Not getting the parent clock pll_p\n");
553                         else
554                                 clk_set_parent(debug_uart_clk, c);
555
556                         clk_enable(debug_uart_clk);
557                         clk_set_rate(debug_uart_clk, clk_get_rate(c));
558                 } else {
559                         pr_err("Not getting the clock %s for debug console\n",
560                                         debug_uart_clk->name);
561                 }
562         }
563
564         platform_add_devices(cardhu_uart_devices,
565                                 ARRAY_SIZE(cardhu_uart_devices));
566 }
567
568 static struct platform_device tegra_camera = {
569         .name = "tegra_camera",
570         .id = -1,
571 };
572
573 static struct platform_device *cardhu_spi_devices[] __initdata = {
574         &tegra_spi_device4,
575 };
576
577 static struct platform_device *touch_spi_device[] __initdata = {
578         &tegra_spi_device1,
579 };
580
581 struct spi_clk_parent spi_parent_clk[] = {
582         [0] = {.name = "pll_p"},
583 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
584         [1] = {.name = "pll_m"},
585         [2] = {.name = "clk_m"},
586 #else
587         [1] = {.name = "clk_m"},
588 #endif
589 };
590
591 static struct tegra_spi_platform_data cardhu_spi_pdata = {
592         .is_dma_based           = true,
593         .max_dma_buffer         = (16 * 1024),
594         .is_clkon_always        = false,
595         .max_rate               = 100000000,
596 };
597
598 static void __init cardhu_spi_init(void)
599 {
600         int i;
601         struct clk *c;
602         struct board_info board_info, display_board_info;
603
604         tegra_get_board_info(&board_info);
605         tegra_get_display_board_info(&display_board_info);
606
607         for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
608                 c = tegra_get_clock_by_name(spi_parent_clk[i].name);
609                 if (IS_ERR_OR_NULL(c)) {
610                         pr_err("Not able to get the clock for %s\n",
611                                                 spi_parent_clk[i].name);
612                         continue;
613                 }
614                 spi_parent_clk[i].parent_clk = c;
615                 spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
616         }
617         cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
618         cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
619         tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
620         platform_add_devices(cardhu_spi_devices,
621                                 ARRAY_SIZE(cardhu_spi_devices));
622
623         if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
624                 platform_add_devices(touch_spi_device,
625                                 ARRAY_SIZE(touch_spi_device));
626         }
627         if (board_info.board_id == BOARD_E1198) {
628                 tegra_spi_device2.dev.platform_data = &cardhu_spi_pdata;
629                 platform_device_register(&tegra_spi_device2);
630                 tegra_spi_slave_device1.dev.platform_data = &cardhu_spi_pdata;
631                 platform_device_register(&tegra_spi_slave_device1);
632         }
633 }
634
635 static void __init cardhu_dtv_init(void)
636 {
637         struct board_info board_info;
638
639         tegra_get_board_info(&board_info);
640
641         if (board_info.board_id == BOARD_E1186)
642                 platform_device_register(&tegra_dtv_device);
643 }
644
645 static struct resource tegra_rtc_resources[] = {
646         [0] = {
647                 .start = TEGRA_RTC_BASE,
648                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
649                 .flags = IORESOURCE_MEM,
650         },
651         [1] = {
652                 .start = INT_RTC,
653                 .end = INT_RTC,
654                 .flags = IORESOURCE_IRQ,
655         },
656 };
657
658 static struct platform_device tegra_rtc_device = {
659         .name = "tegra_rtc",
660         .id   = -1,
661         .resource = tegra_rtc_resources,
662         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
663 };
664
665 static struct tegra_wm8903_platform_data cardhu_audio_wm8903_pdata = {
666         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
667         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
668         .gpio_hp_mute           = -1,
669         .gpio_int_mic_en        = -1,
670         .gpio_ext_mic_en        = -1,
671 };
672
673 static struct tegra_asoc_platform_data cardhu_audio_max98095_pdata = {
674         .gpio_spkr_en           = -1,
675         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
676         .gpio_hp_mute           = -1,
677         .gpio_int_mic_en        = -1,
678         .gpio_ext_mic_en        = -1,
679 };
680
681 static struct platform_device cardhu_audio_wm8903_device = {
682         .name   = "tegra-snd-wm8903",
683         .id     = 0,
684         .dev    = {
685                 .platform_data = &cardhu_audio_wm8903_pdata,
686         },
687 };
688
689 static struct platform_device cardhu_audio_max98095_device = {
690         .name   = "tegra-snd-max98095",
691         .id     = 0,
692         .dev    = {
693                 .platform_data = &cardhu_audio_max98095_pdata,
694         },
695 };
696
697 static struct tegra_asoc_platform_data cardhu_audio_aic326x_pdata = {
698         .gpio_spkr_en           = -1,
699         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
700         .gpio_hp_mute           = -1,
701         .gpio_int_mic_en        = -1,
702         .gpio_ext_mic_en        = -1,
703         /*defaults for Verbier-Cardhu board with TI AIC326X codec*/
704         .audio_port_id          = {
705                 [HIFI_CODEC] = 0,
706                 [BASEBAND] = -1,
707                 [BT_SCO] = 3,
708         },
709         .baseband_param         = {
710                 .rate = -1,
711                 .channels = -1,
712         },
713 };
714
715 static struct platform_device cardhu_audio_aic326x_device = {
716         .name   = "tegra-snd-aic326x",
717         .id     = 0,
718         .dev    = {
719                 .platform_data  = &cardhu_audio_aic326x_pdata,
720         },
721 };
722
723 static struct platform_device *cardhu_devices[] __initdata = {
724         &tegra_pmu_device,
725         &tegra_rtc_device,
726         &tegra_udc_device,
727 #if defined(CONFIG_TEGRA_IOVMM_SMMU) ||  defined(CONFIG_TEGRA_IOMMU_SMMU)
728         &tegra_smmu_device,
729 #endif
730         &tegra_wdt_device,
731 #if defined(CONFIG_TEGRA_AVP)
732         &tegra_avp_device,
733 #endif
734         &tegra_camera,
735 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
736         &tegra_se_device,
737 #endif
738         &tegra_ahub_device,
739         &tegra_dam_device0,
740         &tegra_dam_device1,
741         &tegra_dam_device2,
742         &tegra_i2s_device0,
743         &tegra_i2s_device1,
744         &tegra_i2s_device3,
745         &tegra_spdif_device,
746         &spdif_dit_device,
747         &bluetooth_dit_device,
748         &baseband_dit_device,
749         &cardhu_bcm4329_rfkill_device,
750         &tegra_pcm_device,
751         &cardhu_audio_wm8903_device,
752         &cardhu_audio_max98095_device,
753         &cardhu_audio_aic326x_device,
754         &tegra_hda_device,
755 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
756         &tegra_aes_device,
757 #endif
758 };
759
760 #define MXT_CONFIG_CRC  0xD62DE8
761 static const u8 config[] = {
762         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
763         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
764         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
765         0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
766         0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
767         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
768         0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
769         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
770         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
771         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
772         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
773         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
774         0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
775         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
776         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
777         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
778         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
779         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
780         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
781         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
782 };
783
784 #define MXT_CONFIG_CRC_SKU2000  0xA24D9A
785 static const u8 config_sku2000[] = {
786         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
787         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
788         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
789         0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00,  //23=thr  2 di
790         0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
791         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
792         0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00,  //0A=limit
793         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
794         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
795         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
796         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
797         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
798         0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
799         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
800         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
801         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
802         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
803         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
804         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
805         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
806 };
807
808 static struct mxt_platform_data atmel_mxt_info = {
809         .x_line         = 27,
810         .y_line         = 42,
811         .x_size         = 768,
812         .y_size         = 1366,
813         .blen           = 0x20,
814         .threshold      = 0x3C,
815         .voltage        = 3300000,              /* 3.3V */
816         .orient         = 5,
817         .config         = config,
818         .config_length  = 157,
819         .config_crc     = MXT_CONFIG_CRC,
820         .irqflags       = IRQF_TRIGGER_FALLING,
821 /*      .read_chg       = &read_chg, */
822         .read_chg       = NULL,
823 };
824
825 static struct i2c_board_info __initdata atmel_i2c_info[] = {
826         {
827                 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
828                 .platform_data = &atmel_mxt_info,
829         }
830 };
831
832 static __initdata struct tegra_clk_init_table spi_clk_init_table[] = {
833         /* name         parent          rate            enabled */
834         { "sbc1",       "pll_p",        52000000,       true},
835         { NULL,         NULL,           0,              0},
836 };
837
838 static int __init cardhu_touch_init(void)
839 {
840         struct board_info BoardInfo;
841
842         tegra_get_display_board_info(&BoardInfo);
843         if (BoardInfo.board_id == BOARD_DISPLAY_PM313) {
844                 tegra_clk_init_from_table(spi_clk_init_table);
845
846                 touch_init_raydium(TEGRA_GPIO_PH4, TEGRA_GPIO_PH6, 2);
847         } else {
848                 gpio_request(TEGRA_GPIO_PH4, "atmel-irq");
849                 gpio_direction_input(TEGRA_GPIO_PH4);
850
851                 gpio_request(TEGRA_GPIO_PH6, "atmel-reset");
852                 gpio_direction_output(TEGRA_GPIO_PH6, 0);
853                 msleep(1);
854                 gpio_set_value(TEGRA_GPIO_PH6, 1);
855                 msleep(100);
856
857                 tegra_get_board_info(&BoardInfo);
858                 if ((BoardInfo.sku & SKU_TOUCH_MASK) == SKU_TOUCH_2000) {
859                         atmel_mxt_info.config = config_sku2000;
860                         atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
861                 }
862
863                 atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH4);
864                 i2c_register_board_info(1, atmel_i2c_info, 1);
865         }
866
867         return 0;
868 }
869
870 static struct tegra_uhsic_config uhsic_phy_config = {
871         .enable_gpio = EN_HSIC_GPIO,
872         .reset_gpio = -1,
873         .sync_start_delay = 9,
874         .idle_wait_delay = 17,
875         .term_range_adj = 0,
876         .elastic_underrun_limit = 16,
877         .elastic_overrun_limit = 16,
878 };
879
880 static struct tegra_ehci_platform_data tegra_ehci_uhsic_pdata = {
881         .phy_type = TEGRA_USB_PHY_TYPE_HSIC,
882         .phy_config = &uhsic_phy_config,
883         .operating_mode = TEGRA_USB_HOST,
884         .power_down_on_bus_suspend = 1,
885         .default_enable = true,
886 };
887
888 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
889         [0] = {
890                         .phy_config = &utmi_phy_config[0],
891                         .operating_mode = TEGRA_USB_HOST,
892                         .power_down_on_bus_suspend = 1,
893                         .default_enable = true,
894         },
895         [1] = {
896                         .phy_config = &utmi_phy_config[1],
897                         .operating_mode = TEGRA_USB_HOST,
898                         .power_down_on_bus_suspend = 1,
899                         .default_enable = true,
900         },
901         [2] = {
902                         .phy_config = &utmi_phy_config[2],
903                         .operating_mode = TEGRA_USB_HOST,
904                         .power_down_on_bus_suspend = 1,
905                         .hotplug = 1,
906                         .default_enable = true,
907         },
908 };
909
910 static struct tegra_otg_platform_data tegra_otg_pdata = {
911         .ehci_device = &tegra_ehci1_device,
912         .ehci_pdata = &tegra_ehci_pdata[0],
913 };
914
915 #ifdef CONFIG_USB_SUPPORT
916 static struct usb_phy_plat_data tegra_usb_phy_pdata[] = {
917         [0] = {
918                         .instance = 0,
919                         .vbus_gpio = -1,
920                         .vbus_reg_supply = "vdd_vbus_micro_usb",
921         },
922         [1] = {
923                         .instance = 1,
924                         .vbus_gpio = -1,
925         },
926         [2] = {
927                         .instance = 2,
928                         .vbus_gpio = -1,
929                         .vbus_reg_supply = "vdd_vbus_typea_usb",
930         },
931 };
932
933 static int cardhu_usb_hsic_postsupend(void)
934 {
935 #ifdef CONFIG_TEGRA_BB_XMM_POWER
936         baseband_xmm_set_power_status(BBXMM_PS_L2);
937 #endif
938         return 0;
939 }
940
941 static int cardhu_usb_hsic_preresume(void)
942 {
943 #ifdef CONFIG_TEGRA_BB_XMM_POWER
944         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
945 #endif
946         return 0;
947 }
948
949 static int cardhu_usb_hsic_phy_ready(void)
950 {
951 #ifdef CONFIG_TEGRA_BB_XMM_POWER
952         baseband_xmm_set_power_status(BBXMM_PS_L0);
953 #endif
954         return 0;
955 }
956
957 static int cardhu_usb_hsic_phy_off(void)
958 {
959 #ifdef CONFIG_TEGRA_BB_XMM_POWER
960         baseband_xmm_set_power_status(BBXMM_PS_L3);
961 #endif
962         return 0;
963 }
964
965 static void cardhu_usb_init(void)
966 {
967         struct board_info bi;
968
969         tegra_get_board_info(&bi);
970
971         tegra_usb_phy_init(tegra_usb_phy_pdata,
972                         ARRAY_SIZE(tegra_usb_phy_pdata));
973
974         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
975         platform_device_register(&tegra_otg_device);
976         if (bi.board_id == BOARD_PM267) {
977                 uhsic_phy_config.reset_gpio =
978                         PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
979                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
980                 platform_device_register(&tegra_ehci2_device);
981         } else if (bi.board_id == BOARD_E1256) {
982                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
983                 platform_device_register(&tegra_ehci2_device);
984         } else if (bi.board_id == BOARD_E1186) {
985                 /* for baseband devices do not switch off phy during suspend */
986                 tegra_ehci_uhsic_pdata.power_down_on_bus_suspend = 0;
987                 uhsic_phy_config.postsuspend = cardhu_usb_hsic_postsupend;
988                 uhsic_phy_config.preresume = cardhu_usb_hsic_preresume;
989                 uhsic_phy_config.usb_phy_ready = cardhu_usb_hsic_phy_ready;
990                 uhsic_phy_config.post_phy_off = cardhu_usb_hsic_phy_off;
991                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
992                 /* baseband registration happens in baseband-xmm-power  */
993         } else {
994                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_pdata[1];
995                 platform_device_register(&tegra_ehci2_device);
996         }
997
998         tegra_ehci3_device.dev.platform_data = &tegra_ehci_pdata[2];
999         platform_device_register(&tegra_ehci3_device);
1000
1001 }
1002 #else
1003 static void cardhu_usb_init(void) { }
1004 #endif
1005
1006 static struct baseband_power_platform_data tegra_baseband_power_data = {
1007         .baseband_type = BASEBAND_XMM,
1008         .modem = {
1009         .xmm = {
1010                         .bb_rst = XMM_GPIO_BB_RST,
1011                         .bb_on = XMM_GPIO_BB_ON,
1012                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1013                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1014                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1015                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1016                         .hsic_device = &tegra_ehci2_device,
1017                 },
1018         },
1019 };
1020
1021 static struct platform_device tegra_baseband_power_device = {
1022         .name = "baseband_xmm_power",
1023         .id = -1,
1024         .dev = {
1025                 .platform_data = &tegra_baseband_power_data,
1026         },
1027 };
1028
1029 static struct platform_device tegra_baseband_power2_device = {
1030         .name = "baseband_xmm_power2",
1031         .id = -1,
1032         .dev = {
1033                 .platform_data = &tegra_baseband_power_data,
1034         },
1035 };
1036
1037
1038 static struct tegra_pci_platform_data cardhu_pci_platform_data = {
1039         .port_status[0] = 1,
1040         .port_status[1] = 1,
1041         .port_status[2] = 1,
1042         .use_dock_detect        = 0,
1043         .gpio           = 0,
1044 };
1045
1046 static void cardhu_pci_init(void)
1047 {
1048         struct board_info board_info;
1049
1050         tegra_get_board_info(&board_info);
1051         if (board_info.board_id == BOARD_E1291) {
1052                 cardhu_pci_platform_data.port_status[0] = 0;
1053                 cardhu_pci_platform_data.port_status[1] = 0;
1054                 cardhu_pci_platform_data.port_status[2] = 1;
1055                 cardhu_pci_platform_data.use_dock_detect = 1;
1056                 cardhu_pci_platform_data.gpio = DOCK_DETECT_GPIO;
1057         }
1058         if ((board_info.board_id == BOARD_E1186) ||
1059                 (board_info.board_id == BOARD_E1187) ||
1060                 (board_info.board_id == BOARD_E1291)) {
1061                 tegra_pci_device.dev.platform_data = &cardhu_pci_platform_data;
1062                 platform_device_register(&tegra_pci_device);
1063         }
1064 }
1065
1066 static void cardhu_modem_init(void)
1067 {
1068         struct board_info board_info;
1069         int w_disable_gpio, ret;
1070
1071         tegra_get_board_info(&board_info);
1072         switch (board_info.board_id) {
1073         case BOARD_E1291:
1074         case BOARD_E1198:
1075                 if (((board_info.board_id == BOARD_E1291) &&
1076                                 (board_info.fab < BOARD_FAB_A03)) ||
1077                         ((board_info.board_id == BOARD_E1198) &&
1078                                         (board_info.fab < BOARD_FAB_A02))) {
1079                         w_disable_gpio = TEGRA_GPIO_PH5;
1080                 } else {
1081                         w_disable_gpio = TEGRA_GPIO_PDD5;
1082                 }
1083
1084                 ret = gpio_request(w_disable_gpio, "w_disable_gpio");
1085                 if (ret < 0)
1086                         pr_err("%s: gpio_request failed for gpio %d\n",
1087                                 __func__, w_disable_gpio);
1088                 else
1089                         gpio_direction_input(w_disable_gpio);
1090
1091                 /* E1291-A04 & E1198:A02: Set PERST signal to high */
1092                 if (((board_info.board_id == BOARD_E1291) &&
1093                                 (board_info.fab >= BOARD_FAB_A04)) ||
1094                         ((board_info.board_id == BOARD_E1198) &&
1095                                         (board_info.fab >= BOARD_FAB_A02))) {
1096                         ret = gpio_request(TEGRA_GPIO_PH7, "modem_perst");
1097                         if (ret < 0) {
1098                                 pr_err("%s(): Error in allocating gpio "
1099                                         "TEGRA_GPIO_PH7\n", __func__);
1100                                 break;
1101                         }
1102                         gpio_direction_output(TEGRA_GPIO_PH7, 1);
1103                 }
1104                 break;
1105         case BOARD_E1186:
1106                 platform_device_register(&tegra_baseband_power_device);
1107                 platform_device_register(&tegra_baseband_power2_device);
1108                 break;
1109         default:
1110                 break;
1111         }
1112
1113 }
1114
1115 #ifdef CONFIG_SATA_AHCI_TEGRA
1116 static void cardhu_sata_init(void)
1117 {
1118         platform_device_register(&tegra_sata_device);
1119 }
1120 #else
1121 static void cardhu_sata_init(void) { }
1122 #endif
1123
1124 static void __init tegra_cardhu_init(void)
1125 {
1126         tegra_thermal_init(&thermal_data);
1127         tegra_clk_init_from_table(cardhu_clk_init_table);
1128         tegra_enable_pinmux();
1129         cardhu_pinmux_init();
1130         cardhu_i2c_init();
1131         cardhu_spi_init();
1132         cardhu_usb_init();
1133 #ifdef CONFIG_TEGRA_EDP_LIMITS
1134         cardhu_edp_init();
1135 #endif
1136         cardhu_uart_init();
1137         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
1138         tegra_ram_console_debug_init();
1139         cardhu_sdhci_init();
1140         cardhu_regulator_init();
1141         cardhu_dtv_init();
1142         cardhu_suspend_init();
1143         cardhu_touch_init();
1144         cardhu_modem_init();
1145         cardhu_kbc_init();
1146         cardhu_scroll_init();
1147         cardhu_keys_init();
1148         cardhu_panel_init();
1149         cardhu_pmon_init();
1150         cardhu_sensors_init();
1151         cardhu_setup_bluesleep();
1152         cardhu_sata_init();
1153         //audio_wired_jack_init();
1154         cardhu_pins_state_init();
1155         cardhu_emc_init();
1156         tegra_release_bootloader_fb();
1157         cardhu_pci_init();
1158 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1159         tegra_wdt_recovery_init();
1160 #endif
1161 }
1162
1163 static void __init tegra_cardhu_reserve(void)
1164 {
1165 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1166         /* support 1920X1200 with 24bpp */
1167         tegra_reserve(0, SZ_8M + SZ_1M, SZ_8M + SZ_1M);
1168 #else
1169         tegra_reserve(SZ_128M, SZ_8M, SZ_8M);
1170 #endif
1171         tegra_ram_console_debug_reserve(SZ_1M);
1172 }
1173
1174 MACHINE_START(CARDHU, "cardhu")
1175         .atag_offset    = 0x100,
1176         .map_io         = tegra_map_common_io,
1177         .reserve        = tegra_cardhu_reserve,
1178         .init_early     = tegra30_init_early,
1179         .init_irq       = tegra_init_irq,
1180         .handle_irq     = gic_handle_irq,
1181         .timer          = &tegra_timer,
1182         .init_machine   = tegra_cardhu_init,
1183         .restart        = tegra_assert_system_reset,
1184 MACHINE_END