drivers: skin: Skin prediction algorithm
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <linux/spi/spi.h>
37 #include <linux/i2c/atmel_mxt_ts.h>
38 #include <linux/tegra_uart.h>
39 #include <linux/memblock.h>
40 #include <linux/spi-tegra.h>
41 #include <linux/nfc/pn544.h>
42 #include <linux/rfkill-gpio.h>
43
44 #include <sound/wm8903.h>
45 #include <sound/max98095.h>
46 #include <media/tegra_dtv.h>
47
48 #include <asm/hardware/gic.h>
49
50 #include <mach/clk.h>
51 #include <mach/iomap.h>
52 #include <mach/irqs.h>
53 #include <mach/pinmux.h>
54 #include <mach/iomap.h>
55 #include <mach/io.h>
56 #include <mach/i2s.h>
57 #include <mach/tegra_asoc_pdata.h>
58 #include <mach/tegra_wm8903_pdata.h>
59 #include <mach/usb_phy.h>
60 #include <mach/thermal.h>
61 #include <mach/pci.h>
62 #include <mach/gpio-tegra.h>
63
64 #include <asm/hardware/gic.h>
65 #include <asm/mach-types.h>
66 #include <asm/mach/arch.h>
67
68 #include "board.h"
69 #include "clock.h"
70 #include "board-cardhu.h"
71 #include "board-touch.h"
72 #include "devices.h"
73 #include "gpio-names.h"
74 #include "fuse.h"
75 #include "pm.h"
76 #include "baseband-xmm-power.h"
77 #include "wdt-recovery.h"
78 #include "common.h"
79
80 static struct balanced_throttle throttle_list[] = {
81 #ifdef CONFIG_TEGRA_THERMAL_THROTTLE
82         {
83                 .id = BALANCED_THROTTLE_ID_TJ,
84                 .throt_tab_size = 10,
85                 .throt_tab = {
86                         {      0, 1000 },
87                         { 640000, 1000 },
88                         { 640000, 1000 },
89                         { 640000, 1000 },
90                         { 640000, 1000 },
91                         { 640000, 1000 },
92                         { 760000, 1000 },
93                         { 760000, 1050 },
94                         {1000000, 1050 },
95                         {1000000, 1100 },
96                 },
97         },
98 #endif
99 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
100         {
101                 .id = BALANCED_THROTTLE_ID_SKIN,
102                 .throt_tab_size = 6,
103                 .throt_tab = {
104                         { 640000, 1200 },
105                         { 640000, 1200 },
106                         { 760000, 1200 },
107                         { 760000, 1200 },
108                         {1000000, 1200 },
109                         {1000000, 1200 },
110                 },
111         },
112 #endif
113 };
114
115 /* All units are in millicelsius */
116 static struct tegra_thermal_data thermal_data = {
117         .shutdown_device_id = THERMAL_DEVICE_ID_NCT_EXT,
118         .temp_shutdown = 90000,
119
120 #if defined(CONFIG_TEGRA_EDP_LIMITS) || defined(CONFIG_TEGRA_THERMAL_THROTTLE)
121         .throttle_edp_device_id = THERMAL_DEVICE_ID_NCT_EXT,
122 #endif
123 #ifdef CONFIG_TEGRA_EDP_LIMITS
124         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
125         .hysteresis_edp = 3000,
126 #endif
127 #ifdef CONFIG_TEGRA_THERMAL_THROTTLE
128         .temp_throttle = 85000,
129         .tc1 = 0,
130         .tc2 = 1,
131         .passive_delay = 2000,
132 #endif
133 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
134         .skin_device_id = THERMAL_DEVICE_ID_SKIN,
135         .temp_throttle_skin = 43000,
136         .tc1_skin = 0,
137         .tc2_skin = 1,
138         .passive_delay_skin = 5000,
139
140         .skin_temp_offset = 9793,
141         .skin_period = 1100,
142         .skin_devs_size = 2,
143         .skin_devs = {
144                 {
145                         THERMAL_DEVICE_ID_NCT_EXT,
146                         {
147                                 2, 1, 1, 1,
148                                 1, 1, 1, 1,
149                                 1, 1, 1, 0,
150                                 1, 1, 0, 0,
151                                 0, 0, -1, -7
152                         }
153                 },
154                 {
155                         THERMAL_DEVICE_ID_NCT_INT,
156                         {
157                                 -11, -7, -5, -3,
158                                 -3, -2, -1, 0,
159                                 0, 0, 1, 1,
160                                 1, 2, 2, 3,
161                                 4, 6, 11, 18
162                         }
163                 },
164         },
165 #endif
166 };
167
168 static struct rfkill_gpio_platform_data cardhu_bt_rfkill_pdata[] = {
169         {
170                 .name           = "bt_rfkill",
171                 .shutdown_gpio  = TEGRA_GPIO_PU0,
172                 .reset_gpio     = TEGRA_GPIO_INVALID,
173                 .type           = RFKILL_TYPE_BLUETOOTH,
174         },
175 };
176
177 static struct platform_device cardhu_bt_rfkill_device = {
178         .name = "rfkill_gpio",
179         .id             = -1,
180         .dev = {
181                 .platform_data = &cardhu_bt_rfkill_pdata,
182         },
183 };
184
185 static struct resource cardhu_bluesleep_resources[] = {
186         [0] = {
187                 .name = "gpio_host_wake",
188                         .start  = TEGRA_GPIO_PU6,
189                         .end    = TEGRA_GPIO_PU6,
190                         .flags  = IORESOURCE_IO,
191         },
192         [1] = {
193                 .name = "gpio_ext_wake",
194                         .start  = TEGRA_GPIO_PU1,
195                         .end    = TEGRA_GPIO_PU1,
196                         .flags  = IORESOURCE_IO,
197         },
198         [2] = {
199                 .name = "host_wake",
200                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
201         },
202 };
203
204 static struct platform_device cardhu_bluesleep_device = {
205         .name           = "bluesleep",
206         .id             = -1,
207         .num_resources  = ARRAY_SIZE(cardhu_bluesleep_resources),
208         .resource       = cardhu_bluesleep_resources,
209 };
210
211 static noinline void __init cardhu_setup_bluesleep(void)
212 {
213         cardhu_bluesleep_resources[2].start =
214                 cardhu_bluesleep_resources[2].end =
215                         gpio_to_irq(TEGRA_GPIO_PU6);
216         platform_device_register(&cardhu_bluesleep_device);
217         return;
218 }
219
220 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
221         /* name         parent          rate            enabled */
222         { "pll_m",      NULL,           0,              false},
223         { "hda",        "pll_p",        108000000,      false},
224         { "hda2codec_2x","pll_p",       48000000,       false},
225         { "pwm",        "pll_p",        3187500,        false},
226         { "blink",      "clk_32k",      32768,          true},
227         { "i2s0",       "pll_a_out0",   0,              false},
228         { "i2s1",       "pll_a_out0",   0,              false},
229         { "i2s3",       "pll_a_out0",   0,              false},
230         { "spdif_out",  "pll_a_out0",   0,              false},
231         { "d_audio",    "clk_m",        12000000,       false},
232         { "dam0",       "clk_m",        12000000,       false},
233         { "dam1",       "clk_m",        12000000,       false},
234         { "dam2",       "clk_m",        12000000,       false},
235         { "audio1",     "i2s1_sync",    0,              false},
236         { "audio3",     "i2s3_sync",    0,              false},
237         { "vi_sensor",  "pll_p",        150000000,      false},
238         { "i2c1",       "pll_p",        3200000,        false},
239         { "i2c2",       "pll_p",        3200000,        false},
240         { "i2c3",       "pll_p",        3200000,        false},
241         { "i2c4",       "pll_p",        3200000,        false},
242         { "i2c5",       "pll_p",        3200000,        false},
243         { NULL,         NULL,           0,              0},
244 };
245
246 static struct pn544_i2c_platform_data nfc_pdata = {
247         .irq_gpio = TEGRA_GPIO_PX0,
248         .ven_gpio = TEGRA_GPIO_PP3,
249         .firm_gpio = TEGRA_GPIO_PO7,
250         };
251
252 static struct i2c_board_info __initdata cardhu_i2c_bus3_board_info[] = {
253         {
254                 I2C_BOARD_INFO("pn544", 0x28),
255                 .platform_data = &nfc_pdata,
256         },
257 };
258 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
259         .adapter_nr     = 0,
260         .bus_count      = 1,
261         .bus_clk_rate   = { 100000, 0 },
262         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
263         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
264         .arb_recovery = arb_lost_recovery,
265 };
266
267 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
268         .adapter_nr     = 1,
269         .bus_count      = 1,
270         .bus_clk_rate   = { 400000, 0 },
271         .is_clkon_always = true,
272         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
273         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
274         .arb_recovery = arb_lost_recovery,
275 };
276
277 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
278         .adapter_nr     = 2,
279         .bus_count      = 1,
280         .bus_clk_rate   = { 100000, 0 },
281         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
282         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
283         .arb_recovery = arb_lost_recovery,
284 };
285
286 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
287         .adapter_nr     = 3,
288         .bus_count      = 1,
289         .bus_clk_rate   = { 10000, 0 },
290         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
291         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
292         .arb_recovery = arb_lost_recovery,
293 };
294
295 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
296         .adapter_nr     = 4,
297         .bus_count      = 1,
298         .bus_clk_rate   = { 400000, 0 },
299         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
300         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
301         .arb_recovery = arb_lost_recovery,
302 };
303
304
305 #if 0
306 struct tegra_wired_jack_conf audio_wr_jack_conf = {
307         .hp_det_n = TEGRA_GPIO_PW2,
308         .en_mic_ext = TEGRA_GPIO_PX1,
309         .en_mic_int = TEGRA_GPIO_PX0,
310 };
311 #endif
312
313 static struct wm8903_platform_data cardhu_wm8903_pdata = {
314         .irq_active_low = 0,
315         .micdet_cfg = 0,
316         .micdet_delay = 100,
317         .gpio_base = CARDHU_GPIO_WM8903(0),
318         .gpio_cfg = {
319                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP1_FN_SHIFT),
320                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP2_FN_SHIFT) |
321                         WM8903_GP2_DIR,
322                 WM8903_GPIO_CONFIG_ZERO,
323                 0,
324                 0,
325         },
326 };
327
328 /* Equalizer filter coefs generated from the MAXIM MAX98095
329  * evkit software tool */
330 static struct max98095_eq_cfg max98095_eq_cfg[] = {
331         {
332                 .name = "FLAT",
333                 .rate = 44100,
334                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
335                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
336                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
337                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
338                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
339         },
340         {
341                 .name = "LOWPASS1K",
342                 .rate = 44100,
343                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
344                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
345                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
346                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
347                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
348         },
349         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
350                 .name = "HIBOOST",
351                 .rate = 44100,
352                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
353                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
354                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
355                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
356                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
357         },
358         { /* BASS=12dB, TREBLE=+12dB */
359                 .name = "LOUD12DB",
360                 .rate = 44100,
361                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
362                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
363                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
364                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
365                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
366         },
367         {
368                 .name = "FLAT",
369                 .rate = 16000,
370                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
371                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
372                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
373                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
374                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
375         },
376         {
377                 .name = "LOWPASS1K",
378                 .rate = 16000,
379                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
380                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
381                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
382                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
383                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
384         },
385         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
386                 .name = "HIBOOST",
387                 .rate = 16000,
388                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
389                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
390                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
391                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
392                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
393         },
394         { /* BASS=12dB, TREBLE=+12dB */
395                 .name = "LOUD12DB",
396                 .rate = 16000,
397                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
398                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
399                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
400                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
401                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
402         },
403 };
404
405 static struct max98095_pdata cardhu_max98095_pdata = {
406         /* equalizer configuration */
407         .eq_cfg = max98095_eq_cfg,
408         .eq_cfgcnt = ARRAY_SIZE(max98095_eq_cfg),
409
410         /* Biquad filter response configuration */
411         .bq_cfg = NULL,
412         .bq_cfgcnt = 0,
413
414         /* microphone configuration */
415         .digmic_left_mode = 1,
416         .digmic_right_mode = 1,
417 };
418
419 static struct i2c_board_info __initdata cardhu_codec_wm8903_info = {
420         I2C_BOARD_INFO("wm8903", 0x1a),
421         .platform_data = &cardhu_wm8903_pdata,
422 };
423
424 static struct i2c_board_info __initdata cardhu_codec_aic326x_info = {
425         I2C_BOARD_INFO("aic3262-codec", 0x18),
426 };
427
428 static struct i2c_board_info __initdata cardhu_codec_max98095_info = {
429         I2C_BOARD_INFO("max98095", 0x10),
430         .platform_data = &cardhu_max98095_pdata,
431 };
432
433 static void cardhu_i2c_init(void)
434 {
435         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
436         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
437         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
438         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
439         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
440
441         platform_device_register(&tegra_i2c_device5);
442         platform_device_register(&tegra_i2c_device4);
443         platform_device_register(&tegra_i2c_device3);
444         platform_device_register(&tegra_i2c_device2);
445         platform_device_register(&tegra_i2c_device1);
446
447         cardhu_codec_wm8903_info.irq = cardhu_codec_max98095_info.irq =
448                 cardhu_codec_aic326x_info.irq = gpio_to_irq(TEGRA_GPIO_CDC_IRQ);
449         i2c_register_board_info(4, &cardhu_codec_wm8903_info, 1);
450         i2c_register_board_info(4, &cardhu_codec_max98095_info, 1);
451         i2c_register_board_info(4, &cardhu_codec_aic326x_info, 1);
452
453         cardhu_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PX0);
454         i2c_register_board_info(2, cardhu_i2c_bus3_board_info, 1);
455 }
456
457 static struct platform_device *cardhu_uart_devices[] __initdata = {
458         &tegra_uarta_device,
459         &tegra_uartb_device,
460         &tegra_uartc_device,
461         &tegra_uartd_device,
462         &tegra_uarte_device,
463 };
464 static struct uart_clk_parent uart_parent_clk[] = {
465         [0] = {.name = "clk_m"},
466         [1] = {.name = "pll_p"},
467 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
468         [2] = {.name = "pll_m"},
469 #endif
470 };
471
472 static struct tegra_uart_platform_data cardhu_uart_pdata;
473 static struct tegra_uart_platform_data cardhu_loopback_uart_pdata;
474
475 static void __init uart_debug_init(void)
476 {
477         struct board_info board_info;
478         int debug_port_id;
479
480         tegra_get_board_info(&board_info);
481
482         debug_port_id = get_tegra_uart_debug_port_id();
483         if (debug_port_id < 0) {
484                 debug_port_id = 0;
485                         /* UARTB is debug port
486                          *       for SLT - E1186/E1187/PM269
487                          *       for E1256/E1257
488                          */
489                 if (((board_info.sku & SKU_SLT_ULPI_SUPPORT) &&
490                         ((board_info.board_id == BOARD_E1186) ||
491                         (board_info.board_id == BOARD_E1187) ||
492                         (board_info.board_id == BOARD_PM269))) ||
493                         (board_info.board_id == BOARD_E1256) ||
494                         (board_info.board_id == BOARD_E1257))
495                                 debug_port_id = 1;
496         }
497
498         switch (debug_port_id) {
499         case 0:
500                 /* UARTA is the debug port. */
501                 pr_info("Selecting UARTA as the debug console\n");
502                 cardhu_uart_devices[0] = &debug_uarta_device;
503                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
504                 debug_uart_port_base = ((struct plat_serial8250_port *)(
505                         debug_uarta_device.dev.platform_data))->mapbase;
506                 break;
507
508         case 1:
509                 /* UARTB is the debug port. */
510                 pr_info("Selecting UARTB as the debug console\n");
511                 cardhu_uart_devices[1] = &debug_uartb_device;
512                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartb");
513                 debug_uart_port_base = ((struct plat_serial8250_port *)(
514                         debug_uartb_device.dev.platform_data))->mapbase;
515                 break;
516
517         case 2:
518                 /* UARTC is the debug port. */
519                 pr_info("Selecting UARTC as the debug console\n");
520                 cardhu_uart_devices[2] = &debug_uartc_device;
521                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartc");
522                 debug_uart_port_base = ((struct plat_serial8250_port *)(
523                         debug_uartc_device.dev.platform_data))->mapbase;
524                 break;
525
526         case 3:
527                 /* UARTD is the debug port. */
528                 pr_info("Selecting UARTD as the debug console\n");
529                 cardhu_uart_devices[3] = &debug_uartd_device;
530                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartd");
531                 debug_uart_port_base = ((struct plat_serial8250_port *)(
532                         debug_uartd_device.dev.platform_data))->mapbase;
533                 break;
534
535         case 4:
536                 /* UARTE is the debug port. */
537                 pr_info("Selecting UARTE as the debug console\n");
538                 cardhu_uart_devices[4] = &debug_uarte_device;
539                 debug_uart_clk =  clk_get_sys("serial8250.0", "uarte");
540                 debug_uart_port_base = ((struct plat_serial8250_port *)(
541                         debug_uarte_device.dev.platform_data))->mapbase;
542                 break;
543
544         default:
545                 pr_info("The debug console id %d is invalid, Assuming UARTA", debug_port_id);
546                 cardhu_uart_devices[0] = &debug_uarta_device;
547                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
548                 debug_uart_port_base = ((struct plat_serial8250_port *)(
549                         debug_uarta_device.dev.platform_data))->mapbase;
550                 break;
551         }
552         return;
553 }
554
555 static void __init cardhu_uart_init(void)
556 {
557         struct clk *c;
558         int i;
559
560         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
561                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
562                 if (IS_ERR_OR_NULL(c)) {
563                         pr_err("Not able to get the clock for %s\n",
564                                                 uart_parent_clk[i].name);
565                         continue;
566                 }
567                 uart_parent_clk[i].parent_clk = c;
568                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
569         }
570         cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
571         cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
572         cardhu_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
573         cardhu_loopback_uart_pdata.parent_clk_count =
574                                                 ARRAY_SIZE(uart_parent_clk);
575         cardhu_loopback_uart_pdata.is_loopback = true;
576         tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
577         tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
578         tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
579         tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
580         /* UARTE is used for loopback test purpose */
581         tegra_uarte_device.dev.platform_data = &cardhu_loopback_uart_pdata;
582
583         /* Register low speed only if it is selected */
584         if (!is_tegra_debug_uartport_hs()) {
585                 uart_debug_init();
586                 /* Clock enable for the debug channel */
587                 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
588                         pr_info("The debug console clock name is %s\n",
589                                                 debug_uart_clk->name);
590                         c = tegra_get_clock_by_name("pll_p");
591                         if (IS_ERR_OR_NULL(c))
592                                 pr_err("Not getting the parent clock pll_p\n");
593                         else
594                                 clk_set_parent(debug_uart_clk, c);
595
596                         clk_enable(debug_uart_clk);
597                         clk_set_rate(debug_uart_clk, clk_get_rate(c));
598                 } else {
599                         pr_err("Not getting the clock %s for debug console\n",
600                                         debug_uart_clk->name);
601                 }
602         }
603
604         platform_add_devices(cardhu_uart_devices,
605                                 ARRAY_SIZE(cardhu_uart_devices));
606 }
607
608 static struct platform_device tegra_camera = {
609         .name = "tegra_camera",
610         .id = -1,
611 };
612
613 static struct platform_device *cardhu_spi_devices[] __initdata = {
614         &tegra_spi_device4,
615 };
616
617 static struct platform_device *touch_spi_device[] __initdata = {
618         &tegra_spi_device1,
619 };
620
621 struct spi_clk_parent spi_parent_clk[] = {
622         [0] = {.name = "pll_p"},
623 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
624         [1] = {.name = "pll_m"},
625         [2] = {.name = "clk_m"},
626 #else
627         [1] = {.name = "clk_m"},
628 #endif
629 };
630
631 static struct tegra_spi_platform_data cardhu_spi_pdata = {
632         .is_dma_based           = true,
633         .max_dma_buffer         = (16 * 1024),
634         .is_clkon_always        = false,
635         .max_rate               = 100000000,
636 };
637
638 static void __init cardhu_spi_init(void)
639 {
640         int i;
641         struct clk *c;
642         struct board_info board_info, display_board_info;
643
644         tegra_get_board_info(&board_info);
645         tegra_get_display_board_info(&display_board_info);
646
647         for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
648                 c = tegra_get_clock_by_name(spi_parent_clk[i].name);
649                 if (IS_ERR_OR_NULL(c)) {
650                         pr_err("Not able to get the clock for %s\n",
651                                                 spi_parent_clk[i].name);
652                         continue;
653                 }
654                 spi_parent_clk[i].parent_clk = c;
655                 spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
656         }
657         cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
658         cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
659         tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
660         platform_add_devices(cardhu_spi_devices,
661                                 ARRAY_SIZE(cardhu_spi_devices));
662
663         if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
664                 platform_add_devices(touch_spi_device,
665                                 ARRAY_SIZE(touch_spi_device));
666         }
667         if (board_info.board_id == BOARD_E1198) {
668                 tegra_spi_device2.dev.platform_data = &cardhu_spi_pdata;
669                 platform_device_register(&tegra_spi_device2);
670                 tegra_spi_slave_device1.dev.platform_data = &cardhu_spi_pdata;
671                 platform_device_register(&tegra_spi_slave_device1);
672         }
673 }
674
675 static void __init cardhu_dtv_init(void)
676 {
677         struct board_info board_info;
678
679         tegra_get_board_info(&board_info);
680
681         if (board_info.board_id == BOARD_E1186)
682                 platform_device_register(&tegra_dtv_device);
683 }
684
685 static struct resource tegra_rtc_resources[] = {
686         [0] = {
687                 .start = TEGRA_RTC_BASE,
688                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
689                 .flags = IORESOURCE_MEM,
690         },
691         [1] = {
692                 .start = INT_RTC,
693                 .end = INT_RTC,
694                 .flags = IORESOURCE_IRQ,
695         },
696 };
697
698 static struct platform_device tegra_rtc_device = {
699         .name = "tegra_rtc",
700         .id   = -1,
701         .resource = tegra_rtc_resources,
702         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
703 };
704
705 static struct tegra_wm8903_platform_data cardhu_audio_wm8903_pdata = {
706         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
707         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
708         .gpio_hp_mute           = -1,
709         .gpio_int_mic_en        = -1,
710         .gpio_ext_mic_en        = -1,
711 };
712
713 static struct tegra_asoc_platform_data cardhu_audio_max98095_pdata = {
714         .gpio_spkr_en           = -1,
715         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
716         .gpio_hp_mute           = -1,
717         .gpio_int_mic_en        = -1,
718         .gpio_ext_mic_en        = -1,
719 };
720
721 static struct platform_device cardhu_audio_wm8903_device = {
722         .name   = "tegra-snd-wm8903",
723         .id     = 0,
724         .dev    = {
725                 .platform_data = &cardhu_audio_wm8903_pdata,
726         },
727 };
728
729 static struct platform_device cardhu_audio_max98095_device = {
730         .name   = "tegra-snd-max98095",
731         .id     = 0,
732         .dev    = {
733                 .platform_data = &cardhu_audio_max98095_pdata,
734         },
735 };
736
737 static struct tegra_asoc_platform_data cardhu_audio_aic326x_pdata = {
738         .gpio_spkr_en           = -1,
739         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
740         .gpio_hp_mute           = -1,
741         .gpio_int_mic_en        = -1,
742         .gpio_ext_mic_en        = -1,
743         /*defaults for Verbier-Cardhu board with TI AIC326X codec*/
744         .audio_port_id          = {
745                 [HIFI_CODEC] = 0,
746                 [BASEBAND] = -1,
747                 [BT_SCO] = 3,
748         },
749         .baseband_param         = {
750                 .rate = -1,
751                 .channels = -1,
752         },
753 };
754
755 static struct platform_device cardhu_audio_aic326x_device = {
756         .name   = "tegra-snd-aic326x",
757         .id     = 0,
758         .dev    = {
759                 .platform_data  = &cardhu_audio_aic326x_pdata,
760         },
761 };
762
763 static struct platform_device *cardhu_devices[] __initdata = {
764         &tegra_pmu_device,
765         &tegra_rtc_device,
766         &tegra_udc_device,
767 #if defined(CONFIG_TEGRA_IOVMM_SMMU) ||  defined(CONFIG_TEGRA_IOMMU_SMMU)
768         &tegra_smmu_device,
769 #endif
770         &tegra_wdt_device,
771 #if defined(CONFIG_TEGRA_AVP)
772         &tegra_avp_device,
773 #endif
774         &tegra_camera,
775 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
776         &tegra_se_device,
777 #endif
778         &tegra_ahub_device,
779         &tegra_dam_device0,
780         &tegra_dam_device1,
781         &tegra_dam_device2,
782         &tegra_i2s_device0,
783         &tegra_i2s_device1,
784         &tegra_i2s_device3,
785         &tegra_spdif_device,
786         &spdif_dit_device,
787         &bluetooth_dit_device,
788         &baseband_dit_device,
789         &cardhu_bt_rfkill_device,
790         &tegra_pcm_device,
791         &cardhu_audio_wm8903_device,
792         &cardhu_audio_max98095_device,
793         &cardhu_audio_aic326x_device,
794         &tegra_hda_device,
795 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
796         &tegra_aes_device,
797 #endif
798 };
799
800 #define E1506_MXT_CONFIG_CRC 0x62F903
801 static const u8 e1506_config[] = {
802         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
803         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x05, 0x01, 0x00,
804         0x00, 0x1E, 0x0A, 0x8B, 0x00, 0x00, 0x13, 0x0B,
805         0x00, 0x10, 0x32, 0x03, 0x03, 0x00, 0x03, 0x01,
806         0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xBF, 0x03, 0x1B,
807         0x02, 0x00, 0x00, 0x37, 0x37, 0x00, 0x00, 0x00,
808         0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
809         0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
810         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
811         0x00, 0x00, 0x00, 0xA9, 0x7F, 0x9A, 0x0E, 0x00,
812         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
813         0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00,
814         0x00, 0x00, 0x03, 0x23, 0x00, 0x00, 0x00, 0x0A,
815         0x0F, 0x14, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00,
816         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
817         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
818         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
819         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
820         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
821         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
822         0x00, 0x00, 0x00, 0x01, 0x00, 0x03, 0x08, 0x10,
823         0x00
824 };
825
826 #define MXT_CONFIG_CRC  0xD62DE8
827 static const u8 config[] = {
828         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
829         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
830         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
831         0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
832         0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
833         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
834         0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
835         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
836         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
837         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
838         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
839         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
840         0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
841         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
842         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
843         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
844         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
845         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
846         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
847         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
848 };
849
850 #define MXT_CONFIG_CRC_SKU2000  0xA24D9A
851 static const u8 config_sku2000[] = {
852         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
853         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
854         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
855         0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00,  //23=thr  2 di
856         0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
857         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
858         0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00,  //0A=limit
859         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
860         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
861         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
862         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
863         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
864         0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
865         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
866         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
867         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
868         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
869         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
870         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
871         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
872 };
873
874 static struct mxt_platform_data atmel_mxt_info = {
875         .x_line         = 27,
876         .y_line         = 42,
877         .x_size         = 768,
878         .y_size         = 1366,
879         .blen           = 0x20,
880         .threshold      = 0x3C,
881         .voltage        = 3300000,              /* 3.3V */
882         .orient         = 5,
883         .config         = config,
884         .config_length  = 157,
885         .config_crc     = MXT_CONFIG_CRC,
886         .irqflags       = IRQF_TRIGGER_FALLING,
887 /*      .read_chg       = &read_chg, */
888         .read_chg       = NULL,
889 };
890
891 static struct mxt_platform_data e1506_atmel_mxt_info = {
892         .x_line         = 19,
893         .y_line         = 11,
894         .x_size         = 960,
895         .y_size         = 540,
896         .blen           = 0x10,
897         .threshold      = 0x32,
898         .voltage        = 3300000,              /* 3.3V */
899         .orient         = 3,
900         .config         = e1506_config,
901         .config_length  = 168,
902         .config_crc     = E1506_MXT_CONFIG_CRC,
903         .irqflags       = IRQF_TRIGGER_FALLING,
904 /*      .read_chg       = &read_chg, */
905         .read_chg       = NULL,
906 };
907
908 static struct i2c_board_info __initdata atmel_i2c_info[] = {
909         {
910                 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
911                 .platform_data = &atmel_mxt_info,
912         }
913 };
914
915 static struct i2c_board_info __initdata e1506_atmel_i2c_info[] = {
916         {
917                 I2C_BOARD_INFO("atmel_mxt_ts", 0x4A),
918                 .platform_data = &e1506_atmel_mxt_info,
919         }
920 };
921
922 static __initdata struct tegra_clk_init_table spi_clk_init_table[] = {
923         /* name         parent          rate            enabled */
924         { "sbc1",       "pll_p",        52000000,       true},
925         { NULL,         NULL,           0,              0},
926 };
927
928 static int __init cardhu_touch_init(void)
929 {
930         struct board_info BoardInfo, DisplayBoardInfo;
931
932         tegra_get_board_info(&BoardInfo);
933         tegra_get_display_board_info(&DisplayBoardInfo);
934         if (DisplayBoardInfo.board_id == BOARD_DISPLAY_PM313) {
935                 tegra_clk_init_from_table(spi_clk_init_table);
936
937                 touch_init_raydium(TEGRA_GPIO_PH4, TEGRA_GPIO_PH6, 2);
938         } else {
939                 gpio_request(TEGRA_GPIO_PH4, "atmel-irq");
940                 gpio_direction_input(TEGRA_GPIO_PH4);
941
942                 gpio_request(TEGRA_GPIO_PH6, "atmel-reset");
943                 gpio_direction_output(TEGRA_GPIO_PH6, 0);
944                 msleep(1);
945                 gpio_set_value(TEGRA_GPIO_PH6, 1);
946                 msleep(100);
947
948                 if ((BoardInfo.sku & SKU_TOUCH_MASK) == SKU_TOUCH_2000) {
949                         atmel_mxt_info.config = config_sku2000;
950                         atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
951                 }
952
953                 if (DisplayBoardInfo.board_id == BOARD_DISPLAY_E1506) {
954                         e1506_atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH4);
955                         i2c_register_board_info(1, e1506_atmel_i2c_info, 1);
956                 } else {
957                         atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH4);
958                         i2c_register_board_info(1, atmel_i2c_info, 1);
959                 }
960         }
961
962         return 0;
963 }
964
965 #if defined(CONFIG_USB_SUPPORT)
966
967 static void cardu_usb_hsic_postsupend(void)
968 {
969 #ifdef CONFIG_TEGRA_BB_XMM_POWER
970         baseband_xmm_set_power_status(BBXMM_PS_L2);
971 #endif
972 }
973
974 static void cardu_usb_hsic_preresume(void)
975 {
976 #ifdef CONFIG_TEGRA_BB_XMM_POWER
977         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
978 #endif
979 }
980
981 static void cardu_usb_hsic_phy_ready(void)
982 {
983 #ifdef CONFIG_TEGRA_BB_XMM_POWER
984         baseband_xmm_set_power_status(BBXMM_PS_L0);
985 #endif
986 }
987
988 static void cardu_usb_hsic_phy_off(void)
989 {
990 #ifdef CONFIG_TEGRA_BB_XMM_POWER
991         baseband_xmm_set_power_status(BBXMM_PS_L3);
992 #endif
993 }
994
995 static struct tegra_usb_phy_platform_ops hsic_xmm_plat_ops = {
996         .post_suspend = cardu_usb_hsic_postsupend,
997         .pre_resume = cardu_usb_hsic_preresume,
998         .port_power = cardu_usb_hsic_phy_ready,
999         .post_phy_off = cardu_usb_hsic_phy_off,
1000 };
1001
1002 static struct tegra_usb_platform_data tegra_ehci2_hsic_xmm_pdata = {
1003         .port_otg = false,
1004         .has_hostpc = true,
1005         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
1006         .op_mode        = TEGRA_USB_OPMODE_HOST,
1007         .u_data.host = {
1008                 .vbus_gpio = -1,
1009                 .hot_plug = false,
1010                 .remote_wakeup_supported = false,
1011                 .power_off_on_suspend = false,
1012         },
1013         .u_cfg.hsic = {
1014                 .sync_start_delay = 9,
1015                 .idle_wait_delay = 17,
1016                 .term_range_adj = 0,
1017                 .elastic_underrun_limit = 16,
1018                 .elastic_overrun_limit = 16,
1019         },
1020         .ops = &hsic_xmm_plat_ops,
1021 };
1022 #endif
1023
1024 static int hsic_enable_gpio = -1;
1025 static int hsic_reset_gpio = -1;
1026
1027 void hsic_platform_open(void)
1028 {
1029         int reset_gpio = 0, enable_gpio = 0;
1030
1031         if (hsic_enable_gpio != -1)
1032                 enable_gpio = gpio_request(hsic_enable_gpio, "uhsic_enable");
1033         if (hsic_reset_gpio != -1)
1034                 reset_gpio = gpio_request(hsic_reset_gpio, "uhsic_reset");
1035         /* hsic enable signal deasserted, hsic reset asserted */
1036         if (!enable_gpio)
1037                 gpio_direction_output(hsic_enable_gpio, 0 /* deasserted */);
1038         if (!reset_gpio)
1039                 gpio_direction_output(hsic_reset_gpio, 0 /* asserted */);
1040         if (!enable_gpio)
1041                 tegra_gpio_enable(hsic_enable_gpio);
1042         if (!reset_gpio)
1043                 tegra_gpio_enable(hsic_reset_gpio);
1044         /* keep hsic reset asserted for 1 ms */
1045         udelay(1000);
1046         /* enable (power on) hsic */
1047         if (!enable_gpio)
1048                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
1049         udelay(1000);
1050         /* deassert reset */
1051         if (!reset_gpio)
1052                 gpio_set_value_cansleep(hsic_reset_gpio, 1);
1053
1054 }
1055
1056 void hsic_platform_close(void)
1057 {
1058         if (hsic_enable_gpio != -1) {
1059                 gpio_set_value(hsic_enable_gpio, 0);
1060                 gpio_free(hsic_enable_gpio);
1061         }
1062         if (hsic_reset_gpio != -1) {
1063                 gpio_set_value(hsic_reset_gpio, 0);
1064                 gpio_free(hsic_reset_gpio);
1065         }
1066 }
1067
1068 void hsic_power_on(void)
1069 {
1070         if (hsic_enable_gpio != -1) {
1071                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
1072                 udelay(1000);
1073         }
1074 }
1075
1076 void hsic_power_off(void)
1077 {
1078         if (hsic_enable_gpio != -1) {
1079                 gpio_set_value_cansleep(hsic_enable_gpio, 0);
1080                 udelay(1000);
1081         }
1082 }
1083
1084 #if defined(CONFIG_USB_SUPPORT)
1085 static struct tegra_usb_phy_platform_ops hsic_plat_ops = {
1086         .open = hsic_platform_open,
1087         .close = hsic_platform_close,
1088         .pre_phy_on = hsic_power_on,
1089         .post_phy_off = hsic_power_off,
1090 };
1091
1092 static struct tegra_usb_platform_data tegra_ehci2_hsic_pdata = {
1093         .port_otg = false,
1094         .has_hostpc = true,
1095         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
1096         .op_mode        = TEGRA_USB_OPMODE_HOST,
1097         .u_data.host = {
1098                 .vbus_gpio = -1,
1099                 .hot_plug = false,
1100                 .remote_wakeup_supported = false,
1101                 .power_off_on_suspend = false,
1102         },
1103         .u_cfg.hsic = {
1104                 .sync_start_delay = 9,
1105                 .idle_wait_delay = 17,
1106                 .term_range_adj = 0,
1107                 .elastic_underrun_limit = 16,
1108                 .elastic_overrun_limit = 16,
1109         },
1110         .ops = &hsic_plat_ops,
1111 };
1112
1113 static struct tegra_usb_platform_data tegra_udc_pdata = {
1114         .port_otg = true,
1115         .has_hostpc = true,
1116         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1117         .op_mode = TEGRA_USB_OPMODE_DEVICE,
1118         .u_data.dev = {
1119                 .vbus_pmu_irq = 0,
1120                 .vbus_gpio = -1,
1121                 .charging_supported = false,
1122                 .remote_wakeup_supported = false,
1123         },
1124         .u_cfg.utmi = {
1125                 .hssync_start_delay = 0,
1126                 .elastic_limit = 16,
1127                 .idle_wait_delay = 17,
1128                 .term_range_adj = 6,
1129                 .xcvr_setup = 8,
1130                 .xcvr_lsfslew = 2,
1131                 .xcvr_lsrslew = 2,
1132                 .xcvr_setup_offset = 0,
1133                 .xcvr_use_fuses = 1,
1134         },
1135 };
1136
1137 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
1138         .port_otg = false,
1139         .has_hostpc = true,
1140         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1141         .op_mode        = TEGRA_USB_OPMODE_HOST,
1142         .u_data.host = {
1143                 .vbus_gpio = -1,
1144                 .hot_plug = false,
1145                 .remote_wakeup_supported = true,
1146                 .power_off_on_suspend = true,
1147         },
1148         .u_cfg.utmi = {
1149                 .hssync_start_delay = 0,
1150                 .elastic_limit = 16,
1151                 .idle_wait_delay = 17,
1152                 .term_range_adj = 6,
1153                 .xcvr_setup = 15,
1154                 .xcvr_lsfslew = 2,
1155                 .xcvr_lsrslew = 2,
1156                 .xcvr_setup_offset = 0,
1157                 .xcvr_use_fuses = 1,
1158         },
1159 };
1160
1161 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
1162         .port_otg = false,
1163         .has_hostpc = true,
1164         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1165         .op_mode = TEGRA_USB_OPMODE_HOST,
1166         .u_data.host = {
1167                 .vbus_gpio = -1,
1168                 .vbus_reg = "vdd_vbus_typea_usb",
1169                 .hot_plug = true,
1170                 .remote_wakeup_supported = true,
1171                 .power_off_on_suspend = true,
1172         },
1173         .u_cfg.utmi = {
1174                 .hssync_start_delay = 0,
1175                 .elastic_limit = 16,
1176                 .idle_wait_delay = 17,
1177                 .term_range_adj = 6,
1178                 .xcvr_setup = 8,
1179                 .xcvr_lsfslew = 2,
1180                 .xcvr_lsrslew = 2,
1181                 .xcvr_setup_offset = 0,
1182                 .xcvr_use_fuses = 1,
1183         },
1184 };
1185
1186 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
1187         .port_otg = true,
1188         .has_hostpc = true,
1189         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1190         .op_mode = TEGRA_USB_OPMODE_HOST,
1191         .u_data.host = {
1192                 .vbus_gpio = -1,
1193                 .vbus_reg = "vdd_vbus_micro_usb",
1194                 .hot_plug = true,
1195                 .remote_wakeup_supported = true,
1196                 .power_off_on_suspend = true,
1197         },
1198         .u_cfg.utmi = {
1199                 .hssync_start_delay = 0,
1200                 .elastic_limit = 16,
1201                 .idle_wait_delay = 17,
1202                 .term_range_adj = 6,
1203                 .xcvr_setup = 15,
1204                 .xcvr_lsfslew = 2,
1205                 .xcvr_lsrslew = 2,
1206                 .xcvr_setup_offset = 0,
1207                 .xcvr_use_fuses = 1,
1208         },
1209 };
1210
1211 static struct tegra_usb_otg_data tegra_otg_pdata = {
1212         .ehci_device = &tegra_ehci1_device,
1213         .ehci_pdata = &tegra_ehci1_utmi_pdata,
1214 };
1215 #endif
1216
1217 #if defined(CONFIG_USB_SUPPORT)
1218 static void cardhu_usb_init(void)
1219 {
1220         struct board_info bi;
1221
1222         tegra_get_board_info(&bi);
1223
1224         /* OTG should be the first to be registered */
1225         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1226         platform_device_register(&tegra_otg_device);
1227
1228         /* setup the udc platform data */
1229         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1230
1231         if (bi.board_id == BOARD_PM267) {
1232                 hsic_enable_gpio = EN_HSIC_GPIO;
1233                 hsic_reset_gpio = PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
1234                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1235                 platform_device_register(&tegra_ehci2_device);
1236         } else if (bi.board_id == BOARD_E1256) {
1237                 hsic_enable_gpio = EN_HSIC_GPIO;
1238                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1239                 platform_device_register(&tegra_ehci2_device);
1240         } else if (bi.board_id == BOARD_E1186) {
1241                 tegra_ehci2_device.dev.platform_data =
1242                                                 &tegra_ehci2_hsic_xmm_pdata;
1243                 /* ehci2 registration happens in baseband-xmm-power  */
1244         } else {
1245                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_utmi_pdata;
1246                 platform_device_register(&tegra_ehci2_device);
1247         }
1248
1249         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
1250         platform_device_register(&tegra_ehci3_device);
1251
1252 }
1253 #else
1254 static void cardhu_usb_init(void) { }
1255 #endif
1256
1257 static struct baseband_power_platform_data tegra_baseband_power_data = {
1258         .baseband_type = BASEBAND_XMM,
1259         .modem = {
1260         .xmm = {
1261                         .bb_rst = XMM_GPIO_BB_RST,
1262                         .bb_on = XMM_GPIO_BB_ON,
1263                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1264                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1265                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1266                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1267                         .hsic_device = &tegra_ehci2_device,
1268                 },
1269         },
1270 };
1271
1272 static struct platform_device tegra_baseband_power_device = {
1273         .name = "baseband_xmm_power",
1274         .id = -1,
1275         .dev = {
1276                 .platform_data = &tegra_baseband_power_data,
1277         },
1278 };
1279
1280 static struct platform_device tegra_baseband_power2_device = {
1281         .name = "baseband_xmm_power2",
1282         .id = -1,
1283         .dev = {
1284                 .platform_data = &tegra_baseband_power_data,
1285         },
1286 };
1287
1288
1289 static struct tegra_pci_platform_data cardhu_pci_platform_data = {
1290         .port_status[0] = 1,
1291         .port_status[1] = 1,
1292         .port_status[2] = 1,
1293         .use_dock_detect        = 0,
1294         .gpio           = 0,
1295 };
1296
1297 static void cardhu_pci_init(void)
1298 {
1299         struct board_info board_info;
1300
1301         tegra_get_board_info(&board_info);
1302         if (board_info.board_id == BOARD_E1291) {
1303                 cardhu_pci_platform_data.port_status[0] = 0;
1304                 cardhu_pci_platform_data.port_status[1] = 0;
1305                 cardhu_pci_platform_data.port_status[2] = 1;
1306                 cardhu_pci_platform_data.use_dock_detect = 1;
1307                 cardhu_pci_platform_data.gpio = DOCK_DETECT_GPIO;
1308         }
1309         if ((board_info.board_id == BOARD_E1186) ||
1310                 (board_info.board_id == BOARD_E1187) ||
1311                 (board_info.board_id == BOARD_E1291)) {
1312                 tegra_pci_device.dev.platform_data = &cardhu_pci_platform_data;
1313                 platform_device_register(&tegra_pci_device);
1314         }
1315 }
1316
1317 static void cardhu_modem_init(void)
1318 {
1319         struct board_info board_info;
1320         int w_disable_gpio, ret;
1321
1322         tegra_get_board_info(&board_info);
1323         switch (board_info.board_id) {
1324         case BOARD_E1291:
1325         case BOARD_E1198:
1326                 if (((board_info.board_id == BOARD_E1291) &&
1327                                 (board_info.fab < BOARD_FAB_A03)) ||
1328                         ((board_info.board_id == BOARD_E1198) &&
1329                                         (board_info.fab < BOARD_FAB_A02))) {
1330                         w_disable_gpio = TEGRA_GPIO_PH5;
1331                 } else {
1332                         w_disable_gpio = TEGRA_GPIO_PDD5;
1333                 }
1334
1335                 ret = gpio_request(w_disable_gpio, "w_disable_gpio");
1336                 if (ret < 0)
1337                         pr_err("%s: gpio_request failed for gpio %d\n",
1338                                 __func__, w_disable_gpio);
1339                 else
1340                         gpio_direction_input(w_disable_gpio);
1341
1342                 /* E1291-A04 & E1198:A02: Set PERST signal to high */
1343                 if (((board_info.board_id == BOARD_E1291) &&
1344                                 (board_info.fab >= BOARD_FAB_A04)) ||
1345                         ((board_info.board_id == BOARD_E1198) &&
1346                                         (board_info.fab >= BOARD_FAB_A02))) {
1347                         ret = gpio_request(TEGRA_GPIO_PH7, "modem_perst");
1348                         if (ret < 0) {
1349                                 pr_err("%s(): Error in allocating gpio "
1350                                         "TEGRA_GPIO_PH7\n", __func__);
1351                                 break;
1352                         }
1353                         gpio_direction_output(TEGRA_GPIO_PH7, 1);
1354                 }
1355                 break;
1356         case BOARD_E1186:
1357                 platform_device_register(&tegra_baseband_power_device);
1358                 platform_device_register(&tegra_baseband_power2_device);
1359                 break;
1360         default:
1361                 break;
1362         }
1363
1364 }
1365
1366 #ifdef CONFIG_SATA_AHCI_TEGRA
1367 static void cardhu_sata_init(void)
1368 {
1369         platform_device_register(&tegra_sata_device);
1370 }
1371 #else
1372 static void cardhu_sata_init(void) { }
1373 #endif
1374
1375 static void __init tegra_cardhu_init(void)
1376 {
1377         tegra_thermal_init(&thermal_data,
1378                                 throttle_list,
1379                                 ARRAY_SIZE(throttle_list));
1380         tegra_clk_init_from_table(cardhu_clk_init_table);
1381         tegra_enable_pinmux();
1382         cardhu_pinmux_init();
1383         cardhu_i2c_init();
1384         cardhu_spi_init();
1385         cardhu_usb_init();
1386 #ifdef CONFIG_TEGRA_EDP_LIMITS
1387         cardhu_edp_init();
1388 #endif
1389         cardhu_uart_init();
1390         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
1391         tegra_ram_console_debug_init();
1392         cardhu_sdhci_init();
1393         cardhu_regulator_init();
1394         cardhu_dtv_init();
1395         cardhu_suspend_init();
1396         cardhu_touch_init();
1397         cardhu_modem_init();
1398         cardhu_kbc_init();
1399         cardhu_scroll_init();
1400         cardhu_keys_init();
1401         cardhu_panel_init();
1402         cardhu_pmon_init();
1403         cardhu_sensors_init();
1404         cardhu_setup_bluesleep();
1405         cardhu_sata_init();
1406         //audio_wired_jack_init();
1407         cardhu_pins_state_init();
1408         cardhu_emc_init();
1409         tegra_release_bootloader_fb();
1410         cardhu_pci_init();
1411 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1412         tegra_wdt_recovery_init();
1413 #endif
1414 }
1415
1416 static void __init tegra_cardhu_reserve(void)
1417 {
1418 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1419         /* support 1920X1200 with 24bpp */
1420         tegra_reserve(0, SZ_8M + SZ_1M, SZ_8M + SZ_1M);
1421 #else
1422         tegra_reserve(SZ_128M, SZ_8M, SZ_8M);
1423 #endif
1424         tegra_ram_console_debug_reserve(SZ_1M);
1425 }
1426
1427 MACHINE_START(CARDHU, "cardhu")
1428         .atag_offset    = 0x100,
1429         .soc            = &tegra_soc_desc,
1430         .map_io         = tegra_map_common_io,
1431         .reserve        = tegra_cardhu_reserve,
1432         .init_early     = tegra30_init_early,
1433         .init_irq       = tegra_init_irq,
1434         .handle_irq     = gic_handle_irq,
1435         .timer          = &tegra_timer,
1436         .init_machine   = tegra_cardhu_init,
1437         .restart        = tegra_assert_system_reset,
1438 MACHINE_END