ARM: tegra: thermal: Remove tegra therm dependency
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <linux/spi/spi.h>
37 #include <linux/spi/rm31080a_ts.h>
38 #include <linux/i2c/atmel_mxt_ts.h>
39 #include <linux/tegra_uart.h>
40 #include <linux/memblock.h>
41 #include <linux/spi-tegra.h>
42 #include <linux/nfc/pn544.h>
43 #include <linux/rfkill-gpio.h>
44 #include <linux/of_platform.h>
45
46 #include <sound/wm8903.h>
47 #include <sound/max98095.h>
48 #include <media/tegra_dtv.h>
49
50 #include <asm/hardware/gic.h>
51
52 #include <mach/edp.h>
53 #include <mach/clk.h>
54 #include <mach/iomap.h>
55 #include <mach/irqs.h>
56 #include <mach/pinmux.h>
57 #include <mach/iomap.h>
58 #include <mach/io_dpd.h>
59 #include <mach/io.h>
60 #include <mach/i2s.h>
61 #include <mach/tegra_asoc_pdata.h>
62 #include <mach/tegra_wm8903_pdata.h>
63 #include <mach/usb_phy.h>
64 #include <mach/pci.h>
65 #include <mach/gpio-tegra.h>
66 #include <mach/tegra_fiq_debugger.h>
67
68 #include <asm/hardware/gic.h>
69 #include <asm/mach-types.h>
70 #include <asm/mach/arch.h>
71
72 #include "board.h"
73 #include "board-common.h"
74 #include "clock.h"
75 #include "board-cardhu.h"
76 #include "board-touch-raydium.h"
77 #include "devices.h"
78 #include "gpio-names.h"
79 #include "fuse.h"
80 #include "pm.h"
81 #include "baseband-xmm-power.h"
82 #include "wdt-recovery.h"
83 #include "common.h"
84
85 static struct rfkill_gpio_platform_data cardhu_bt_rfkill_pdata[] = {
86         {
87                 .name           = "bt_rfkill",
88                 .shutdown_gpio  = TEGRA_GPIO_PU0,
89                 .reset_gpio     = TEGRA_GPIO_INVALID,
90                 .type           = RFKILL_TYPE_BLUETOOTH,
91         },
92 };
93
94 static struct platform_device cardhu_bt_rfkill_device = {
95         .name = "rfkill_gpio",
96         .id             = -1,
97         .dev = {
98                 .platform_data = &cardhu_bt_rfkill_pdata,
99         },
100 };
101
102 static struct resource cardhu_bluesleep_resources[] = {
103         [0] = {
104                 .name = "gpio_host_wake",
105                         .start  = TEGRA_GPIO_PU6,
106                         .end    = TEGRA_GPIO_PU6,
107                         .flags  = IORESOURCE_IO,
108         },
109         [1] = {
110                 .name = "gpio_ext_wake",
111                         .start  = TEGRA_GPIO_PU1,
112                         .end    = TEGRA_GPIO_PU1,
113                         .flags  = IORESOURCE_IO,
114         },
115         [2] = {
116                 .name = "host_wake",
117                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
118         },
119 };
120
121 static struct platform_device cardhu_bluesleep_device = {
122         .name           = "bluesleep",
123         .id             = -1,
124         .num_resources  = ARRAY_SIZE(cardhu_bluesleep_resources),
125         .resource       = cardhu_bluesleep_resources,
126 };
127
128 static noinline void __init cardhu_setup_bluesleep(void)
129 {
130         cardhu_bluesleep_resources[2].start =
131                 cardhu_bluesleep_resources[2].end =
132                         gpio_to_irq(TEGRA_GPIO_PU6);
133         platform_device_register(&cardhu_bluesleep_device);
134         return;
135 }
136
137 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
138         /* name         parent          rate            enabled */
139         { "pll_m",      NULL,           0,              false},
140         { "hda",        "pll_p",        108000000,      false},
141         { "hda2codec_2x","pll_p",       48000000,       false},
142         { "pwm",        "pll_p",        3187500,        false},
143         { "blink",      "clk_32k",      32768,          true},
144         { "i2s0",       "pll_a_out0",   0,              false},
145         { "i2s1",       "pll_a_out0",   0,              false},
146         { "i2s3",       "pll_a_out0",   0,              false},
147         { "spdif_out",  "pll_a_out0",   0,              false},
148         { "d_audio",    "clk_m",        12000000,       false},
149         { "dam0",       "clk_m",        12000000,       false},
150         { "dam1",       "clk_m",        12000000,       false},
151         { "dam2",       "clk_m",        12000000,       false},
152         { "audio1",     "i2s1_sync",    0,              false},
153         { "audio3",     "i2s3_sync",    0,              false},
154         { "vi_sensor",  "pll_p",        150000000,      false},
155         { "i2c1",       "pll_p",        3200000,        false},
156         { "i2c2",       "pll_p",        3200000,        false},
157         { "i2c3",       "pll_p",        3200000,        false},
158         { "i2c4",       "pll_p",        3200000,        false},
159         { "i2c5",       "pll_p",        3200000,        false},
160         { "vi",         "pll_p",        0,              false},
161         { NULL,         NULL,           0,              0},
162 };
163
164 static struct pn544_i2c_platform_data nfc_pdata = {
165         .irq_gpio = TEGRA_GPIO_PX0,
166         .ven_gpio = TEGRA_GPIO_PP3,
167         .firm_gpio = TEGRA_GPIO_PO7,
168         };
169
170 static struct i2c_board_info __initdata cardhu_i2c_bus3_board_info[] = {
171         {
172                 I2C_BOARD_INFO("pn544", 0x28),
173                 .platform_data = &nfc_pdata,
174         },
175 };
176 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
177         .adapter_nr     = 0,
178         .bus_count      = 1,
179         .bus_clk_rate   = { 100000, 0 },
180         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
181         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
182         .arb_recovery = arb_lost_recovery,
183 };
184
185 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
186         .adapter_nr     = 1,
187         .bus_count      = 1,
188         .bus_clk_rate   = { 400000, 0 },
189         .is_clkon_always = true,
190         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
191         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
192         .arb_recovery = arb_lost_recovery,
193 };
194
195 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
196         .adapter_nr     = 2,
197         .bus_count      = 1,
198         .bus_clk_rate   = { 100000, 0 },
199         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
200         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
201         .arb_recovery = arb_lost_recovery,
202 };
203
204 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
205         .adapter_nr     = 3,
206         .bus_count      = 1,
207         .bus_clk_rate   = { 10000, 0 },
208         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
209         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
210         .arb_recovery = arb_lost_recovery,
211 };
212
213 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
214         .adapter_nr     = 4,
215         .bus_count      = 1,
216         .bus_clk_rate   = { 400000, 0 },
217         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
218         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
219         .arb_recovery = arb_lost_recovery,
220 };
221
222
223 #if 0
224 struct tegra_wired_jack_conf audio_wr_jack_conf = {
225         .hp_det_n = TEGRA_GPIO_PW2,
226         .en_mic_ext = TEGRA_GPIO_PX1,
227         .en_mic_int = TEGRA_GPIO_PX0,
228 };
229 #endif
230
231 static struct wm8903_platform_data cardhu_wm8903_pdata = {
232         .irq_active_low = 0,
233         .micdet_cfg = 0,
234         .micdet_delay = 100,
235         .gpio_base = CARDHU_GPIO_WM8903(0),
236         .gpio_cfg = {
237                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP1_FN_SHIFT),
238                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP2_FN_SHIFT) |
239                         WM8903_GP2_DIR,
240                 WM8903_GPIO_CONFIG_ZERO,
241                 0,
242                 0,
243         },
244 };
245
246 /* Equalizer filter coefs generated from the MAXIM MAX98095
247  * evkit software tool */
248 static struct max98095_eq_cfg max98095_eq_cfg[] = {
249         {
250                 .name = "FLAT",
251                 .rate = 44100,
252                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
253                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
254                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
255                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
256                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
257         },
258         {
259                 .name = "LOWPASS1K",
260                 .rate = 44100,
261                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
262                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
263                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
264                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
265                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
266         },
267         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
268                 .name = "HIBOOST",
269                 .rate = 44100,
270                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
271                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
272                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
273                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
274                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
275         },
276         { /* BASS=12dB, TREBLE=+12dB */
277                 .name = "LOUD12DB",
278                 .rate = 44100,
279                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
280                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
281                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
282                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
283                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
284         },
285         {
286                 .name = "FLAT",
287                 .rate = 16000,
288                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
289                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
290                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
291                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
292                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
293         },
294         {
295                 .name = "LOWPASS1K",
296                 .rate = 16000,
297                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
298                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
299                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
300                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
301                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
302         },
303         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
304                 .name = "HIBOOST",
305                 .rate = 16000,
306                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
307                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
308                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
309                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
310                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
311         },
312         { /* BASS=12dB, TREBLE=+12dB */
313                 .name = "LOUD12DB",
314                 .rate = 16000,
315                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
316                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
317                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
318                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
319                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
320         },
321 };
322
323 static struct max98095_pdata cardhu_max98095_pdata = {
324         /* equalizer configuration */
325         .eq_cfg = max98095_eq_cfg,
326         .eq_cfgcnt = ARRAY_SIZE(max98095_eq_cfg),
327
328         /* Biquad filter response configuration */
329         .bq_cfg = NULL,
330         .bq_cfgcnt = 0,
331
332         /* microphone configuration */
333         .digmic_left_mode = 1,
334         .digmic_right_mode = 1,
335 };
336
337 static struct i2c_board_info __initdata cardhu_codec_wm8903_info = {
338         I2C_BOARD_INFO("wm8903", 0x1a),
339         .platform_data = &cardhu_wm8903_pdata,
340 };
341
342 static struct i2c_board_info __initdata cardhu_codec_aic326x_info = {
343         I2C_BOARD_INFO("aic3262-codec", 0x18),
344 };
345
346 static struct i2c_board_info __initdata cardhu_codec_max98095_info = {
347         I2C_BOARD_INFO("max98095", 0x10),
348         .platform_data = &cardhu_max98095_pdata,
349 };
350
351 static void cardhu_i2c_init(void)
352 {
353         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
354         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
355         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
356         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
357         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
358
359         platform_device_register(&tegra_i2c_device5);
360         platform_device_register(&tegra_i2c_device4);
361         platform_device_register(&tegra_i2c_device3);
362         platform_device_register(&tegra_i2c_device2);
363         platform_device_register(&tegra_i2c_device1);
364
365         cardhu_codec_wm8903_info.irq = cardhu_codec_max98095_info.irq =
366                 cardhu_codec_aic326x_info.irq = gpio_to_irq(TEGRA_GPIO_CDC_IRQ);
367         i2c_register_board_info(4, &cardhu_codec_wm8903_info, 1);
368         i2c_register_board_info(4, &cardhu_codec_max98095_info, 1);
369         i2c_register_board_info(4, &cardhu_codec_aic326x_info, 1);
370
371         cardhu_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PX0);
372         i2c_register_board_info(2, cardhu_i2c_bus3_board_info, 1);
373 }
374
375 static struct platform_device *cardhu_uart_devices[] __initdata = {
376         &tegra_uarta_device,
377         &tegra_uartb_device,
378         &tegra_uartc_device,
379         &tegra_uartd_device,
380         &tegra_uarte_device,
381 };
382 static struct uart_clk_parent uart_parent_clk[] = {
383         [0] = {.name = "clk_m"},
384         [1] = {.name = "pll_p"},
385 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
386         [2] = {.name = "pll_m"},
387 #endif
388 };
389
390 static struct tegra_uart_platform_data cardhu_uart_pdata;
391 static struct tegra_uart_platform_data cardhu_loopback_uart_pdata;
392
393 static int __init uart_debug_init(void)
394 {
395         struct board_info board_info;
396         int debug_port_id;
397         int default_debug_port = 0;
398
399         tegra_get_board_info(&board_info);
400
401         /* UARTB is debug port
402          *       for SLT - E1186/E1187/PM269
403          *       for E1256/E1257
404          */
405         if (((board_info.sku & SKU_SLT_ULPI_SUPPORT) &&
406                 ((board_info.board_id == BOARD_E1186) ||
407                 (board_info.board_id == BOARD_E1187) ||
408                 (board_info.board_id == BOARD_PM269))) ||
409                 (board_info.board_id == BOARD_E1256) ||
410                 (board_info.board_id == BOARD_E1257))
411                         default_debug_port = 1;
412
413         debug_port_id = uart_console_debug_init(default_debug_port);
414         if (debug_port_id < 0)
415                 return debug_port_id;
416
417 #ifdef CONFIG_TEGRA_IRDA
418         if ((board_info.board_id == BOARD_E1186) ||
419                 (board_info.board_id == BOARD_E1198)) {
420                 if (debug_port_id == 1) {
421                         cardhu_irda_pdata.is_irda = false;
422                         pr_err("UARTB is not available for IrDA\n");
423                 }
424         }
425 #endif
426         cardhu_uart_devices[debug_port_id] = uart_console_debug_device;
427         return debug_port_id;
428 }
429
430 static void __init cardhu_uart_init(void)
431 {
432         struct clk *c;
433         int i;
434         struct board_info board_info;
435
436         tegra_get_board_info(&board_info);
437
438         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
439                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
440                 if (IS_ERR_OR_NULL(c)) {
441                         pr_err("Not able to get the clock for %s\n",
442                                                 uart_parent_clk[i].name);
443                         continue;
444                 }
445                 uart_parent_clk[i].parent_clk = c;
446                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
447         }
448         cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
449         cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
450         cardhu_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
451         cardhu_loopback_uart_pdata.parent_clk_count =
452                                                 ARRAY_SIZE(uart_parent_clk);
453         cardhu_loopback_uart_pdata.is_loopback = true;
454         tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
455         tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
456         tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
457         tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
458         /* UARTE is used for loopback test purpose */
459         tegra_uarte_device.dev.platform_data = &cardhu_loopback_uart_pdata;
460
461         /* Register low speed only if it is selected */
462         if (!is_tegra_debug_uartport_hs())
463                 uart_debug_init();
464
465 #ifdef CONFIG_TEGRA_IRDA
466         if (((board_info.board_id == BOARD_E1186) ||
467                 (board_info.board_id == BOARD_E1198)) &&
468                         cardhu_irda_pdata.is_irda) {
469                 cardhu_irda_pdata.parent_clk_list = uart_parent_clk;
470                 cardhu_irda_pdata.parent_clk_count =
471                                         ARRAY_SIZE(uart_parent_clk);
472
473                 tegra_uartb_device.dev.platform_data = &cardhu_irda_pdata;
474         }
475 #endif
476
477         platform_add_devices(cardhu_uart_devices,
478                                 ARRAY_SIZE(cardhu_uart_devices));
479 }
480
481 static struct platform_device tegra_camera = {
482         .name = "tegra_camera",
483         .id = -1,
484 };
485
486 static struct platform_device *cardhu_spi_devices[] __initdata = {
487         &tegra_spi_device4,
488 };
489
490 /*-----------------------------------------------------*/
491 /* Force Cardhu Direct Touch:
492         Valid Choices:
493         0 : Do not force Direct Touch
494         2 : RM_PLATFORM_C210 : Cardhu 10" J-Touch Panel
495         4 : RM_PLATFORM_P005 ; Pluto 5" J-Touch Panel
496 */
497 #define CARDHU_DT_PLATFORM      0 /* RM_PLATFORM_C210 */
498
499 static struct platform_device *touch_spi_device[] __initdata = {
500         &tegra_spi_device1,
501 };
502
503 struct spi_clk_parent spi_parent_clk[] = {
504         [0] = {.name = "pll_p"},
505 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
506         [1] = {.name = "pll_m"},
507         [2] = {.name = "clk_m"},
508 #else
509         [1] = {.name = "clk_m"},
510 #endif
511 };
512
513 static struct tegra_spi_platform_data cardhu_spi_pdata = {
514         .is_dma_based           = true,
515         .max_dma_buffer         = (16 * 1024),
516         .is_clkon_always        = false,
517         .max_rate               = 100000000,
518 };
519
520 static void __init cardhu_spi_init(void)
521 {
522         int i;
523         struct clk *c;
524         struct board_info board_info, display_board_info;
525
526         tegra_get_board_info(&board_info);
527         tegra_get_display_board_info(&display_board_info);
528
529         for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
530                 c = tegra_get_clock_by_name(spi_parent_clk[i].name);
531                 if (IS_ERR_OR_NULL(c)) {
532                         pr_err("Not able to get the clock for %s\n",
533                                                 spi_parent_clk[i].name);
534                         continue;
535                 }
536                 spi_parent_clk[i].parent_clk = c;
537                 spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
538         }
539         cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
540         cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
541         tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
542         platform_add_devices(cardhu_spi_devices,
543                                 ARRAY_SIZE(cardhu_spi_devices));
544
545         if ((display_board_info.board_id == BOARD_DISPLAY_PM313)
546                                                 || CARDHU_DT_PLATFORM) {
547                 platform_add_devices(touch_spi_device,
548                                 ARRAY_SIZE(touch_spi_device));
549         }
550
551         if (board_info.board_id == BOARD_E1198) {
552                 tegra_spi_device2.dev.platform_data = &cardhu_spi_pdata;
553                 platform_device_register(&tegra_spi_device2);
554                 tegra_spi_slave_device1.dev.platform_data = &cardhu_spi_pdata;
555                 platform_device_register(&tegra_spi_slave_device1);
556         }
557 }
558
559 static void __init cardhu_dtv_init(void)
560 {
561         struct board_info board_info;
562
563         tegra_get_board_info(&board_info);
564
565         if (board_info.board_id == BOARD_E1186)
566                 platform_device_register(&tegra_dtv_device);
567 }
568
569 static struct resource tegra_rtc_resources[] = {
570         [0] = {
571                 .start = TEGRA_RTC_BASE,
572                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
573                 .flags = IORESOURCE_MEM,
574         },
575         [1] = {
576                 .start = INT_RTC,
577                 .end = INT_RTC,
578                 .flags = IORESOURCE_IRQ,
579         },
580 };
581
582 static struct platform_device tegra_rtc_device = {
583         .name = "tegra_rtc",
584         .id   = -1,
585         .resource = tegra_rtc_resources,
586         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
587 };
588
589 static struct tegra_asoc_platform_data cardhu_audio_wm8903_pdata = {
590         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
591         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
592         .gpio_hp_mute           = -1,
593         .gpio_int_mic_en        = -1,
594         .gpio_ext_mic_en        = -1,
595         .i2s_param[HIFI_CODEC]  = {
596                 .audio_port_id  = 0,
597                 .is_i2s_master  = 1,
598                 .i2s_mode       = TEGRA_DAIFMT_I2S,
599         },
600         .i2s_param[BASEBAND]    = {
601                 .audio_port_id  = -1,
602         },
603         .i2s_param[BT_SCO]      = {
604                 .audio_port_id  = 3,
605                 .is_i2s_master  = 1,
606                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
607         },
608 };
609
610 static struct tegra_asoc_platform_data cardhu_audio_max98095_pdata = {
611         .gpio_spkr_en           = -1,
612         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
613         .gpio_hp_mute           = -1,
614         .gpio_int_mic_en        = -1,
615         .gpio_ext_mic_en        = -1,
616         .i2s_param[HIFI_CODEC]  = {
617                 .audio_port_id  = 0,
618                 .is_i2s_master  = 1,
619                 .i2s_mode       = TEGRA_DAIFMT_I2S,
620         },
621         .i2s_param[BASEBAND]    = {
622                 .audio_port_id  = -1,
623         },
624         .i2s_param[BT_SCO]      = {
625                 .audio_port_id  = 3,
626                 .is_i2s_master  = 1,
627                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
628         },
629 };
630
631 static struct platform_device cardhu_audio_wm8903_device = {
632         .name   = "tegra-snd-wm8903",
633         .id     = 0,
634         .dev    = {
635                 .platform_data = &cardhu_audio_wm8903_pdata,
636         },
637 };
638
639 static struct platform_device cardhu_audio_max98095_device = {
640         .name   = "tegra-snd-max98095",
641         .id     = 0,
642         .dev    = {
643                 .platform_data = &cardhu_audio_max98095_pdata,
644         },
645 };
646
647 static struct tegra_asoc_platform_data cardhu_audio_aic326x_pdata = {
648         .gpio_spkr_en           = -1,
649         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
650         .gpio_hp_mute           = -1,
651         .gpio_int_mic_en        = -1,
652         .gpio_ext_mic_en        = -1,
653         /*defaults for Verbier-Cardhu board with TI AIC326X codec*/
654         .i2s_param[HIFI_CODEC]  = {
655                 .audio_port_id  = 0,
656                 .is_i2s_master  = 1,
657                 .i2s_mode       = TEGRA_DAIFMT_I2S,
658                 .sample_size    = 16,
659         },
660         .i2s_param[BT_SCO]      = {
661                 .sample_size    = 16,
662                 .audio_port_id  = 3,
663                 .is_i2s_master  = 1,
664                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
665         },
666 };
667
668 static struct platform_device cardhu_audio_aic326x_device = {
669         .name   = "tegra-snd-aic326x",
670         .id     = 0,
671         .dev    = {
672                 .platform_data  = &cardhu_audio_aic326x_pdata,
673         },
674 };
675
676 static struct platform_device *cardhu_devices[] __initdata = {
677         &tegra_pmu_device,
678         &tegra_rtc_device,
679         &tegra_udc_device,
680         &tegra_wdt0_device,
681         &tegra_wdt1_device,
682         &tegra_wdt2_device,
683 #if defined(CONFIG_TEGRA_AVP)
684         &tegra_avp_device,
685 #endif
686         &tegra_camera,
687 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
688         &tegra_se_device,
689 #endif
690         &tegra_ahub_device,
691         &tegra_dam_device0,
692         &tegra_dam_device1,
693         &tegra_dam_device2,
694         &tegra_i2s_device0,
695         &tegra_i2s_device1,
696         &tegra_i2s_device3,
697         &tegra_spdif_device,
698         &spdif_dit_device,
699         &bluetooth_dit_device,
700         &baseband_dit_device,
701         &cardhu_bt_rfkill_device,
702         &tegra_pcm_device,
703         &cardhu_audio_wm8903_device,
704         &cardhu_audio_max98095_device,
705         &cardhu_audio_aic326x_device,
706         &tegra_hda_device,
707         &tegra_cec_device,
708 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
709         &tegra_aes_device,
710 #endif
711 };
712
713 static u8 read_chg(void)
714 {
715         return gpio_get_value(TEGRA_GPIO_PH4);
716 }
717
718 #define MXT_CFG_NAME            "Android_Cardhu_2012-01-31.cfg"
719
720 static struct mxt_platform_data atmel_mxt_info = {
721         .irqflags       = IRQF_TRIGGER_FALLING,
722         .read_chg       = &read_chg,
723         .mxt_cfg_name   = MXT_CFG_NAME,
724 };
725
726 static struct i2c_board_info __initdata atmel_i2c_info[] = {
727         {
728                 I2C_BOARD_INFO("atmel_mxt_ts", MXT1386_I2C_ADDR3),
729                 .flags = I2C_CLIENT_WAKE,
730                 .platform_data = &atmel_mxt_info,
731         }
732 };
733
734 static struct i2c_board_info __initdata e1506_atmel_i2c_info[] = {
735         {
736                 I2C_BOARD_INFO("atmel_mxt_ts", MXT224_I2C_ADDR1),
737                 .flags = I2C_CLIENT_WAKE,
738                 .platform_data = &atmel_mxt_info,
739         }
740 };
741
742 /* Raydium touchscreen                     Driver data */
743 static __initdata struct tegra_clk_init_table spi_clk_init_table[] = {
744         /* name         parent          rate            enabled */
745         { "sbc1",       "pll_p",        52000000,       true},
746         { NULL,         NULL,           0,              0},
747 };
748
749 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
750         /* name         parent          rate            enabled */
751         { "extern3",    "pll_p",        41000000,       true},
752         { "clk_out_3",  "extern3",      40800000,       true},
753         { NULL,         NULL,           0,              0},
754 };
755
756 struct rm_spi_ts_platform_data rm31080ts_cardhu_data = {
757         .gpio_reset = 0,
758         .config = 0,
759 };
760
761 struct spi_board_info rm31080a_cardhu_spi_board[1] = {
762         {
763          .modalias = "rm_ts_spidev",
764          .bus_num = 0,
765          .chip_select = 0,
766          .max_speed_hz = 13 * 1000 * 1000,
767          .mode = SPI_MODE_0,
768          .platform_data = &rm31080ts_cardhu_data,
769          },
770 };
771
772 static int __init cardhu_touch_init(void)
773 {
774         struct board_info BoardInfo, DisplayBoardInfo;
775         int ret;
776
777         tegra_get_board_info(&BoardInfo);
778         tegra_get_display_board_info(&DisplayBoardInfo);
779         if ((DisplayBoardInfo.board_id == BOARD_DISPLAY_PM313)
780                                                 || CARDHU_DT_PLATFORM) {
781                 tegra_clk_init_from_table(spi_clk_init_table);
782                 tegra_clk_init_from_table(touch_clk_init_table);
783                 clk_enable(tegra_get_clock_by_name("clk_out_3"));
784                 rm31080ts_cardhu_data.platform_id = CARDHU_DT_PLATFORM;
785                 rm31080a_cardhu_spi_board[0].irq = gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
786                 touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
787                                         TOUCH_GPIO_RST_RAYDIUM_SPI,
788                                         &rm31080ts_cardhu_data,
789                                         &rm31080a_cardhu_spi_board[0],
790                                         ARRAY_SIZE(rm31080a_cardhu_spi_board));
791         } else {
792                 ret = gpio_request(TEGRA_GPIO_PH4, "atmel-irq");
793                 if (ret < 0) {
794                         pr_err("%s() Error in gpio_request() for gpio %d\n",
795                                         __func__, ret);
796                 }
797                 ret = gpio_direction_input(TEGRA_GPIO_PH4);
798                 if (ret < 0) {
799                         pr_err("%s() Error in setting gpio %d to in/out\n",
800                                          __func__, ret);
801                         gpio_free(TEGRA_GPIO_PH4);
802                 }
803                 ret = gpio_request(TEGRA_GPIO_PH6, "atmel-reset");
804                 if (ret < 0) {
805                         pr_err("%s() Error in gpio_request() for gpio %d\n",
806                                         __func__, ret);
807                 }
808                 ret = gpio_direction_output(TEGRA_GPIO_PH6, 0);
809                 if (ret < 0) {
810                         pr_err("%s() Error in setting gpio %d to in/out\n",
811                                          __func__, ret);
812                         gpio_free(TEGRA_GPIO_PH6);
813                 }
814                 msleep(1);
815                 gpio_set_value(TEGRA_GPIO_PH6, 1);
816                 msleep(100);
817
818                 tegra_get_board_info(&BoardInfo);
819                 if ((BoardInfo.sku & SKU_TOUCH_MASK) == SKU_TOUCH_2000)
820                         strncpy(atmel_mxt_info.mxt_cfg_name,
821                                 "Android_Cardhu_SKU2000_2012-01-31.cfg",
822                                 CFG_NAME_SIZE);
823
824                 if (DisplayBoardInfo.board_id == BOARD_DISPLAY_E1506) {
825                         strncpy(atmel_mxt_info.mxt_cfg_name,
826                         "Android_Cardhu_Verbier_E1506_2012-06-06.cfg",
827                         CFG_NAME_SIZE);
828                         e1506_atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH4);
829                         i2c_register_board_info(1, e1506_atmel_i2c_info, 1);
830                 } else {
831                         atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH4);
832                         i2c_register_board_info(1, atmel_i2c_info, 1);
833                 }
834         }
835
836         return 0;
837 }
838
839 #if defined(CONFIG_USB_SUPPORT)
840
841 static void cardu_usb_hsic_postsupend(void)
842 {
843 #ifdef CONFIG_TEGRA_BB_XMM_POWER
844         baseband_xmm_set_power_status(BBXMM_PS_L2);
845 #endif
846 }
847
848 static void cardu_usb_hsic_preresume(void)
849 {
850 #ifdef CONFIG_TEGRA_BB_XMM_POWER
851         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
852 #endif
853 }
854
855 static void cardu_usb_hsic_phy_ready(void)
856 {
857 #ifdef CONFIG_TEGRA_BB_XMM_POWER
858         baseband_xmm_set_power_status(BBXMM_PS_L0);
859 #endif
860 }
861
862 static void cardu_usb_hsic_phy_off(void)
863 {
864 #ifdef CONFIG_TEGRA_BB_XMM_POWER
865         baseband_xmm_set_power_status(BBXMM_PS_L3);
866 #endif
867 }
868
869 static struct tegra_usb_phy_platform_ops hsic_xmm_plat_ops = {
870         .post_suspend = cardu_usb_hsic_postsupend,
871         .pre_resume = cardu_usb_hsic_preresume,
872         .port_power = cardu_usb_hsic_phy_ready,
873         .post_phy_off = cardu_usb_hsic_phy_off,
874 };
875
876 static struct tegra_usb_platform_data tegra_ehci2_hsic_xmm_pdata = {
877         .port_otg = false,
878         .has_hostpc = true,
879         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
880         .op_mode        = TEGRA_USB_OPMODE_HOST,
881         .u_data.host = {
882                 .vbus_gpio = -1,
883                 .hot_plug = false,
884                 .remote_wakeup_supported = false,
885                 .power_off_on_suspend = false,
886         },
887         .ops = &hsic_xmm_plat_ops,
888 };
889 #endif
890
891 static int hsic_enable_gpio = -1;
892 static int hsic_reset_gpio = -1;
893
894 void hsic_platform_open(void)
895 {
896         int reset_gpio = -1, enable_gpio = -1;
897
898         if (hsic_enable_gpio != -1)
899                 enable_gpio = gpio_request(hsic_enable_gpio, "uhsic_enable");
900         if (hsic_reset_gpio != -1)
901                 reset_gpio = gpio_request(hsic_reset_gpio, "uhsic_reset");
902         /* hsic enable signal deasserted, hsic reset asserted */
903         if (!enable_gpio)
904                 gpio_direction_output(hsic_enable_gpio, 0 /* deasserted */);
905         if (!reset_gpio)
906                 gpio_direction_output(hsic_reset_gpio, 0 /* asserted */);
907         /* keep hsic reset asserted for 1 ms */
908         udelay(1000);
909         /* enable (power on) hsic */
910         if (!enable_gpio)
911                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
912         udelay(1000);
913         /* deassert reset */
914         if (!reset_gpio)
915                 gpio_set_value_cansleep(hsic_reset_gpio, 1);
916
917 }
918
919 void hsic_platform_close(void)
920 {
921         if (hsic_enable_gpio != -1) {
922                 gpio_set_value(hsic_enable_gpio, 0);
923                 gpio_free(hsic_enable_gpio);
924         }
925         if (hsic_reset_gpio != -1) {
926                 gpio_set_value(hsic_reset_gpio, 0);
927                 gpio_free(hsic_reset_gpio);
928         }
929 }
930
931 void hsic_power_on(void)
932 {
933         if (hsic_enable_gpio != -1) {
934                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
935                 udelay(1000);
936         }
937 }
938
939 void hsic_power_off(void)
940 {
941         if (hsic_enable_gpio != -1) {
942                 gpio_set_value_cansleep(hsic_enable_gpio, 0);
943                 udelay(1000);
944         }
945 }
946
947 #if defined(CONFIG_USB_SUPPORT)
948 static struct tegra_usb_phy_platform_ops hsic_plat_ops = {
949         .open = hsic_platform_open,
950         .close = hsic_platform_close,
951         .pre_phy_on = hsic_power_on,
952         .post_phy_off = hsic_power_off,
953 };
954
955 static struct tegra_usb_platform_data tegra_ehci2_hsic_pdata = {
956         .port_otg = false,
957         .has_hostpc = true,
958         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
959         .op_mode        = TEGRA_USB_OPMODE_HOST,
960         .u_data.host = {
961                 .vbus_gpio = -1,
962                 .hot_plug = false,
963                 .remote_wakeup_supported = false,
964                 .power_off_on_suspend = false,
965         },
966         .ops = &hsic_plat_ops,
967 };
968
969 static struct tegra_usb_platform_data tegra_udc_pdata = {
970         .port_otg = true,
971         .has_hostpc = true,
972         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
973         .op_mode = TEGRA_USB_OPMODE_DEVICE,
974         .u_data.dev = {
975                 .vbus_pmu_irq = 0,
976                 .vbus_gpio = -1,
977                 .charging_supported = false,
978                 .remote_wakeup_supported = false,
979         },
980         .u_cfg.utmi = {
981                 .hssync_start_delay = 0,
982                 .elastic_limit = 16,
983                 .idle_wait_delay = 17,
984                 .term_range_adj = 6,
985                 .xcvr_setup = 8,
986                 .xcvr_lsfslew = 2,
987                 .xcvr_lsrslew = 2,
988                 .xcvr_setup_offset = 0,
989                 .xcvr_use_fuses = 1,
990         },
991 };
992
993 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
994         .port_otg = false,
995         .has_hostpc = true,
996         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
997         .op_mode        = TEGRA_USB_OPMODE_HOST,
998         .u_data.host = {
999                 .vbus_gpio = -1,
1000                 .hot_plug = false,
1001                 .remote_wakeup_supported = true,
1002                 .power_off_on_suspend = true,
1003         },
1004         .u_cfg.utmi = {
1005                 .hssync_start_delay = 0,
1006                 .elastic_limit = 16,
1007                 .idle_wait_delay = 17,
1008                 .term_range_adj = 6,
1009                 .xcvr_setup = 15,
1010                 .xcvr_lsfslew = 2,
1011                 .xcvr_lsrslew = 2,
1012                 .xcvr_setup_offset = 0,
1013                 .xcvr_use_fuses = 1,
1014         },
1015 };
1016
1017 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
1018         .port_otg = false,
1019         .has_hostpc = true,
1020         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1021         .op_mode = TEGRA_USB_OPMODE_HOST,
1022         .u_data.host = {
1023                 .vbus_gpio = -1,
1024                 .hot_plug = true,
1025                 .remote_wakeup_supported = true,
1026                 .power_off_on_suspend = true,
1027         },
1028         .u_cfg.utmi = {
1029                 .hssync_start_delay = 0,
1030                 .elastic_limit = 16,
1031                 .idle_wait_delay = 17,
1032                 .term_range_adj = 6,
1033                 .xcvr_setup = 8,
1034                 .xcvr_lsfslew = 2,
1035                 .xcvr_lsrslew = 2,
1036                 .xcvr_setup_offset = 0,
1037                 .xcvr_use_fuses = 1,
1038         },
1039 };
1040
1041 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
1042         .port_otg = true,
1043         .has_hostpc = true,
1044         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1045         .op_mode = TEGRA_USB_OPMODE_HOST,
1046         .u_data.host = {
1047                 .vbus_gpio = -1,
1048                 .hot_plug = true,
1049                 .remote_wakeup_supported = true,
1050                 .power_off_on_suspend = true,
1051         },
1052         .u_cfg.utmi = {
1053                 .hssync_start_delay = 0,
1054                 .elastic_limit = 16,
1055                 .idle_wait_delay = 17,
1056                 .term_range_adj = 6,
1057                 .xcvr_setup = 15,
1058                 .xcvr_lsfslew = 2,
1059                 .xcvr_lsrslew = 2,
1060                 .xcvr_setup_offset = 0,
1061                 .xcvr_use_fuses = 1,
1062         },
1063 };
1064
1065 static struct tegra_usb_otg_data tegra_otg_pdata = {
1066         .ehci_device = &tegra_ehci1_device,
1067         .ehci_pdata = &tegra_ehci1_utmi_pdata,
1068 };
1069 #endif
1070
1071 #if defined(CONFIG_USB_SUPPORT)
1072 static void cardhu_usb_init(void)
1073 {
1074         struct board_info bi;
1075
1076         tegra_get_board_info(&bi);
1077
1078         /* OTG should be the first to be registered */
1079         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1080         platform_device_register(&tegra_otg_device);
1081
1082         /* setup the udc platform data */
1083         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1084
1085         if (bi.board_id == BOARD_PM267) {
1086                 hsic_enable_gpio = EN_HSIC_GPIO;
1087                 hsic_reset_gpio = PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
1088                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1089                 platform_device_register(&tegra_ehci2_device);
1090         } else if (bi.board_id == BOARD_E1256) {
1091                 hsic_enable_gpio = EN_HSIC_GPIO;
1092                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1093                 platform_device_register(&tegra_ehci2_device);
1094         } else if (bi.board_id == BOARD_E1186) {
1095                 tegra_ehci2_device.dev.platform_data =
1096                                                 &tegra_ehci2_hsic_xmm_pdata;
1097                 /* ehci2 registration happens in baseband-xmm-power  */
1098         } else {
1099                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_utmi_pdata;
1100                 platform_device_register(&tegra_ehci2_device);
1101         }
1102
1103         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
1104         platform_device_register(&tegra_ehci3_device);
1105
1106 }
1107 #else
1108 static void cardhu_usb_init(void) { }
1109 #endif
1110
1111 static struct baseband_power_platform_data tegra_baseband_power_data = {
1112         .baseband_type = BASEBAND_XMM,
1113         .modem = {
1114         .xmm = {
1115                         .bb_rst = XMM_GPIO_BB_RST,
1116                         .bb_on = XMM_GPIO_BB_ON,
1117                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1118                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1119                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1120                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1121                         .hsic_device = &tegra_ehci2_device,
1122                 },
1123         },
1124 };
1125
1126 static struct platform_device tegra_baseband_power_device = {
1127         .name = "baseband_xmm_power",
1128         .id = -1,
1129         .dev = {
1130                 .platform_data = &tegra_baseband_power_data,
1131         },
1132 };
1133
1134 static struct platform_device tegra_baseband_power2_device = {
1135         .name = "baseband_xmm_power2",
1136         .id = -1,
1137         .dev = {
1138                 .platform_data = &tegra_baseband_power_data,
1139         },
1140 };
1141
1142
1143 static struct tegra_pci_platform_data cardhu_pci_platform_data = {
1144         .port_status[0] = 1,
1145         .port_status[1] = 1,
1146         .port_status[2] = 1,
1147         .use_dock_detect        = 0,
1148         .gpio           = 0,
1149 };
1150
1151 static void cardhu_pci_init(void)
1152 {
1153         struct board_info board_info;
1154
1155         tegra_get_board_info(&board_info);
1156         if (board_info.board_id == BOARD_E1291) {
1157                 cardhu_pci_platform_data.port_status[0] = 0;
1158                 cardhu_pci_platform_data.port_status[1] = 0;
1159                 cardhu_pci_platform_data.port_status[2] = 1;
1160                 cardhu_pci_platform_data.use_dock_detect = 1;
1161                 cardhu_pci_platform_data.gpio = DOCK_DETECT_GPIO;
1162         }
1163         if ((board_info.board_id == BOARD_E1186) ||
1164                 (board_info.board_id == BOARD_E1187) ||
1165                 (board_info.board_id == BOARD_E1291)) {
1166                 tegra_pci_device.dev.platform_data = &cardhu_pci_platform_data;
1167                 platform_device_register(&tegra_pci_device);
1168         }
1169 }
1170
1171 static void cardhu_modem_init(void)
1172 {
1173         struct board_info board_info;
1174         int w_disable_gpio, ret;
1175
1176         tegra_get_board_info(&board_info);
1177         switch (board_info.board_id) {
1178         case BOARD_E1291:
1179         case BOARD_E1198:
1180                 if (((board_info.board_id == BOARD_E1291) &&
1181                                 (board_info.fab < BOARD_FAB_A03)) ||
1182                         ((board_info.board_id == BOARD_E1198) &&
1183                                         (board_info.fab < BOARD_FAB_A02))) {
1184                         w_disable_gpio = TEGRA_GPIO_PH5;
1185                 } else {
1186                         w_disable_gpio = TEGRA_GPIO_PDD5;
1187                 }
1188
1189                 ret = gpio_request(w_disable_gpio, "w_disable_gpio");
1190                 if (ret < 0)
1191                         pr_err("%s: gpio_request failed for gpio %d\n",
1192                                 __func__, w_disable_gpio);
1193                 else
1194                         gpio_direction_input(w_disable_gpio);
1195
1196                 /* E1291-A04 & E1198:A02: Set PERST signal to high */
1197                 if (((board_info.board_id == BOARD_E1291) &&
1198                                 (board_info.fab >= BOARD_FAB_A04)) ||
1199                         ((board_info.board_id == BOARD_E1198) &&
1200                                         (board_info.fab >= BOARD_FAB_A02))) {
1201                         ret = gpio_request(TEGRA_GPIO_PH7, "modem_perst");
1202                         if (ret < 0) {
1203                                 pr_err("%s(): Error in allocating gpio "
1204                                         "TEGRA_GPIO_PH7\n", __func__);
1205                                 break;
1206                         }
1207                         gpio_direction_output(TEGRA_GPIO_PH7, 1);
1208                 }
1209                 break;
1210         case BOARD_E1186:
1211                 platform_device_register(&tegra_baseband_power_device);
1212                 platform_device_register(&tegra_baseband_power2_device);
1213                 break;
1214         default:
1215                 break;
1216         }
1217
1218 }
1219
1220 #ifdef CONFIG_SATA_AHCI_TEGRA
1221 static void cardhu_sata_init(void)
1222 {
1223         platform_device_register(&tegra_sata_device);
1224 }
1225 #else
1226 static void cardhu_sata_init(void) { }
1227 #endif
1228
1229 /* This needs to be inialized later hand */
1230 static int __init cardhu_throttle_list_init(void)
1231 {
1232         int i;
1233         for (i = 0; i < ARRAY_SIZE(throttle_list); i++)
1234                 if (balanced_throttle_register(&throttle_list[i]))
1235                         return -ENODEV;
1236
1237         return 0;
1238 }
1239 late_initcall(cardhu_throttle_list_init);
1240
1241 static void __init tegra_cardhu_init(void)
1242 {
1243         tegra_clk_init_from_table(cardhu_clk_init_table);
1244         tegra_enable_pinmux();
1245         tegra_smmu_init();
1246         tegra_soc_device_init("cardhu");
1247         cardhu_pinmux_init();
1248         cardhu_gpio_init();
1249         cardhu_i2c_init();
1250         cardhu_spi_init();
1251         cardhu_usb_init();
1252 #ifdef CONFIG_TEGRA_EDP_LIMITS
1253         cardhu_edp_init();
1254 #endif
1255         cardhu_uart_init();
1256         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
1257         tegra_ram_console_debug_init();
1258         tegra_io_dpd_init();
1259         cardhu_sdhci_init();
1260         cardhu_regulator_init();
1261         cardhu_dtv_init();
1262         cardhu_suspend_init();
1263         cardhu_touch_init();
1264         cardhu_modem_init();
1265         cardhu_kbc_init();
1266         cardhu_scroll_init();
1267         cardhu_keys_init();
1268         cardhu_panel_init();
1269         cardhu_pmon_init();
1270         cardhu_sensors_init();
1271         cardhu_setup_bluesleep();
1272         cardhu_sata_init();
1273         cardhu_pins_state_init();
1274         cardhu_emc_init();
1275         tegra_release_bootloader_fb();
1276         cardhu_pci_init();
1277 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1278         tegra_wdt_recovery_init();
1279 #endif
1280         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1281         tegra_vibrator_init();
1282 }
1283
1284 static void __init tegra_cardhu_dt_init(void)
1285 {
1286         tegra_cardhu_init();
1287
1288         of_platform_populate(NULL,
1289                 of_default_bus_match_table, NULL, NULL);
1290 }
1291
1292 static void __init tegra_cardhu_reserve(void)
1293 {
1294 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1295         /* support 1920X1200 with 24bpp */
1296         tegra_reserve(0, SZ_8M + SZ_1M, SZ_16M);
1297 #else
1298         tegra_reserve(SZ_128M, SZ_8M, SZ_16M);
1299 #endif
1300 }
1301
1302 static const char *cardhu_dt_board_compat[] = {
1303         "nvidia,cardhu",
1304         NULL
1305 };
1306
1307 MACHINE_START(CARDHU, "cardhu")
1308         .atag_offset    = 0x100,
1309         .soc            = &tegra_soc_desc,
1310         .map_io         = tegra_map_common_io,
1311         .reserve        = tegra_cardhu_reserve,
1312         .init_early     = tegra30_init_early,
1313         .init_irq       = tegra_init_irq,
1314         .handle_irq     = gic_handle_irq,
1315         .timer          = &tegra_timer,
1316         .init_machine   = tegra_cardhu_dt_init,
1317         .restart        = tegra_assert_system_reset,
1318         .dt_compat      = cardhu_dt_board_compat,
1319 MACHINE_END