ARM: tegra: thermal: Separate skin from thermals
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA Corporation.  All rights reserved.
5  * Copyright (c) 2011-2012, NVIDIA Corporation.
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along
18  * with this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
20  */
21
22 #include <linux/kernel.h>
23 #include <linux/init.h>
24 #include <linux/slab.h>
25 #include <linux/ctype.h>
26 #include <linux/platform_device.h>
27 #include <linux/clk.h>
28 #include <linux/serial_8250.h>
29 #include <linux/i2c.h>
30 #include <linux/i2c/panjit_ts.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/delay.h>
33 #include <linux/i2c-tegra.h>
34 #include <linux/gpio.h>
35 #include <linux/input.h>
36 #include <linux/platform_data/tegra_usb.h>
37 #include <linux/spi/spi.h>
38 #include <linux/i2c/atmel_mxt_ts.h>
39 #include <linux/tegra_uart.h>
40 #include <linux/memblock.h>
41 #include <linux/spi-tegra.h>
42 #include <linux/nfc/pn544.h>
43 #include <linux/rfkill-gpio.h>
44
45 #include <sound/wm8903.h>
46 #include <sound/max98095.h>
47 #include <media/tegra_dtv.h>
48
49 #include <asm/hardware/gic.h>
50
51 #include <mach/clk.h>
52 #include <mach/iomap.h>
53 #include <mach/irqs.h>
54 #include <mach/pinmux.h>
55 #include <mach/iomap.h>
56 #include <mach/io_dpd.h>
57 #include <mach/io.h>
58 #include <mach/i2s.h>
59 #include <mach/tegra_asoc_pdata.h>
60 #include <mach/tegra_wm8903_pdata.h>
61 #include <mach/usb_phy.h>
62 #include <mach/thermal.h>
63 #include <mach/pci.h>
64 #include <mach/gpio-tegra.h>
65 #include <mach/tegra_fiq_debugger.h>
66
67 #include <asm/hardware/gic.h>
68 #include <asm/mach-types.h>
69 #include <asm/mach/arch.h>
70
71 #include "board.h"
72 #include "clock.h"
73 #include "board-cardhu.h"
74 #include "board-touch.h"
75 #include "devices.h"
76 #include "gpio-names.h"
77 #include "fuse.h"
78 #include "pm.h"
79 #include "baseband-xmm-power.h"
80 #include "wdt-recovery.h"
81 #include "common.h"
82
83 static struct balanced_throttle throttle_list[] = {
84         {
85                 .id = BALANCED_THROTTLE_ID_TJ,
86                 .throt_tab_size = 10,
87                 .throt_tab = {
88                         {      0, 1000 },
89                         { 640000, 1000 },
90                         { 640000, 1000 },
91                         { 640000, 1000 },
92                         { 640000, 1000 },
93                         { 640000, 1000 },
94                         { 760000, 1000 },
95                         { 760000, 1050 },
96                         {1000000, 1050 },
97                         {1000000, 1100 },
98                 },
99         },
100 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
101         {
102                 .id = BALANCED_THROTTLE_ID_SKIN,
103                 .throt_tab_size = 6,
104                 .throt_tab = {
105                         { 640000, 1200 },
106                         { 640000, 1200 },
107                         { 760000, 1200 },
108                         { 760000, 1200 },
109                         {1000000, 1200 },
110                         {1000000, 1200 },
111                 },
112         },
113 #endif
114 };
115
116 /* All units are in millicelsius */
117 static struct tegra_thermal_data thermal_data = {
118         .shutdown_device_id = THERMAL_DEVICE_ID_NCT_EXT,
119         .temp_shutdown = 90000,
120         .throttle_edp_device_id = THERMAL_DEVICE_ID_NCT_EXT,
121 #ifdef CONFIG_TEGRA_EDP_LIMITS
122         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
123         .hysteresis_edp = 3000,
124 #endif
125         .temp_throttle = 85000,
126         .tc1 = 0,
127         .tc2 = 1,
128         .passive_delay = 2000,
129 };
130
131 static struct tegra_skin_data skin_data = {
132 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
133         .skin_device_id = THERMAL_DEVICE_ID_SKIN,
134         .temp_throttle_skin = 43000,
135         .tc1_skin = 0,
136         .tc2_skin = 1,
137         .passive_delay_skin = 5000,
138         .skin_temp_offset = 9793,
139         .skin_period = 1100,
140         .skin_devs_size = 2,
141         .skin_devs = {
142                 {
143                         THERMAL_DEVICE_ID_NCT_EXT,
144                         {
145                                 2, 1, 1, 1,
146                                 1, 1, 1, 1,
147                                 1, 1, 1, 0,
148                                 1, 1, 0, 0,
149                                 0, 0, -1, -7
150                         }
151                 },
152                 {
153                         THERMAL_DEVICE_ID_NCT_INT,
154                         {
155                                 -11, -7, -5, -3,
156                                 -3, -2, -1, 0,
157                                 0, 0, 1, 1,
158                                 1, 2, 2, 3,
159                                 4, 6, 11, 18
160                         }
161                 },
162         },
163 #else
164         .skin_device_id = THERMAL_DEVICE_ID_NULL,
165 #endif
166 };
167
168
169 static struct rfkill_gpio_platform_data cardhu_bt_rfkill_pdata[] = {
170         {
171                 .name           = "bt_rfkill",
172                 .shutdown_gpio  = TEGRA_GPIO_PU0,
173                 .reset_gpio     = TEGRA_GPIO_INVALID,
174                 .type           = RFKILL_TYPE_BLUETOOTH,
175         },
176 };
177
178 static struct platform_device cardhu_bt_rfkill_device = {
179         .name = "rfkill_gpio",
180         .id             = -1,
181         .dev = {
182                 .platform_data = &cardhu_bt_rfkill_pdata,
183         },
184 };
185
186 static struct resource cardhu_bluesleep_resources[] = {
187         [0] = {
188                 .name = "gpio_host_wake",
189                         .start  = TEGRA_GPIO_PU6,
190                         .end    = TEGRA_GPIO_PU6,
191                         .flags  = IORESOURCE_IO,
192         },
193         [1] = {
194                 .name = "gpio_ext_wake",
195                         .start  = TEGRA_GPIO_PU1,
196                         .end    = TEGRA_GPIO_PU1,
197                         .flags  = IORESOURCE_IO,
198         },
199         [2] = {
200                 .name = "host_wake",
201                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
202         },
203 };
204
205 static struct platform_device cardhu_bluesleep_device = {
206         .name           = "bluesleep",
207         .id             = -1,
208         .num_resources  = ARRAY_SIZE(cardhu_bluesleep_resources),
209         .resource       = cardhu_bluesleep_resources,
210 };
211
212 static noinline void __init cardhu_setup_bluesleep(void)
213 {
214         cardhu_bluesleep_resources[2].start =
215                 cardhu_bluesleep_resources[2].end =
216                         gpio_to_irq(TEGRA_GPIO_PU6);
217         platform_device_register(&cardhu_bluesleep_device);
218         return;
219 }
220
221 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
222         /* name         parent          rate            enabled */
223         { "pll_m",      NULL,           0,              false},
224         { "hda",        "pll_p",        108000000,      false},
225         { "hda2codec_2x","pll_p",       48000000,       false},
226         { "pwm",        "pll_p",        3187500,        false},
227         { "blink",      "clk_32k",      32768,          true},
228         { "i2s0",       "pll_a_out0",   0,              false},
229         { "i2s1",       "pll_a_out0",   0,              false},
230         { "i2s3",       "pll_a_out0",   0,              false},
231         { "spdif_out",  "pll_a_out0",   0,              false},
232         { "d_audio",    "clk_m",        12000000,       false},
233         { "dam0",       "clk_m",        12000000,       false},
234         { "dam1",       "clk_m",        12000000,       false},
235         { "dam2",       "clk_m",        12000000,       false},
236         { "audio1",     "i2s1_sync",    0,              false},
237         { "audio3",     "i2s3_sync",    0,              false},
238         { "vi_sensor",  "pll_p",        150000000,      false},
239         { "i2c1",       "pll_p",        3200000,        false},
240         { "i2c2",       "pll_p",        3200000,        false},
241         { "i2c3",       "pll_p",        3200000,        false},
242         { "i2c4",       "pll_p",        3200000,        false},
243         { "i2c5",       "pll_p",        3200000,        false},
244         { "vi",         "pll_p",        0,              false},
245         { NULL,         NULL,           0,              0},
246 };
247
248 static struct pn544_i2c_platform_data nfc_pdata = {
249         .irq_gpio = TEGRA_GPIO_PX0,
250         .ven_gpio = TEGRA_GPIO_PP3,
251         .firm_gpio = TEGRA_GPIO_PO7,
252         };
253
254 static struct i2c_board_info __initdata cardhu_i2c_bus3_board_info[] = {
255         {
256                 I2C_BOARD_INFO("pn544", 0x28),
257                 .platform_data = &nfc_pdata,
258         },
259 };
260 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
261         .adapter_nr     = 0,
262         .bus_count      = 1,
263         .bus_clk_rate   = { 100000, 0 },
264         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
265         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
266         .arb_recovery = arb_lost_recovery,
267 };
268
269 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
270         .adapter_nr     = 1,
271         .bus_count      = 1,
272         .bus_clk_rate   = { 400000, 0 },
273         .is_clkon_always = true,
274         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
275         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
276         .arb_recovery = arb_lost_recovery,
277 };
278
279 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
280         .adapter_nr     = 2,
281         .bus_count      = 1,
282         .bus_clk_rate   = { 100000, 0 },
283         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
284         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
285         .arb_recovery = arb_lost_recovery,
286 };
287
288 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
289         .adapter_nr     = 3,
290         .bus_count      = 1,
291         .bus_clk_rate   = { 10000, 0 },
292         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
293         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
294         .arb_recovery = arb_lost_recovery,
295 };
296
297 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
298         .adapter_nr     = 4,
299         .bus_count      = 1,
300         .bus_clk_rate   = { 400000, 0 },
301         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
302         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
303         .arb_recovery = arb_lost_recovery,
304 };
305
306
307 #if 0
308 struct tegra_wired_jack_conf audio_wr_jack_conf = {
309         .hp_det_n = TEGRA_GPIO_PW2,
310         .en_mic_ext = TEGRA_GPIO_PX1,
311         .en_mic_int = TEGRA_GPIO_PX0,
312 };
313 #endif
314
315 static struct wm8903_platform_data cardhu_wm8903_pdata = {
316         .irq_active_low = 0,
317         .micdet_cfg = 0,
318         .micdet_delay = 100,
319         .gpio_base = CARDHU_GPIO_WM8903(0),
320         .gpio_cfg = {
321                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP1_FN_SHIFT),
322                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP2_FN_SHIFT) |
323                         WM8903_GP2_DIR,
324                 WM8903_GPIO_CONFIG_ZERO,
325                 0,
326                 0,
327         },
328 };
329
330 /* Equalizer filter coefs generated from the MAXIM MAX98095
331  * evkit software tool */
332 static struct max98095_eq_cfg max98095_eq_cfg[] = {
333         {
334                 .name = "FLAT",
335                 .rate = 44100,
336                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
337                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
338                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
339                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
340                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
341         },
342         {
343                 .name = "LOWPASS1K",
344                 .rate = 44100,
345                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
346                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
347                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
348                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
349                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
350         },
351         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
352                 .name = "HIBOOST",
353                 .rate = 44100,
354                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
355                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
356                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
357                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
358                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
359         },
360         { /* BASS=12dB, TREBLE=+12dB */
361                 .name = "LOUD12DB",
362                 .rate = 44100,
363                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
364                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
365                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
366                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
367                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
368         },
369         {
370                 .name = "FLAT",
371                 .rate = 16000,
372                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
373                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
374                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
375                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
376                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
377         },
378         {
379                 .name = "LOWPASS1K",
380                 .rate = 16000,
381                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
382                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
383                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
384                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
385                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
386         },
387         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
388                 .name = "HIBOOST",
389                 .rate = 16000,
390                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
391                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
392                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
393                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
394                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
395         },
396         { /* BASS=12dB, TREBLE=+12dB */
397                 .name = "LOUD12DB",
398                 .rate = 16000,
399                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
400                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
401                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
402                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
403                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
404         },
405 };
406
407 static struct max98095_pdata cardhu_max98095_pdata = {
408         /* equalizer configuration */
409         .eq_cfg = max98095_eq_cfg,
410         .eq_cfgcnt = ARRAY_SIZE(max98095_eq_cfg),
411
412         /* Biquad filter response configuration */
413         .bq_cfg = NULL,
414         .bq_cfgcnt = 0,
415
416         /* microphone configuration */
417         .digmic_left_mode = 1,
418         .digmic_right_mode = 1,
419 };
420
421 static struct i2c_board_info __initdata cardhu_codec_wm8903_info = {
422         I2C_BOARD_INFO("wm8903", 0x1a),
423         .platform_data = &cardhu_wm8903_pdata,
424 };
425
426 static struct i2c_board_info __initdata cardhu_codec_aic326x_info = {
427         I2C_BOARD_INFO("aic3262-codec", 0x18),
428 };
429
430 static struct i2c_board_info __initdata cardhu_codec_max98095_info = {
431         I2C_BOARD_INFO("max98095", 0x10),
432         .platform_data = &cardhu_max98095_pdata,
433 };
434
435 static void cardhu_i2c_init(void)
436 {
437         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
438         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
439         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
440         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
441         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
442
443         platform_device_register(&tegra_i2c_device5);
444         platform_device_register(&tegra_i2c_device4);
445         platform_device_register(&tegra_i2c_device3);
446         platform_device_register(&tegra_i2c_device2);
447         platform_device_register(&tegra_i2c_device1);
448
449         cardhu_codec_wm8903_info.irq = cardhu_codec_max98095_info.irq =
450                 cardhu_codec_aic326x_info.irq = gpio_to_irq(TEGRA_GPIO_CDC_IRQ);
451         i2c_register_board_info(4, &cardhu_codec_wm8903_info, 1);
452         i2c_register_board_info(4, &cardhu_codec_max98095_info, 1);
453         i2c_register_board_info(4, &cardhu_codec_aic326x_info, 1);
454
455         cardhu_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PX0);
456         i2c_register_board_info(2, cardhu_i2c_bus3_board_info, 1);
457 }
458
459 static struct platform_device *cardhu_uart_devices[] __initdata = {
460         &tegra_uarta_device,
461         &tegra_uartb_device,
462         &tegra_uartc_device,
463         &tegra_uartd_device,
464         &tegra_uarte_device,
465 };
466 static struct uart_clk_parent uart_parent_clk[] = {
467         [0] = {.name = "clk_m"},
468         [1] = {.name = "pll_p"},
469 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
470         [2] = {.name = "pll_m"},
471 #endif
472 };
473
474 static struct tegra_uart_platform_data cardhu_uart_pdata;
475 static struct tegra_uart_platform_data cardhu_loopback_uart_pdata;
476
477 static void __init uart_debug_init(void)
478 {
479         struct board_info board_info;
480         int debug_port_id;
481
482         tegra_get_board_info(&board_info);
483
484         debug_port_id = get_tegra_uart_debug_port_id();
485         if (debug_port_id < 0) {
486                 debug_port_id = 0;
487                         /* UARTB is debug port
488                          *       for SLT - E1186/E1187/PM269
489                          *       for E1256/E1257
490                          */
491                 if (((board_info.sku & SKU_SLT_ULPI_SUPPORT) &&
492                         ((board_info.board_id == BOARD_E1186) ||
493                         (board_info.board_id == BOARD_E1187) ||
494                         (board_info.board_id == BOARD_PM269))) ||
495                         (board_info.board_id == BOARD_E1256) ||
496                         (board_info.board_id == BOARD_E1257))
497                                 debug_port_id = 1;
498         }
499
500 #ifdef CONFIG_TEGRA_IRDA
501         if ((board_info.board_id == BOARD_E1186) ||
502                 (board_info.board_id == BOARD_E1198)) {
503                 if (debug_port_id == 1) {
504                         cardhu_irda_pdata.is_irda = false;
505                         pr_err("UARTB is not available for IrDA\n");
506                 }
507         }
508 #endif
509
510         switch (debug_port_id) {
511         case 0:
512                 /* UARTA is the debug port. */
513                 pr_info("Selecting UARTA as the debug console\n");
514                 cardhu_uart_devices[0] = &debug_uarta_device;
515                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
516                 debug_uart_port_base = ((struct plat_serial8250_port *)(
517                         debug_uarta_device.dev.platform_data))->mapbase;
518                 break;
519
520         case 1:
521                 /* UARTB is the debug port. */
522                 pr_info("Selecting UARTB as the debug console\n");
523                 cardhu_uart_devices[1] = &debug_uartb_device;
524                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartb");
525                 debug_uart_port_base = ((struct plat_serial8250_port *)(
526                         debug_uartb_device.dev.platform_data))->mapbase;
527                 break;
528
529         case 2:
530                 /* UARTC is the debug port. */
531                 pr_info("Selecting UARTC as the debug console\n");
532                 cardhu_uart_devices[2] = &debug_uartc_device;
533                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartc");
534                 debug_uart_port_base = ((struct plat_serial8250_port *)(
535                         debug_uartc_device.dev.platform_data))->mapbase;
536                 break;
537
538         case 3:
539                 /* UARTD is the debug port. */
540                 pr_info("Selecting UARTD as the debug console\n");
541                 cardhu_uart_devices[3] = &debug_uartd_device;
542                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartd");
543                 debug_uart_port_base = ((struct plat_serial8250_port *)(
544                         debug_uartd_device.dev.platform_data))->mapbase;
545                 break;
546
547         case 4:
548                 /* UARTE is the debug port. */
549                 pr_info("Selecting UARTE as the debug console\n");
550                 cardhu_uart_devices[4] = &debug_uarte_device;
551                 debug_uart_clk =  clk_get_sys("serial8250.0", "uarte");
552                 debug_uart_port_base = ((struct plat_serial8250_port *)(
553                         debug_uarte_device.dev.platform_data))->mapbase;
554                 break;
555
556         default:
557                 pr_info("The debug console id %d is invalid, Assuming UARTA", debug_port_id);
558                 cardhu_uart_devices[0] = &debug_uarta_device;
559                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
560                 debug_uart_port_base = ((struct plat_serial8250_port *)(
561                         debug_uarta_device.dev.platform_data))->mapbase;
562                 break;
563         }
564         return;
565 }
566
567 static void __init cardhu_uart_init(void)
568 {
569         struct clk *c;
570         int i;
571         struct board_info board_info;
572
573         tegra_get_board_info(&board_info);
574
575         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
576                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
577                 if (IS_ERR_OR_NULL(c)) {
578                         pr_err("Not able to get the clock for %s\n",
579                                                 uart_parent_clk[i].name);
580                         continue;
581                 }
582                 uart_parent_clk[i].parent_clk = c;
583                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
584         }
585         cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
586         cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
587         cardhu_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
588         cardhu_loopback_uart_pdata.parent_clk_count =
589                                                 ARRAY_SIZE(uart_parent_clk);
590         cardhu_loopback_uart_pdata.is_loopback = true;
591         tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
592         tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
593         tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
594         tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
595         /* UARTE is used for loopback test purpose */
596         tegra_uarte_device.dev.platform_data = &cardhu_loopback_uart_pdata;
597
598         /* Register low speed only if it is selected */
599         if (!is_tegra_debug_uartport_hs()) {
600                 uart_debug_init();
601                 /* Clock enable for the debug channel */
602                 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
603                         pr_info("The debug console clock name is %s\n",
604                                                 debug_uart_clk->name);
605                         c = tegra_get_clock_by_name("pll_p");
606                         if (IS_ERR_OR_NULL(c))
607                                 pr_err("Not getting the parent clock pll_p\n");
608                         else
609                                 clk_set_parent(debug_uart_clk, c);
610
611                         clk_enable(debug_uart_clk);
612                         clk_set_rate(debug_uart_clk, clk_get_rate(c));
613                 } else {
614                         pr_err("Not getting the clock %s for debug console\n",
615                                         debug_uart_clk->name);
616                 }
617         }
618
619 #ifdef CONFIG_TEGRA_IRDA
620         if (((board_info.board_id == BOARD_E1186) ||
621                 (board_info.board_id == BOARD_E1198)) &&
622                         cardhu_irda_pdata.is_irda) {
623                 cardhu_irda_pdata.parent_clk_list = uart_parent_clk;
624                 cardhu_irda_pdata.parent_clk_count =
625                                         ARRAY_SIZE(uart_parent_clk);
626
627                 tegra_uartb_device.dev.platform_data = &cardhu_irda_pdata;
628         }
629 #endif
630
631         platform_add_devices(cardhu_uart_devices,
632                                 ARRAY_SIZE(cardhu_uart_devices));
633 }
634
635 static struct platform_device tegra_camera = {
636         .name = "tegra_camera",
637         .id = -1,
638 };
639
640 static struct platform_device *cardhu_spi_devices[] __initdata = {
641         &tegra_spi_device4,
642 };
643
644 static struct platform_device *touch_spi_device[] __initdata = {
645         &tegra_spi_device1,
646 };
647
648 struct spi_clk_parent spi_parent_clk[] = {
649         [0] = {.name = "pll_p"},
650 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
651         [1] = {.name = "pll_m"},
652         [2] = {.name = "clk_m"},
653 #else
654         [1] = {.name = "clk_m"},
655 #endif
656 };
657
658 static struct tegra_spi_platform_data cardhu_spi_pdata = {
659         .is_dma_based           = true,
660         .max_dma_buffer         = (16 * 1024),
661         .is_clkon_always        = false,
662         .max_rate               = 100000000,
663 };
664
665 static void __init cardhu_spi_init(void)
666 {
667         int i;
668         struct clk *c;
669         struct board_info board_info, display_board_info;
670
671         tegra_get_board_info(&board_info);
672         tegra_get_display_board_info(&display_board_info);
673
674         for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
675                 c = tegra_get_clock_by_name(spi_parent_clk[i].name);
676                 if (IS_ERR_OR_NULL(c)) {
677                         pr_err("Not able to get the clock for %s\n",
678                                                 spi_parent_clk[i].name);
679                         continue;
680                 }
681                 spi_parent_clk[i].parent_clk = c;
682                 spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
683         }
684         cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
685         cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
686         tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
687         platform_add_devices(cardhu_spi_devices,
688                                 ARRAY_SIZE(cardhu_spi_devices));
689
690         if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
691                 platform_add_devices(touch_spi_device,
692                                 ARRAY_SIZE(touch_spi_device));
693         }
694         if (board_info.board_id == BOARD_E1198) {
695                 tegra_spi_device2.dev.platform_data = &cardhu_spi_pdata;
696                 platform_device_register(&tegra_spi_device2);
697                 tegra_spi_slave_device1.dev.platform_data = &cardhu_spi_pdata;
698                 platform_device_register(&tegra_spi_slave_device1);
699         }
700 }
701
702 static void __init cardhu_dtv_init(void)
703 {
704         struct board_info board_info;
705
706         tegra_get_board_info(&board_info);
707
708         if (board_info.board_id == BOARD_E1186)
709                 platform_device_register(&tegra_dtv_device);
710 }
711
712 static struct resource tegra_rtc_resources[] = {
713         [0] = {
714                 .start = TEGRA_RTC_BASE,
715                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
716                 .flags = IORESOURCE_MEM,
717         },
718         [1] = {
719                 .start = INT_RTC,
720                 .end = INT_RTC,
721                 .flags = IORESOURCE_IRQ,
722         },
723 };
724
725 static struct platform_device tegra_rtc_device = {
726         .name = "tegra_rtc",
727         .id   = -1,
728         .resource = tegra_rtc_resources,
729         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
730 };
731
732 static struct tegra_asoc_platform_data cardhu_audio_wm8903_pdata = {
733         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
734         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
735         .gpio_hp_mute           = -1,
736         .gpio_int_mic_en        = -1,
737         .gpio_ext_mic_en        = -1,
738         .i2s_param[HIFI_CODEC]  = {
739                 .audio_port_id  = 0,
740                 .is_i2s_master  = 1,
741                 .i2s_mode       = TEGRA_DAIFMT_I2S,
742         },
743         .i2s_param[BASEBAND]    = {
744                 .audio_port_id  = -1,
745         },
746         .i2s_param[BT_SCO]      = {
747                 .audio_port_id  = 3,
748                 .is_i2s_master  = 1,
749                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
750         },
751 };
752
753 static struct tegra_asoc_platform_data cardhu_audio_max98095_pdata = {
754         .gpio_spkr_en           = -1,
755         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
756         .gpio_hp_mute           = -1,
757         .gpio_int_mic_en        = -1,
758         .gpio_ext_mic_en        = -1,
759         .i2s_param[HIFI_CODEC]  = {
760                 .audio_port_id  = 0,
761                 .is_i2s_master  = 1,
762                 .i2s_mode       = TEGRA_DAIFMT_I2S,
763         },
764         .i2s_param[BASEBAND]    = {
765                 .audio_port_id  = -1,
766         },
767         .i2s_param[BT_SCO]      = {
768                 .audio_port_id  = 3,
769                 .is_i2s_master  = 1,
770                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
771         },
772 };
773
774 static struct platform_device cardhu_audio_wm8903_device = {
775         .name   = "tegra-snd-wm8903",
776         .id     = 0,
777         .dev    = {
778                 .platform_data = &cardhu_audio_wm8903_pdata,
779         },
780 };
781
782 static struct platform_device cardhu_audio_max98095_device = {
783         .name   = "tegra-snd-max98095",
784         .id     = 0,
785         .dev    = {
786                 .platform_data = &cardhu_audio_max98095_pdata,
787         },
788 };
789
790 static struct tegra_asoc_platform_data cardhu_audio_aic326x_pdata = {
791         .gpio_spkr_en           = -1,
792         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
793         .gpio_hp_mute           = -1,
794         .gpio_int_mic_en        = -1,
795         .gpio_ext_mic_en        = -1,
796         /*defaults for Verbier-Cardhu board with TI AIC326X codec*/
797         .i2s_param[HIFI_CODEC]  = {
798                 .audio_port_id  = 0,
799                 .is_i2s_master  = 1,
800                 .i2s_mode       = TEGRA_DAIFMT_I2S,
801                 .sample_size    = 16,
802         },
803         .i2s_param[BT_SCO]      = {
804                 .sample_size    = 16,
805                 .audio_port_id  = 3,
806                 .is_i2s_master  = 1,
807                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
808         },
809 };
810
811 static struct platform_device cardhu_audio_aic326x_device = {
812         .name   = "tegra-snd-aic326x",
813         .id     = 0,
814         .dev    = {
815                 .platform_data  = &cardhu_audio_aic326x_pdata,
816         },
817 };
818
819 static struct platform_device *cardhu_devices[] __initdata = {
820         &tegra_pmu_device,
821         &tegra_rtc_device,
822         &tegra_udc_device,
823         &tegra_wdt0_device,
824         &tegra_wdt1_device,
825         &tegra_wdt2_device,
826 #if defined(CONFIG_TEGRA_AVP)
827         &tegra_avp_device,
828 #endif
829         &tegra_camera,
830 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
831         &tegra_se_device,
832 #endif
833         &tegra_ahub_device,
834         &tegra_dam_device0,
835         &tegra_dam_device1,
836         &tegra_dam_device2,
837         &tegra_i2s_device0,
838         &tegra_i2s_device1,
839         &tegra_i2s_device3,
840         &tegra_spdif_device,
841         &spdif_dit_device,
842         &bluetooth_dit_device,
843         &baseband_dit_device,
844         &cardhu_bt_rfkill_device,
845         &tegra_pcm_device,
846         &cardhu_audio_wm8903_device,
847         &cardhu_audio_max98095_device,
848         &cardhu_audio_aic326x_device,
849         &tegra_hda_device,
850         &tegra_cec_device,
851 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
852         &tegra_aes_device,
853 #endif
854 };
855
856 #define E1506_MXT_CONFIG_CRC 0x62F903
857 static const u8 e1506_config[] = {
858         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
859         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x05, 0x01, 0x00,
860         0x00, 0x1E, 0x0A, 0x8B, 0x00, 0x00, 0x13, 0x0B,
861         0x00, 0x10, 0x32, 0x03, 0x03, 0x00, 0x03, 0x01,
862         0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xBF, 0x03, 0x1B,
863         0x02, 0x00, 0x00, 0x37, 0x37, 0x00, 0x00, 0x00,
864         0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
865         0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
866         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
867         0x00, 0x00, 0x00, 0xA9, 0x7F, 0x9A, 0x0E, 0x00,
868         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
869         0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00,
870         0x00, 0x00, 0x03, 0x23, 0x00, 0x00, 0x00, 0x0A,
871         0x0F, 0x14, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00,
872         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
873         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
874         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
875         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
876         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
877         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
878         0x00, 0x00, 0x00, 0x01, 0x00, 0x03, 0x08, 0x10,
879         0x00
880 };
881
882 #define MXT_CONFIG_CRC  0xD62DE8
883 static const u8 config[] = {
884         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
885         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
886         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
887         0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
888         0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
889         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
890         0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
891         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
892         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
893         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
894         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
895         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
896         0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
897         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
898         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
899         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
900         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
901         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
902         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
903         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
904 };
905
906 #define MXT_CONFIG_CRC_SKU2000  0xA24D9A
907 static const u8 config_sku2000[] = {
908         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
909         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
910         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
911         0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00,  //23=thr  2 di
912         0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
913         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
914         0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00,  //0A=limit
915         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
916         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
917         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
918         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
919         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
920         0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
921         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
922         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
923         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
924         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
925         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
926         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
927         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
928 };
929
930 static struct mxt_platform_data atmel_mxt_info = {
931         .x_line         = 27,
932         .y_line         = 42,
933         .x_size         = 768,
934         .y_size         = 1366,
935         .blen           = 0x20,
936         .threshold      = 0x3C,
937         .voltage        = 3300000,              /* 3.3V */
938         .orient         = 5,
939         .config         = config,
940         .config_length  = 157,
941         .config_crc     = MXT_CONFIG_CRC,
942         .irqflags       = IRQF_TRIGGER_FALLING,
943 /*      .read_chg       = &read_chg, */
944         .read_chg       = NULL,
945 };
946
947 static struct mxt_platform_data e1506_atmel_mxt_info = {
948         .x_line         = 19,
949         .y_line         = 11,
950         .x_size         = 960,
951         .y_size         = 540,
952         .blen           = 0x10,
953         .threshold      = 0x32,
954         .voltage        = 3300000,              /* 3.3V */
955         .orient         = 3,
956         .config         = e1506_config,
957         .config_length  = 168,
958         .config_crc     = E1506_MXT_CONFIG_CRC,
959         .irqflags       = IRQF_TRIGGER_FALLING,
960 /*      .read_chg       = &read_chg, */
961         .read_chg       = NULL,
962 };
963
964 static struct i2c_board_info __initdata atmel_i2c_info[] = {
965         {
966                 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
967                 .platform_data = &atmel_mxt_info,
968         }
969 };
970
971 static struct i2c_board_info __initdata e1506_atmel_i2c_info[] = {
972         {
973                 I2C_BOARD_INFO("atmel_mxt_ts", 0x4A),
974                 .platform_data = &e1506_atmel_mxt_info,
975         }
976 };
977
978 static __initdata struct tegra_clk_init_table spi_clk_init_table[] = {
979         /* name         parent          rate            enabled */
980         { "sbc1",       "pll_p",        52000000,       true},
981         { NULL,         NULL,           0,              0},
982 };
983
984 static int __init cardhu_touch_init(void)
985 {
986         struct board_info BoardInfo, DisplayBoardInfo;
987
988         tegra_get_board_info(&BoardInfo);
989         tegra_get_display_board_info(&DisplayBoardInfo);
990         if (DisplayBoardInfo.board_id == BOARD_DISPLAY_PM313) {
991                 tegra_clk_init_from_table(spi_clk_init_table);
992
993                 touch_init_raydium(TEGRA_GPIO_PH4, TEGRA_GPIO_PH6, 2);
994         } else {
995                 gpio_request(TEGRA_GPIO_PH4, "atmel-irq");
996                 gpio_direction_input(TEGRA_GPIO_PH4);
997
998                 gpio_request(TEGRA_GPIO_PH6, "atmel-reset");
999                 gpio_direction_output(TEGRA_GPIO_PH6, 0);
1000                 msleep(1);
1001                 gpio_set_value(TEGRA_GPIO_PH6, 1);
1002                 msleep(100);
1003
1004                 if ((BoardInfo.sku & SKU_TOUCH_MASK) == SKU_TOUCH_2000) {
1005                         atmel_mxt_info.config = config_sku2000;
1006                         atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
1007                 }
1008
1009                 if (DisplayBoardInfo.board_id == BOARD_DISPLAY_E1506) {
1010                         e1506_atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH4);
1011                         i2c_register_board_info(1, e1506_atmel_i2c_info, 1);
1012                 } else {
1013                         atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH4);
1014                         i2c_register_board_info(1, atmel_i2c_info, 1);
1015                 }
1016         }
1017
1018         return 0;
1019 }
1020
1021 #if defined(CONFIG_USB_SUPPORT)
1022
1023 static void cardu_usb_hsic_postsupend(void)
1024 {
1025 #ifdef CONFIG_TEGRA_BB_XMM_POWER
1026         baseband_xmm_set_power_status(BBXMM_PS_L2);
1027 #endif
1028 }
1029
1030 static void cardu_usb_hsic_preresume(void)
1031 {
1032 #ifdef CONFIG_TEGRA_BB_XMM_POWER
1033         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
1034 #endif
1035 }
1036
1037 static void cardu_usb_hsic_phy_ready(void)
1038 {
1039 #ifdef CONFIG_TEGRA_BB_XMM_POWER
1040         baseband_xmm_set_power_status(BBXMM_PS_L0);
1041 #endif
1042 }
1043
1044 static void cardu_usb_hsic_phy_off(void)
1045 {
1046 #ifdef CONFIG_TEGRA_BB_XMM_POWER
1047         baseband_xmm_set_power_status(BBXMM_PS_L3);
1048 #endif
1049 }
1050
1051 static struct tegra_usb_phy_platform_ops hsic_xmm_plat_ops = {
1052         .post_suspend = cardu_usb_hsic_postsupend,
1053         .pre_resume = cardu_usb_hsic_preresume,
1054         .port_power = cardu_usb_hsic_phy_ready,
1055         .post_phy_off = cardu_usb_hsic_phy_off,
1056 };
1057
1058 static struct tegra_usb_platform_data tegra_ehci2_hsic_xmm_pdata = {
1059         .port_otg = false,
1060         .has_hostpc = true,
1061         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
1062         .op_mode        = TEGRA_USB_OPMODE_HOST,
1063         .u_data.host = {
1064                 .vbus_gpio = -1,
1065                 .hot_plug = false,
1066                 .remote_wakeup_supported = false,
1067                 .power_off_on_suspend = false,
1068         },
1069         .ops = &hsic_xmm_plat_ops,
1070 };
1071 #endif
1072
1073 static int hsic_enable_gpio = -1;
1074 static int hsic_reset_gpio = -1;
1075
1076 void hsic_platform_open(void)
1077 {
1078         int reset_gpio = 0, enable_gpio = 0;
1079
1080         if (hsic_enable_gpio != -1)
1081                 enable_gpio = gpio_request(hsic_enable_gpio, "uhsic_enable");
1082         if (hsic_reset_gpio != -1)
1083                 reset_gpio = gpio_request(hsic_reset_gpio, "uhsic_reset");
1084         /* hsic enable signal deasserted, hsic reset asserted */
1085         if (!enable_gpio)
1086                 gpio_direction_output(hsic_enable_gpio, 0 /* deasserted */);
1087         if (!reset_gpio)
1088                 gpio_direction_output(hsic_reset_gpio, 0 /* asserted */);
1089         /* keep hsic reset asserted for 1 ms */
1090         udelay(1000);
1091         /* enable (power on) hsic */
1092         if (!enable_gpio)
1093                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
1094         udelay(1000);
1095         /* deassert reset */
1096         if (!reset_gpio)
1097                 gpio_set_value_cansleep(hsic_reset_gpio, 1);
1098
1099 }
1100
1101 void hsic_platform_close(void)
1102 {
1103         if (hsic_enable_gpio != -1) {
1104                 gpio_set_value(hsic_enable_gpio, 0);
1105                 gpio_free(hsic_enable_gpio);
1106         }
1107         if (hsic_reset_gpio != -1) {
1108                 gpio_set_value(hsic_reset_gpio, 0);
1109                 gpio_free(hsic_reset_gpio);
1110         }
1111 }
1112
1113 void hsic_power_on(void)
1114 {
1115         if (hsic_enable_gpio != -1) {
1116                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
1117                 udelay(1000);
1118         }
1119 }
1120
1121 void hsic_power_off(void)
1122 {
1123         if (hsic_enable_gpio != -1) {
1124                 gpio_set_value_cansleep(hsic_enable_gpio, 0);
1125                 udelay(1000);
1126         }
1127 }
1128
1129 #if defined(CONFIG_USB_SUPPORT)
1130 static struct tegra_usb_phy_platform_ops hsic_plat_ops = {
1131         .open = hsic_platform_open,
1132         .close = hsic_platform_close,
1133         .pre_phy_on = hsic_power_on,
1134         .post_phy_off = hsic_power_off,
1135 };
1136
1137 static struct tegra_usb_platform_data tegra_ehci2_hsic_pdata = {
1138         .port_otg = false,
1139         .has_hostpc = true,
1140         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
1141         .op_mode        = TEGRA_USB_OPMODE_HOST,
1142         .u_data.host = {
1143                 .vbus_gpio = -1,
1144                 .hot_plug = false,
1145                 .remote_wakeup_supported = false,
1146                 .power_off_on_suspend = false,
1147         },
1148         .ops = &hsic_plat_ops,
1149 };
1150
1151 static struct tegra_usb_platform_data tegra_udc_pdata = {
1152         .port_otg = true,
1153         .has_hostpc = true,
1154         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1155         .op_mode = TEGRA_USB_OPMODE_DEVICE,
1156         .u_data.dev = {
1157                 .vbus_pmu_irq = 0,
1158                 .vbus_gpio = -1,
1159                 .charging_supported = false,
1160                 .remote_wakeup_supported = false,
1161         },
1162         .u_cfg.utmi = {
1163                 .hssync_start_delay = 0,
1164                 .elastic_limit = 16,
1165                 .idle_wait_delay = 17,
1166                 .term_range_adj = 6,
1167                 .xcvr_setup = 8,
1168                 .xcvr_lsfslew = 2,
1169                 .xcvr_lsrslew = 2,
1170                 .xcvr_setup_offset = 0,
1171                 .xcvr_use_fuses = 1,
1172         },
1173 };
1174
1175 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
1176         .port_otg = false,
1177         .has_hostpc = true,
1178         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1179         .op_mode        = TEGRA_USB_OPMODE_HOST,
1180         .u_data.host = {
1181                 .vbus_gpio = -1,
1182                 .hot_plug = false,
1183                 .remote_wakeup_supported = true,
1184                 .power_off_on_suspend = true,
1185         },
1186         .u_cfg.utmi = {
1187                 .hssync_start_delay = 0,
1188                 .elastic_limit = 16,
1189                 .idle_wait_delay = 17,
1190                 .term_range_adj = 6,
1191                 .xcvr_setup = 15,
1192                 .xcvr_lsfslew = 2,
1193                 .xcvr_lsrslew = 2,
1194                 .xcvr_setup_offset = 0,
1195                 .xcvr_use_fuses = 1,
1196         },
1197 };
1198
1199 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
1200         .port_otg = false,
1201         .has_hostpc = true,
1202         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1203         .op_mode = TEGRA_USB_OPMODE_HOST,
1204         .u_data.host = {
1205                 .vbus_gpio = -1,
1206                 .vbus_reg = "vdd_vbus_typea_usb",
1207                 .hot_plug = true,
1208                 .remote_wakeup_supported = true,
1209                 .power_off_on_suspend = true,
1210         },
1211         .u_cfg.utmi = {
1212                 .hssync_start_delay = 0,
1213                 .elastic_limit = 16,
1214                 .idle_wait_delay = 17,
1215                 .term_range_adj = 6,
1216                 .xcvr_setup = 8,
1217                 .xcvr_lsfslew = 2,
1218                 .xcvr_lsrslew = 2,
1219                 .xcvr_setup_offset = 0,
1220                 .xcvr_use_fuses = 1,
1221         },
1222 };
1223
1224 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
1225         .port_otg = true,
1226         .has_hostpc = true,
1227         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1228         .op_mode = TEGRA_USB_OPMODE_HOST,
1229         .u_data.host = {
1230                 .vbus_gpio = -1,
1231                 .vbus_reg = "vdd_vbus_micro_usb",
1232                 .hot_plug = true,
1233                 .remote_wakeup_supported = true,
1234                 .power_off_on_suspend = true,
1235         },
1236         .u_cfg.utmi = {
1237                 .hssync_start_delay = 0,
1238                 .elastic_limit = 16,
1239                 .idle_wait_delay = 17,
1240                 .term_range_adj = 6,
1241                 .xcvr_setup = 15,
1242                 .xcvr_lsfslew = 2,
1243                 .xcvr_lsrslew = 2,
1244                 .xcvr_setup_offset = 0,
1245                 .xcvr_use_fuses = 1,
1246         },
1247 };
1248
1249 static struct tegra_usb_otg_data tegra_otg_pdata = {
1250         .ehci_device = &tegra_ehci1_device,
1251         .ehci_pdata = &tegra_ehci1_utmi_pdata,
1252 };
1253 #endif
1254
1255 #if defined(CONFIG_USB_SUPPORT)
1256 static void cardhu_usb_init(void)
1257 {
1258         struct board_info bi;
1259
1260         tegra_get_board_info(&bi);
1261
1262         /* OTG should be the first to be registered */
1263         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1264         platform_device_register(&tegra_otg_device);
1265
1266         /* setup the udc platform data */
1267         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1268
1269         if (bi.board_id == BOARD_PM267) {
1270                 hsic_enable_gpio = EN_HSIC_GPIO;
1271                 hsic_reset_gpio = PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
1272                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1273                 platform_device_register(&tegra_ehci2_device);
1274         } else if (bi.board_id == BOARD_E1256) {
1275                 hsic_enable_gpio = EN_HSIC_GPIO;
1276                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1277                 platform_device_register(&tegra_ehci2_device);
1278         } else if (bi.board_id == BOARD_E1186) {
1279                 tegra_ehci2_device.dev.platform_data =
1280                                                 &tegra_ehci2_hsic_xmm_pdata;
1281                 /* ehci2 registration happens in baseband-xmm-power  */
1282         } else {
1283                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_utmi_pdata;
1284                 platform_device_register(&tegra_ehci2_device);
1285         }
1286
1287         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
1288         platform_device_register(&tegra_ehci3_device);
1289
1290 }
1291 #else
1292 static void cardhu_usb_init(void) { }
1293 #endif
1294
1295 static struct baseband_power_platform_data tegra_baseband_power_data = {
1296         .baseband_type = BASEBAND_XMM,
1297         .modem = {
1298         .xmm = {
1299                         .bb_rst = XMM_GPIO_BB_RST,
1300                         .bb_on = XMM_GPIO_BB_ON,
1301                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1302                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1303                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1304                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1305                         .hsic_device = &tegra_ehci2_device,
1306                 },
1307         },
1308 };
1309
1310 static struct platform_device tegra_baseband_power_device = {
1311         .name = "baseband_xmm_power",
1312         .id = -1,
1313         .dev = {
1314                 .platform_data = &tegra_baseband_power_data,
1315         },
1316 };
1317
1318 static struct platform_device tegra_baseband_power2_device = {
1319         .name = "baseband_xmm_power2",
1320         .id = -1,
1321         .dev = {
1322                 .platform_data = &tegra_baseband_power_data,
1323         },
1324 };
1325
1326
1327 static struct tegra_pci_platform_data cardhu_pci_platform_data = {
1328         .port_status[0] = 1,
1329         .port_status[1] = 1,
1330         .port_status[2] = 1,
1331         .use_dock_detect        = 0,
1332         .gpio           = 0,
1333 };
1334
1335 static void cardhu_pci_init(void)
1336 {
1337         struct board_info board_info;
1338
1339         tegra_get_board_info(&board_info);
1340         if (board_info.board_id == BOARD_E1291) {
1341                 cardhu_pci_platform_data.port_status[0] = 0;
1342                 cardhu_pci_platform_data.port_status[1] = 0;
1343                 cardhu_pci_platform_data.port_status[2] = 1;
1344                 cardhu_pci_platform_data.use_dock_detect = 1;
1345                 cardhu_pci_platform_data.gpio = DOCK_DETECT_GPIO;
1346         }
1347         if ((board_info.board_id == BOARD_E1186) ||
1348                 (board_info.board_id == BOARD_E1187) ||
1349                 (board_info.board_id == BOARD_E1291)) {
1350                 tegra_pci_device.dev.platform_data = &cardhu_pci_platform_data;
1351                 platform_device_register(&tegra_pci_device);
1352         }
1353 }
1354
1355 static void cardhu_modem_init(void)
1356 {
1357         struct board_info board_info;
1358         int w_disable_gpio, ret;
1359
1360         tegra_get_board_info(&board_info);
1361         switch (board_info.board_id) {
1362         case BOARD_E1291:
1363         case BOARD_E1198:
1364                 if (((board_info.board_id == BOARD_E1291) &&
1365                                 (board_info.fab < BOARD_FAB_A03)) ||
1366                         ((board_info.board_id == BOARD_E1198) &&
1367                                         (board_info.fab < BOARD_FAB_A02))) {
1368                         w_disable_gpio = TEGRA_GPIO_PH5;
1369                 } else {
1370                         w_disable_gpio = TEGRA_GPIO_PDD5;
1371                 }
1372
1373                 ret = gpio_request(w_disable_gpio, "w_disable_gpio");
1374                 if (ret < 0)
1375                         pr_err("%s: gpio_request failed for gpio %d\n",
1376                                 __func__, w_disable_gpio);
1377                 else
1378                         gpio_direction_input(w_disable_gpio);
1379
1380                 /* E1291-A04 & E1198:A02: Set PERST signal to high */
1381                 if (((board_info.board_id == BOARD_E1291) &&
1382                                 (board_info.fab >= BOARD_FAB_A04)) ||
1383                         ((board_info.board_id == BOARD_E1198) &&
1384                                         (board_info.fab >= BOARD_FAB_A02))) {
1385                         ret = gpio_request(TEGRA_GPIO_PH7, "modem_perst");
1386                         if (ret < 0) {
1387                                 pr_err("%s(): Error in allocating gpio "
1388                                         "TEGRA_GPIO_PH7\n", __func__);
1389                                 break;
1390                         }
1391                         gpio_direction_output(TEGRA_GPIO_PH7, 1);
1392                 }
1393                 break;
1394         case BOARD_E1186:
1395                 platform_device_register(&tegra_baseband_power_device);
1396                 platform_device_register(&tegra_baseband_power2_device);
1397                 break;
1398         default:
1399                 break;
1400         }
1401
1402 }
1403
1404 #ifdef CONFIG_SATA_AHCI_TEGRA
1405 static void cardhu_sata_init(void)
1406 {
1407         platform_device_register(&tegra_sata_device);
1408 }
1409 #else
1410 static void cardhu_sata_init(void) { }
1411 #endif
1412
1413 static void __init tegra_cardhu_init(void)
1414 {
1415         tegra_thermal_init(&thermal_data,
1416                                 &skin_data,
1417                                 throttle_list,
1418                                 ARRAY_SIZE(throttle_list));
1419         tegra_clk_init_from_table(cardhu_clk_init_table);
1420         tegra_enable_pinmux();
1421         tegra_smmu_init();
1422         cardhu_pinmux_init();
1423         cardhu_i2c_init();
1424         cardhu_spi_init();
1425         cardhu_usb_init();
1426 #ifdef CONFIG_TEGRA_EDP_LIMITS
1427         cardhu_edp_init();
1428 #endif
1429         cardhu_uart_init();
1430         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
1431         tegra_ram_console_debug_init();
1432         tegra_io_dpd_init();
1433         cardhu_sdhci_init();
1434         cardhu_regulator_init();
1435         cardhu_dtv_init();
1436         cardhu_suspend_init();
1437         cardhu_touch_init();
1438         cardhu_modem_init();
1439         cardhu_kbc_init();
1440         cardhu_scroll_init();
1441         cardhu_keys_init();
1442         cardhu_panel_init();
1443         cardhu_pmon_init();
1444         cardhu_sensors_init();
1445         cardhu_setup_bluesleep();
1446         cardhu_sata_init();
1447         //audio_wired_jack_init();
1448         cardhu_pins_state_init();
1449         cardhu_emc_init();
1450         tegra_release_bootloader_fb();
1451         cardhu_pci_init();
1452 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1453         tegra_wdt_recovery_init();
1454 #endif
1455         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1456 }
1457
1458 static void __init tegra_cardhu_reserve(void)
1459 {
1460 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1461         /* support 1920X1200 with 24bpp */
1462         tegra_reserve(0, SZ_8M + SZ_1M, SZ_8M + SZ_1M);
1463 #else
1464         tegra_reserve(SZ_128M, SZ_8M, SZ_8M);
1465 #endif
1466         tegra_ram_console_debug_reserve(SZ_1M);
1467 }
1468
1469 static const char *cardhu_dt_board_compat[] = {
1470         "nvidia,cardhu",
1471         NULL
1472 };
1473
1474 MACHINE_START(CARDHU, "cardhu")
1475         .atag_offset    = 0x100,
1476         .soc            = &tegra_soc_desc,
1477         .map_io         = tegra_map_common_io,
1478         .reserve        = tegra_cardhu_reserve,
1479         .init_early     = tegra30_init_early,
1480         .init_irq       = tegra_init_irq,
1481         .handle_irq     = gic_handle_irq,
1482         .timer          = &tegra_timer,
1483         .init_machine   = tegra_cardhu_init,
1484         .restart        = tegra_assert_system_reset,
1485         .dt_compat      = cardhu_dt_board_compat,
1486 MACHINE_END