arm: thermal: Removed nonTEGRA_THERMAL_SYSFS logic
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <linux/spi/spi.h>
37 #include <linux/i2c/atmel_mxt_ts.h>
38 #include <linux/tegra_uart.h>
39 #include <linux/memblock.h>
40 #include <linux/spi-tegra.h>
41 #include <linux/nfc/pn544.h>
42
43 #include <sound/wm8903.h>
44 #include <sound/max98095.h>
45 #include <media/tegra_dtv.h>
46
47 #include <asm/hardware/gic.h>
48
49 #include <mach/clk.h>
50 #include <mach/iomap.h>
51 #include <mach/irqs.h>
52 #include <mach/pinmux.h>
53 #include <mach/iomap.h>
54 #include <mach/io.h>
55 #include <mach/i2s.h>
56 #include <mach/tegra_asoc_pdata.h>
57 #include <mach/tegra_wm8903_pdata.h>
58 #include <asm/mach-types.h>
59 #include <asm/mach/arch.h>
60 #include <mach/usb_phy.h>
61 #include <mach/thermal.h>
62 #include <mach/pci.h>
63 #include <mach/gpio-tegra.h>
64
65 #include "board.h"
66 #include "clock.h"
67 #include "board-cardhu.h"
68 #include "board-touch.h"
69 #include "devices.h"
70 #include "gpio-names.h"
71 #include "fuse.h"
72 #include "pm.h"
73 #include "baseband-xmm-power.h"
74 #include "wdt-recovery.h"
75
76 /* All units are in millicelsius */
77 static struct tegra_thermal_data thermal_data = {
78         .temp_shutdown = 90000,
79         .temp_offset = TDIODE_OFFSET, /* temps based on tdiode */
80 #ifdef CONFIG_TEGRA_EDP_LIMITS
81         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
82         .hysteresis_edp = 3000,
83 #endif
84 #ifdef CONFIG_TEGRA_THERMAL_THROTTLE
85         .temp_throttle = 85000,
86         .tc1 = 0,
87         .tc2 = 1,
88         .passive_delay = 2000,
89 #endif
90 };
91
92 /* !!!TODO: Change for cardhu (Taken from Ventana) */
93 static struct tegra_utmip_config utmi_phy_config[] = {
94         [0] = {
95                         .hssync_start_delay = 0,
96                         .idle_wait_delay = 17,
97                         .elastic_limit = 16,
98                         .term_range_adj = 6,
99                         .xcvr_setup = 15,
100                         .xcvr_setup_offset = 0,
101                         .xcvr_use_fuses = 1,
102                         .xcvr_lsfslew = 2,
103                         .xcvr_lsrslew = 2,
104         },
105         [1] = {
106                         .hssync_start_delay = 0,
107                         .idle_wait_delay = 17,
108                         .elastic_limit = 16,
109                         .term_range_adj = 6,
110                         .xcvr_setup = 15,
111                         .xcvr_setup_offset = 0,
112                         .xcvr_use_fuses = 1,
113                         .xcvr_lsfslew = 2,
114                         .xcvr_lsrslew = 2,
115         },
116         [2] = {
117                         .hssync_start_delay = 0,
118                         .idle_wait_delay = 17,
119                         .elastic_limit = 16,
120                         .term_range_adj = 6,
121                         .xcvr_setup = 8,
122                         .xcvr_setup_offset = 0,
123                         .xcvr_use_fuses = 1,
124                         .xcvr_lsfslew = 2,
125                         .xcvr_lsrslew = 2,
126         },
127 };
128
129 static struct resource cardhu_bcm4329_rfkill_resources[] = {
130         {
131                 .name   = "bcm4329_nshutdown_gpio",
132                 .start  = TEGRA_GPIO_PU0,
133                 .end    = TEGRA_GPIO_PU0,
134                 .flags  = IORESOURCE_IO,
135         },
136 };
137
138 static struct platform_device cardhu_bcm4329_rfkill_device = {
139         .name = "bcm4329_rfkill",
140         .id             = -1,
141         .num_resources  = ARRAY_SIZE(cardhu_bcm4329_rfkill_resources),
142         .resource       = cardhu_bcm4329_rfkill_resources,
143 };
144
145 static struct resource cardhu_bluesleep_resources[] = {
146         [0] = {
147                 .name = "gpio_host_wake",
148                         .start  = TEGRA_GPIO_PU6,
149                         .end    = TEGRA_GPIO_PU6,
150                         .flags  = IORESOURCE_IO,
151         },
152         [1] = {
153                 .name = "gpio_ext_wake",
154                         .start  = TEGRA_GPIO_PU1,
155                         .end    = TEGRA_GPIO_PU1,
156                         .flags  = IORESOURCE_IO,
157         },
158         [2] = {
159                 .name = "host_wake",
160                         .start  = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PU6),
161                         .end    = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PU6),
162                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
163         },
164 };
165
166 static struct platform_device cardhu_bluesleep_device = {
167         .name           = "bluesleep",
168         .id             = -1,
169         .num_resources  = ARRAY_SIZE(cardhu_bluesleep_resources),
170         .resource       = cardhu_bluesleep_resources,
171 };
172
173 static noinline void __init cardhu_setup_bluesleep(void)
174 {
175         platform_device_register(&cardhu_bluesleep_device);
176         tegra_gpio_enable(TEGRA_GPIO_PU6);
177         tegra_gpio_enable(TEGRA_GPIO_PU1);
178         return;
179 }
180
181 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
182         /* name         parent          rate            enabled */
183         { "pll_m",      NULL,           0,              false},
184         { "hda",        "pll_p",        108000000,      false},
185         { "hda2codec_2x","pll_p",       48000000,       false},
186         { "pwm",        "pll_p",        3187500,        false},
187         { "blink",      "clk_32k",      32768,          true},
188         { "i2s0",       "pll_a_out0",   0,              false},
189         { "i2s1",       "pll_a_out0",   0,              false},
190         { "i2s3",       "pll_a_out0",   0,              false},
191         { "spdif_out",  "pll_a_out0",   0,              false},
192         { "d_audio",    "clk_m",        12000000,       false},
193         { "dam0",       "clk_m",        12000000,       false},
194         { "dam1",       "clk_m",        12000000,       false},
195         { "dam2",       "clk_m",        12000000,       false},
196         { "audio1",     "i2s1_sync",    0,              false},
197         { "audio3",     "i2s3_sync",    0,              false},
198         { "vi_sensor",  "pll_p",        150000000,      false},
199         { "i2c1",       "pll_p",        3200000,        false},
200         { "i2c2",       "pll_p",        3200000,        false},
201         { "i2c3",       "pll_p",        3200000,        false},
202         { "i2c4",       "pll_p",        3200000,        false},
203         { "i2c5",       "pll_p",        3200000,        false},
204         { NULL,         NULL,           0,              0},
205 };
206
207 static struct pn544_i2c_platform_data nfc_pdata = {
208         .irq_gpio = TEGRA_GPIO_PX0,
209         .ven_gpio = TEGRA_GPIO_PP3,
210         .firm_gpio = TEGRA_GPIO_PO7,
211         };
212
213 static struct i2c_board_info __initdata cardhu_i2c_bus3_board_info[] = {
214         {
215                 I2C_BOARD_INFO("pn544", 0x28),
216                 .platform_data = &nfc_pdata,
217                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PX0),
218         },
219 };
220 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
221         .adapter_nr     = 0,
222         .bus_count      = 1,
223         .bus_clk_rate   = { 100000, 0 },
224         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
225         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
226         .arb_recovery = arb_lost_recovery,
227 };
228
229 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
230         .adapter_nr     = 1,
231         .bus_count      = 1,
232         .bus_clk_rate   = { 400000, 0 },
233         .is_clkon_always = true,
234         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
235         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
236         .arb_recovery = arb_lost_recovery,
237 };
238
239 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
240         .adapter_nr     = 2,
241         .bus_count      = 1,
242         .bus_clk_rate   = { 100000, 0 },
243         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
244         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
245         .arb_recovery = arb_lost_recovery,
246 };
247
248 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
249         .adapter_nr     = 3,
250         .bus_count      = 1,
251         .bus_clk_rate   = { 10000, 0 },
252         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
253         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
254         .arb_recovery = arb_lost_recovery,
255 };
256
257 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
258         .adapter_nr     = 4,
259         .bus_count      = 1,
260         .bus_clk_rate   = { 400000, 0 },
261         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
262         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
263         .arb_recovery = arb_lost_recovery,
264 };
265
266
267 #if 0
268 struct tegra_wired_jack_conf audio_wr_jack_conf = {
269         .hp_det_n = TEGRA_GPIO_PW2,
270         .en_mic_ext = TEGRA_GPIO_PX1,
271         .en_mic_int = TEGRA_GPIO_PX0,
272 };
273 #endif
274
275 static struct wm8903_platform_data cardhu_wm8903_pdata = {
276         .irq_active_low = 0,
277         .micdet_cfg = 0,
278         .micdet_delay = 100,
279         .gpio_base = CARDHU_GPIO_WM8903(0),
280         .gpio_cfg = {
281                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP1_FN_SHIFT),
282                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP2_FN_SHIFT) |
283                         WM8903_GP2_DIR,
284                 WM8903_GPIO_CONFIG_ZERO,
285                 0,
286                 0,
287         },
288 };
289
290 /* Equalizer filter coefs generated from the MAXIM MAX98095
291  * evkit software tool */
292 static struct max98095_eq_cfg max98095_eq_cfg[] = {
293         {
294                 .name = "FLAT",
295                 .rate = 44100,
296                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
297                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
298                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
299                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
300                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
301         },
302         {
303                 .name = "LOWPASS1K",
304                 .rate = 44100,
305                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
306                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
307                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
308                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
309                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
310         },
311         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
312                 .name = "HIBOOST",
313                 .rate = 44100,
314                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
315                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
316                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
317                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
318                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
319         },
320         { /* BASS=12dB, TREBLE=+12dB */
321                 .name = "LOUD12DB",
322                 .rate = 44100,
323                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
324                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
325                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
326                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
327                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
328         },
329         {
330                 .name = "FLAT",
331                 .rate = 16000,
332                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
333                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
334                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
335                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
336                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
337         },
338         {
339                 .name = "LOWPASS1K",
340                 .rate = 16000,
341                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
342                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
343                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
344                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
345                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
346         },
347         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
348                 .name = "HIBOOST",
349                 .rate = 16000,
350                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
351                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
352                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
353                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
354                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
355         },
356         { /* BASS=12dB, TREBLE=+12dB */
357                 .name = "LOUD12DB",
358                 .rate = 16000,
359                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
360                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
361                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
362                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
363                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
364         },
365 };
366
367 static struct max98095_pdata cardhu_max98095_pdata = {
368         /* equalizer configuration */
369         .eq_cfg = max98095_eq_cfg,
370         .eq_cfgcnt = ARRAY_SIZE(max98095_eq_cfg),
371
372         /* Biquad filter response configuration */
373         .bq_cfg = NULL,
374         .bq_cfgcnt = 0,
375
376         /* microphone configuration */
377         .digmic_left_mode = 1,
378         .digmic_right_mode = 1,
379 };
380
381 static struct i2c_board_info __initdata cardhu_codec_wm8903_info = {
382         I2C_BOARD_INFO("wm8903", 0x1a),
383         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
384         .platform_data = &cardhu_wm8903_pdata,
385 };
386
387 static struct i2c_board_info __initdata cardhu_codec_aic326x_info = {
388         I2C_BOARD_INFO("aic3262-codec", 0x18),
389         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
390 };
391
392 static struct i2c_board_info __initdata cardhu_codec_max98095_info = {
393         I2C_BOARD_INFO("max98095", 0x10),
394         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
395         .platform_data = &cardhu_max98095_pdata,
396 };
397
398 static void cardhu_i2c_init(void)
399 {
400         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
401         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
402         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
403         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
404         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
405
406         platform_device_register(&tegra_i2c_device5);
407         platform_device_register(&tegra_i2c_device4);
408         platform_device_register(&tegra_i2c_device3);
409         platform_device_register(&tegra_i2c_device2);
410         platform_device_register(&tegra_i2c_device1);
411
412         i2c_register_board_info(4, &cardhu_codec_wm8903_info, 1);
413         i2c_register_board_info(4, &cardhu_codec_max98095_info, 1);
414         i2c_register_board_info(4, &cardhu_codec_aic326x_info, 1);
415
416         i2c_register_board_info(2, cardhu_i2c_bus3_board_info, 1);
417 }
418
419 static struct platform_device *cardhu_uart_devices[] __initdata = {
420         &tegra_uarta_device,
421         &tegra_uartb_device,
422         &tegra_uartc_device,
423         &tegra_uartd_device,
424         &tegra_uarte_device,
425 };
426 static struct uart_clk_parent uart_parent_clk[] = {
427         [0] = {.name = "clk_m"},
428         [1] = {.name = "pll_p"},
429 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
430         [2] = {.name = "pll_m"},
431 #endif
432 };
433
434 static struct tegra_uart_platform_data cardhu_uart_pdata;
435 static struct tegra_uart_platform_data cardhu_loopback_uart_pdata;
436
437 static void __init uart_debug_init(void)
438 {
439         struct board_info board_info;
440         int debug_port_id;
441
442         tegra_get_board_info(&board_info);
443
444         debug_port_id = get_tegra_uart_debug_port_id();
445         if (debug_port_id < 0) {
446                 debug_port_id = 0;
447                         /* UARTB is debug port
448                          *       for SLT - E1186/E1187/PM269
449                          *       for E1256/E1257
450                          */
451                 if (((board_info.sku & SKU_SLT_ULPI_SUPPORT) &&
452                         ((board_info.board_id == BOARD_E1186) ||
453                         (board_info.board_id == BOARD_E1187) ||
454                         (board_info.board_id == BOARD_PM269))) ||
455                         (board_info.board_id == BOARD_E1256) ||
456                         (board_info.board_id == BOARD_E1257))
457                                 debug_port_id = 1;
458         }
459
460         switch (debug_port_id) {
461         case 0:
462                 /* UARTA is the debug port. */
463                 pr_info("Selecting UARTA as the debug console\n");
464                 cardhu_uart_devices[0] = &debug_uarta_device;
465                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
466                 debug_uart_port_base = ((struct plat_serial8250_port *)(
467                         debug_uarta_device.dev.platform_data))->mapbase;
468                 break;
469
470         case 1:
471                 /* UARTB is the debug port. */
472                 pr_info("Selecting UARTB as the debug console\n");
473                 cardhu_uart_devices[1] = &debug_uartb_device;
474                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartb");
475                 debug_uart_port_base = ((struct plat_serial8250_port *)(
476                         debug_uartb_device.dev.platform_data))->mapbase;
477                 break;
478
479         case 2:
480                 /* UARTC is the debug port. */
481                 pr_info("Selecting UARTC as the debug console\n");
482                 cardhu_uart_devices[2] = &debug_uartc_device;
483                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartc");
484                 debug_uart_port_base = ((struct plat_serial8250_port *)(
485                         debug_uartc_device.dev.platform_data))->mapbase;
486                 break;
487
488         case 3:
489                 /* UARTD is the debug port. */
490                 pr_info("Selecting UARTD as the debug console\n");
491                 cardhu_uart_devices[3] = &debug_uartd_device;
492                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartd");
493                 debug_uart_port_base = ((struct plat_serial8250_port *)(
494                         debug_uartd_device.dev.platform_data))->mapbase;
495                 break;
496
497         case 4:
498                 /* UARTE is the debug port. */
499                 pr_info("Selecting UARTE as the debug console\n");
500                 cardhu_uart_devices[4] = &debug_uarte_device;
501                 debug_uart_clk =  clk_get_sys("serial8250.0", "uarte");
502                 debug_uart_port_base = ((struct plat_serial8250_port *)(
503                         debug_uarte_device.dev.platform_data))->mapbase;
504                 break;
505
506         default:
507                 pr_info("The debug console id %d is invalid, Assuming UARTA", debug_port_id);
508                 cardhu_uart_devices[0] = &debug_uarta_device;
509                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
510                 debug_uart_port_base = ((struct plat_serial8250_port *)(
511                         debug_uarta_device.dev.platform_data))->mapbase;
512                 break;
513         }
514         return;
515 }
516
517 static void __init cardhu_uart_init(void)
518 {
519         struct clk *c;
520         int i;
521
522         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
523                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
524                 if (IS_ERR_OR_NULL(c)) {
525                         pr_err("Not able to get the clock for %s\n",
526                                                 uart_parent_clk[i].name);
527                         continue;
528                 }
529                 uart_parent_clk[i].parent_clk = c;
530                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
531         }
532         cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
533         cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
534         cardhu_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
535         cardhu_loopback_uart_pdata.parent_clk_count =
536                                                 ARRAY_SIZE(uart_parent_clk);
537         cardhu_loopback_uart_pdata.is_loopback = true;
538         tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
539         tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
540         tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
541         tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
542         /* UARTE is used for loopback test purpose */
543         tegra_uarte_device.dev.platform_data = &cardhu_loopback_uart_pdata;
544
545         /* Register low speed only if it is selected */
546         if (!is_tegra_debug_uartport_hs()) {
547                 uart_debug_init();
548                 /* Clock enable for the debug channel */
549                 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
550                         pr_info("The debug console clock name is %s\n",
551                                                 debug_uart_clk->name);
552                         c = tegra_get_clock_by_name("pll_p");
553                         if (IS_ERR_OR_NULL(c))
554                                 pr_err("Not getting the parent clock pll_p\n");
555                         else
556                                 clk_set_parent(debug_uart_clk, c);
557
558                         clk_enable(debug_uart_clk);
559                         clk_set_rate(debug_uart_clk, clk_get_rate(c));
560                 } else {
561                         pr_err("Not getting the clock %s for debug console\n",
562                                         debug_uart_clk->name);
563                 }
564         }
565
566         platform_add_devices(cardhu_uart_devices,
567                                 ARRAY_SIZE(cardhu_uart_devices));
568 }
569
570 static struct platform_device tegra_camera = {
571         .name = "tegra_camera",
572         .id = -1,
573 };
574
575 static struct platform_device *cardhu_spi_devices[] __initdata = {
576         &tegra_spi_device4,
577 };
578
579 static struct platform_device *touch_spi_device[] __initdata = {
580         &tegra_spi_device1,
581 };
582
583 struct spi_clk_parent spi_parent_clk[] = {
584         [0] = {.name = "pll_p"},
585 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
586         [1] = {.name = "pll_m"},
587         [2] = {.name = "clk_m"},
588 #else
589         [1] = {.name = "clk_m"},
590 #endif
591 };
592
593 static struct tegra_spi_platform_data cardhu_spi_pdata = {
594         .is_dma_based           = true,
595         .max_dma_buffer         = (16 * 1024),
596         .is_clkon_always        = false,
597         .max_rate               = 100000000,
598 };
599
600 static void __init cardhu_spi_init(void)
601 {
602         int i;
603         struct clk *c;
604         struct board_info board_info, display_board_info;
605
606         tegra_get_board_info(&board_info);
607         tegra_get_display_board_info(&display_board_info);
608
609         for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
610                 c = tegra_get_clock_by_name(spi_parent_clk[i].name);
611                 if (IS_ERR_OR_NULL(c)) {
612                         pr_err("Not able to get the clock for %s\n",
613                                                 spi_parent_clk[i].name);
614                         continue;
615                 }
616                 spi_parent_clk[i].parent_clk = c;
617                 spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
618         }
619         cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
620         cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
621         tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
622         platform_add_devices(cardhu_spi_devices,
623                                 ARRAY_SIZE(cardhu_spi_devices));
624
625         if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
626                 platform_add_devices(touch_spi_device,
627                                 ARRAY_SIZE(touch_spi_device));
628         }
629         if (board_info.board_id == BOARD_E1198) {
630                 tegra_spi_device2.dev.platform_data = &cardhu_spi_pdata;
631                 platform_device_register(&tegra_spi_device2);
632                 tegra_spi_slave_device1.dev.platform_data = &cardhu_spi_pdata;
633                 platform_device_register(&tegra_spi_slave_device1);
634         }
635 }
636
637 static void __init cardhu_dtv_init(void)
638 {
639         struct board_info board_info;
640
641         tegra_get_board_info(&board_info);
642
643         if (board_info.board_id == BOARD_E1186)
644                 platform_device_register(&tegra_dtv_device);
645 }
646
647 static struct resource tegra_rtc_resources[] = {
648         [0] = {
649                 .start = TEGRA_RTC_BASE,
650                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
651                 .flags = IORESOURCE_MEM,
652         },
653         [1] = {
654                 .start = INT_RTC,
655                 .end = INT_RTC,
656                 .flags = IORESOURCE_IRQ,
657         },
658 };
659
660 static struct platform_device tegra_rtc_device = {
661         .name = "tegra_rtc",
662         .id   = -1,
663         .resource = tegra_rtc_resources,
664         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
665 };
666
667 static struct tegra_wm8903_platform_data cardhu_audio_wm8903_pdata = {
668         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
669         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
670         .gpio_hp_mute           = -1,
671         .gpio_int_mic_en        = -1,
672         .gpio_ext_mic_en        = -1,
673 };
674
675 static struct tegra_asoc_platform_data cardhu_audio_max98095_pdata = {
676         .gpio_spkr_en           = -1,
677         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
678         .gpio_hp_mute           = -1,
679         .gpio_int_mic_en        = -1,
680         .gpio_ext_mic_en        = -1,
681 };
682
683 static struct platform_device cardhu_audio_wm8903_device = {
684         .name   = "tegra-snd-wm8903",
685         .id     = 0,
686         .dev    = {
687                 .platform_data = &cardhu_audio_wm8903_pdata,
688         },
689 };
690
691 static struct platform_device cardhu_audio_max98095_device = {
692         .name   = "tegra-snd-max98095",
693         .id     = 0,
694         .dev    = {
695                 .platform_data = &cardhu_audio_max98095_pdata,
696         },
697 };
698
699 static struct tegra_asoc_platform_data cardhu_audio_aic326x_pdata = {
700         .gpio_spkr_en           = -1,
701         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
702         .gpio_hp_mute           = -1,
703         .gpio_int_mic_en        = -1,
704         .gpio_ext_mic_en        = -1,
705         /*defaults for Verbier-Cardhu board with TI AIC326X codec*/
706         .audio_port_id          = {
707                 [HIFI_CODEC] = 0,
708                 [BASEBAND] = -1,
709                 [BT_SCO] = 3,
710         },
711         .baseband_param         = {
712                 .rate = -1,
713                 .channels = -1,
714         },
715 };
716
717 static struct platform_device cardhu_audio_aic326x_device = {
718         .name   = "tegra-snd-aic326x",
719         .id     = 0,
720         .dev    = {
721                 .platform_data  = &cardhu_audio_aic326x_pdata,
722         },
723 };
724
725 static struct platform_device *cardhu_devices[] __initdata = {
726         &tegra_pmu_device,
727         &tegra_rtc_device,
728         &tegra_udc_device,
729 #if defined(CONFIG_TEGRA_IOVMM_SMMU) ||  defined(CONFIG_TEGRA_IOMMU_SMMU)
730         &tegra_smmu_device,
731 #endif
732         &tegra_wdt_device,
733 #if defined(CONFIG_TEGRA_AVP)
734         &tegra_avp_device,
735 #endif
736         &tegra_camera,
737 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
738         &tegra_se_device,
739 #endif
740         &tegra_ahub_device,
741         &tegra_dam_device0,
742         &tegra_dam_device1,
743         &tegra_dam_device2,
744         &tegra_i2s_device0,
745         &tegra_i2s_device1,
746         &tegra_i2s_device3,
747         &tegra_spdif_device,
748         &spdif_dit_device,
749         &bluetooth_dit_device,
750         &baseband_dit_device,
751         &cardhu_bcm4329_rfkill_device,
752         &tegra_pcm_device,
753         &cardhu_audio_wm8903_device,
754         &cardhu_audio_max98095_device,
755         &cardhu_audio_aic326x_device,
756         &tegra_hda_device,
757 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
758         &tegra_aes_device,
759 #endif
760 };
761
762 #define MXT_CONFIG_CRC  0xD62DE8
763 static const u8 config[] = {
764         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
765         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
766         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
767         0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
768         0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
769         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
770         0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
771         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
772         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
773         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
774         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
775         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
776         0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
777         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
778         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
779         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
780         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
781         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
782         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
783         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
784 };
785
786 #define MXT_CONFIG_CRC_SKU2000  0xA24D9A
787 static const u8 config_sku2000[] = {
788         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
789         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
790         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
791         0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00,  //23=thr  2 di
792         0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
793         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
794         0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00,  //0A=limit
795         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
796         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
797         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
798         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
799         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
800         0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
801         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
802         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
803         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
804         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
805         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
806         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
807         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
808 };
809
810 static struct mxt_platform_data atmel_mxt_info = {
811         .x_line         = 27,
812         .y_line         = 42,
813         .x_size         = 768,
814         .y_size         = 1366,
815         .blen           = 0x20,
816         .threshold      = 0x3C,
817         .voltage        = 3300000,              /* 3.3V */
818         .orient         = 5,
819         .config         = config,
820         .config_length  = 157,
821         .config_crc     = MXT_CONFIG_CRC,
822         .irqflags       = IRQF_TRIGGER_FALLING,
823 /*      .read_chg       = &read_chg, */
824         .read_chg       = NULL,
825 };
826
827 static struct i2c_board_info __initdata atmel_i2c_info[] = {
828         {
829                 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
830                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PH4),
831                 .platform_data = &atmel_mxt_info,
832         }
833 };
834
835 static __initdata struct tegra_clk_init_table spi_clk_init_table[] = {
836         /* name         parent          rate            enabled */
837         { "sbc1",       "pll_p",        52000000,       true},
838         { NULL,         NULL,           0,              0},
839 };
840
841 static int __init cardhu_touch_init(void)
842 {
843         struct board_info BoardInfo;
844
845         tegra_get_display_board_info(&BoardInfo);
846         if (BoardInfo.board_id == BOARD_DISPLAY_PM313) {
847                 tegra_clk_init_from_table(spi_clk_init_table);
848
849                 touch_init_raydium(TEGRA_GPIO_PH4, TEGRA_GPIO_PH6, 2);
850         } else {
851                 tegra_gpio_enable(TEGRA_GPIO_PH4);
852                 tegra_gpio_enable(TEGRA_GPIO_PH6);
853
854                 gpio_request(TEGRA_GPIO_PH4, "atmel-irq");
855                 gpio_direction_input(TEGRA_GPIO_PH4);
856
857                 gpio_request(TEGRA_GPIO_PH6, "atmel-reset");
858                 gpio_direction_output(TEGRA_GPIO_PH6, 0);
859                 msleep(1);
860                 gpio_set_value(TEGRA_GPIO_PH6, 1);
861                 msleep(100);
862
863                 tegra_get_board_info(&BoardInfo);
864                 if ((BoardInfo.sku & SKU_TOUCH_MASK) == SKU_TOUCH_2000) {
865                         atmel_mxt_info.config = config_sku2000;
866                         atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
867                 }
868
869                 i2c_register_board_info(1, atmel_i2c_info, 1);
870         }
871
872         return 0;
873 }
874
875 static struct tegra_uhsic_config uhsic_phy_config = {
876         .enable_gpio = EN_HSIC_GPIO,
877         .reset_gpio = -1,
878         .sync_start_delay = 9,
879         .idle_wait_delay = 17,
880         .term_range_adj = 0,
881         .elastic_underrun_limit = 16,
882         .elastic_overrun_limit = 16,
883 };
884
885 static struct tegra_ehci_platform_data tegra_ehci_uhsic_pdata = {
886         .phy_type = TEGRA_USB_PHY_TYPE_HSIC,
887         .phy_config = &uhsic_phy_config,
888         .operating_mode = TEGRA_USB_HOST,
889         .power_down_on_bus_suspend = 1,
890         .default_enable = true,
891 };
892
893 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
894         [0] = {
895                         .phy_config = &utmi_phy_config[0],
896                         .operating_mode = TEGRA_USB_HOST,
897                         .power_down_on_bus_suspend = 1,
898                         .default_enable = true,
899         },
900         [1] = {
901                         .phy_config = &utmi_phy_config[1],
902                         .operating_mode = TEGRA_USB_HOST,
903                         .power_down_on_bus_suspend = 1,
904                         .default_enable = true,
905         },
906         [2] = {
907                         .phy_config = &utmi_phy_config[2],
908                         .operating_mode = TEGRA_USB_HOST,
909                         .power_down_on_bus_suspend = 1,
910                         .hotplug = 1,
911                         .default_enable = true,
912         },
913 };
914
915 static struct tegra_otg_platform_data tegra_otg_pdata = {
916         .ehci_device = &tegra_ehci1_device,
917         .ehci_pdata = &tegra_ehci_pdata[0],
918 };
919
920 #ifdef CONFIG_USB_SUPPORT
921 static struct usb_phy_plat_data tegra_usb_phy_pdata[] = {
922         [0] = {
923                         .instance = 0,
924                         .vbus_gpio = -1,
925                         .vbus_reg_supply = "vdd_vbus_micro_usb",
926         },
927         [1] = {
928                         .instance = 1,
929                         .vbus_gpio = -1,
930         },
931         [2] = {
932                         .instance = 2,
933                         .vbus_gpio = -1,
934                         .vbus_reg_supply = "vdd_vbus_typea_usb",
935         },
936 };
937
938 static int cardhu_usb_hsic_postsupend(void)
939 {
940 #ifdef CONFIG_TEGRA_BB_XMM_POWER
941         baseband_xmm_set_power_status(BBXMM_PS_L2);
942 #endif
943         return 0;
944 }
945
946 static int cardhu_usb_hsic_preresume(void)
947 {
948 #ifdef CONFIG_TEGRA_BB_XMM_POWER
949         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
950 #endif
951         return 0;
952 }
953
954 static int cardhu_usb_hsic_phy_ready(void)
955 {
956 #ifdef CONFIG_TEGRA_BB_XMM_POWER
957         baseband_xmm_set_power_status(BBXMM_PS_L0);
958 #endif
959         return 0;
960 }
961
962 static int cardhu_usb_hsic_phy_off(void)
963 {
964 #ifdef CONFIG_TEGRA_BB_XMM_POWER
965         baseband_xmm_set_power_status(BBXMM_PS_L3);
966 #endif
967         return 0;
968 }
969
970 static void cardhu_usb_init(void)
971 {
972         struct board_info bi;
973
974         tegra_get_board_info(&bi);
975
976         tegra_usb_phy_init(tegra_usb_phy_pdata,
977                         ARRAY_SIZE(tegra_usb_phy_pdata));
978
979         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
980         platform_device_register(&tegra_otg_device);
981         if (bi.board_id == BOARD_PM267) {
982                 uhsic_phy_config.reset_gpio =
983                         PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
984                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
985                 platform_device_register(&tegra_ehci2_device);
986         } else if (bi.board_id == BOARD_E1256) {
987                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
988                 platform_device_register(&tegra_ehci2_device);
989         } else if (bi.board_id == BOARD_E1186) {
990                 /* for baseband devices do not switch off phy during suspend */
991                 tegra_ehci_uhsic_pdata.power_down_on_bus_suspend = 0;
992                 uhsic_phy_config.postsuspend = cardhu_usb_hsic_postsupend;
993                 uhsic_phy_config.preresume = cardhu_usb_hsic_preresume;
994                 uhsic_phy_config.usb_phy_ready = cardhu_usb_hsic_phy_ready;
995                 uhsic_phy_config.post_phy_off = cardhu_usb_hsic_phy_off;
996                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
997                 /* baseband registration happens in baseband-xmm-power  */
998         } else {
999                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_pdata[1];
1000                 platform_device_register(&tegra_ehci2_device);
1001         }
1002
1003         tegra_ehci3_device.dev.platform_data = &tegra_ehci_pdata[2];
1004         platform_device_register(&tegra_ehci3_device);
1005
1006 }
1007 #else
1008 static void cardhu_usb_init(void) { }
1009 #endif
1010
1011 static void cardhu_gps_init(void)
1012 {
1013         tegra_gpio_enable(TEGRA_GPIO_PU2);
1014         tegra_gpio_enable(TEGRA_GPIO_PU3);
1015 }
1016
1017 static void cardhu_nfc_init(void)
1018 {
1019         tegra_gpio_enable(TEGRA_GPIO_PX0);
1020         tegra_gpio_enable(TEGRA_GPIO_PP3);
1021         tegra_gpio_enable(TEGRA_GPIO_PO7);
1022 }
1023
1024 static struct baseband_power_platform_data tegra_baseband_power_data = {
1025         .baseband_type = BASEBAND_XMM,
1026         .modem = {
1027         .xmm = {
1028                         .bb_rst = XMM_GPIO_BB_RST,
1029                         .bb_on = XMM_GPIO_BB_ON,
1030                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1031                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1032                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1033                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1034                         .hsic_device = &tegra_ehci2_device,
1035                 },
1036         },
1037 };
1038
1039 static struct platform_device tegra_baseband_power_device = {
1040         .name = "baseband_xmm_power",
1041         .id = -1,
1042         .dev = {
1043                 .platform_data = &tegra_baseband_power_data,
1044         },
1045 };
1046
1047 static struct platform_device tegra_baseband_power2_device = {
1048         .name = "baseband_xmm_power2",
1049         .id = -1,
1050         .dev = {
1051                 .platform_data = &tegra_baseband_power_data,
1052         },
1053 };
1054
1055
1056 static struct tegra_pci_platform_data cardhu_pci_platform_data = {
1057         .port_status[0] = 1,
1058         .port_status[1] = 1,
1059         .port_status[2] = 1,
1060         .use_dock_detect        = 0,
1061         .gpio           = 0,
1062 };
1063
1064 static void cardhu_pci_init(void)
1065 {
1066         struct board_info board_info;
1067
1068         tegra_get_board_info(&board_info);
1069         if (board_info.board_id == BOARD_E1291) {
1070                 cardhu_pci_platform_data.port_status[0] = 0;
1071                 cardhu_pci_platform_data.port_status[1] = 0;
1072                 cardhu_pci_platform_data.port_status[2] = 1;
1073                 cardhu_pci_platform_data.use_dock_detect = 1;
1074                 cardhu_pci_platform_data.gpio = DOCK_DETECT_GPIO;
1075         }
1076         if ((board_info.board_id == BOARD_E1186) ||
1077                 (board_info.board_id == BOARD_E1187) ||
1078                 (board_info.board_id == BOARD_E1291)) {
1079                 tegra_pci_device.dev.platform_data = &cardhu_pci_platform_data;
1080                 platform_device_register(&tegra_pci_device);
1081         }
1082 }
1083
1084 static void cardhu_modem_init(void)
1085 {
1086         struct board_info board_info;
1087         int w_disable_gpio, ret;
1088
1089         tegra_get_board_info(&board_info);
1090         switch (board_info.board_id) {
1091         case BOARD_E1291:
1092         case BOARD_E1198:
1093                 if (((board_info.board_id == BOARD_E1291) &&
1094                                 (board_info.fab < BOARD_FAB_A03)) ||
1095                         ((board_info.board_id == BOARD_E1198) &&
1096                                         (board_info.fab < BOARD_FAB_A02))) {
1097                         w_disable_gpio = TEGRA_GPIO_PH5;
1098                 } else {
1099                         w_disable_gpio = TEGRA_GPIO_PDD5;
1100                 }
1101                 tegra_gpio_enable(w_disable_gpio);
1102                 ret = gpio_request(w_disable_gpio, "w_disable_gpio");
1103                 if (ret < 0)
1104                         pr_err("%s: gpio_request failed for gpio %d\n",
1105                                 __func__, w_disable_gpio);
1106                 else
1107                         gpio_direction_input(w_disable_gpio);
1108
1109                 /* E1291-A04 & E1198:A02: Set PERST signal to high */
1110                 if (((board_info.board_id == BOARD_E1291) &&
1111                                 (board_info.fab >= BOARD_FAB_A04)) ||
1112                         ((board_info.board_id == BOARD_E1198) &&
1113                                         (board_info.fab >= BOARD_FAB_A02))) {
1114                         ret = gpio_request(TEGRA_GPIO_PH7, "modem_perst");
1115                         if (ret < 0) {
1116                                 pr_err("%s(): Error in allocating gpio "
1117                                         "TEGRA_GPIO_PH7\n", __func__);
1118                                 break;
1119                         }
1120                         gpio_direction_output(TEGRA_GPIO_PH7, 1);
1121                         tegra_gpio_enable(TEGRA_GPIO_PH7);
1122                 }
1123                 break;
1124         case BOARD_E1186:
1125                 tegra_gpio_enable(
1126                         tegra_baseband_power_data.modem.xmm.bb_rst);
1127                 tegra_gpio_enable(
1128                         tegra_baseband_power_data.modem.xmm.bb_on);
1129                 tegra_gpio_enable(
1130                         tegra_baseband_power_data.modem.xmm.ipc_bb_wake);
1131                 tegra_gpio_enable(
1132                         tegra_baseband_power_data.modem.xmm.ipc_ap_wake);
1133                 tegra_gpio_enable(
1134                         tegra_baseband_power_data.modem.xmm.ipc_hsic_active);
1135                 tegra_gpio_enable(
1136                         tegra_baseband_power_data.modem.xmm.ipc_hsic_sus_req);
1137                 platform_device_register(&tegra_baseband_power_device);
1138                 platform_device_register(&tegra_baseband_power2_device);
1139                 break;
1140         default:
1141                 break;
1142         }
1143
1144 }
1145
1146 #ifdef CONFIG_SATA_AHCI_TEGRA
1147 static void cardhu_sata_init(void)
1148 {
1149         platform_device_register(&tegra_sata_device);
1150 }
1151 #else
1152 static void cardhu_sata_init(void) { }
1153 #endif
1154
1155 static void __init tegra_cardhu_init(void)
1156 {
1157         tegra_thermal_init(&thermal_data);
1158         tegra_clk_init_from_table(cardhu_clk_init_table);
1159         tegra_enable_pinmux();
1160         cardhu_pinmux_init();
1161         cardhu_i2c_init();
1162         cardhu_spi_init();
1163         cardhu_usb_init();
1164 #ifdef CONFIG_TEGRA_EDP_LIMITS
1165         cardhu_edp_init();
1166 #endif
1167         cardhu_uart_init();
1168         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
1169         tegra_ram_console_debug_init();
1170         cardhu_sdhci_init();
1171         cardhu_regulator_init();
1172         cardhu_dtv_init();
1173         cardhu_suspend_init();
1174         cardhu_touch_init();
1175         cardhu_gps_init();
1176         cardhu_modem_init();
1177         cardhu_kbc_init();
1178         cardhu_scroll_init();
1179         cardhu_keys_init();
1180         cardhu_panel_init();
1181         cardhu_pmon_init();
1182         cardhu_sensors_init();
1183         cardhu_setup_bluesleep();
1184         cardhu_sata_init();
1185         //audio_wired_jack_init();
1186         cardhu_pins_state_init();
1187         cardhu_emc_init();
1188         tegra_release_bootloader_fb();
1189         cardhu_nfc_init();
1190         cardhu_pci_init();
1191 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1192         tegra_wdt_recovery_init();
1193 #endif
1194 }
1195
1196 static void __init tegra_cardhu_reserve(void)
1197 {
1198 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1199         /* support 1920X1200 with 24bpp */
1200         tegra_reserve(0, SZ_8M + SZ_1M, SZ_8M + SZ_1M);
1201 #else
1202         tegra_reserve(SZ_128M, SZ_8M, SZ_8M);
1203 #endif
1204         tegra_ram_console_debug_reserve(SZ_1M);
1205 }
1206
1207 MACHINE_START(CARDHU, "cardhu")
1208         .atag_offset    = 0x100,
1209         .map_io         = tegra_map_common_io,
1210         .reserve        = tegra_cardhu_reserve,
1211         .init_early     = tegra30_init_early,
1212         .init_irq       = tegra_init_irq,
1213         .handle_irq     = gic_handle_irq,
1214         .timer          = &tegra_timer,
1215         .init_machine   = tegra_cardhu_init,
1216         .restart        = tegra_assert_system_reset,
1217 MACHINE_END