e2835e4a32e817160cd81496836c9ed27104b76c
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA Corporation.  All rights reserved.
5  * Copyright (c) 2011-2012, NVIDIA Corporation.
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along
18  * with this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
20  */
21
22 #include <linux/kernel.h>
23 #include <linux/init.h>
24 #include <linux/slab.h>
25 #include <linux/ctype.h>
26 #include <linux/platform_device.h>
27 #include <linux/clk.h>
28 #include <linux/serial_8250.h>
29 #include <linux/i2c.h>
30 #include <linux/i2c/panjit_ts.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/delay.h>
33 #include <linux/i2c-tegra.h>
34 #include <linux/gpio.h>
35 #include <linux/input.h>
36 #include <linux/platform_data/tegra_usb.h>
37 #include <linux/spi/spi.h>
38 #include <linux/i2c/atmel_mxt_ts.h>
39 #include <linux/tegra_uart.h>
40 #include <linux/memblock.h>
41 #include <linux/spi-tegra.h>
42 #include <linux/nfc/pn544.h>
43 #include <linux/rfkill-gpio.h>
44
45 #include <sound/wm8903.h>
46 #include <sound/max98095.h>
47 #include <media/tegra_dtv.h>
48
49 #include <asm/hardware/gic.h>
50
51 #include <mach/clk.h>
52 #include <mach/iomap.h>
53 #include <mach/irqs.h>
54 #include <mach/pinmux.h>
55 #include <mach/iomap.h>
56 #include <mach/io_dpd.h>
57 #include <mach/io.h>
58 #include <mach/i2s.h>
59 #include <mach/tegra_asoc_pdata.h>
60 #include <mach/tegra_wm8903_pdata.h>
61 #include <mach/usb_phy.h>
62 #include <mach/thermal.h>
63 #include <mach/pci.h>
64 #include <mach/gpio-tegra.h>
65 #include <mach/tegra_fiq_debugger.h>
66
67 #include <asm/hardware/gic.h>
68 #include <asm/mach-types.h>
69 #include <asm/mach/arch.h>
70
71 #include "board.h"
72 #include "clock.h"
73 #include "board-cardhu.h"
74 #include "board-touch.h"
75 #include "devices.h"
76 #include "gpio-names.h"
77 #include "fuse.h"
78 #include "pm.h"
79 #include "baseband-xmm-power.h"
80 #include "wdt-recovery.h"
81 #include "common.h"
82
83 static struct balanced_throttle throttle_list[] = {
84 #ifdef CONFIG_TEGRA_THERMAL_THROTTLE
85         {
86                 .id = BALANCED_THROTTLE_ID_TJ,
87                 .throt_tab_size = 10,
88                 .throt_tab = {
89                         {      0, 1000 },
90                         { 640000, 1000 },
91                         { 640000, 1000 },
92                         { 640000, 1000 },
93                         { 640000, 1000 },
94                         { 640000, 1000 },
95                         { 760000, 1000 },
96                         { 760000, 1050 },
97                         {1000000, 1050 },
98                         {1000000, 1100 },
99                 },
100         },
101 #endif
102 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
103         {
104                 .id = BALANCED_THROTTLE_ID_SKIN,
105                 .throt_tab_size = 6,
106                 .throt_tab = {
107                         { 640000, 1200 },
108                         { 640000, 1200 },
109                         { 760000, 1200 },
110                         { 760000, 1200 },
111                         {1000000, 1200 },
112                         {1000000, 1200 },
113                 },
114         },
115 #endif
116 };
117
118 /* All units are in millicelsius */
119 static struct tegra_thermal_data thermal_data = {
120         .shutdown_device_id = THERMAL_DEVICE_ID_NCT_EXT,
121         .temp_shutdown = 90000,
122
123 #if defined(CONFIG_TEGRA_EDP_LIMITS) || defined(CONFIG_TEGRA_THERMAL_THROTTLE)
124         .throttle_edp_device_id = THERMAL_DEVICE_ID_NCT_EXT,
125 #endif
126 #ifdef CONFIG_TEGRA_EDP_LIMITS
127         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
128         .hysteresis_edp = 3000,
129 #endif
130 #ifdef CONFIG_TEGRA_THERMAL_THROTTLE
131         .temp_throttle = 85000,
132         .tc1 = 0,
133         .tc2 = 1,
134         .passive_delay = 2000,
135 #endif
136 #ifdef CONFIG_TEGRA_SKIN_THROTTLE
137         .skin_device_id = THERMAL_DEVICE_ID_SKIN,
138         .temp_throttle_skin = 43000,
139         .tc1_skin = 0,
140         .tc2_skin = 1,
141         .passive_delay_skin = 5000,
142
143         .skin_temp_offset = 9793,
144         .skin_period = 1100,
145         .skin_devs_size = 2,
146         .skin_devs = {
147                 {
148                         THERMAL_DEVICE_ID_NCT_EXT,
149                         {
150                                 2, 1, 1, 1,
151                                 1, 1, 1, 1,
152                                 1, 1, 1, 0,
153                                 1, 1, 0, 0,
154                                 0, 0, -1, -7
155                         }
156                 },
157                 {
158                         THERMAL_DEVICE_ID_NCT_INT,
159                         {
160                                 -11, -7, -5, -3,
161                                 -3, -2, -1, 0,
162                                 0, 0, 1, 1,
163                                 1, 2, 2, 3,
164                                 4, 6, 11, 18
165                         }
166                 },
167         },
168 #endif
169 };
170
171 static struct rfkill_gpio_platform_data cardhu_bt_rfkill_pdata[] = {
172         {
173                 .name           = "bt_rfkill",
174                 .shutdown_gpio  = TEGRA_GPIO_PU0,
175                 .reset_gpio     = TEGRA_GPIO_INVALID,
176                 .type           = RFKILL_TYPE_BLUETOOTH,
177         },
178 };
179
180 static struct platform_device cardhu_bt_rfkill_device = {
181         .name = "rfkill_gpio",
182         .id             = -1,
183         .dev = {
184                 .platform_data = &cardhu_bt_rfkill_pdata,
185         },
186 };
187
188 static struct resource cardhu_bluesleep_resources[] = {
189         [0] = {
190                 .name = "gpio_host_wake",
191                         .start  = TEGRA_GPIO_PU6,
192                         .end    = TEGRA_GPIO_PU6,
193                         .flags  = IORESOURCE_IO,
194         },
195         [1] = {
196                 .name = "gpio_ext_wake",
197                         .start  = TEGRA_GPIO_PU1,
198                         .end    = TEGRA_GPIO_PU1,
199                         .flags  = IORESOURCE_IO,
200         },
201         [2] = {
202                 .name = "host_wake",
203                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
204         },
205 };
206
207 static struct platform_device cardhu_bluesleep_device = {
208         .name           = "bluesleep",
209         .id             = -1,
210         .num_resources  = ARRAY_SIZE(cardhu_bluesleep_resources),
211         .resource       = cardhu_bluesleep_resources,
212 };
213
214 static noinline void __init cardhu_setup_bluesleep(void)
215 {
216         cardhu_bluesleep_resources[2].start =
217                 cardhu_bluesleep_resources[2].end =
218                         gpio_to_irq(TEGRA_GPIO_PU6);
219         platform_device_register(&cardhu_bluesleep_device);
220         return;
221 }
222
223 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
224         /* name         parent          rate            enabled */
225         { "pll_m",      NULL,           0,              false},
226         { "hda",        "pll_p",        108000000,      false},
227         { "hda2codec_2x","pll_p",       48000000,       false},
228         { "pwm",        "pll_p",        3187500,        false},
229         { "blink",      "clk_32k",      32768,          true},
230         { "i2s0",       "pll_a_out0",   0,              false},
231         { "i2s1",       "pll_a_out0",   0,              false},
232         { "i2s3",       "pll_a_out0",   0,              false},
233         { "spdif_out",  "pll_a_out0",   0,              false},
234         { "d_audio",    "clk_m",        12000000,       false},
235         { "dam0",       "clk_m",        12000000,       false},
236         { "dam1",       "clk_m",        12000000,       false},
237         { "dam2",       "clk_m",        12000000,       false},
238         { "audio1",     "i2s1_sync",    0,              false},
239         { "audio3",     "i2s3_sync",    0,              false},
240         { "vi_sensor",  "pll_p",        150000000,      false},
241         { "i2c1",       "pll_p",        3200000,        false},
242         { "i2c2",       "pll_p",        3200000,        false},
243         { "i2c3",       "pll_p",        3200000,        false},
244         { "i2c4",       "pll_p",        3200000,        false},
245         { "i2c5",       "pll_p",        3200000,        false},
246         { "vi",         "pll_p",        0,              false},
247         { NULL,         NULL,           0,              0},
248 };
249
250 static struct pn544_i2c_platform_data nfc_pdata = {
251         .irq_gpio = TEGRA_GPIO_PX0,
252         .ven_gpio = TEGRA_GPIO_PP3,
253         .firm_gpio = TEGRA_GPIO_PO7,
254         };
255
256 static struct i2c_board_info __initdata cardhu_i2c_bus3_board_info[] = {
257         {
258                 I2C_BOARD_INFO("pn544", 0x28),
259                 .platform_data = &nfc_pdata,
260         },
261 };
262 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
263         .adapter_nr     = 0,
264         .bus_count      = 1,
265         .bus_clk_rate   = { 100000, 0 },
266         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
267         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
268         .arb_recovery = arb_lost_recovery,
269 };
270
271 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
272         .adapter_nr     = 1,
273         .bus_count      = 1,
274         .bus_clk_rate   = { 400000, 0 },
275         .is_clkon_always = true,
276         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
277         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
278         .arb_recovery = arb_lost_recovery,
279 };
280
281 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
282         .adapter_nr     = 2,
283         .bus_count      = 1,
284         .bus_clk_rate   = { 100000, 0 },
285         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
286         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
287         .arb_recovery = arb_lost_recovery,
288 };
289
290 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
291         .adapter_nr     = 3,
292         .bus_count      = 1,
293         .bus_clk_rate   = { 10000, 0 },
294         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
295         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
296         .arb_recovery = arb_lost_recovery,
297 };
298
299 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
300         .adapter_nr     = 4,
301         .bus_count      = 1,
302         .bus_clk_rate   = { 400000, 0 },
303         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
304         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
305         .arb_recovery = arb_lost_recovery,
306 };
307
308
309 #if 0
310 struct tegra_wired_jack_conf audio_wr_jack_conf = {
311         .hp_det_n = TEGRA_GPIO_PW2,
312         .en_mic_ext = TEGRA_GPIO_PX1,
313         .en_mic_int = TEGRA_GPIO_PX0,
314 };
315 #endif
316
317 static struct wm8903_platform_data cardhu_wm8903_pdata = {
318         .irq_active_low = 0,
319         .micdet_cfg = 0,
320         .micdet_delay = 100,
321         .gpio_base = CARDHU_GPIO_WM8903(0),
322         .gpio_cfg = {
323                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP1_FN_SHIFT),
324                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP2_FN_SHIFT) |
325                         WM8903_GP2_DIR,
326                 WM8903_GPIO_CONFIG_ZERO,
327                 0,
328                 0,
329         },
330 };
331
332 /* Equalizer filter coefs generated from the MAXIM MAX98095
333  * evkit software tool */
334 static struct max98095_eq_cfg max98095_eq_cfg[] = {
335         {
336                 .name = "FLAT",
337                 .rate = 44100,
338                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
339                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
340                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
341                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
342                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
343         },
344         {
345                 .name = "LOWPASS1K",
346                 .rate = 44100,
347                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
348                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
349                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
350                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
351                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
352         },
353         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
354                 .name = "HIBOOST",
355                 .rate = 44100,
356                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
357                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
358                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
359                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
360                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
361         },
362         { /* BASS=12dB, TREBLE=+12dB */
363                 .name = "LOUD12DB",
364                 .rate = 44100,
365                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
366                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
367                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
368                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
369                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
370         },
371         {
372                 .name = "FLAT",
373                 .rate = 16000,
374                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
375                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
376                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
377                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
378                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
379         },
380         {
381                 .name = "LOWPASS1K",
382                 .rate = 16000,
383                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
384                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
385                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
386                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
387                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
388         },
389         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
390                 .name = "HIBOOST",
391                 .rate = 16000,
392                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
393                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
394                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
395                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
396                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
397         },
398         { /* BASS=12dB, TREBLE=+12dB */
399                 .name = "LOUD12DB",
400                 .rate = 16000,
401                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
402                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
403                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
404                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
405                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
406         },
407 };
408
409 static struct max98095_pdata cardhu_max98095_pdata = {
410         /* equalizer configuration */
411         .eq_cfg = max98095_eq_cfg,
412         .eq_cfgcnt = ARRAY_SIZE(max98095_eq_cfg),
413
414         /* Biquad filter response configuration */
415         .bq_cfg = NULL,
416         .bq_cfgcnt = 0,
417
418         /* microphone configuration */
419         .digmic_left_mode = 1,
420         .digmic_right_mode = 1,
421 };
422
423 static struct i2c_board_info __initdata cardhu_codec_wm8903_info = {
424         I2C_BOARD_INFO("wm8903", 0x1a),
425         .platform_data = &cardhu_wm8903_pdata,
426 };
427
428 static struct i2c_board_info __initdata cardhu_codec_aic326x_info = {
429         I2C_BOARD_INFO("aic3262-codec", 0x18),
430 };
431
432 static struct i2c_board_info __initdata cardhu_codec_max98095_info = {
433         I2C_BOARD_INFO("max98095", 0x10),
434         .platform_data = &cardhu_max98095_pdata,
435 };
436
437 static void cardhu_i2c_init(void)
438 {
439         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
440         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
441         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
442         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
443         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
444
445         platform_device_register(&tegra_i2c_device5);
446         platform_device_register(&tegra_i2c_device4);
447         platform_device_register(&tegra_i2c_device3);
448         platform_device_register(&tegra_i2c_device2);
449         platform_device_register(&tegra_i2c_device1);
450
451         cardhu_codec_wm8903_info.irq = cardhu_codec_max98095_info.irq =
452                 cardhu_codec_aic326x_info.irq = gpio_to_irq(TEGRA_GPIO_CDC_IRQ);
453         i2c_register_board_info(4, &cardhu_codec_wm8903_info, 1);
454         i2c_register_board_info(4, &cardhu_codec_max98095_info, 1);
455         i2c_register_board_info(4, &cardhu_codec_aic326x_info, 1);
456
457         cardhu_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PX0);
458         i2c_register_board_info(2, cardhu_i2c_bus3_board_info, 1);
459 }
460
461 static struct platform_device *cardhu_uart_devices[] __initdata = {
462         &tegra_uarta_device,
463         &tegra_uartb_device,
464         &tegra_uartc_device,
465         &tegra_uartd_device,
466         &tegra_uarte_device,
467 };
468 static struct uart_clk_parent uart_parent_clk[] = {
469         [0] = {.name = "clk_m"},
470         [1] = {.name = "pll_p"},
471 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
472         [2] = {.name = "pll_m"},
473 #endif
474 };
475
476 static struct tegra_uart_platform_data cardhu_uart_pdata;
477 static struct tegra_uart_platform_data cardhu_loopback_uart_pdata;
478
479 static void __init uart_debug_init(void)
480 {
481         struct board_info board_info;
482         int debug_port_id;
483
484         tegra_get_board_info(&board_info);
485
486         debug_port_id = get_tegra_uart_debug_port_id();
487         if (debug_port_id < 0) {
488                 debug_port_id = 0;
489                         /* UARTB is debug port
490                          *       for SLT - E1186/E1187/PM269
491                          *       for E1256/E1257
492                          */
493                 if (((board_info.sku & SKU_SLT_ULPI_SUPPORT) &&
494                         ((board_info.board_id == BOARD_E1186) ||
495                         (board_info.board_id == BOARD_E1187) ||
496                         (board_info.board_id == BOARD_PM269))) ||
497                         (board_info.board_id == BOARD_E1256) ||
498                         (board_info.board_id == BOARD_E1257))
499                                 debug_port_id = 1;
500         }
501
502 #ifdef CONFIG_TEGRA_IRDA
503         if ((board_info.board_id == BOARD_E1186) ||
504                 (board_info.board_id == BOARD_E1198)) {
505                 if (debug_port_id == 1) {
506                         cardhu_irda_pdata.is_irda = false;
507                         pr_err("UARTB is not available for IrDA\n");
508                 }
509         }
510 #endif
511
512         switch (debug_port_id) {
513         case 0:
514                 /* UARTA is the debug port. */
515                 pr_info("Selecting UARTA as the debug console\n");
516                 cardhu_uart_devices[0] = &debug_uarta_device;
517                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
518                 debug_uart_port_base = ((struct plat_serial8250_port *)(
519                         debug_uarta_device.dev.platform_data))->mapbase;
520                 break;
521
522         case 1:
523                 /* UARTB is the debug port. */
524                 pr_info("Selecting UARTB as the debug console\n");
525                 cardhu_uart_devices[1] = &debug_uartb_device;
526                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartb");
527                 debug_uart_port_base = ((struct plat_serial8250_port *)(
528                         debug_uartb_device.dev.platform_data))->mapbase;
529                 break;
530
531         case 2:
532                 /* UARTC is the debug port. */
533                 pr_info("Selecting UARTC as the debug console\n");
534                 cardhu_uart_devices[2] = &debug_uartc_device;
535                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartc");
536                 debug_uart_port_base = ((struct plat_serial8250_port *)(
537                         debug_uartc_device.dev.platform_data))->mapbase;
538                 break;
539
540         case 3:
541                 /* UARTD is the debug port. */
542                 pr_info("Selecting UARTD as the debug console\n");
543                 cardhu_uart_devices[3] = &debug_uartd_device;
544                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartd");
545                 debug_uart_port_base = ((struct plat_serial8250_port *)(
546                         debug_uartd_device.dev.platform_data))->mapbase;
547                 break;
548
549         case 4:
550                 /* UARTE is the debug port. */
551                 pr_info("Selecting UARTE as the debug console\n");
552                 cardhu_uart_devices[4] = &debug_uarte_device;
553                 debug_uart_clk =  clk_get_sys("serial8250.0", "uarte");
554                 debug_uart_port_base = ((struct plat_serial8250_port *)(
555                         debug_uarte_device.dev.platform_data))->mapbase;
556                 break;
557
558         default:
559                 pr_info("The debug console id %d is invalid, Assuming UARTA", debug_port_id);
560                 cardhu_uart_devices[0] = &debug_uarta_device;
561                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
562                 debug_uart_port_base = ((struct plat_serial8250_port *)(
563                         debug_uarta_device.dev.platform_data))->mapbase;
564                 break;
565         }
566         return;
567 }
568
569 static void __init cardhu_uart_init(void)
570 {
571         struct clk *c;
572         int i;
573         struct board_info board_info;
574
575         tegra_get_board_info(&board_info);
576
577         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
578                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
579                 if (IS_ERR_OR_NULL(c)) {
580                         pr_err("Not able to get the clock for %s\n",
581                                                 uart_parent_clk[i].name);
582                         continue;
583                 }
584                 uart_parent_clk[i].parent_clk = c;
585                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
586         }
587         cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
588         cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
589         cardhu_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
590         cardhu_loopback_uart_pdata.parent_clk_count =
591                                                 ARRAY_SIZE(uart_parent_clk);
592         cardhu_loopback_uart_pdata.is_loopback = true;
593         tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
594         tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
595         tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
596         tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
597         /* UARTE is used for loopback test purpose */
598         tegra_uarte_device.dev.platform_data = &cardhu_loopback_uart_pdata;
599
600         /* Register low speed only if it is selected */
601         if (!is_tegra_debug_uartport_hs()) {
602                 uart_debug_init();
603                 /* Clock enable for the debug channel */
604                 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
605                         pr_info("The debug console clock name is %s\n",
606                                                 debug_uart_clk->name);
607                         c = tegra_get_clock_by_name("pll_p");
608                         if (IS_ERR_OR_NULL(c))
609                                 pr_err("Not getting the parent clock pll_p\n");
610                         else
611                                 clk_set_parent(debug_uart_clk, c);
612
613                         clk_enable(debug_uart_clk);
614                         clk_set_rate(debug_uart_clk, clk_get_rate(c));
615                 } else {
616                         pr_err("Not getting the clock %s for debug console\n",
617                                         debug_uart_clk->name);
618                 }
619         }
620
621 #ifdef CONFIG_TEGRA_IRDA
622         if (((board_info.board_id == BOARD_E1186) ||
623                 (board_info.board_id == BOARD_E1198)) &&
624                         cardhu_irda_pdata.is_irda) {
625                 cardhu_irda_pdata.parent_clk_list = uart_parent_clk;
626                 cardhu_irda_pdata.parent_clk_count =
627                                         ARRAY_SIZE(uart_parent_clk);
628
629                 tegra_uartb_device.dev.platform_data = &cardhu_irda_pdata;
630         }
631 #endif
632
633         platform_add_devices(cardhu_uart_devices,
634                                 ARRAY_SIZE(cardhu_uart_devices));
635 }
636
637 static struct platform_device tegra_camera = {
638         .name = "tegra_camera",
639         .id = -1,
640 };
641
642 static struct platform_device *cardhu_spi_devices[] __initdata = {
643         &tegra_spi_device4,
644 };
645
646 static struct platform_device *touch_spi_device[] __initdata = {
647         &tegra_spi_device1,
648 };
649
650 struct spi_clk_parent spi_parent_clk[] = {
651         [0] = {.name = "pll_p"},
652 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
653         [1] = {.name = "pll_m"},
654         [2] = {.name = "clk_m"},
655 #else
656         [1] = {.name = "clk_m"},
657 #endif
658 };
659
660 static struct tegra_spi_platform_data cardhu_spi_pdata = {
661         .is_dma_based           = true,
662         .max_dma_buffer         = (16 * 1024),
663         .is_clkon_always        = false,
664         .max_rate               = 100000000,
665 };
666
667 static void __init cardhu_spi_init(void)
668 {
669         int i;
670         struct clk *c;
671         struct board_info board_info, display_board_info;
672
673         tegra_get_board_info(&board_info);
674         tegra_get_display_board_info(&display_board_info);
675
676         for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
677                 c = tegra_get_clock_by_name(spi_parent_clk[i].name);
678                 if (IS_ERR_OR_NULL(c)) {
679                         pr_err("Not able to get the clock for %s\n",
680                                                 spi_parent_clk[i].name);
681                         continue;
682                 }
683                 spi_parent_clk[i].parent_clk = c;
684                 spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
685         }
686         cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
687         cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
688         tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
689         platform_add_devices(cardhu_spi_devices,
690                                 ARRAY_SIZE(cardhu_spi_devices));
691
692         if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
693                 platform_add_devices(touch_spi_device,
694                                 ARRAY_SIZE(touch_spi_device));
695         }
696         if (board_info.board_id == BOARD_E1198) {
697                 tegra_spi_device2.dev.platform_data = &cardhu_spi_pdata;
698                 platform_device_register(&tegra_spi_device2);
699                 tegra_spi_slave_device1.dev.platform_data = &cardhu_spi_pdata;
700                 platform_device_register(&tegra_spi_slave_device1);
701         }
702 }
703
704 static void __init cardhu_dtv_init(void)
705 {
706         struct board_info board_info;
707
708         tegra_get_board_info(&board_info);
709
710         if (board_info.board_id == BOARD_E1186)
711                 platform_device_register(&tegra_dtv_device);
712 }
713
714 static struct resource tegra_rtc_resources[] = {
715         [0] = {
716                 .start = TEGRA_RTC_BASE,
717                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
718                 .flags = IORESOURCE_MEM,
719         },
720         [1] = {
721                 .start = INT_RTC,
722                 .end = INT_RTC,
723                 .flags = IORESOURCE_IRQ,
724         },
725 };
726
727 static struct platform_device tegra_rtc_device = {
728         .name = "tegra_rtc",
729         .id   = -1,
730         .resource = tegra_rtc_resources,
731         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
732 };
733
734 static struct tegra_asoc_platform_data cardhu_audio_wm8903_pdata = {
735         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
736         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
737         .gpio_hp_mute           = -1,
738         .gpio_int_mic_en        = -1,
739         .gpio_ext_mic_en        = -1,
740         .i2s_param[HIFI_CODEC]  = {
741                 .audio_port_id  = 0,
742                 .is_i2s_master  = 1,
743                 .i2s_mode       = TEGRA_DAIFMT_I2S,
744         },
745         .i2s_param[BASEBAND]    = {
746                 .audio_port_id  = -1,
747         },
748         .i2s_param[BT_SCO]      = {
749                 .audio_port_id  = 3,
750                 .is_i2s_master  = 1,
751                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
752         },
753 };
754
755 static struct tegra_asoc_platform_data cardhu_audio_max98095_pdata = {
756         .gpio_spkr_en           = -1,
757         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
758         .gpio_hp_mute           = -1,
759         .gpio_int_mic_en        = -1,
760         .gpio_ext_mic_en        = -1,
761         .i2s_param[HIFI_CODEC]  = {
762                 .audio_port_id  = 0,
763                 .is_i2s_master  = 1,
764                 .i2s_mode       = TEGRA_DAIFMT_I2S,
765         },
766         .i2s_param[BASEBAND]    = {
767                 .audio_port_id  = -1,
768         },
769         .i2s_param[BT_SCO]      = {
770                 .audio_port_id  = 3,
771                 .is_i2s_master  = 1,
772                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
773         },
774 };
775
776 static struct platform_device cardhu_audio_wm8903_device = {
777         .name   = "tegra-snd-wm8903",
778         .id     = 0,
779         .dev    = {
780                 .platform_data = &cardhu_audio_wm8903_pdata,
781         },
782 };
783
784 static struct platform_device cardhu_audio_max98095_device = {
785         .name   = "tegra-snd-max98095",
786         .id     = 0,
787         .dev    = {
788                 .platform_data = &cardhu_audio_max98095_pdata,
789         },
790 };
791
792 static struct tegra_asoc_platform_data cardhu_audio_aic326x_pdata = {
793         .gpio_spkr_en           = -1,
794         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
795         .gpio_hp_mute           = -1,
796         .gpio_int_mic_en        = -1,
797         .gpio_ext_mic_en        = -1,
798         /*defaults for Verbier-Cardhu board with TI AIC326X codec*/
799         .i2s_param[HIFI_CODEC]  = {
800                 .audio_port_id  = 0,
801                 .is_i2s_master  = 1,
802                 .i2s_mode       = TEGRA_DAIFMT_I2S,
803                 .sample_size    = 16,
804         },
805         .i2s_param[BT_SCO]      = {
806                 .sample_size    = 16,
807                 .audio_port_id  = 3,
808                 .is_i2s_master  = 1,
809                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
810         },
811 };
812
813 static struct platform_device cardhu_audio_aic326x_device = {
814         .name   = "tegra-snd-aic326x",
815         .id     = 0,
816         .dev    = {
817                 .platform_data  = &cardhu_audio_aic326x_pdata,
818         },
819 };
820
821 static struct platform_device *cardhu_devices[] __initdata = {
822         &tegra_pmu_device,
823         &tegra_rtc_device,
824         &tegra_udc_device,
825         &tegra_wdt0_device,
826         &tegra_wdt1_device,
827         &tegra_wdt2_device,
828 #if defined(CONFIG_TEGRA_AVP)
829         &tegra_avp_device,
830 #endif
831         &tegra_camera,
832 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
833         &tegra_se_device,
834 #endif
835         &tegra_ahub_device,
836         &tegra_dam_device0,
837         &tegra_dam_device1,
838         &tegra_dam_device2,
839         &tegra_i2s_device0,
840         &tegra_i2s_device1,
841         &tegra_i2s_device3,
842         &tegra_spdif_device,
843         &spdif_dit_device,
844         &bluetooth_dit_device,
845         &baseband_dit_device,
846         &cardhu_bt_rfkill_device,
847         &tegra_pcm_device,
848         &cardhu_audio_wm8903_device,
849         &cardhu_audio_max98095_device,
850         &cardhu_audio_aic326x_device,
851         &tegra_hda_device,
852         &tegra_cec_device,
853 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
854         &tegra_aes_device,
855 #endif
856 };
857
858 #define E1506_MXT_CONFIG_CRC 0x62F903
859 static const u8 e1506_config[] = {
860         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
861         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x05, 0x01, 0x00,
862         0x00, 0x1E, 0x0A, 0x8B, 0x00, 0x00, 0x13, 0x0B,
863         0x00, 0x10, 0x32, 0x03, 0x03, 0x00, 0x03, 0x01,
864         0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xBF, 0x03, 0x1B,
865         0x02, 0x00, 0x00, 0x37, 0x37, 0x00, 0x00, 0x00,
866         0x00, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
867         0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
868         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
869         0x00, 0x00, 0x00, 0xA9, 0x7F, 0x9A, 0x0E, 0x00,
870         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
871         0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00,
872         0x00, 0x00, 0x03, 0x23, 0x00, 0x00, 0x00, 0x0A,
873         0x0F, 0x14, 0x19, 0x03, 0x00, 0x00, 0x00, 0x00,
874         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
875         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
876         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
877         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
878         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
879         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
880         0x00, 0x00, 0x00, 0x01, 0x00, 0x03, 0x08, 0x10,
881         0x00
882 };
883
884 #define MXT_CONFIG_CRC  0xD62DE8
885 static const u8 config[] = {
886         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
887         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
888         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
889         0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
890         0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
891         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
892         0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
893         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
894         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
895         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
896         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
897         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
898         0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
899         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
900         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
901         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
902         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
903         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
904         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
905         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
906 };
907
908 #define MXT_CONFIG_CRC_SKU2000  0xA24D9A
909 static const u8 config_sku2000[] = {
910         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
911         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
912         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
913         0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00,  //23=thr  2 di
914         0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
915         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
916         0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00,  //0A=limit
917         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
918         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
919         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
920         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
921         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
922         0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
923         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
924         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
925         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
926         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
927         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
928         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
929         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
930 };
931
932 static struct mxt_platform_data atmel_mxt_info = {
933         .x_line         = 27,
934         .y_line         = 42,
935         .x_size         = 768,
936         .y_size         = 1366,
937         .blen           = 0x20,
938         .threshold      = 0x3C,
939         .voltage        = 3300000,              /* 3.3V */
940         .orient         = 5,
941         .config         = config,
942         .config_length  = 157,
943         .config_crc     = MXT_CONFIG_CRC,
944         .irqflags       = IRQF_TRIGGER_FALLING,
945 /*      .read_chg       = &read_chg, */
946         .read_chg       = NULL,
947 };
948
949 static struct mxt_platform_data e1506_atmel_mxt_info = {
950         .x_line         = 19,
951         .y_line         = 11,
952         .x_size         = 960,
953         .y_size         = 540,
954         .blen           = 0x10,
955         .threshold      = 0x32,
956         .voltage        = 3300000,              /* 3.3V */
957         .orient         = 3,
958         .config         = e1506_config,
959         .config_length  = 168,
960         .config_crc     = E1506_MXT_CONFIG_CRC,
961         .irqflags       = IRQF_TRIGGER_FALLING,
962 /*      .read_chg       = &read_chg, */
963         .read_chg       = NULL,
964 };
965
966 static struct i2c_board_info __initdata atmel_i2c_info[] = {
967         {
968                 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
969                 .platform_data = &atmel_mxt_info,
970         }
971 };
972
973 static struct i2c_board_info __initdata e1506_atmel_i2c_info[] = {
974         {
975                 I2C_BOARD_INFO("atmel_mxt_ts", 0x4A),
976                 .platform_data = &e1506_atmel_mxt_info,
977         }
978 };
979
980 static __initdata struct tegra_clk_init_table spi_clk_init_table[] = {
981         /* name         parent          rate            enabled */
982         { "sbc1",       "pll_p",        52000000,       true},
983         { NULL,         NULL,           0,              0},
984 };
985
986 static int __init cardhu_touch_init(void)
987 {
988         struct board_info BoardInfo, DisplayBoardInfo;
989
990         tegra_get_board_info(&BoardInfo);
991         tegra_get_display_board_info(&DisplayBoardInfo);
992         if (DisplayBoardInfo.board_id == BOARD_DISPLAY_PM313) {
993                 tegra_clk_init_from_table(spi_clk_init_table);
994
995                 touch_init_raydium(TEGRA_GPIO_PH4, TEGRA_GPIO_PH6, 2);
996         } else {
997                 gpio_request(TEGRA_GPIO_PH4, "atmel-irq");
998                 gpio_direction_input(TEGRA_GPIO_PH4);
999
1000                 gpio_request(TEGRA_GPIO_PH6, "atmel-reset");
1001                 gpio_direction_output(TEGRA_GPIO_PH6, 0);
1002                 msleep(1);
1003                 gpio_set_value(TEGRA_GPIO_PH6, 1);
1004                 msleep(100);
1005
1006                 if ((BoardInfo.sku & SKU_TOUCH_MASK) == SKU_TOUCH_2000) {
1007                         atmel_mxt_info.config = config_sku2000;
1008                         atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
1009                 }
1010
1011                 if (DisplayBoardInfo.board_id == BOARD_DISPLAY_E1506) {
1012                         e1506_atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH4);
1013                         i2c_register_board_info(1, e1506_atmel_i2c_info, 1);
1014                 } else {
1015                         atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH4);
1016                         i2c_register_board_info(1, atmel_i2c_info, 1);
1017                 }
1018         }
1019
1020         return 0;
1021 }
1022
1023 #if defined(CONFIG_USB_SUPPORT)
1024
1025 static void cardu_usb_hsic_postsupend(void)
1026 {
1027 #ifdef CONFIG_TEGRA_BB_XMM_POWER
1028         baseband_xmm_set_power_status(BBXMM_PS_L2);
1029 #endif
1030 }
1031
1032 static void cardu_usb_hsic_preresume(void)
1033 {
1034 #ifdef CONFIG_TEGRA_BB_XMM_POWER
1035         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
1036 #endif
1037 }
1038
1039 static void cardu_usb_hsic_phy_ready(void)
1040 {
1041 #ifdef CONFIG_TEGRA_BB_XMM_POWER
1042         baseband_xmm_set_power_status(BBXMM_PS_L0);
1043 #endif
1044 }
1045
1046 static void cardu_usb_hsic_phy_off(void)
1047 {
1048 #ifdef CONFIG_TEGRA_BB_XMM_POWER
1049         baseband_xmm_set_power_status(BBXMM_PS_L3);
1050 #endif
1051 }
1052
1053 static struct tegra_usb_phy_platform_ops hsic_xmm_plat_ops = {
1054         .post_suspend = cardu_usb_hsic_postsupend,
1055         .pre_resume = cardu_usb_hsic_preresume,
1056         .port_power = cardu_usb_hsic_phy_ready,
1057         .post_phy_off = cardu_usb_hsic_phy_off,
1058 };
1059
1060 static struct tegra_usb_platform_data tegra_ehci2_hsic_xmm_pdata = {
1061         .port_otg = false,
1062         .has_hostpc = true,
1063         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
1064         .op_mode        = TEGRA_USB_OPMODE_HOST,
1065         .u_data.host = {
1066                 .vbus_gpio = -1,
1067                 .hot_plug = false,
1068                 .remote_wakeup_supported = false,
1069                 .power_off_on_suspend = false,
1070         },
1071         .ops = &hsic_xmm_plat_ops,
1072 };
1073 #endif
1074
1075 static int hsic_enable_gpio = -1;
1076 static int hsic_reset_gpio = -1;
1077
1078 void hsic_platform_open(void)
1079 {
1080         int reset_gpio = 0, enable_gpio = 0;
1081
1082         if (hsic_enable_gpio != -1)
1083                 enable_gpio = gpio_request(hsic_enable_gpio, "uhsic_enable");
1084         if (hsic_reset_gpio != -1)
1085                 reset_gpio = gpio_request(hsic_reset_gpio, "uhsic_reset");
1086         /* hsic enable signal deasserted, hsic reset asserted */
1087         if (!enable_gpio)
1088                 gpio_direction_output(hsic_enable_gpio, 0 /* deasserted */);
1089         if (!reset_gpio)
1090                 gpio_direction_output(hsic_reset_gpio, 0 /* asserted */);
1091         /* keep hsic reset asserted for 1 ms */
1092         udelay(1000);
1093         /* enable (power on) hsic */
1094         if (!enable_gpio)
1095                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
1096         udelay(1000);
1097         /* deassert reset */
1098         if (!reset_gpio)
1099                 gpio_set_value_cansleep(hsic_reset_gpio, 1);
1100
1101 }
1102
1103 void hsic_platform_close(void)
1104 {
1105         if (hsic_enable_gpio != -1) {
1106                 gpio_set_value(hsic_enable_gpio, 0);
1107                 gpio_free(hsic_enable_gpio);
1108         }
1109         if (hsic_reset_gpio != -1) {
1110                 gpio_set_value(hsic_reset_gpio, 0);
1111                 gpio_free(hsic_reset_gpio);
1112         }
1113 }
1114
1115 void hsic_power_on(void)
1116 {
1117         if (hsic_enable_gpio != -1) {
1118                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
1119                 udelay(1000);
1120         }
1121 }
1122
1123 void hsic_power_off(void)
1124 {
1125         if (hsic_enable_gpio != -1) {
1126                 gpio_set_value_cansleep(hsic_enable_gpio, 0);
1127                 udelay(1000);
1128         }
1129 }
1130
1131 #if defined(CONFIG_USB_SUPPORT)
1132 static struct tegra_usb_phy_platform_ops hsic_plat_ops = {
1133         .open = hsic_platform_open,
1134         .close = hsic_platform_close,
1135         .pre_phy_on = hsic_power_on,
1136         .post_phy_off = hsic_power_off,
1137 };
1138
1139 static struct tegra_usb_platform_data tegra_ehci2_hsic_pdata = {
1140         .port_otg = false,
1141         .has_hostpc = true,
1142         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
1143         .op_mode        = TEGRA_USB_OPMODE_HOST,
1144         .u_data.host = {
1145                 .vbus_gpio = -1,
1146                 .hot_plug = false,
1147                 .remote_wakeup_supported = false,
1148                 .power_off_on_suspend = false,
1149         },
1150         .ops = &hsic_plat_ops,
1151 };
1152
1153 static struct tegra_usb_platform_data tegra_udc_pdata = {
1154         .port_otg = true,
1155         .has_hostpc = true,
1156         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1157         .op_mode = TEGRA_USB_OPMODE_DEVICE,
1158         .u_data.dev = {
1159                 .vbus_pmu_irq = 0,
1160                 .vbus_gpio = -1,
1161                 .charging_supported = false,
1162                 .remote_wakeup_supported = false,
1163         },
1164         .u_cfg.utmi = {
1165                 .hssync_start_delay = 0,
1166                 .elastic_limit = 16,
1167                 .idle_wait_delay = 17,
1168                 .term_range_adj = 6,
1169                 .xcvr_setup = 8,
1170                 .xcvr_lsfslew = 2,
1171                 .xcvr_lsrslew = 2,
1172                 .xcvr_setup_offset = 0,
1173                 .xcvr_use_fuses = 1,
1174         },
1175 };
1176
1177 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
1178         .port_otg = false,
1179         .has_hostpc = true,
1180         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1181         .op_mode        = TEGRA_USB_OPMODE_HOST,
1182         .u_data.host = {
1183                 .vbus_gpio = -1,
1184                 .hot_plug = false,
1185                 .remote_wakeup_supported = true,
1186                 .power_off_on_suspend = true,
1187         },
1188         .u_cfg.utmi = {
1189                 .hssync_start_delay = 0,
1190                 .elastic_limit = 16,
1191                 .idle_wait_delay = 17,
1192                 .term_range_adj = 6,
1193                 .xcvr_setup = 15,
1194                 .xcvr_lsfslew = 2,
1195                 .xcvr_lsrslew = 2,
1196                 .xcvr_setup_offset = 0,
1197                 .xcvr_use_fuses = 1,
1198         },
1199 };
1200
1201 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
1202         .port_otg = false,
1203         .has_hostpc = true,
1204         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1205         .op_mode = TEGRA_USB_OPMODE_HOST,
1206         .u_data.host = {
1207                 .vbus_gpio = -1,
1208                 .vbus_reg = "vdd_vbus_typea_usb",
1209                 .hot_plug = true,
1210                 .remote_wakeup_supported = true,
1211                 .power_off_on_suspend = true,
1212         },
1213         .u_cfg.utmi = {
1214                 .hssync_start_delay = 0,
1215                 .elastic_limit = 16,
1216                 .idle_wait_delay = 17,
1217                 .term_range_adj = 6,
1218                 .xcvr_setup = 8,
1219                 .xcvr_lsfslew = 2,
1220                 .xcvr_lsrslew = 2,
1221                 .xcvr_setup_offset = 0,
1222                 .xcvr_use_fuses = 1,
1223         },
1224 };
1225
1226 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
1227         .port_otg = true,
1228         .has_hostpc = true,
1229         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1230         .op_mode = TEGRA_USB_OPMODE_HOST,
1231         .u_data.host = {
1232                 .vbus_gpio = -1,
1233                 .vbus_reg = "vdd_vbus_micro_usb",
1234                 .hot_plug = true,
1235                 .remote_wakeup_supported = true,
1236                 .power_off_on_suspend = true,
1237         },
1238         .u_cfg.utmi = {
1239                 .hssync_start_delay = 0,
1240                 .elastic_limit = 16,
1241                 .idle_wait_delay = 17,
1242                 .term_range_adj = 6,
1243                 .xcvr_setup = 15,
1244                 .xcvr_lsfslew = 2,
1245                 .xcvr_lsrslew = 2,
1246                 .xcvr_setup_offset = 0,
1247                 .xcvr_use_fuses = 1,
1248         },
1249 };
1250
1251 static struct tegra_usb_otg_data tegra_otg_pdata = {
1252         .ehci_device = &tegra_ehci1_device,
1253         .ehci_pdata = &tegra_ehci1_utmi_pdata,
1254 };
1255 #endif
1256
1257 #if defined(CONFIG_USB_SUPPORT)
1258 static void cardhu_usb_init(void)
1259 {
1260         struct board_info bi;
1261
1262         tegra_get_board_info(&bi);
1263
1264         /* OTG should be the first to be registered */
1265         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1266         platform_device_register(&tegra_otg_device);
1267
1268         /* setup the udc platform data */
1269         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1270
1271         if (bi.board_id == BOARD_PM267) {
1272                 hsic_enable_gpio = EN_HSIC_GPIO;
1273                 hsic_reset_gpio = PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
1274                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1275                 platform_device_register(&tegra_ehci2_device);
1276         } else if (bi.board_id == BOARD_E1256) {
1277                 hsic_enable_gpio = EN_HSIC_GPIO;
1278                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1279                 platform_device_register(&tegra_ehci2_device);
1280         } else if (bi.board_id == BOARD_E1186) {
1281                 tegra_ehci2_device.dev.platform_data =
1282                                                 &tegra_ehci2_hsic_xmm_pdata;
1283                 /* ehci2 registration happens in baseband-xmm-power  */
1284         } else {
1285                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_utmi_pdata;
1286                 platform_device_register(&tegra_ehci2_device);
1287         }
1288
1289         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
1290         platform_device_register(&tegra_ehci3_device);
1291
1292 }
1293 #else
1294 static void cardhu_usb_init(void) { }
1295 #endif
1296
1297 static struct baseband_power_platform_data tegra_baseband_power_data = {
1298         .baseband_type = BASEBAND_XMM,
1299         .modem = {
1300         .xmm = {
1301                         .bb_rst = XMM_GPIO_BB_RST,
1302                         .bb_on = XMM_GPIO_BB_ON,
1303                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1304                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1305                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1306                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1307                         .hsic_device = &tegra_ehci2_device,
1308                 },
1309         },
1310 };
1311
1312 static struct platform_device tegra_baseband_power_device = {
1313         .name = "baseband_xmm_power",
1314         .id = -1,
1315         .dev = {
1316                 .platform_data = &tegra_baseband_power_data,
1317         },
1318 };
1319
1320 static struct platform_device tegra_baseband_power2_device = {
1321         .name = "baseband_xmm_power2",
1322         .id = -1,
1323         .dev = {
1324                 .platform_data = &tegra_baseband_power_data,
1325         },
1326 };
1327
1328
1329 static struct tegra_pci_platform_data cardhu_pci_platform_data = {
1330         .port_status[0] = 1,
1331         .port_status[1] = 1,
1332         .port_status[2] = 1,
1333         .use_dock_detect        = 0,
1334         .gpio           = 0,
1335 };
1336
1337 static void cardhu_pci_init(void)
1338 {
1339         struct board_info board_info;
1340
1341         tegra_get_board_info(&board_info);
1342         if (board_info.board_id == BOARD_E1291) {
1343                 cardhu_pci_platform_data.port_status[0] = 0;
1344                 cardhu_pci_platform_data.port_status[1] = 0;
1345                 cardhu_pci_platform_data.port_status[2] = 1;
1346                 cardhu_pci_platform_data.use_dock_detect = 1;
1347                 cardhu_pci_platform_data.gpio = DOCK_DETECT_GPIO;
1348         }
1349         if ((board_info.board_id == BOARD_E1186) ||
1350                 (board_info.board_id == BOARD_E1187) ||
1351                 (board_info.board_id == BOARD_E1291)) {
1352                 tegra_pci_device.dev.platform_data = &cardhu_pci_platform_data;
1353                 platform_device_register(&tegra_pci_device);
1354         }
1355 }
1356
1357 static void cardhu_modem_init(void)
1358 {
1359         struct board_info board_info;
1360         int w_disable_gpio, ret;
1361
1362         tegra_get_board_info(&board_info);
1363         switch (board_info.board_id) {
1364         case BOARD_E1291:
1365         case BOARD_E1198:
1366                 if (((board_info.board_id == BOARD_E1291) &&
1367                                 (board_info.fab < BOARD_FAB_A03)) ||
1368                         ((board_info.board_id == BOARD_E1198) &&
1369                                         (board_info.fab < BOARD_FAB_A02))) {
1370                         w_disable_gpio = TEGRA_GPIO_PH5;
1371                 } else {
1372                         w_disable_gpio = TEGRA_GPIO_PDD5;
1373                 }
1374
1375                 ret = gpio_request(w_disable_gpio, "w_disable_gpio");
1376                 if (ret < 0)
1377                         pr_err("%s: gpio_request failed for gpio %d\n",
1378                                 __func__, w_disable_gpio);
1379                 else
1380                         gpio_direction_input(w_disable_gpio);
1381
1382                 /* E1291-A04 & E1198:A02: Set PERST signal to high */
1383                 if (((board_info.board_id == BOARD_E1291) &&
1384                                 (board_info.fab >= BOARD_FAB_A04)) ||
1385                         ((board_info.board_id == BOARD_E1198) &&
1386                                         (board_info.fab >= BOARD_FAB_A02))) {
1387                         ret = gpio_request(TEGRA_GPIO_PH7, "modem_perst");
1388                         if (ret < 0) {
1389                                 pr_err("%s(): Error in allocating gpio "
1390                                         "TEGRA_GPIO_PH7\n", __func__);
1391                                 break;
1392                         }
1393                         gpio_direction_output(TEGRA_GPIO_PH7, 1);
1394                 }
1395                 break;
1396         case BOARD_E1186:
1397                 platform_device_register(&tegra_baseband_power_device);
1398                 platform_device_register(&tegra_baseband_power2_device);
1399                 break;
1400         default:
1401                 break;
1402         }
1403
1404 }
1405
1406 #ifdef CONFIG_SATA_AHCI_TEGRA
1407 static void cardhu_sata_init(void)
1408 {
1409         platform_device_register(&tegra_sata_device);
1410 }
1411 #else
1412 static void cardhu_sata_init(void) { }
1413 #endif
1414
1415 static void __init tegra_cardhu_init(void)
1416 {
1417         tegra_thermal_init(&thermal_data,
1418                                 throttle_list,
1419                                 ARRAY_SIZE(throttle_list));
1420         tegra_clk_init_from_table(cardhu_clk_init_table);
1421         tegra_enable_pinmux();
1422         tegra_smmu_init();
1423         cardhu_pinmux_init();
1424         cardhu_i2c_init();
1425         cardhu_spi_init();
1426         cardhu_usb_init();
1427 #ifdef CONFIG_TEGRA_EDP_LIMITS
1428         cardhu_edp_init();
1429 #endif
1430         cardhu_uart_init();
1431         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
1432         tegra_ram_console_debug_init();
1433         tegra_io_dpd_init();
1434         cardhu_sdhci_init();
1435         cardhu_regulator_init();
1436         cardhu_dtv_init();
1437         cardhu_suspend_init();
1438         cardhu_touch_init();
1439         cardhu_modem_init();
1440         cardhu_kbc_init();
1441         cardhu_scroll_init();
1442         cardhu_keys_init();
1443         cardhu_panel_init();
1444         cardhu_pmon_init();
1445         cardhu_sensors_init();
1446         cardhu_setup_bluesleep();
1447         cardhu_sata_init();
1448         //audio_wired_jack_init();
1449         cardhu_pins_state_init();
1450         cardhu_emc_init();
1451         tegra_release_bootloader_fb();
1452         cardhu_pci_init();
1453 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1454         tegra_wdt_recovery_init();
1455 #endif
1456         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1457 }
1458
1459 static void __init tegra_cardhu_reserve(void)
1460 {
1461 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1462         /* support 1920X1200 with 24bpp */
1463         tegra_reserve(0, SZ_8M + SZ_1M, SZ_8M + SZ_1M);
1464 #else
1465         tegra_reserve(SZ_128M, SZ_8M, SZ_8M);
1466 #endif
1467         tegra_ram_console_debug_reserve(SZ_1M);
1468 }
1469
1470 static const char *cardhu_dt_board_compat[] = {
1471         "nvidia,cardhu",
1472         NULL
1473 };
1474
1475 MACHINE_START(CARDHU, "cardhu")
1476         .atag_offset    = 0x100,
1477         .soc            = &tegra_soc_desc,
1478         .map_io         = tegra_map_common_io,
1479         .reserve        = tegra_cardhu_reserve,
1480         .init_early     = tegra30_init_early,
1481         .init_irq       = tegra_init_irq,
1482         .handle_irq     = gic_handle_irq,
1483         .timer          = &tegra_timer,
1484         .init_machine   = tegra_cardhu_init,
1485         .restart        = tegra_assert_system_reset,
1486         .dt_compat      = cardhu_dt_board_compat,
1487 MACHINE_END