arm: tegra: power: Tegra Thermal refactoring
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <linux/spi/spi.h>
37 #include <linux/i2c/atmel_mxt_ts.h>
38 #include <linux/tegra_uart.h>
39 #include <linux/spi-tegra.h>
40
41 #include <sound/wm8903.h>
42
43 #include <mach/clk.h>
44 #include <mach/iomap.h>
45 #include <mach/irqs.h>
46 #include <mach/pinmux.h>
47 #include <mach/iomap.h>
48 #include <mach/io.h>
49 #include <mach/i2s.h>
50 #include <mach/tegra_wm8903_pdata.h>
51 #include <asm/mach-types.h>
52 #include <asm/mach/arch.h>
53 #include <mach/usb_phy.h>
54 #include <linux/nfc/pn544.h>
55 #include <mach/thermal.h>
56
57 #include "board.h"
58 #include "clock.h"
59 #include "board-cardhu.h"
60 #include "devices.h"
61 #include "gpio-names.h"
62 #include "fuse.h"
63 #include "pm.h"
64 #include "baseband-xmm-power.h"
65
66 /* All units are in millicelsius */
67 static struct tegra_thermal_data thermal_data = {
68         .temp_throttle = 85000,
69         .temp_shutdown = 90000,
70         .temp_offset = TDIODE_OFFSET, /* temps based on tdiode */
71         .edp_offset = TDIODE_OFFSET,  /* edp based on tdiode */
72 #ifndef CONFIG_TEGRA_THERMAL_SYSFS
73         .hysteresis_throttle = 1000,
74 #endif
75         .hysteresis_edp = 3000,
76 };
77
78 /* !!!TODO: Change for cardhu (Taken from Ventana) */
79 static struct tegra_utmip_config utmi_phy_config[] = {
80         [0] = {
81                         .hssync_start_delay = 0,
82                         .idle_wait_delay = 17,
83                         .elastic_limit = 16,
84                         .term_range_adj = 6,
85                         .xcvr_setup = 15,
86                         .xcvr_setup_offset = 0,
87                         .xcvr_use_fuses = 1,
88                         .xcvr_lsfslew = 2,
89                         .xcvr_lsrslew = 2,
90         },
91         [1] = {
92                         .hssync_start_delay = 0,
93                         .idle_wait_delay = 17,
94                         .elastic_limit = 16,
95                         .term_range_adj = 6,
96                         .xcvr_setup = 15,
97                         .xcvr_setup_offset = 0,
98                         .xcvr_use_fuses = 1,
99                         .xcvr_lsfslew = 2,
100                         .xcvr_lsrslew = 2,
101         },
102         [2] = {
103                         .hssync_start_delay = 0,
104                         .idle_wait_delay = 17,
105                         .elastic_limit = 16,
106                         .term_range_adj = 6,
107                         .xcvr_setup = 8,
108                         .xcvr_setup_offset = 0,
109                         .xcvr_use_fuses = 1,
110                         .xcvr_lsfslew = 2,
111                         .xcvr_lsrslew = 2,
112         },
113 };
114
115 #ifdef CONFIG_BCM4329_RFKILL
116 static struct resource cardhu_bcm4329_rfkill_resources[] = {
117         {
118                 .name   = "bcm4329_nshutdown_gpio",
119                 .start  = TEGRA_GPIO_PU0,
120                 .end    = TEGRA_GPIO_PU0,
121                 .flags  = IORESOURCE_IO,
122         },
123 };
124
125 static struct platform_device cardhu_bcm4329_rfkill_device = {
126         .name = "bcm4329_rfkill",
127         .id             = -1,
128         .num_resources  = ARRAY_SIZE(cardhu_bcm4329_rfkill_resources),
129         .resource       = cardhu_bcm4329_rfkill_resources,
130 };
131
132 static noinline void __init cardhu_bt_rfkill(void)
133 {
134         platform_device_register(&cardhu_bcm4329_rfkill_device);
135
136         return;
137 }
138 #else
139 static inline void cardhu_bt_rfkill(void) { }
140 #endif
141
142 #ifdef CONFIG_BT_BLUESLEEP
143 static noinline void __init tegra_setup_bluesleep(void)
144 {
145         struct platform_device *pdev = NULL;
146         struct resource *res;
147
148         pdev = platform_device_alloc("bluesleep", 0);
149         if (!pdev) {
150                 pr_err("unable to allocate platform device for bluesleep");
151                 return;
152         }
153
154         res = kzalloc(sizeof(struct resource) * 3, GFP_KERNEL);
155         if (!res) {
156                 pr_err("unable to allocate resource for bluesleep\n");
157                 goto err_free_dev;
158         }
159
160         res[0].name   = "gpio_host_wake";
161         res[0].start  = TEGRA_GPIO_PU6;
162         res[0].end    = TEGRA_GPIO_PU6;
163         res[0].flags  = IORESOURCE_IO;
164
165         res[1].name   = "gpio_ext_wake";
166         res[1].start  = TEGRA_GPIO_PU1;
167         res[1].end    = TEGRA_GPIO_PU1;
168         res[1].flags  = IORESOURCE_IO;
169
170         res[2].name   = "host_wake";
171         res[2].start  = gpio_to_irq(TEGRA_GPIO_PU6);
172         res[2].end    = gpio_to_irq(TEGRA_GPIO_PU6);
173         res[2].flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE ;
174
175         if (platform_device_add_resources(pdev, res, 3)) {
176                 pr_err("unable to add resources to bluesleep device\n");
177                 goto err_free_res;
178         }
179
180         if (platform_device_add(pdev)) {
181                 pr_err("unable to add bluesleep device\n");
182                 goto err_free_res;
183         }
184         tegra_gpio_enable(TEGRA_GPIO_PU6);
185         tegra_gpio_enable(TEGRA_GPIO_PU1);
186
187 return;
188
189 err_free_res:
190         kfree(res);
191 err_free_dev:
192         platform_device_put(pdev);
193         return;
194 }
195 #else
196 static inline void tegra_setup_bluesleep(void) { }
197 #endif
198
199 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
200         /* name         parent          rate            enabled */
201         { "pll_m",      NULL,           0,              false},
202         { "hda",        "pll_p",        108000000,      false},
203         { "hda2codec_2x","pll_p",       48000000,       false},
204         { "pwm",        "pll_p",        3187500,        false},
205         { "blink",      "clk_32k",      32768,          true},
206         { "i2s1",       "pll_a_out0",   0,              false},
207         { "i2s3",       "pll_a_out0",   0,              false},
208         { "spdif_out",  "pll_a_out0",   0,              false},
209         { "d_audio",    "pll_a_out0",   0,              false},
210         { "dam0",       "pll_a_out0",   0,              false},
211         { "dam1",       "pll_a_out0",   0,              false},
212         { "dam2",       "pll_a_out0",   0,              false},
213         { "vi_sensor",  "pll_p",        150000000,      false},
214         { "i2c1",       "pll_p",        3200000,        false},
215         { "i2c2",       "pll_p",        3200000,        false},
216         { "i2c3",       "pll_p",        3200000,        false},
217         { "i2c4",       "pll_p",        3200000,        false},
218         { "i2c5",       "pll_p",        3200000,        false},
219         { NULL,         NULL,           0,              0},
220 };
221
222 static struct pn544_i2c_platform_data nfc_pdata = {
223         .irq_gpio = TEGRA_GPIO_PX0,
224         .ven_gpio = TEGRA_GPIO_PP3,
225         .firm_gpio = TEGRA_GPIO_PO7,
226         };
227
228 static struct i2c_board_info __initdata cardhu_i2c_bus3_board_info[] = {
229         {
230                 I2C_BOARD_INFO("pn544", 0x28),
231                 .platform_data = &nfc_pdata,
232                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PX0),
233         },
234 };
235 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
236         .adapter_nr     = 0,
237         .bus_count      = 1,
238         .bus_clk_rate   = { 100000, 0 },
239         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
240         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
241         .arb_recovery = arb_lost_recovery,
242 };
243
244 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
245         .adapter_nr     = 1,
246         .bus_count      = 1,
247         .bus_clk_rate   = { 100000, 0 },
248         .is_clkon_always = true,
249         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
250         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
251         .arb_recovery = arb_lost_recovery,
252 };
253
254 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
255         .adapter_nr     = 2,
256         .bus_count      = 1,
257         .bus_clk_rate   = { 100000, 0 },
258         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
259         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
260         .arb_recovery = arb_lost_recovery,
261 };
262
263 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
264         .adapter_nr     = 3,
265         .bus_count      = 1,
266         .bus_clk_rate   = { 100000, 0 },
267         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
268         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
269         .arb_recovery = arb_lost_recovery,
270 };
271
272 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
273         .adapter_nr     = 4,
274         .bus_count      = 1,
275         .bus_clk_rate   = { 400000, 0 },
276         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
277         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
278         .arb_recovery = arb_lost_recovery,
279 };
280
281
282 #if 0
283 struct tegra_wired_jack_conf audio_wr_jack_conf = {
284         .hp_det_n = TEGRA_GPIO_PW2,
285         .en_mic_ext = TEGRA_GPIO_PX1,
286         .en_mic_int = TEGRA_GPIO_PX0,
287 };
288 #endif
289
290 static struct wm8903_platform_data cardhu_wm8903_pdata = {
291         .irq_active_low = 0,
292         .micdet_cfg = 0,
293         .micdet_delay = 100,
294         .gpio_base = CARDHU_GPIO_WM8903(0),
295         .gpio_cfg = {
296                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP1_FN_SHIFT),
297                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP2_FN_SHIFT) |
298                         WM8903_GP2_DIR,
299                 0,
300                 WM8903_GPIO_NO_CONFIG,
301                 WM8903_GPIO_NO_CONFIG,
302         },
303 };
304
305 static struct i2c_board_info __initdata wm8903_board_info = {
306         I2C_BOARD_INFO("wm8903", 0x1a),
307         .platform_data = &cardhu_wm8903_pdata,
308         .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_CDC_IRQ),
309 };
310
311 static void cardhu_i2c_init(void)
312 {
313         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
314         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
315         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
316         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
317         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
318
319         platform_device_register(&tegra_i2c_device5);
320         platform_device_register(&tegra_i2c_device4);
321         platform_device_register(&tegra_i2c_device3);
322         platform_device_register(&tegra_i2c_device2);
323         platform_device_register(&tegra_i2c_device1);
324
325         i2c_register_board_info(4, &wm8903_board_info, 1);
326         i2c_register_board_info(2, cardhu_i2c_bus3_board_info, 1);
327 }
328
329 static struct platform_device *cardhu_uart_devices[] __initdata = {
330         &tegra_uarta_device,
331         &tegra_uartb_device,
332         &tegra_uartc_device,
333         &tegra_uartd_device,
334         &tegra_uarte_device,
335 };
336 static struct uart_clk_parent uart_parent_clk[] = {
337         [0] = {.name = "clk_m"},
338         [1] = {.name = "pll_p"},
339 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
340         [2] = {.name = "pll_m"},
341 #endif
342 };
343
344 static struct tegra_uart_platform_data cardhu_uart_pdata;
345
346 static void __init uart_debug_init(void)
347 {
348         struct board_info board_info;
349         int debug_port_id;
350
351         tegra_get_board_info(&board_info);
352
353         debug_port_id = get_tegra_uart_debug_port_id();
354         if (debug_port_id < 0) {
355                 debug_port_id = 0;
356                         /* UARTB is debug port
357                          *       for SLT - E1186/E1187/PM269
358                          *       for E1256/E1257
359                          */
360                 if (((board_info.sku & SKU_SLT_ULPI_SUPPORT) &&
361                         ((board_info.board_id == BOARD_E1186) ||
362                         (board_info.board_id == BOARD_E1187) ||
363                         (board_info.board_id == BOARD_PM269))) ||
364                         (board_info.board_id == BOARD_E1256) ||
365                         (board_info.board_id == BOARD_E1257))
366                                 debug_port_id = 1;
367         }
368         switch (debug_port_id) {
369         case 0:
370                 /* UARTA is the debug port. */
371                 pr_info("Selecting UARTA as the debug console\n");
372                 cardhu_uart_devices[0] = &debug_uarta_device;
373                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
374                 debug_uart_port_base = ((struct plat_serial8250_port *)(
375                         debug_uarta_device.dev.platform_data))->mapbase;
376                 break;
377
378         case 1:
379                 /* UARTB is the debug port. */
380                 pr_info("Selecting UARTB as the debug console\n");
381                 cardhu_uart_devices[1] = &debug_uartb_device;
382                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartb");
383                 debug_uart_port_base = ((struct plat_serial8250_port *)(
384                         debug_uartb_device.dev.platform_data))->mapbase;
385                 break;
386
387         case 2:
388                 /* UARTC is the debug port. */
389                 pr_info("Selecting UARTC as the debug console\n");
390                 cardhu_uart_devices[2] = &debug_uartc_device;
391                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartc");
392                 debug_uart_port_base = ((struct plat_serial8250_port *)(
393                         debug_uartc_device.dev.platform_data))->mapbase;
394                 break;
395
396         case 3:
397                 /* UARTD is the debug port. */
398                 pr_info("Selecting UARTD as the debug console\n");
399                 cardhu_uart_devices[3] = &debug_uartd_device;
400                 debug_uart_clk =  clk_get_sys("serial8250.0", "uartd");
401                 debug_uart_port_base = ((struct plat_serial8250_port *)(
402                         debug_uartd_device.dev.platform_data))->mapbase;
403                 break;
404
405         case 4:
406                 /* UARTE is the debug port. */
407                 pr_info("Selecting UARTE as the debug console\n");
408                 cardhu_uart_devices[4] = &debug_uarte_device;
409                 debug_uart_clk =  clk_get_sys("serial8250.0", "uarte");
410                 debug_uart_port_base = ((struct plat_serial8250_port *)(
411                         debug_uarte_device.dev.platform_data))->mapbase;
412                 break;
413
414         default:
415                 pr_info("The debug console id %d is invalid, Assuming UARTA", debug_port_id);
416                 cardhu_uart_devices[0] = &debug_uarta_device;
417                 debug_uart_clk = clk_get_sys("serial8250.0", "uarta");
418                 debug_uart_port_base = ((struct plat_serial8250_port *)(
419                         debug_uarta_device.dev.platform_data))->mapbase;
420                 break;
421         }
422         return;
423 }
424
425 static void __init cardhu_uart_init(void)
426 {
427         struct clk *c;
428         int i;
429
430         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
431                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
432                 if (IS_ERR_OR_NULL(c)) {
433                         pr_err("Not able to get the clock for %s\n",
434                                                 uart_parent_clk[i].name);
435                         continue;
436                 }
437                 uart_parent_clk[i].parent_clk = c;
438                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
439         }
440         cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
441         cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
442         tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
443         tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
444         tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
445         tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
446         tegra_uarte_device.dev.platform_data = &cardhu_uart_pdata;
447
448         /* Register low speed only if it is selected */
449         if (!is_tegra_debug_uartport_hs()) {
450                 uart_debug_init();
451                 /* Clock enable for the debug channel */
452                 if (!IS_ERR_OR_NULL(debug_uart_clk)) {
453                         pr_info("The debug console clock name is %s\n",
454                                                 debug_uart_clk->name);
455                         c = tegra_get_clock_by_name("pll_p");
456                         if (IS_ERR_OR_NULL(c))
457                                 pr_err("Not getting the parent clock pll_p\n");
458                         else
459                                 clk_set_parent(debug_uart_clk, c);
460
461                         clk_enable(debug_uart_clk);
462                         clk_set_rate(debug_uart_clk, clk_get_rate(c));
463                 } else {
464                         pr_err("Not getting the clock %s for debug console\n",
465                                         debug_uart_clk->name);
466                 }
467         }
468
469         platform_add_devices(cardhu_uart_devices,
470                                 ARRAY_SIZE(cardhu_uart_devices));
471 }
472
473 static struct platform_device tegra_camera = {
474         .name = "tegra_camera",
475         .id = -1,
476 };
477
478 static struct platform_device *cardhu_spi_devices[] __initdata = {
479         &tegra_spi_device4,
480 };
481
482 struct spi_clk_parent spi_parent_clk[] = {
483         [0] = {.name = "pll_p"},
484 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
485         [1] = {.name = "pll_m"},
486         [2] = {.name = "clk_m"},
487 #else
488         [1] = {.name = "clk_m"},
489 #endif
490 };
491
492 static struct tegra_spi_platform_data cardhu_spi_pdata = {
493         .is_dma_based           = true,
494         .max_dma_buffer         = (16 * 1024),
495         .is_clkon_always        = false,
496         .max_rate               = 100000000,
497 };
498
499 static void __init cardhu_spi_init(void)
500 {
501         int i;
502         struct clk *c;
503         struct board_info board_info;
504
505         tegra_get_board_info(&board_info);
506
507         for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
508                 c = tegra_get_clock_by_name(spi_parent_clk[i].name);
509                 if (IS_ERR_OR_NULL(c)) {
510                         pr_err("Not able to get the clock for %s\n",
511                                                 spi_parent_clk[i].name);
512                         continue;
513                 }
514                 spi_parent_clk[i].parent_clk = c;
515                 spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
516         }
517         cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
518         cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
519         tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
520         platform_add_devices(cardhu_spi_devices,
521                                 ARRAY_SIZE(cardhu_spi_devices));
522
523         if (board_info.board_id == BOARD_E1198) {
524                 tegra_spi_device2.dev.platform_data = &cardhu_spi_pdata;
525                 platform_device_register(&tegra_spi_device2);
526         }
527 }
528
529 static struct resource tegra_rtc_resources[] = {
530         [0] = {
531                 .start = TEGRA_RTC_BASE,
532                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
533                 .flags = IORESOURCE_MEM,
534         },
535         [1] = {
536                 .start = INT_RTC,
537                 .end = INT_RTC,
538                 .flags = IORESOURCE_IRQ,
539         },
540 };
541
542 static struct platform_device tegra_rtc_device = {
543         .name = "tegra_rtc",
544         .id   = -1,
545         .resource = tegra_rtc_resources,
546         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
547 };
548
549 static struct tegra_wm8903_platform_data cardhu_audio_pdata = {
550         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
551         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
552         .gpio_hp_mute           = -1,
553         .gpio_int_mic_en        = -1,
554         .gpio_ext_mic_en        = -1,
555 };
556
557 static struct platform_device cardhu_audio_device = {
558         .name   = "tegra-snd-wm8903",
559         .id     = 0,
560         .dev    = {
561                 .platform_data  = &cardhu_audio_pdata,
562         },
563 };
564
565 static struct platform_device *cardhu_devices[] __initdata = {
566         &tegra_pmu_device,
567         &tegra_rtc_device,
568         &tegra_udc_device,
569 #if defined(CONFIG_TEGRA_IOVMM_SMMU)
570         &tegra_smmu_device,
571 #endif
572         &tegra_wdt_device,
573 #if defined(CONFIG_TEGRA_AVP)
574         &tegra_avp_device,
575 #endif
576         &tegra_camera,
577 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
578         &tegra_se_device,
579 #endif
580         &tegra_ahub_device,
581         &tegra_dam_device0,
582         &tegra_dam_device1,
583         &tegra_dam_device2,
584         &tegra_i2s_device1,
585         &tegra_i2s_device3,
586         &tegra_spdif_device,
587         &spdif_dit_device,
588         &bluetooth_dit_device,
589         &tegra_pcm_device,
590         &cardhu_audio_device,
591         &tegra_hda_device,
592 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
593         &tegra_aes_device,
594 #endif
595 };
596
597 #define MXT_CONFIG_CRC  0xD62DE8
598 static const u8 config[] = {
599         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
600         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x00,
601         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
602         0x1B, 0x2A, 0x00, 0x20, 0x3C, 0x04, 0x05, 0x00,
603         0x02, 0x01, 0x00, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
604         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
605         0x00, 0x00, 0x00, 0x64, 0x02, 0x00, 0x00, 0x00,
606         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
607         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
608         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07,
609         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
610         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
611         0x00, 0x04, 0xFF, 0x03, 0x3F, 0x64, 0x64, 0x01,
612         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
613         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
614         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
615         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
616         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
617         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
618         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
619 };
620
621 #define MXT_CONFIG_CRC_SKU2000  0xA24D9A
622 static const u8 config_sku2000[] = {
623         0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
624         0xFF, 0xFF, 0x32, 0x0A, 0x00, 0x14, 0x14, 0x19,
625         0x00, 0x00, 0x00, 0x00, 0x00, 0x8B, 0x00, 0x00,
626         0x1B, 0x2A, 0x00, 0x20, 0x3A, 0x04, 0x05, 0x00,  //23=thr  2 di
627         0x04, 0x04, 0x41, 0x0A, 0x0A, 0x0A, 0x0A, 0xFF,
628         0x02, 0x55, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00,
629         0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00,  //0A=limit
630         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
631         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
632         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
633         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x23,
634         0x00, 0x00, 0x00, 0x05, 0x0A, 0x15, 0x1E, 0x00,
635         0x00, 0x04, 0x00, 0x03, 0x3F, 0x64, 0x64, 0x01,
636         0x0A, 0x14, 0x28, 0x4B, 0x00, 0x02, 0x00, 0x64,
637         0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
638         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
639         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
640         0x00, 0x00, 0x00, 0x08, 0x10, 0x3C, 0x00, 0x00,
641         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
642         0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
643 };
644
645 static struct mxt_platform_data atmel_mxt_info = {
646         .x_line         = 27,
647         .y_line         = 42,
648         .x_size         = 768,
649         .y_size         = 1366,
650         .blen           = 0x20,
651         .threshold      = 0x3C,
652         .voltage        = 3300000,              /* 3.3V */
653         .orient         = 5,
654         .config         = config,
655         .config_length  = 157,
656         .config_crc     = MXT_CONFIG_CRC,
657         .irqflags       = IRQF_TRIGGER_FALLING,
658 /*      .read_chg       = &read_chg, */
659         .read_chg       = NULL,
660 };
661
662 static struct i2c_board_info __initdata atmel_i2c_info[] = {
663         {
664                 I2C_BOARD_INFO("atmel_mxt_ts", 0x5A),
665                 .irq = TEGRA_GPIO_TO_IRQ(TEGRA_GPIO_PH4),
666                 .platform_data = &atmel_mxt_info,
667         }
668 };
669
670 static int __init cardhu_touch_init(void)
671 {
672         struct board_info BoardInfo;
673
674         tegra_gpio_enable(TEGRA_GPIO_PH4);
675         tegra_gpio_enable(TEGRA_GPIO_PH6);
676
677         gpio_request(TEGRA_GPIO_PH4, "atmel-irq");
678         gpio_direction_input(TEGRA_GPIO_PH4);
679
680         gpio_request(TEGRA_GPIO_PH6, "atmel-reset");
681         gpio_direction_output(TEGRA_GPIO_PH6, 0);
682         msleep(1);
683         gpio_set_value(TEGRA_GPIO_PH6, 1);
684         msleep(100);
685
686         tegra_get_board_info(&BoardInfo);
687         if ((BoardInfo.sku & SKU_TOUCH_MASK) == SKU_TOUCH_2000) {
688                 atmel_mxt_info.config = config_sku2000;
689                 atmel_mxt_info.config_crc = MXT_CONFIG_CRC_SKU2000;
690         }
691
692         i2c_register_board_info(1, atmel_i2c_info, 1);
693
694         return 0;
695 }
696
697 static struct tegra_uhsic_config uhsic_phy_config = {
698         .enable_gpio = EN_HSIC_GPIO,
699         .reset_gpio = -1,
700         .sync_start_delay = 9,
701         .idle_wait_delay = 17,
702         .term_range_adj = 0,
703         .elastic_underrun_limit = 16,
704         .elastic_overrun_limit = 16,
705 };
706
707 static struct tegra_ehci_platform_data tegra_ehci_uhsic_pdata = {
708         .phy_type = TEGRA_USB_PHY_TYPE_HSIC,
709         .phy_config = &uhsic_phy_config,
710         .operating_mode = TEGRA_USB_HOST,
711         .power_down_on_bus_suspend = 1,
712 };
713
714 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
715         [0] = {
716                         .phy_config = &utmi_phy_config[0],
717                         .operating_mode = TEGRA_USB_HOST,
718                         .power_down_on_bus_suspend = 1,
719         },
720         [1] = {
721                         .phy_config = &utmi_phy_config[1],
722                         .operating_mode = TEGRA_USB_HOST,
723                         .power_down_on_bus_suspend = 1,
724         },
725         [2] = {
726                         .phy_config = &utmi_phy_config[2],
727                         .operating_mode = TEGRA_USB_HOST,
728                         .power_down_on_bus_suspend = 1,
729                         .hotplug = 1,
730         },
731 };
732
733 static struct tegra_otg_platform_data tegra_otg_pdata = {
734         .ehci_device = &tegra_ehci1_device,
735         .ehci_pdata = &tegra_ehci_pdata[0],
736 };
737
738 #ifdef CONFIG_USB_SUPPORT
739 static struct usb_phy_plat_data tegra_usb_phy_pdata[] = {
740         [0] = {
741                         .instance = 0,
742                         .vbus_gpio = -1,
743                         .vbus_reg_supply = "vdd_vbus_micro_usb",
744         },
745         [1] = {
746                         .instance = 1,
747                         .vbus_gpio = -1,
748         },
749         [2] = {
750                         .instance = 2,
751                         .vbus_gpio = -1,
752                         .vbus_reg_supply = "vdd_vbus_typea_usb",
753         },
754 };
755
756 static void cardhu_usb_init(void)
757 {
758         struct board_info bi;
759
760         tegra_get_board_info(&bi);
761
762         tegra_usb_phy_init(tegra_usb_phy_pdata,
763                         ARRAY_SIZE(tegra_usb_phy_pdata));
764
765         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
766         platform_device_register(&tegra_otg_device);
767         if (bi.board_id == BOARD_PM267) {
768                 uhsic_phy_config.reset_gpio =
769                         PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
770                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
771                 platform_device_register(&tegra_ehci2_device);
772         } else if (bi.board_id == BOARD_E1256) {
773                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
774                 platform_device_register(&tegra_ehci2_device);
775         } else if (bi.board_id == BOARD_E1186) {
776                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_uhsic_pdata;
777                 /* baseband registration happens in baseband-xmm-power  */
778         } else {
779                 tegra_ehci2_device.dev.platform_data = &tegra_ehci_pdata[1];
780                 platform_device_register(&tegra_ehci2_device);
781         }
782
783         tegra_ehci3_device.dev.platform_data = &tegra_ehci_pdata[2];
784         platform_device_register(&tegra_ehci3_device);
785
786 }
787 #else
788 static void cardhu_usb_init(void) { }
789 #endif
790
791 static void cardhu_gps_init(void)
792 {
793         tegra_gpio_enable(TEGRA_GPIO_PU2);
794         tegra_gpio_enable(TEGRA_GPIO_PU3);
795 }
796
797 static void cardhu_nfc_init(void)
798 {
799         tegra_gpio_enable(TEGRA_GPIO_PX0);
800         tegra_gpio_enable(TEGRA_GPIO_PP3);
801         tegra_gpio_enable(TEGRA_GPIO_PO7);
802 }
803
804 static struct baseband_power_platform_data tegra_baseband_power_data = {
805         .baseband_type = BASEBAND_XMM,
806         .modem = {
807         .xmm = {
808                         .bb_rst = XMM_GPIO_BB_RST,
809                         .bb_on = XMM_GPIO_BB_ON,
810                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
811                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
812                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
813                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
814                         .hsic_device = &tegra_ehci2_device,
815                 },
816         },
817 };
818
819 static struct platform_device tegra_baseband_power_device = {
820         .name = "baseband_xmm_power",
821         .id = -1,
822         .dev = {
823                 .platform_data = &tegra_baseband_power_data,
824         },
825 };
826
827 static struct platform_device tegra_baseband_power2_device = {
828         .name = "baseband_xmm_power2",
829         .id = -1,
830         .dev = {
831                 .platform_data = &tegra_baseband_power_data,
832         },
833 };
834
835 static void cardhu_modem_init(void)
836 {
837         struct board_info board_info;
838         int w_disable_gpio, ret;
839
840         tegra_get_board_info(&board_info);
841         switch (board_info.board_id) {
842         case BOARD_E1291:
843         case BOARD_E1198:
844                 if (((board_info.board_id == BOARD_E1291) &&
845                                 (board_info.fab < BOARD_FAB_A03)) ||
846                         ((board_info.board_id == BOARD_E1198) &&
847                                         (board_info.fab < BOARD_FAB_A02))) {
848                         w_disable_gpio = TEGRA_GPIO_PH5;
849                 } else {
850                         w_disable_gpio = TEGRA_GPIO_PDD5;
851                 }
852                 tegra_gpio_enable(w_disable_gpio);
853                 ret = gpio_request(w_disable_gpio, "w_disable_gpio");
854                 if (ret < 0)
855                         pr_err("%s: gpio_request failed for gpio %d\n",
856                                 __func__, w_disable_gpio);
857                 else
858                         gpio_direction_input(w_disable_gpio);
859
860                 /* E1291-A04 & E1198:A02: Set PERST signal to high */
861                 if (((board_info.board_id == BOARD_E1291) &&
862                                 (board_info.fab >= BOARD_FAB_A04)) ||
863                         ((board_info.board_id == BOARD_E1198) &&
864                                         (board_info.fab >= BOARD_FAB_A02))) {
865                         ret = gpio_request(TEGRA_GPIO_PH7, "modem_perst");
866                         if (ret < 0) {
867                                 pr_err("%s(): Error in allocating gpio "
868                                         "TEGRA_GPIO_PH7\n", __func__);
869                                 break;
870                         }
871                         gpio_direction_output(TEGRA_GPIO_PH7, 1);
872                         tegra_gpio_enable(TEGRA_GPIO_PH7);
873                 }
874                 break;
875         case BOARD_E1186:
876                 tegra_gpio_enable(
877                         tegra_baseband_power_data.modem.xmm.bb_rst);
878                 tegra_gpio_enable(
879                         tegra_baseband_power_data.modem.xmm.bb_on);
880                 tegra_gpio_enable(
881                         tegra_baseband_power_data.modem.xmm.ipc_bb_wake);
882                 tegra_gpio_enable(
883                         tegra_baseband_power_data.modem.xmm.ipc_ap_wake);
884                 tegra_gpio_enable(
885                         tegra_baseband_power_data.modem.xmm.ipc_hsic_active);
886                 tegra_gpio_enable(
887                         tegra_baseband_power_data.modem.xmm.ipc_hsic_sus_req);
888                 platform_device_register(&tegra_baseband_power_device);
889                 platform_device_register(&tegra_baseband_power2_device);
890                 break;
891         default:
892                 break;
893         }
894
895 }
896
897 #ifdef CONFIG_SATA_AHCI_TEGRA
898 static void cardhu_sata_init(void)
899 {
900         platform_device_register(&tegra_sata_device);
901 }
902 #else
903 static void cardhu_sata_init(void) { }
904 #endif
905
906 static void __init tegra_cardhu_init(void)
907 {
908         tegra_thermal_init(&thermal_data);
909         tegra_clk_init_from_table(cardhu_clk_init_table);
910         cardhu_pinmux_init();
911         cardhu_i2c_init();
912         cardhu_spi_init();
913         cardhu_usb_init();
914 #ifdef CONFIG_TEGRA_EDP_LIMITS
915         cardhu_edp_init();
916 #endif
917         cardhu_uart_init();
918         cardhu_tsensor_init();
919         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
920         cardhu_sdhci_init();
921         cardhu_regulator_init();
922         cardhu_gpio_switch_regulator_init();
923         cardhu_suspend_init();
924         cardhu_power_off_init();
925         cardhu_touch_init();
926         cardhu_gps_init();
927         cardhu_modem_init();
928         cardhu_kbc_init();
929         cardhu_scroll_init();
930         cardhu_keys_init();
931         cardhu_panel_init();
932         cardhu_pmon_init();
933         cardhu_sensors_init();
934         cardhu_bt_rfkill();
935         tegra_setup_bluesleep();
936         cardhu_sata_init();
937         //audio_wired_jack_init();
938         cardhu_pins_state_init();
939         cardhu_emc_init();
940         tegra_release_bootloader_fb();
941         cardhu_nfc_init();
942 }
943
944 static void __init tegra_cardhu_reserve(void)
945 {
946 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
947         /* support 1920X1200 with 24bpp */
948         tegra_reserve(0, SZ_8M + SZ_1M, SZ_8M + SZ_1M);
949 #else
950         tegra_reserve(SZ_128M, SZ_8M, SZ_8M);
951 #endif
952 }
953
954 MACHINE_START(CARDHU, "cardhu")
955         .boot_params    = 0x80000100,
956         .map_io         = tegra_map_common_io,
957         .reserve        = tegra_cardhu_reserve,
958         .init_early     = tegra_init_early,
959         .init_irq       = tegra_init_irq,
960         .timer          = &tegra_timer,
961         .init_machine   = tegra_cardhu_init,
962 MACHINE_END