arm: tegra: cardhu: add support for PM315
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011-2012, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <linux/spi/spi.h>
37 #include <linux/spi/rm31080a_ts.h>
38 #include <linux/i2c/atmel_mxt_ts.h>
39 #include <linux/tegra_uart.h>
40 #include <linux/memblock.h>
41 #include <linux/spi-tegra.h>
42 #include <linux/nfc/pn544.h>
43 #include <linux/rfkill-gpio.h>
44 #include <linux/of_platform.h>
45
46 #include <sound/wm8903.h>
47 #include <sound/max98095.h>
48 #include <media/tegra_dtv.h>
49
50 #include <asm/hardware/gic.h>
51
52 #include <mach/edp.h>
53 #include <mach/clk.h>
54 #include <mach/iomap.h>
55 #include <mach/irqs.h>
56 #include <mach/pinmux.h>
57 #include <mach/iomap.h>
58 #include <mach/io_dpd.h>
59 #include <mach/io.h>
60 #include <mach/i2s.h>
61 #include <mach/tegra_asoc_pdata.h>
62 #include <mach/tegra_rt5640_pdata.h>
63 #include <mach/tegra_wm8903_pdata.h>
64 #include <mach/usb_phy.h>
65 #include <mach/pci.h>
66 #include <mach/gpio-tegra.h>
67 #include <mach/tegra_fiq_debugger.h>
68
69 #include <asm/hardware/gic.h>
70 #include <asm/mach-types.h>
71 #include <asm/mach/arch.h>
72
73 #include "board.h"
74 #include "board-common.h"
75 #include "clock.h"
76 #include "board-cardhu.h"
77 #include "board-touch-raydium.h"
78 #include "devices.h"
79 #include "gpio-names.h"
80 #include "fuse.h"
81 #include "pm.h"
82 #include "baseband-xmm-power.h"
83 #include "wdt-recovery.h"
84 #include "common.h"
85
86 static struct rfkill_gpio_platform_data cardhu_bt_rfkill_pdata[] = {
87         {
88                 .name           = "bt_rfkill",
89                 .shutdown_gpio  = TEGRA_GPIO_PU0,
90                 .reset_gpio     = TEGRA_GPIO_INVALID,
91                 .type           = RFKILL_TYPE_BLUETOOTH,
92         },
93 };
94
95 static struct platform_device cardhu_bt_rfkill_device = {
96         .name = "rfkill_gpio",
97         .id             = -1,
98         .dev = {
99                 .platform_data = &cardhu_bt_rfkill_pdata,
100         },
101 };
102
103 static struct resource cardhu_bluesleep_resources[] = {
104         [0] = {
105                 .name = "gpio_host_wake",
106                         .start  = TEGRA_GPIO_PU6,
107                         .end    = TEGRA_GPIO_PU6,
108                         .flags  = IORESOURCE_IO,
109         },
110         [1] = {
111                 .name = "gpio_ext_wake",
112                         .start  = TEGRA_GPIO_PU1,
113                         .end    = TEGRA_GPIO_PU1,
114                         .flags  = IORESOURCE_IO,
115         },
116         [2] = {
117                 .name = "host_wake",
118                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
119         },
120 };
121
122 static struct platform_device cardhu_bluesleep_device = {
123         .name           = "bluesleep",
124         .id             = -1,
125         .num_resources  = ARRAY_SIZE(cardhu_bluesleep_resources),
126         .resource       = cardhu_bluesleep_resources,
127 };
128
129 static noinline void __init cardhu_setup_bluesleep(void)
130 {
131         cardhu_bluesleep_resources[2].start =
132                 cardhu_bluesleep_resources[2].end =
133                         gpio_to_irq(TEGRA_GPIO_PU6);
134         platform_device_register(&cardhu_bluesleep_device);
135         return;
136 }
137
138 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
139         /* name         parent          rate            enabled */
140         { "pll_m",      NULL,           0,              false},
141         { "hda",        "pll_p",        108000000,      false},
142         { "hda2codec_2x","pll_p",       48000000,       false},
143         { "pwm",        "pll_p",        3187500,        false},
144         { "blink",      "clk_32k",      32768,          true},
145         { "i2s0",       "pll_a_out0",   0,              false},
146         { "i2s1",       "pll_a_out0",   0,              false},
147         { "i2s3",       "pll_a_out0",   0,              false},
148         { "spdif_out",  "pll_a_out0",   0,              false},
149         { "d_audio",    "clk_m",        12000000,       false},
150         { "dam0",       "clk_m",        12000000,       false},
151         { "dam1",       "clk_m",        12000000,       false},
152         { "dam2",       "clk_m",        12000000,       false},
153         { "audio1",     "i2s1_sync",    0,              false},
154         { "audio3",     "i2s3_sync",    0,              false},
155         { "vi_sensor",  "pll_p",        150000000,      false},
156         { "i2c1",       "pll_p",        3200000,        false},
157         { "i2c2",       "pll_p",        3200000,        false},
158         { "i2c3",       "pll_p",        3200000,        false},
159         { "i2c4",       "pll_p",        3200000,        false},
160         { "i2c5",       "pll_p",        3200000,        false},
161         { "vi",         "pll_p",        0,              false},
162         { NULL,         NULL,           0,              0},
163 };
164
165 static struct pn544_i2c_platform_data nfc_pdata = {
166         .irq_gpio = TEGRA_GPIO_PX0,
167         .ven_gpio = TEGRA_GPIO_PP3,
168         .firm_gpio = TEGRA_GPIO_PO7,
169         };
170
171 static struct i2c_board_info __initdata cardhu_i2c_bus3_board_info[] = {
172         {
173                 I2C_BOARD_INFO("pn544", 0x28),
174                 .platform_data = &nfc_pdata,
175         },
176 };
177 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
178         .adapter_nr     = 0,
179         .bus_count      = 1,
180         .bus_clk_rate   = { 100000, 0 },
181         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
182         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
183         .arb_recovery = arb_lost_recovery,
184 };
185
186 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
187         .adapter_nr     = 1,
188         .bus_count      = 1,
189         .bus_clk_rate   = { 400000, 0 },
190         .is_clkon_always = true,
191         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
192         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
193         .arb_recovery = arb_lost_recovery,
194 };
195
196 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
197         .adapter_nr     = 2,
198         .bus_count      = 1,
199         .bus_clk_rate   = { 100000, 0 },
200         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
201         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
202         .arb_recovery = arb_lost_recovery,
203 };
204
205 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
206         .adapter_nr     = 3,
207         .bus_count      = 1,
208         .bus_clk_rate   = { 10000, 0 },
209         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
210         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
211         .arb_recovery = arb_lost_recovery,
212 };
213
214 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
215         .adapter_nr     = 4,
216         .bus_count      = 1,
217         .bus_clk_rate   = { 400000, 0 },
218         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
219         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
220         .arb_recovery = arb_lost_recovery,
221 };
222
223
224 #if 0
225 struct tegra_wired_jack_conf audio_wr_jack_conf = {
226         .hp_det_n = TEGRA_GPIO_PW2,
227         .en_mic_ext = TEGRA_GPIO_PX1,
228         .en_mic_int = TEGRA_GPIO_PX0,
229 };
230 #endif
231
232 static struct wm8903_platform_data cardhu_wm8903_pdata = {
233         .irq_active_low = 0,
234         .micdet_cfg = 0,
235         .micdet_delay = 100,
236         .gpio_base = CARDHU_GPIO_WM8903(0),
237         .gpio_cfg = {
238                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP1_FN_SHIFT),
239                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP2_FN_SHIFT) |
240                         WM8903_GP2_DIR,
241                 WM8903_GPIO_CONFIG_ZERO,
242                 0,
243                 0,
244         },
245 };
246
247 /* Equalizer filter coefs generated from the MAXIM MAX98095
248  * evkit software tool */
249 static struct max98095_eq_cfg max98095_eq_cfg[] = {
250         {
251                 .name = "FLAT",
252                 .rate = 44100,
253                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
254                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
255                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
256                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
257                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
258         },
259         {
260                 .name = "LOWPASS1K",
261                 .rate = 44100,
262                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
263                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
264                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
265                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
266                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
267         },
268         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
269                 .name = "HIBOOST",
270                 .rate = 44100,
271                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
272                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
273                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
274                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
275                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
276         },
277         { /* BASS=12dB, TREBLE=+12dB */
278                 .name = "LOUD12DB",
279                 .rate = 44100,
280                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
281                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
282                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
283                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
284                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
285         },
286         {
287                 .name = "FLAT",
288                 .rate = 16000,
289                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
290                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
291                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
292                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
293                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
294         },
295         {
296                 .name = "LOWPASS1K",
297                 .rate = 16000,
298                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
299                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
300                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
301                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
302                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
303         },
304         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
305                 .name = "HIBOOST",
306                 .rate = 16000,
307                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
308                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
309                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
310                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
311                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
312         },
313         { /* BASS=12dB, TREBLE=+12dB */
314                 .name = "LOUD12DB",
315                 .rate = 16000,
316                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
317                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
318                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
319                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
320                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
321         },
322 };
323
324 static struct max98095_pdata cardhu_max98095_pdata = {
325         /* equalizer configuration */
326         .eq_cfg = max98095_eq_cfg,
327         .eq_cfgcnt = ARRAY_SIZE(max98095_eq_cfg),
328
329         /* Biquad filter response configuration */
330         .bq_cfg = NULL,
331         .bq_cfgcnt = 0,
332
333         /* microphone configuration */
334         .digmic_left_mode = 1,
335         .digmic_right_mode = 1,
336 };
337
338 static struct i2c_board_info __initdata cardhu_codec_wm8903_info = {
339         I2C_BOARD_INFO("wm8903", 0x1a),
340         .platform_data = &cardhu_wm8903_pdata,
341 };
342
343 static struct i2c_board_info __initdata cardhu_codec_aic326x_info = {
344         I2C_BOARD_INFO("aic3262-codec", 0x18),
345 };
346
347 static struct i2c_board_info __initdata cardhu_codec_max98095_info = {
348         I2C_BOARD_INFO("max98095", 0x10),
349         .platform_data = &cardhu_max98095_pdata,
350 };
351
352 static struct i2c_board_info __initdata rt5640_board_info = {
353         I2C_BOARD_INFO("rt5640", 0x1c),
354 };
355
356
357 static void cardhu_i2c_init(void)
358 {
359         struct board_info board_info;
360
361                 tegra_get_board_info(&board_info);
362
363         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
364         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
365         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
366         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
367         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
368
369         platform_device_register(&tegra_i2c_device5);
370         platform_device_register(&tegra_i2c_device4);
371         platform_device_register(&tegra_i2c_device3);
372         platform_device_register(&tegra_i2c_device2);
373         platform_device_register(&tegra_i2c_device1);
374
375         cardhu_codec_wm8903_info.irq = cardhu_codec_max98095_info.irq =
376                 cardhu_codec_aic326x_info.irq = gpio_to_irq(TEGRA_GPIO_CDC_IRQ);
377
378         if (board_info.board_id == BOARD_PM315)
379                 i2c_register_board_info(4, &rt5640_board_info, 1);
380         else
381                 i2c_register_board_info(4, &cardhu_codec_wm8903_info, 1);
382         i2c_register_board_info(4, &cardhu_codec_max98095_info, 1);
383         i2c_register_board_info(4, &cardhu_codec_aic326x_info, 1);
384
385         cardhu_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PX0);
386         i2c_register_board_info(2, cardhu_i2c_bus3_board_info, 1);
387 }
388
389 static struct platform_device *cardhu_uart_devices[] __initdata = {
390         &tegra_uarta_device,
391         &tegra_uartb_device,
392         &tegra_uartc_device,
393         &tegra_uartd_device,
394         &tegra_uarte_device,
395 };
396 static struct uart_clk_parent uart_parent_clk[] = {
397         [0] = {.name = "clk_m"},
398         [1] = {.name = "pll_p"},
399 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
400         [2] = {.name = "pll_m"},
401 #endif
402 };
403
404 static struct tegra_uart_platform_data cardhu_uart_pdata;
405 static struct tegra_uart_platform_data cardhu_loopback_uart_pdata;
406
407 static int __init uart_debug_init(void)
408 {
409         struct board_info board_info;
410         int debug_port_id;
411         int default_debug_port = 0;
412
413         tegra_get_board_info(&board_info);
414
415         /* UARTB is debug port
416          *       for SLT - E1186/E1187/PM269
417          *       for E1256/E1257
418          */
419         if (((board_info.sku & SKU_SLT_ULPI_SUPPORT) &&
420                 ((board_info.board_id == BOARD_E1186) ||
421                 (board_info.board_id == BOARD_E1187) ||
422                 (board_info.board_id == BOARD_PM269))) ||
423                 (board_info.board_id == BOARD_E1256) ||
424                 (board_info.board_id == BOARD_E1257))
425                         default_debug_port = 1;
426
427         debug_port_id = uart_console_debug_init(default_debug_port);
428         if (debug_port_id < 0)
429                 return debug_port_id;
430
431 #ifdef CONFIG_TEGRA_IRDA
432         if ((board_info.board_id == BOARD_E1186) ||
433                 (board_info.board_id == BOARD_E1198)) {
434                 if (debug_port_id == 1) {
435                         cardhu_irda_pdata.is_irda = false;
436                         pr_err("UARTB is not available for IrDA\n");
437                 }
438         }
439 #endif
440         cardhu_uart_devices[debug_port_id] = uart_console_debug_device;
441         return debug_port_id;
442 }
443
444 static void __init cardhu_uart_init(void)
445 {
446         struct clk *c;
447         int i;
448         struct board_info board_info;
449
450         tegra_get_board_info(&board_info);
451
452         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
453                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
454                 if (IS_ERR_OR_NULL(c)) {
455                         pr_err("Not able to get the clock for %s\n",
456                                                 uart_parent_clk[i].name);
457                         continue;
458                 }
459                 uart_parent_clk[i].parent_clk = c;
460                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
461         }
462         cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
463         cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
464         cardhu_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
465         cardhu_loopback_uart_pdata.parent_clk_count =
466                                                 ARRAY_SIZE(uart_parent_clk);
467         cardhu_loopback_uart_pdata.is_loopback = true;
468         tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
469         tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
470         tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
471         tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
472         /* UARTE is used for loopback test purpose */
473         tegra_uarte_device.dev.platform_data = &cardhu_loopback_uart_pdata;
474
475         /* Register low speed only if it is selected */
476         if (!is_tegra_debug_uartport_hs())
477                 uart_debug_init();
478
479 #ifdef CONFIG_TEGRA_IRDA
480         if (((board_info.board_id == BOARD_E1186) ||
481                 (board_info.board_id == BOARD_E1198)) &&
482                         cardhu_irda_pdata.is_irda) {
483                 cardhu_irda_pdata.parent_clk_list = uart_parent_clk;
484                 cardhu_irda_pdata.parent_clk_count =
485                                         ARRAY_SIZE(uart_parent_clk);
486
487                 tegra_uartb_device.dev.platform_data = &cardhu_irda_pdata;
488         }
489 #endif
490
491         platform_add_devices(cardhu_uart_devices,
492                                 ARRAY_SIZE(cardhu_uart_devices));
493 }
494
495 static struct platform_device tegra_camera = {
496         .name = "tegra_camera",
497         .id = -1,
498 };
499
500 static struct platform_device *cardhu_spi_devices[] __initdata = {
501         &tegra_spi_device4,
502 };
503
504 /*-----------------------------------------------------*/
505 /* Force Cardhu Direct Touch:
506         Valid Choices:
507         0 : Do not force Direct Touch
508         2 : RM_PLATFORM_C210 : Cardhu 10" J-Touch Panel
509         4 : RM_PLATFORM_P005 ; Pluto 5" J-Touch Panel
510 */
511 #define CARDHU_DT_PLATFORM      0 /* RM_PLATFORM_C210 */
512
513 static struct platform_device *touch_spi_device[] __initdata = {
514         &tegra_spi_device1,
515 };
516
517 struct spi_clk_parent spi_parent_clk[] = {
518         [0] = {.name = "pll_p"},
519 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
520         [1] = {.name = "pll_m"},
521         [2] = {.name = "clk_m"},
522 #else
523         [1] = {.name = "clk_m"},
524 #endif
525 };
526
527 static struct tegra_spi_platform_data cardhu_spi_pdata = {
528         .is_dma_based           = true,
529         .max_dma_buffer         = (16 * 1024),
530         .is_clkon_always        = false,
531         .max_rate               = 100000000,
532 };
533
534 static void __init cardhu_spi_init(void)
535 {
536         int i;
537         struct clk *c;
538         struct board_info board_info, display_board_info;
539
540         tegra_get_board_info(&board_info);
541         tegra_get_display_board_info(&display_board_info);
542
543         for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
544                 c = tegra_get_clock_by_name(spi_parent_clk[i].name);
545                 if (IS_ERR_OR_NULL(c)) {
546                         pr_err("Not able to get the clock for %s\n",
547                                                 spi_parent_clk[i].name);
548                         continue;
549                 }
550                 spi_parent_clk[i].parent_clk = c;
551                 spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
552         }
553         cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
554         cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
555         tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
556         platform_add_devices(cardhu_spi_devices,
557                                 ARRAY_SIZE(cardhu_spi_devices));
558
559         if ((display_board_info.board_id == BOARD_DISPLAY_PM313)
560                                                 || CARDHU_DT_PLATFORM) {
561                 platform_add_devices(touch_spi_device,
562                                 ARRAY_SIZE(touch_spi_device));
563         }
564
565         if (board_info.board_id == BOARD_E1198) {
566                 tegra_spi_device2.dev.platform_data = &cardhu_spi_pdata;
567                 platform_device_register(&tegra_spi_device2);
568                 tegra_spi_slave_device1.dev.platform_data = &cardhu_spi_pdata;
569                 platform_device_register(&tegra_spi_slave_device1);
570         }
571 }
572
573 static void __init cardhu_dtv_init(void)
574 {
575         struct board_info board_info;
576
577         tegra_get_board_info(&board_info);
578
579         if (board_info.board_id == BOARD_E1186)
580                 platform_device_register(&tegra_dtv_device);
581 }
582
583 static struct resource tegra_rtc_resources[] = {
584         [0] = {
585                 .start = TEGRA_RTC_BASE,
586                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
587                 .flags = IORESOURCE_MEM,
588         },
589         [1] = {
590                 .start = INT_RTC,
591                 .end = INT_RTC,
592                 .flags = IORESOURCE_IRQ,
593         },
594 };
595
596 static struct platform_device tegra_rtc_device = {
597         .name = "tegra_rtc",
598         .id   = -1,
599         .resource = tegra_rtc_resources,
600         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
601 };
602
603 static struct tegra_asoc_platform_data cardhu_audio_wm8903_pdata = {
604         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
605         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
606         .gpio_hp_mute           = -1,
607         .gpio_int_mic_en        = -1,
608         .gpio_ext_mic_en        = -1,
609         .i2s_param[HIFI_CODEC]  = {
610                 .audio_port_id  = 0,
611                 .is_i2s_master  = 1,
612                 .i2s_mode       = TEGRA_DAIFMT_I2S,
613         },
614         .i2s_param[BASEBAND]    = {
615                 .audio_port_id  = -1,
616         },
617         .i2s_param[BT_SCO]      = {
618                 .audio_port_id  = 3,
619                 .is_i2s_master  = 1,
620                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
621         },
622 };
623
624 static struct tegra_asoc_platform_data cardhu_audio_max98095_pdata = {
625         .gpio_spkr_en           = -1,
626         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
627         .gpio_hp_mute           = -1,
628         .gpio_int_mic_en        = -1,
629         .gpio_ext_mic_en        = -1,
630         .i2s_param[HIFI_CODEC]  = {
631                 .audio_port_id  = 0,
632                 .is_i2s_master  = 1,
633                 .i2s_mode       = TEGRA_DAIFMT_I2S,
634         },
635         .i2s_param[BASEBAND]    = {
636                 .audio_port_id  = -1,
637         },
638         .i2s_param[BT_SCO]      = {
639                 .audio_port_id  = 3,
640                 .is_i2s_master  = 1,
641                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
642         },
643 };
644
645 static struct platform_device cardhu_audio_wm8903_device = {
646         .name   = "tegra-snd-wm8903",
647         .id     = 0,
648         .dev    = {
649                 .platform_data = &cardhu_audio_wm8903_pdata,
650         },
651 };
652
653 static struct platform_device cardhu_audio_max98095_device = {
654         .name   = "tegra-snd-max98095",
655         .id     = 0,
656         .dev    = {
657                 .platform_data = &cardhu_audio_max98095_pdata,
658         },
659 };
660
661 static struct tegra_asoc_platform_data cardhu_audio_aic326x_pdata = {
662         .gpio_spkr_en           = -1,
663         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
664         .gpio_hp_mute           = -1,
665         .gpio_int_mic_en        = -1,
666         .gpio_ext_mic_en        = -1,
667         /*defaults for Verbier-Cardhu board with TI AIC326X codec*/
668         .i2s_param[HIFI_CODEC]  = {
669                 .audio_port_id  = 0,
670                 .is_i2s_master  = 1,
671                 .i2s_mode       = TEGRA_DAIFMT_I2S,
672                 .sample_size    = 16,
673         },
674         .i2s_param[BT_SCO]      = {
675                 .sample_size    = 16,
676                 .audio_port_id  = 3,
677                 .is_i2s_master  = 1,
678                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
679         },
680 };
681
682 static struct platform_device cardhu_audio_aic326x_device = {
683         .name   = "tegra-snd-aic326x",
684         .id     = 0,
685         .dev    = {
686                 .platform_data  = &cardhu_audio_aic326x_pdata,
687         },
688 };
689
690 static struct tegra_asoc_platform_data beaver_audio_rt5640_pdata = {
691         .codec_name = "rt5640.4-001c",
692         .codec_dai_name = "rt5640-aif1",
693         .gpio_spkr_en           = TEGRA_GPIO_RTL_SPKR_EN,
694         .gpio_hp_det            = TEGRA_GPIO_RTL_HP_DET,
695         .gpio_hp_mute           = -1,
696         .gpio_int_mic_en        = TEGRA_GPIO_RTL_INT_MIC_EN,
697         .gpio_ext_mic_en        = -1,   /* TEGRA_GPIO_EXT_MIC_EN,*/
698                 .i2s_param[HIFI_CODEC]  = {
699                 .audio_port_id  = 0,
700                 .is_i2s_master  = 1,
701                 .i2s_mode       = TEGRA_DAIFMT_I2S,
702         },
703         .i2s_param[BASEBAND]    = {
704                 .audio_port_id  = -1,
705         },
706         .i2s_param[BT_SCO]      = {
707                 .audio_port_id  = 3,
708                 .is_i2s_master  = 1,
709                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
710         },
711 };
712
713 static struct platform_device beaver_audio_rt5640_device = {
714         .name   = "tegra-snd-rt5640",
715         .id     = 0,
716         .dev    = {
717                 .platform_data = &beaver_audio_rt5640_pdata,
718         },
719 };
720
721
722 static struct platform_device *cardhu_devices[] __initdata = {
723         &tegra_pmu_device,
724         &tegra_rtc_device,
725         &tegra_udc_device,
726         &tegra_wdt0_device,
727         &tegra_wdt1_device,
728         &tegra_wdt2_device,
729 #if defined(CONFIG_TEGRA_AVP)
730         &tegra_avp_device,
731 #endif
732         &tegra_camera,
733 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
734         &tegra_se_device,
735 #endif
736         &tegra_ahub_device,
737         &tegra_dam_device0,
738         &tegra_dam_device1,
739         &tegra_dam_device2,
740         &tegra_i2s_device0,
741         &tegra_i2s_device1,
742         &tegra_i2s_device3,
743         &tegra_spdif_device,
744         &spdif_dit_device,
745         &bluetooth_dit_device,
746         &baseband_dit_device,
747         &cardhu_bt_rfkill_device,
748         &tegra_pcm_device,
749         &cardhu_audio_max98095_device,
750         &cardhu_audio_aic326x_device,
751         &tegra_hda_device,
752         &tegra_cec_device,
753 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
754         &tegra_aes_device,
755 #endif
756 };
757
758 static u8 read_chg(void)
759 {
760         return gpio_get_value(TEGRA_GPIO_PH4);
761 }
762
763 static struct platform_device *cardhu_audio_devices[] __initdata = {
764                 &cardhu_audio_wm8903_device,
765
766 };
767
768 static struct platform_device *beaver_audio_devices[] __initdata = {
769                 &beaver_audio_rt5640_device,
770
771 };
772
773 #define MXT_CFG_NAME            "Android_Cardhu_2012-01-31.cfg"
774
775 static struct mxt_platform_data atmel_mxt_info = {
776         .irqflags       = IRQF_TRIGGER_FALLING,
777         .read_chg       = &read_chg,
778         .mxt_cfg_name   = MXT_CFG_NAME,
779 };
780
781 static struct i2c_board_info __initdata atmel_i2c_info[] = {
782         {
783                 I2C_BOARD_INFO("atmel_mxt_ts", MXT1386_I2C_ADDR3),
784                 .flags = I2C_CLIENT_WAKE,
785                 .platform_data = &atmel_mxt_info,
786         }
787 };
788
789 static struct i2c_board_info __initdata e1506_atmel_i2c_info[] = {
790         {
791                 I2C_BOARD_INFO("atmel_mxt_ts", MXT224_I2C_ADDR1),
792                 .flags = I2C_CLIENT_WAKE,
793                 .platform_data = &atmel_mxt_info,
794         }
795 };
796
797 /* Raydium touchscreen                     Driver data */
798 static __initdata struct tegra_clk_init_table spi_clk_init_table[] = {
799         /* name         parent          rate            enabled */
800         { "sbc1",       "pll_p",        52000000,       true},
801         { NULL,         NULL,           0,              0},
802 };
803
804 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
805         /* name         parent          rate            enabled */
806         { "extern3",    "pll_p",        41000000,       true},
807         { "clk_out_3",  "extern3",      40800000,       true},
808         { NULL,         NULL,           0,              0},
809 };
810
811 struct rm_spi_ts_platform_data rm31080ts_cardhu_data = {
812         .gpio_reset = 0,
813         .config = 0,
814 };
815
816 struct spi_board_info rm31080a_cardhu_spi_board[1] = {
817         {
818          .modalias = "rm_ts_spidev",
819          .bus_num = 0,
820          .chip_select = 0,
821          .max_speed_hz = 13 * 1000 * 1000,
822          .mode = SPI_MODE_0,
823          .platform_data = &rm31080ts_cardhu_data,
824          },
825 };
826
827 static int __init cardhu_touch_init(void)
828 {
829         struct board_info BoardInfo, DisplayBoardInfo;
830         int ret;
831
832         tegra_get_board_info(&BoardInfo);
833         tegra_get_display_board_info(&DisplayBoardInfo);
834         if ((DisplayBoardInfo.board_id == BOARD_DISPLAY_PM313)
835                                                 || CARDHU_DT_PLATFORM) {
836                 tegra_clk_init_from_table(spi_clk_init_table);
837                 tegra_clk_init_from_table(touch_clk_init_table);
838                 clk_enable(tegra_get_clock_by_name("clk_out_3"));
839                 rm31080ts_cardhu_data.platform_id = CARDHU_DT_PLATFORM;
840                 rm31080a_cardhu_spi_board[0].irq = gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
841                 touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
842                                         TOUCH_GPIO_RST_RAYDIUM_SPI,
843                                         &rm31080ts_cardhu_data,
844                                         &rm31080a_cardhu_spi_board[0],
845                                         ARRAY_SIZE(rm31080a_cardhu_spi_board));
846         } else {
847                 ret = gpio_request(TEGRA_GPIO_PH4, "atmel-irq");
848                 if (ret < 0) {
849                         pr_err("%s() Error in gpio_request() for gpio %d\n",
850                                         __func__, ret);
851                 }
852                 ret = gpio_direction_input(TEGRA_GPIO_PH4);
853                 if (ret < 0) {
854                         pr_err("%s() Error in setting gpio %d to in/out\n",
855                                          __func__, ret);
856                         gpio_free(TEGRA_GPIO_PH4);
857                 }
858                 ret = gpio_request(TEGRA_GPIO_PH6, "atmel-reset");
859                 if (ret < 0) {
860                         pr_err("%s() Error in gpio_request() for gpio %d\n",
861                                         __func__, ret);
862                 }
863                 ret = gpio_direction_output(TEGRA_GPIO_PH6, 0);
864                 if (ret < 0) {
865                         pr_err("%s() Error in setting gpio %d to in/out\n",
866                                          __func__, ret);
867                         gpio_free(TEGRA_GPIO_PH6);
868                 }
869                 msleep(1);
870                 gpio_set_value(TEGRA_GPIO_PH6, 1);
871                 msleep(100);
872
873                 tegra_get_board_info(&BoardInfo);
874                 if ((BoardInfo.sku & SKU_TOUCH_MASK) == SKU_TOUCH_2000)
875                         strncpy(atmel_mxt_info.mxt_cfg_name,
876                                 "Android_Cardhu_SKU2000_2012-01-31.cfg",
877                                 CFG_NAME_SIZE);
878
879                 if (DisplayBoardInfo.board_id == BOARD_DISPLAY_E1506) {
880                         strncpy(atmel_mxt_info.mxt_cfg_name,
881                         "Android_Cardhu_Verbier_E1506_2012-06-06.cfg",
882                         CFG_NAME_SIZE);
883                         e1506_atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH4);
884                         i2c_register_board_info(1, e1506_atmel_i2c_info, 1);
885                 } else {
886                         atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH4);
887                         i2c_register_board_info(1, atmel_i2c_info, 1);
888                 }
889         }
890
891         return 0;
892 }
893
894 #if defined(CONFIG_USB_SUPPORT)
895
896 static void cardu_usb_hsic_postsupend(void)
897 {
898 #ifdef CONFIG_TEGRA_BB_XMM_POWER
899         baseband_xmm_set_power_status(BBXMM_PS_L2);
900 #endif
901 }
902
903 static void cardu_usb_hsic_preresume(void)
904 {
905 #ifdef CONFIG_TEGRA_BB_XMM_POWER
906         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
907 #endif
908 }
909
910 static void cardu_usb_hsic_phy_ready(void)
911 {
912 #ifdef CONFIG_TEGRA_BB_XMM_POWER
913         baseband_xmm_set_power_status(BBXMM_PS_L0);
914 #endif
915 }
916
917 static void cardu_usb_hsic_phy_off(void)
918 {
919 #ifdef CONFIG_TEGRA_BB_XMM_POWER
920         baseband_xmm_set_power_status(BBXMM_PS_L3);
921 #endif
922 }
923
924 static struct tegra_usb_phy_platform_ops hsic_xmm_plat_ops = {
925         .post_suspend = cardu_usb_hsic_postsupend,
926         .pre_resume = cardu_usb_hsic_preresume,
927         .port_power = cardu_usb_hsic_phy_ready,
928         .post_phy_off = cardu_usb_hsic_phy_off,
929 };
930
931 static struct tegra_usb_platform_data tegra_ehci2_hsic_xmm_pdata = {
932         .port_otg = false,
933         .has_hostpc = true,
934         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
935         .op_mode        = TEGRA_USB_OPMODE_HOST,
936         .u_data.host = {
937                 .vbus_gpio = -1,
938                 .hot_plug = false,
939                 .remote_wakeup_supported = false,
940                 .power_off_on_suspend = false,
941         },
942         .ops = &hsic_xmm_plat_ops,
943 };
944 #endif
945
946 static int hsic_enable_gpio = -1;
947 static int hsic_reset_gpio = -1;
948
949 void hsic_platform_open(void)
950 {
951         int reset_gpio = -1, enable_gpio = -1;
952
953         if (hsic_enable_gpio != -1)
954                 enable_gpio = gpio_request(hsic_enable_gpio, "uhsic_enable");
955         if (hsic_reset_gpio != -1)
956                 reset_gpio = gpio_request(hsic_reset_gpio, "uhsic_reset");
957         /* hsic enable signal deasserted, hsic reset asserted */
958         if (!enable_gpio)
959                 gpio_direction_output(hsic_enable_gpio, 0 /* deasserted */);
960         if (!reset_gpio)
961                 gpio_direction_output(hsic_reset_gpio, 0 /* asserted */);
962         /* keep hsic reset asserted for 1 ms */
963         udelay(1000);
964         /* enable (power on) hsic */
965         if (!enable_gpio)
966                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
967         udelay(1000);
968         /* deassert reset */
969         if (!reset_gpio)
970                 gpio_set_value_cansleep(hsic_reset_gpio, 1);
971
972 }
973
974 void hsic_platform_close(void)
975 {
976         if (hsic_enable_gpio != -1) {
977                 gpio_set_value(hsic_enable_gpio, 0);
978                 gpio_free(hsic_enable_gpio);
979         }
980         if (hsic_reset_gpio != -1) {
981                 gpio_set_value(hsic_reset_gpio, 0);
982                 gpio_free(hsic_reset_gpio);
983         }
984 }
985
986 void hsic_power_on(void)
987 {
988         if (hsic_enable_gpio != -1) {
989                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
990                 udelay(1000);
991         }
992 }
993
994 void hsic_power_off(void)
995 {
996         if (hsic_enable_gpio != -1) {
997                 gpio_set_value_cansleep(hsic_enable_gpio, 0);
998                 udelay(1000);
999         }
1000 }
1001
1002 #if defined(CONFIG_USB_SUPPORT)
1003 static struct tegra_usb_phy_platform_ops hsic_plat_ops = {
1004         .open = hsic_platform_open,
1005         .close = hsic_platform_close,
1006         .pre_phy_on = hsic_power_on,
1007         .post_phy_off = hsic_power_off,
1008 };
1009
1010 static struct tegra_usb_platform_data tegra_ehci2_hsic_pdata = {
1011         .port_otg = false,
1012         .has_hostpc = true,
1013         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
1014         .op_mode        = TEGRA_USB_OPMODE_HOST,
1015         .u_data.host = {
1016                 .vbus_gpio = -1,
1017                 .hot_plug = false,
1018                 .remote_wakeup_supported = false,
1019                 .power_off_on_suspend = false,
1020         },
1021         .ops = &hsic_plat_ops,
1022 };
1023
1024 static struct tegra_usb_platform_data tegra_udc_pdata = {
1025         .port_otg = true,
1026         .has_hostpc = true,
1027         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1028         .op_mode = TEGRA_USB_OPMODE_DEVICE,
1029         .u_data.dev = {
1030                 .vbus_pmu_irq = 0,
1031                 .vbus_gpio = -1,
1032                 .charging_supported = false,
1033                 .remote_wakeup_supported = false,
1034         },
1035         .u_cfg.utmi = {
1036                 .hssync_start_delay = 0,
1037                 .elastic_limit = 16,
1038                 .idle_wait_delay = 17,
1039                 .term_range_adj = 6,
1040                 .xcvr_setup = 8,
1041                 .xcvr_lsfslew = 2,
1042                 .xcvr_lsrslew = 2,
1043                 .xcvr_setup_offset = 0,
1044                 .xcvr_use_fuses = 1,
1045         },
1046 };
1047
1048 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
1049         .port_otg = false,
1050         .has_hostpc = true,
1051         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1052         .op_mode        = TEGRA_USB_OPMODE_HOST,
1053         .u_data.host = {
1054                 .vbus_gpio = -1,
1055                 .hot_plug = false,
1056                 .remote_wakeup_supported = true,
1057                 .power_off_on_suspend = true,
1058         },
1059         .u_cfg.utmi = {
1060                 .hssync_start_delay = 0,
1061                 .elastic_limit = 16,
1062                 .idle_wait_delay = 17,
1063                 .term_range_adj = 6,
1064                 .xcvr_setup = 15,
1065                 .xcvr_lsfslew = 2,
1066                 .xcvr_lsrslew = 2,
1067                 .xcvr_setup_offset = 0,
1068                 .xcvr_use_fuses = 1,
1069         },
1070 };
1071
1072 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
1073         .port_otg = false,
1074         .has_hostpc = true,
1075         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1076         .op_mode = TEGRA_USB_OPMODE_HOST,
1077         .u_data.host = {
1078                 .vbus_gpio = -1,
1079                 .hot_plug = true,
1080                 .remote_wakeup_supported = true,
1081                 .power_off_on_suspend = true,
1082         },
1083         .u_cfg.utmi = {
1084                 .hssync_start_delay = 0,
1085                 .elastic_limit = 16,
1086                 .idle_wait_delay = 17,
1087                 .term_range_adj = 6,
1088                 .xcvr_setup = 8,
1089                 .xcvr_lsfslew = 2,
1090                 .xcvr_lsrslew = 2,
1091                 .xcvr_setup_offset = 0,
1092                 .xcvr_use_fuses = 1,
1093         },
1094 };
1095
1096 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
1097         .port_otg = true,
1098         .has_hostpc = true,
1099         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1100         .op_mode = TEGRA_USB_OPMODE_HOST,
1101         .u_data.host = {
1102                 .vbus_gpio = -1,
1103                 .hot_plug = true,
1104                 .remote_wakeup_supported = true,
1105                 .power_off_on_suspend = true,
1106         },
1107         .u_cfg.utmi = {
1108                 .hssync_start_delay = 0,
1109                 .elastic_limit = 16,
1110                 .idle_wait_delay = 17,
1111                 .term_range_adj = 6,
1112                 .xcvr_setup = 15,
1113                 .xcvr_lsfslew = 2,
1114                 .xcvr_lsrslew = 2,
1115                 .xcvr_setup_offset = 0,
1116                 .xcvr_use_fuses = 1,
1117         },
1118 };
1119
1120 static struct tegra_usb_otg_data tegra_otg_pdata = {
1121         .ehci_device = &tegra_ehci1_device,
1122         .ehci_pdata = &tegra_ehci1_utmi_pdata,
1123 };
1124 #endif
1125
1126 #if defined(CONFIG_USB_SUPPORT)
1127 static void cardhu_usb_init(void)
1128 {
1129         struct board_info bi;
1130
1131         tegra_get_board_info(&bi);
1132
1133         /* OTG should be the first to be registered */
1134         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1135         platform_device_register(&tegra_otg_device);
1136
1137         /* setup the udc platform data */
1138         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1139
1140         if (bi.board_id == BOARD_PM267) {
1141                 hsic_enable_gpio = EN_HSIC_GPIO;
1142                 hsic_reset_gpio = PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
1143                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1144                 platform_device_register(&tegra_ehci2_device);
1145         } else if (bi.board_id == BOARD_E1256) {
1146                 hsic_enable_gpio = EN_HSIC_GPIO;
1147                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1148                 platform_device_register(&tegra_ehci2_device);
1149         } else if (bi.board_id == BOARD_E1186) {
1150                 tegra_ehci2_device.dev.platform_data =
1151                                                 &tegra_ehci2_hsic_xmm_pdata;
1152                 /* ehci2 registration happens in baseband-xmm-power  */
1153         } else {
1154                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_utmi_pdata;
1155                 platform_device_register(&tegra_ehci2_device);
1156         }
1157
1158         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
1159         platform_device_register(&tegra_ehci3_device);
1160
1161 }
1162 #else
1163 static void cardhu_usb_init(void) { }
1164 #endif
1165
1166 static struct baseband_power_platform_data tegra_baseband_power_data = {
1167         .baseband_type = BASEBAND_XMM,
1168         .modem = {
1169         .xmm = {
1170                         .bb_rst = XMM_GPIO_BB_RST,
1171                         .bb_on = XMM_GPIO_BB_ON,
1172                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1173                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1174                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1175                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1176                         .hsic_device = &tegra_ehci2_device,
1177                 },
1178         },
1179 };
1180
1181 static struct platform_device tegra_baseband_power_device = {
1182         .name = "baseband_xmm_power",
1183         .id = -1,
1184         .dev = {
1185                 .platform_data = &tegra_baseband_power_data,
1186         },
1187 };
1188
1189 static struct platform_device tegra_baseband_power2_device = {
1190         .name = "baseband_xmm_power2",
1191         .id = -1,
1192         .dev = {
1193                 .platform_data = &tegra_baseband_power_data,
1194         },
1195 };
1196
1197
1198 static struct tegra_pci_platform_data cardhu_pci_platform_data = {
1199         .port_status[0] = 1,
1200         .port_status[1] = 1,
1201         .port_status[2] = 1,
1202         .use_dock_detect        = 0,
1203         .gpio           = 0,
1204 };
1205
1206 static void cardhu_pci_init(void)
1207 {
1208         struct board_info board_info;
1209
1210         tegra_get_board_info(&board_info);
1211         if (board_info.board_id == BOARD_E1291) {
1212                 cardhu_pci_platform_data.port_status[0] = 0;
1213                 cardhu_pci_platform_data.port_status[1] = 0;
1214                 cardhu_pci_platform_data.port_status[2] = 1;
1215                 cardhu_pci_platform_data.use_dock_detect = 1;
1216                 cardhu_pci_platform_data.gpio = DOCK_DETECT_GPIO;
1217         } else if (board_info.board_id == BOARD_PM315) {
1218                 cardhu_pci_platform_data.port_status[0] = 1;
1219                 cardhu_pci_platform_data.port_status[1] = 0;
1220                 cardhu_pci_platform_data.port_status[2] = 1;
1221                 cardhu_pci_platform_data.use_dock_detect = 0;
1222                 cardhu_pci_platform_data.gpio = 0;
1223         }
1224         if ((board_info.board_id == BOARD_E1186) ||
1225                         (board_info.board_id == BOARD_E1187) ||
1226                         (board_info.board_id == BOARD_E1291) ||
1227                         (board_info.board_id == BOARD_PM315)) {
1228                 tegra_pci_device.dev.platform_data = &cardhu_pci_platform_data;
1229                 platform_device_register(&tegra_pci_device);
1230         }
1231 }
1232
1233 static void cardhu_modem_init(void)
1234 {
1235         struct board_info board_info;
1236         int w_disable_gpio, ret;
1237
1238         tegra_get_board_info(&board_info);
1239         switch (board_info.board_id) {
1240         case BOARD_E1291:
1241         case BOARD_E1198:
1242                 if (((board_info.board_id == BOARD_E1291) &&
1243                                 (board_info.fab < BOARD_FAB_A03)) ||
1244                         ((board_info.board_id == BOARD_E1198) &&
1245                                         (board_info.fab < BOARD_FAB_A02))) {
1246                         w_disable_gpio = TEGRA_GPIO_PH5;
1247                 } else {
1248                         w_disable_gpio = TEGRA_GPIO_PDD5;
1249                 }
1250
1251                 ret = gpio_request(w_disable_gpio, "w_disable_gpio");
1252                 if (ret < 0)
1253                         pr_err("%s: gpio_request failed for gpio %d\n",
1254                                 __func__, w_disable_gpio);
1255                 else
1256                         gpio_direction_input(w_disable_gpio);
1257
1258                 /* E1291-A04 & E1198:A02: Set PERST signal to high */
1259                 if (((board_info.board_id == BOARD_E1291) &&
1260                                 (board_info.fab >= BOARD_FAB_A04)) ||
1261                         ((board_info.board_id == BOARD_E1198) &&
1262                                         (board_info.fab >= BOARD_FAB_A02))) {
1263                         ret = gpio_request(TEGRA_GPIO_PH7, "modem_perst");
1264                         if (ret < 0) {
1265                                 pr_err("%s(): Error in allocating gpio "
1266                                         "TEGRA_GPIO_PH7\n", __func__);
1267                                 break;
1268                         }
1269                         gpio_direction_output(TEGRA_GPIO_PH7, 1);
1270                 }
1271                 break;
1272         case BOARD_E1186:
1273                 platform_device_register(&tegra_baseband_power_device);
1274                 platform_device_register(&tegra_baseband_power2_device);
1275                 break;
1276         default:
1277                 break;
1278         }
1279
1280 }
1281
1282 #ifdef CONFIG_SATA_AHCI_TEGRA
1283 static void cardhu_sata_init(void)
1284 {
1285         platform_device_register(&tegra_sata_device);
1286 }
1287 #else
1288 static void cardhu_sata_init(void) { }
1289 #endif
1290
1291 static void __init tegra_cardhu_init(void)
1292 {
1293         struct board_info board_info;
1294
1295         tegra_get_board_info(&board_info);
1296         tegra_clk_init_from_table(cardhu_clk_init_table);
1297         tegra_enable_pinmux();
1298         tegra_smmu_init();
1299         tegra_soc_device_init("cardhu");
1300         cardhu_pinmux_init();
1301         cardhu_gpio_init();
1302         cardhu_i2c_init();
1303         cardhu_spi_init();
1304         cardhu_usb_init();
1305 #ifdef CONFIG_TEGRA_EDP_LIMITS
1306         cardhu_edp_init();
1307 #endif
1308         cardhu_uart_init();
1309         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
1310         switch (board_info.board_id) {
1311         case BOARD_PM315:
1312                 platform_add_devices(beaver_audio_devices,
1313                                 ARRAY_SIZE(beaver_audio_devices));
1314                 break;
1315         default:
1316                 platform_add_devices(cardhu_audio_devices,
1317                                 ARRAY_SIZE(cardhu_audio_devices));
1318
1319                 break;
1320         }
1321         tegra_ram_console_debug_init();
1322         tegra_io_dpd_init();
1323         cardhu_sdhci_init();
1324         cardhu_regulator_init();
1325         cardhu_dtv_init();
1326         cardhu_suspend_init();
1327         cardhu_touch_init();
1328         cardhu_modem_init();
1329         cardhu_kbc_init();
1330         cardhu_scroll_init();
1331         cardhu_keys_init();
1332         cardhu_panel_init();
1333         cardhu_pmon_init();
1334         cardhu_sensors_init();
1335         cardhu_setup_bluesleep();
1336         cardhu_sata_init();
1337         cardhu_pins_state_init();
1338         cardhu_emc_init();
1339         tegra_release_bootloader_fb();
1340         cardhu_pci_init();
1341 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1342         tegra_wdt_recovery_init();
1343 #endif
1344         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1345         tegra_vibrator_init();
1346 }
1347
1348 static void __init tegra_cardhu_dt_init(void)
1349 {
1350         tegra_cardhu_init();
1351
1352         of_platform_populate(NULL,
1353                 of_default_bus_match_table, NULL, NULL);
1354 }
1355
1356 static void __init tegra_cardhu_reserve(void)
1357 {
1358 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1359         /* support 1920X1200 with 24bpp */
1360         tegra_reserve(0, SZ_8M + SZ_1M, SZ_16M);
1361 #else
1362         tegra_reserve(SZ_128M, SZ_8M, SZ_16M);
1363 #endif
1364 }
1365
1366 static const char *cardhu_dt_board_compat[] = {
1367         "nvidia,cardhu",
1368         NULL
1369 };
1370
1371 MACHINE_START(CARDHU, "cardhu")
1372         .atag_offset    = 0x100,
1373         .soc            = &tegra_soc_desc,
1374         .map_io         = tegra_map_common_io,
1375         .reserve        = tegra_cardhu_reserve,
1376         .init_early     = tegra30_init_early,
1377         .init_irq       = tegra_init_irq,
1378         .handle_irq     = gic_handle_irq,
1379         .timer          = &tegra_timer,
1380         .init_machine   = tegra_cardhu_dt_init,
1381         .restart        = tegra_assert_system_reset,
1382         .dt_compat      = cardhu_dt_board_compat,
1383 MACHINE_END