a0bd78fa8f095634c1880229070f4cf64153d1fe
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2011-2013, NVIDIA CORPORATION.  All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
36 #include <linux/spi/spi.h>
37 #include <linux/spi/rm31080a_ts.h>
38 #include <linux/i2c/atmel_mxt_ts.h>
39 #include <linux/tegra_uart.h>
40 #include <linux/memblock.h>
41 #include <linux/spi-tegra.h>
42 #include <linux/nfc/pn544.h>
43 #include <linux/rfkill-gpio.h>
44 #include <linux/of_platform.h>
45
46 #include <sound/wm8903.h>
47 #include <sound/max98095.h>
48
49 #include <asm/hardware/gic.h>
50
51 #include <mach/edp.h>
52 #include <mach/clk.h>
53 #include <mach/iomap.h>
54 #include <mach/irqs.h>
55 #include <mach/pinmux.h>
56 #include <mach/iomap.h>
57 #include <mach/io_dpd.h>
58 #include <mach/io.h>
59 #include <mach/i2s.h>
60 #include <mach/tegra_asoc_pdata.h>
61 #include <mach/tegra_rt5640_pdata.h>
62 #include <mach/tegra_wm8903_pdata.h>
63 #include <mach/usb_phy.h>
64 #include <mach/pci.h>
65 #include <mach/gpio-tegra.h>
66 #include <mach/tegra_fiq_debugger.h>
67
68 #include <asm/hardware/gic.h>
69 #include <asm/mach-types.h>
70 #include <asm/mach/arch.h>
71
72 #include "board.h"
73 #include "board-common.h"
74 #include "clock.h"
75 #include "board-cardhu.h"
76 #include "board-touch-raydium.h"
77 #include "devices.h"
78 #include "gpio-names.h"
79 #include "fuse.h"
80 #include "pm.h"
81 #include "baseband-xmm-power.h"
82 #include "wdt-recovery.h"
83 #include "common.h"
84
85 #if defined(CONFIG_BT_BLUESLEEP) || defined(CONFIG_BT_BLUESLEEP_MODULE)
86 static struct rfkill_gpio_platform_data cardhu_bt_rfkill_pdata[] = {
87         {
88                 .name           = "bt_rfkill",
89                 .shutdown_gpio  = TEGRA_GPIO_PU0,
90                 .reset_gpio     = TEGRA_GPIO_INVALID,
91                 .type           = RFKILL_TYPE_BLUETOOTH,
92         },
93 };
94
95 static struct platform_device cardhu_bt_rfkill_device = {
96         .name = "rfkill_gpio",
97         .id             = -1,
98         .dev = {
99                 .platform_data = &cardhu_bt_rfkill_pdata,
100         },
101 };
102
103 static struct resource cardhu_bluesleep_resources[] = {
104         [0] = {
105                 .name = "gpio_host_wake",
106                         .start  = TEGRA_GPIO_PU6,
107                         .end    = TEGRA_GPIO_PU6,
108                         .flags  = IORESOURCE_IO,
109         },
110         [1] = {
111                 .name = "gpio_ext_wake",
112                         .start  = TEGRA_GPIO_PU1,
113                         .end    = TEGRA_GPIO_PU1,
114                         .flags  = IORESOURCE_IO,
115         },
116         [2] = {
117                 .name = "host_wake",
118                         .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
119         },
120 };
121
122 static struct platform_device cardhu_bluesleep_device = {
123         .name           = "bluesleep",
124         .id             = -1,
125         .num_resources  = ARRAY_SIZE(cardhu_bluesleep_resources),
126         .resource       = cardhu_bluesleep_resources,
127 };
128
129 static noinline void __init cardhu_setup_bluesleep(void)
130 {
131         cardhu_bluesleep_resources[2].start =
132                 cardhu_bluesleep_resources[2].end =
133                         gpio_to_irq(TEGRA_GPIO_PU6);
134         platform_device_register(&cardhu_bluesleep_device);
135         return;
136 }
137 #elif defined CONFIG_BLUEDROID_PM
138 static struct resource cardhu_bluedroid_pm_resources[] = {
139         [0] = {
140                 .name   = "shutdown_gpio",
141                 .start  = TEGRA_GPIO_PU0,
142                 .end    = TEGRA_GPIO_PU0,
143                 .flags  = IORESOURCE_IO,
144         },
145         [1] = {
146                 .name = "host_wake",
147                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
148         },
149         [2] = {
150                 .name = "gpio_ext_wake",
151                 .start  = TEGRA_GPIO_PU1,
152                 .end    = TEGRA_GPIO_PU1,
153                 .flags  = IORESOURCE_IO,
154         },
155         [3] = {
156                 .name = "gpio_host_wake",
157                 .start  = TEGRA_GPIO_PU6,
158                 .end    = TEGRA_GPIO_PU6,
159                 .flags  = IORESOURCE_IO,
160         },
161 };
162
163 static struct platform_device cardhu_bluedroid_pm_device = {
164         .name = "bluedroid_pm",
165         .id             = 0,
166         .num_resources  = ARRAY_SIZE(cardhu_bluedroid_pm_resources),
167         .resource       = cardhu_bluedroid_pm_resources,
168 };
169
170 static noinline void __init cardhu_setup_bluedroid_pm(void)
171 {
172         cardhu_bluedroid_pm_resources[1].start =
173                 cardhu_bluedroid_pm_resources[1].end =
174                                 gpio_to_irq(TEGRA_GPIO_PU6);
175         platform_device_register(&cardhu_bluedroid_pm_device);
176         return;
177 }
178 #endif
179
180 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
181         /* name         parent          rate            enabled */
182         { "pll_m",      NULL,           0,              false},
183         { "hda",        "pll_p",        108000000,      false},
184         { "hda2codec_2x","pll_p",       48000000,       false},
185         { "pwm",        "pll_p",        3187500,        false},
186         { "blink",      "clk_32k",      32768,          true},
187         { "i2s0",       "pll_a_out0",   0,              false},
188         { "i2s1",       "pll_a_out0",   0,              false},
189         { "i2s3",       "pll_a_out0",   0,              false},
190         { "spdif_out",  "pll_a_out0",   0,              false},
191         { "d_audio",    "clk_m",        12000000,       false},
192         { "dam0",       "clk_m",        12000000,       false},
193         { "dam1",       "clk_m",        12000000,       false},
194         { "dam2",       "clk_m",        12000000,       false},
195         { "audio1",     "i2s1_sync",    0,              false},
196         { "audio3",     "i2s3_sync",    0,              false},
197         { "vi_sensor",  "pll_p",        150000000,      false},
198         { "i2c1",       "pll_p",        3200000,        false},
199         { "i2c2",       "pll_p",        3200000,        false},
200         { "i2c3",       "pll_p",        3200000,        false},
201         { "i2c4",       "pll_p",        3200000,        false},
202         { "i2c5",       "pll_p",        3200000,        false},
203         { "vi",         "pll_p",        0,              false},
204         { NULL,         NULL,           0,              0},
205 };
206
207 static struct pn544_i2c_platform_data nfc_pdata = {
208         .irq_gpio = TEGRA_GPIO_PX0,
209         .ven_gpio = TEGRA_GPIO_PP3,
210         .firm_gpio = TEGRA_GPIO_PO7,
211         };
212
213 static struct i2c_board_info __initdata cardhu_i2c_bus3_board_info[] = {
214         {
215                 I2C_BOARD_INFO("pn544", 0x28),
216                 .platform_data = &nfc_pdata,
217         },
218 };
219 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
220         .adapter_nr     = 0,
221         .bus_count      = 1,
222         .bus_clk_rate   = { 100000, 0 },
223         .scl_gpio               = {TEGRA_GPIO_PC4, 0},
224         .sda_gpio               = {TEGRA_GPIO_PC5, 0},
225         .arb_recovery = arb_lost_recovery,
226 };
227
228 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
229         .adapter_nr     = 1,
230         .bus_count      = 1,
231         .bus_clk_rate   = { 400000, 0 },
232         .is_clkon_always = true,
233         .scl_gpio               = {TEGRA_GPIO_PT5, 0},
234         .sda_gpio               = {TEGRA_GPIO_PT6, 0},
235         .arb_recovery = arb_lost_recovery,
236 };
237
238 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
239         .adapter_nr     = 2,
240         .bus_count      = 1,
241         .bus_clk_rate   = { 100000, 0 },
242         .scl_gpio               = {TEGRA_GPIO_PBB1, 0},
243         .sda_gpio               = {TEGRA_GPIO_PBB2, 0},
244         .arb_recovery = arb_lost_recovery,
245 };
246
247 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
248         .adapter_nr     = 3,
249         .bus_count      = 1,
250         .bus_clk_rate   = { 10000, 0 },
251         .scl_gpio               = {TEGRA_GPIO_PV4, 0},
252         .sda_gpio               = {TEGRA_GPIO_PV5, 0},
253         .arb_recovery = arb_lost_recovery,
254 };
255
256 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
257         .adapter_nr     = 4,
258         .bus_count      = 1,
259         .bus_clk_rate   = { 400000, 0 },
260         .scl_gpio               = {TEGRA_GPIO_PZ6, 0},
261         .sda_gpio               = {TEGRA_GPIO_PZ7, 0},
262         .arb_recovery = arb_lost_recovery,
263 };
264
265
266 #if 0
267 struct tegra_wired_jack_conf audio_wr_jack_conf = {
268         .hp_det_n = TEGRA_GPIO_PW2,
269         .en_mic_ext = TEGRA_GPIO_PX1,
270         .en_mic_int = TEGRA_GPIO_PX0,
271 };
272 #endif
273
274 static struct wm8903_platform_data cardhu_wm8903_pdata = {
275         .irq_active_low = 0,
276         .micdet_cfg = 0,
277         .micdet_delay = 100,
278         .gpio_base = CARDHU_GPIO_WM8903(0),
279         .gpio_cfg = {
280                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP1_FN_SHIFT),
281                 (WM8903_GPn_FN_DMIC_LR_CLK_OUTPUT << WM8903_GP2_FN_SHIFT) |
282                         WM8903_GP2_DIR,
283                 WM8903_GPIO_CONFIG_ZERO,
284                 0,
285                 0,
286         },
287 };
288
289 /* Equalizer filter coefs generated from the MAXIM MAX98095
290  * evkit software tool */
291 static struct max98095_eq_cfg max98095_eq_cfg[] = {
292         {
293                 .name = "FLAT",
294                 .rate = 44100,
295                 .band1 = {0x2000, 0xC002, 0x4000, 0x00E9, 0x0000},
296                 .band2 = {0x2000, 0xC00F, 0x4000, 0x02BC, 0x0000},
297                 .band3 = {0x2000, 0xC0A7, 0x4000, 0x0916, 0x0000},
298                 .band4 = {0x2000, 0xC5C2, 0x4000, 0x1A87, 0x0000},
299                 .band5 = {0x2000, 0xF6B0, 0x4000, 0x3F51, 0x0000},
300         },
301         {
302                 .name = "LOWPASS1K",
303                 .rate = 44100,
304                 .band1 = {0x205D, 0xC001, 0x3FEF, 0x002E, 0x02E0},
305                 .band2 = {0x5B9A, 0xC093, 0x3AB2, 0x088B, 0x1981},
306                 .band3 = {0x0D22, 0xC170, 0x26EA, 0x0D79, 0x32CF},
307                 .band4 = {0x0894, 0xC612, 0x01B3, 0x1B34, 0x3FFA},
308                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
309         },
310         { /* BASS=-12dB, TREBLE=+9dB, Fc=5KHz */
311                 .name = "HIBOOST",
312                 .rate = 44100,
313                 .band1 = {0x0815, 0xC001, 0x3AA4, 0x0003, 0x19A2},
314                 .band2 = {0x0815, 0xC103, 0x092F, 0x0B55, 0x3F56},
315                 .band3 = {0x0E0A, 0xC306, 0x1E5C, 0x136E, 0x3856},
316                 .band4 = {0x2459, 0xF665, 0x0CAA, 0x3F46, 0x3EBB},
317                 .band5 = {0x5BBB, 0x3FFF, 0xCEB0, 0x0000, 0x28CA},
318         },
319         { /* BASS=12dB, TREBLE=+12dB */
320                 .name = "LOUD12DB",
321                 .rate = 44100,
322                 .band1 = {0x7FC1, 0xC001, 0x3EE8, 0x0020, 0x0BC7},
323                 .band2 = {0x51E9, 0xC016, 0x3C7C, 0x033F, 0x14E9},
324                 .band3 = {0x1745, 0xC12C, 0x1680, 0x0C2F, 0x3BE9},
325                 .band4 = {0x4536, 0xD7E2, 0x0ED4, 0x31DD, 0x3E42},
326                 .band5 = {0x7FEF, 0x3FFF, 0x0BAB, 0x0000, 0x3EED},
327         },
328         {
329                 .name = "FLAT",
330                 .rate = 16000,
331                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
332                 .band2 = {0x2000, 0xC033, 0x4000, 0x0505, 0x0000},
333                 .band3 = {0x2000, 0xC268, 0x4000, 0x115F, 0x0000},
334                 .band4 = {0x2000, 0xDA62, 0x4000, 0x33C6, 0x0000},
335                 .band5 = {0x2000, 0x4000, 0x4000, 0x0000, 0x0000},
336         },
337         {
338                 .name = "LOWPASS1K",
339                 .rate = 16000,
340                 .band1 = {0x2000, 0xC004, 0x4000, 0x0141, 0x0000},
341                 .band2 = {0x5BE8, 0xC3E0, 0x3307, 0x15ED, 0x26A0},
342                 .band3 = {0x0F71, 0xD15A, 0x08B3, 0x2BD0, 0x3F67},
343                 .band4 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
344                 .band5 = {0x0815, 0x3FFF, 0xCF78, 0x0000, 0x29B7},
345         },
346         { /* BASS=-12dB, TREBLE=+9dB, Fc=2KHz */
347                 .name = "HIBOOST",
348                 .rate = 16000,
349                 .band1 = {0x0815, 0xC001, 0x3BD2, 0x0009, 0x16BF},
350                 .band2 = {0x080E, 0xC17E, 0xF653, 0x0DBD, 0x3F43},
351                 .band3 = {0x0F80, 0xDF45, 0xEE33, 0x36FE, 0x3D79},
352                 .band4 = {0x590B, 0x3FF0, 0xE882, 0x02BD, 0x3B87},
353                 .band5 = {0x4C87, 0xF3D0, 0x063F, 0x3ED4, 0x3FB1},
354         },
355         { /* BASS=12dB, TREBLE=+12dB */
356                 .name = "LOUD12DB",
357                 .rate = 16000,
358                 .band1 = {0x7FC1, 0xC001, 0x3D07, 0x0058, 0x1344},
359                 .band2 = {0x2DA6, 0xC013, 0x3CF1, 0x02FF, 0x138B},
360                 .band3 = {0x18F1, 0xC08E, 0x244D, 0x0863, 0x34B5},
361                 .band4 = {0x2BE0, 0xF385, 0x04FD, 0x3EC5, 0x3FCE},
362                 .band5 = {0x7FEF, 0x4000, 0x0BAB, 0x0000, 0x3EED},
363         },
364 };
365
366 static struct max98095_pdata cardhu_max98095_pdata = {
367         /* equalizer configuration */
368         .eq_cfg = max98095_eq_cfg,
369         .eq_cfgcnt = ARRAY_SIZE(max98095_eq_cfg),
370
371         /* Biquad filter response configuration */
372         .bq_cfg = NULL,
373         .bq_cfgcnt = 0,
374
375         /* microphone configuration */
376         .digmic_left_mode = 1,
377         .digmic_right_mode = 1,
378 };
379
380 static struct i2c_board_info __initdata cardhu_codec_wm8903_info = {
381         I2C_BOARD_INFO("wm8903", 0x1a),
382         .platform_data = &cardhu_wm8903_pdata,
383 };
384
385 static struct i2c_board_info __initdata cardhu_codec_aic326x_info = {
386         I2C_BOARD_INFO("aic3262-codec", 0x18),
387 };
388
389 static struct i2c_board_info __initdata cardhu_codec_max98095_info = {
390         I2C_BOARD_INFO("max98095", 0x10),
391         .platform_data = &cardhu_max98095_pdata,
392 };
393
394 static struct i2c_board_info __initdata rt5640_board_info = {
395         I2C_BOARD_INFO("rt5640", 0x1c),
396 };
397
398
399 static void cardhu_i2c_init(void)
400 {
401         struct board_info board_info;
402
403                 tegra_get_board_info(&board_info);
404
405         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
406         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
407         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
408         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
409         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
410
411         platform_device_register(&tegra_i2c_device5);
412         platform_device_register(&tegra_i2c_device4);
413         platform_device_register(&tegra_i2c_device3);
414         platform_device_register(&tegra_i2c_device2);
415         platform_device_register(&tegra_i2c_device1);
416
417         cardhu_codec_wm8903_info.irq = cardhu_codec_max98095_info.irq =
418                 cardhu_codec_aic326x_info.irq = gpio_to_irq(TEGRA_GPIO_CDC_IRQ);
419
420         if (board_info.board_id == BOARD_PM315)
421                 i2c_register_board_info(4, &rt5640_board_info, 1);
422         else
423                 i2c_register_board_info(4, &cardhu_codec_wm8903_info, 1);
424         i2c_register_board_info(4, &cardhu_codec_max98095_info, 1);
425         i2c_register_board_info(4, &cardhu_codec_aic326x_info, 1);
426
427         cardhu_i2c_bus3_board_info[0].irq = gpio_to_irq(TEGRA_GPIO_PX0);
428         i2c_register_board_info(2, cardhu_i2c_bus3_board_info, 1);
429 }
430
431 static struct platform_device *cardhu_uart_devices[] __initdata = {
432         &tegra_uarta_device,
433         &tegra_uartb_device,
434         &tegra_uartc_device,
435         &tegra_uartd_device,
436         &tegra_uarte_device,
437 };
438 static struct uart_clk_parent uart_parent_clk[] = {
439         [0] = {.name = "clk_m"},
440         [1] = {.name = "pll_p"},
441 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
442         [2] = {.name = "pll_m"},
443 #endif
444 };
445
446 static struct tegra_uart_platform_data cardhu_uart_pdata;
447 static struct tegra_uart_platform_data cardhu_loopback_uart_pdata;
448
449 static int __init uart_debug_init(void)
450 {
451         struct board_info board_info;
452         int debug_port_id;
453         int default_debug_port = 0;
454
455         tegra_get_board_info(&board_info);
456
457         /* UARTB is debug port
458          *       for SLT - E1186/E1187/PM269
459          *       for E1256/E1257
460          */
461         if (((board_info.sku & SKU_SLT_ULPI_SUPPORT) &&
462                 ((board_info.board_id == BOARD_E1186) ||
463                 (board_info.board_id == BOARD_E1187) ||
464                 (board_info.board_id == BOARD_PM269))) ||
465                 (board_info.board_id == BOARD_E1256) ||
466                 (board_info.board_id == BOARD_E1257))
467                         default_debug_port = 1;
468
469         debug_port_id = uart_console_debug_init(default_debug_port);
470         if (debug_port_id < 0)
471                 return debug_port_id;
472
473 #ifdef CONFIG_TEGRA_IRDA
474         if ((board_info.board_id == BOARD_E1186) ||
475                 (board_info.board_id == BOARD_E1198)) {
476                 if (debug_port_id == 1) {
477                         cardhu_irda_pdata.is_irda = false;
478                         pr_err("UARTB is not available for IrDA\n");
479                 }
480         }
481 #endif
482         cardhu_uart_devices[debug_port_id] = uart_console_debug_device;
483         return debug_port_id;
484 }
485
486 static void __init cardhu_uart_init(void)
487 {
488         struct clk *c;
489         int i;
490         struct board_info board_info;
491
492         tegra_get_board_info(&board_info);
493
494         for (i = 0; i < ARRAY_SIZE(uart_parent_clk); ++i) {
495                 c = tegra_get_clock_by_name(uart_parent_clk[i].name);
496                 if (IS_ERR_OR_NULL(c)) {
497                         pr_err("Not able to get the clock for %s\n",
498                                                 uart_parent_clk[i].name);
499                         continue;
500                 }
501                 uart_parent_clk[i].parent_clk = c;
502                 uart_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
503         }
504         cardhu_uart_pdata.parent_clk_list = uart_parent_clk;
505         cardhu_uart_pdata.parent_clk_count = ARRAY_SIZE(uart_parent_clk);
506         cardhu_loopback_uart_pdata.parent_clk_list = uart_parent_clk;
507         cardhu_loopback_uart_pdata.parent_clk_count =
508                                                 ARRAY_SIZE(uart_parent_clk);
509         cardhu_loopback_uart_pdata.is_loopback = true;
510         tegra_uarta_device.dev.platform_data = &cardhu_uart_pdata;
511         tegra_uartb_device.dev.platform_data = &cardhu_uart_pdata;
512         tegra_uartc_device.dev.platform_data = &cardhu_uart_pdata;
513         tegra_uartd_device.dev.platform_data = &cardhu_uart_pdata;
514         /* UARTE is used for loopback test purpose */
515         tegra_uarte_device.dev.platform_data = &cardhu_loopback_uart_pdata;
516
517         /* Register low speed only if it is selected */
518         if (!is_tegra_debug_uartport_hs())
519                 uart_debug_init();
520
521 #ifdef CONFIG_TEGRA_IRDA
522         if (((board_info.board_id == BOARD_E1186) ||
523                 (board_info.board_id == BOARD_E1198)) &&
524                         cardhu_irda_pdata.is_irda) {
525                 cardhu_irda_pdata.parent_clk_list = uart_parent_clk;
526                 cardhu_irda_pdata.parent_clk_count =
527                                         ARRAY_SIZE(uart_parent_clk);
528
529                 tegra_uartb_device.dev.platform_data = &cardhu_irda_pdata;
530         }
531 #endif
532
533         platform_add_devices(cardhu_uart_devices,
534                                 ARRAY_SIZE(cardhu_uart_devices));
535 }
536
537 static struct platform_device *cardhu_spi_devices[] __initdata = {
538         &tegra_spi_device4,
539 };
540
541 /*-----------------------------------------------------*/
542 /* Force Cardhu Direct Touch:
543         Valid Choices:
544         0 : Do not force Direct Touch
545         2 : RM_PLATFORM_C210 : Cardhu 10" J-Touch Panel
546         4 : RM_PLATFORM_P005 ; Pluto 5" J-Touch Panel
547 */
548 #define CARDHU_DT_PLATFORM      0 /* RM_PLATFORM_C210 */
549
550 static struct platform_device *touch_spi_device[] __initdata = {
551         &tegra_spi_device1,
552 };
553
554 struct spi_clk_parent spi_parent_clk[] = {
555         [0] = {.name = "pll_p"},
556 #ifndef CONFIG_TEGRA_PLLM_RESTRICTED
557         [1] = {.name = "pll_m"},
558         [2] = {.name = "clk_m"},
559 #else
560         [1] = {.name = "clk_m"},
561 #endif
562 };
563
564 static struct tegra_spi_platform_data cardhu_spi_pdata = {
565         .is_dma_based           = true,
566         .max_dma_buffer         = (16 * 1024),
567         .is_clkon_always        = false,
568         .max_rate               = 100000000,
569 };
570
571 static void __init cardhu_spi_init(void)
572 {
573         int i;
574         struct clk *c;
575         struct board_info board_info, display_board_info;
576
577         tegra_get_board_info(&board_info);
578         tegra_get_display_board_info(&display_board_info);
579
580         for (i = 0; i < ARRAY_SIZE(spi_parent_clk); ++i) {
581                 c = tegra_get_clock_by_name(spi_parent_clk[i].name);
582                 if (IS_ERR_OR_NULL(c)) {
583                         pr_err("Not able to get the clock for %s\n",
584                                                 spi_parent_clk[i].name);
585                         continue;
586                 }
587                 spi_parent_clk[i].parent_clk = c;
588                 spi_parent_clk[i].fixed_clk_rate = clk_get_rate(c);
589         }
590         cardhu_spi_pdata.parent_clk_list = spi_parent_clk;
591         cardhu_spi_pdata.parent_clk_count = ARRAY_SIZE(spi_parent_clk);
592         tegra_spi_device4.dev.platform_data = &cardhu_spi_pdata;
593         platform_add_devices(cardhu_spi_devices,
594                                 ARRAY_SIZE(cardhu_spi_devices));
595
596         if ((display_board_info.board_id == BOARD_DISPLAY_PM313)
597                                                 || CARDHU_DT_PLATFORM) {
598                 platform_add_devices(touch_spi_device,
599                                 ARRAY_SIZE(touch_spi_device));
600         }
601
602         if (board_info.board_id == BOARD_E1198) {
603                 tegra_spi_device2.dev.platform_data = &cardhu_spi_pdata;
604                 platform_device_register(&tegra_spi_device2);
605                 tegra_spi_slave_device1.dev.platform_data = &cardhu_spi_pdata;
606                 platform_device_register(&tegra_spi_slave_device1);
607         }
608 }
609
610 static void __init cardhu_dtv_init(void)
611 {
612         struct board_info board_info;
613
614         tegra_get_board_info(&board_info);
615
616         if (board_info.board_id == BOARD_E1186)
617                 platform_device_register(&tegra_dtv_device);
618 }
619
620 static struct resource tegra_rtc_resources[] = {
621         [0] = {
622                 .start = TEGRA_RTC_BASE,
623                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
624                 .flags = IORESOURCE_MEM,
625         },
626         [1] = {
627                 .start = INT_RTC,
628                 .end = INT_RTC,
629                 .flags = IORESOURCE_IRQ,
630         },
631 };
632
633 static struct platform_device tegra_rtc_device = {
634         .name = "tegra_rtc",
635         .id   = -1,
636         .resource = tegra_rtc_resources,
637         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
638 };
639
640 static struct tegra_asoc_platform_data cardhu_audio_wm8903_pdata = {
641         .gpio_spkr_en           = TEGRA_GPIO_SPKR_EN,
642         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
643         .gpio_hp_mute           = -1,
644         .gpio_int_mic_en        = -1,
645         .gpio_ext_mic_en        = -1,
646         .i2s_param[HIFI_CODEC]  = {
647                 .audio_port_id  = 0,
648                 .is_i2s_master  = 1,
649                 .i2s_mode       = TEGRA_DAIFMT_I2S,
650         },
651         .i2s_param[BASEBAND]    = {
652                 .audio_port_id  = -1,
653         },
654         .i2s_param[BT_SCO]      = {
655                 .audio_port_id  = 3,
656                 .is_i2s_master  = 1,
657                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
658         },
659 };
660
661 static struct tegra_asoc_platform_data cardhu_audio_max98095_pdata = {
662         .gpio_spkr_en           = -1,
663         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
664         .gpio_hp_mute           = -1,
665         .gpio_int_mic_en        = -1,
666         .gpio_ext_mic_en        = -1,
667         .i2s_param[HIFI_CODEC]  = {
668                 .audio_port_id  = 0,
669                 .is_i2s_master  = 1,
670                 .i2s_mode       = TEGRA_DAIFMT_I2S,
671         },
672         .i2s_param[BASEBAND]    = {
673                 .audio_port_id  = -1,
674         },
675         .i2s_param[BT_SCO]      = {
676                 .audio_port_id  = 3,
677                 .is_i2s_master  = 1,
678                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
679         },
680 };
681
682 static struct platform_device cardhu_audio_wm8903_device = {
683         .name   = "tegra-snd-wm8903",
684         .id     = 0,
685         .dev    = {
686                 .platform_data = &cardhu_audio_wm8903_pdata,
687         },
688 };
689
690 static struct platform_device cardhu_audio_max98095_device = {
691         .name   = "tegra-snd-max98095",
692         .id     = 0,
693         .dev    = {
694                 .platform_data = &cardhu_audio_max98095_pdata,
695         },
696 };
697
698 static struct tegra_asoc_platform_data cardhu_audio_aic326x_pdata = {
699         .gpio_spkr_en           = -1,
700         .gpio_hp_det            = TEGRA_GPIO_HP_DET,
701         .gpio_hp_mute           = -1,
702         .gpio_int_mic_en        = -1,
703         .gpio_ext_mic_en        = -1,
704         /*defaults for Verbier-Cardhu board with TI AIC326X codec*/
705         .i2s_param[HIFI_CODEC]  = {
706                 .audio_port_id  = 0,
707                 .is_i2s_master  = 1,
708                 .i2s_mode       = TEGRA_DAIFMT_I2S,
709                 .sample_size    = 16,
710         },
711         .i2s_param[BT_SCO]      = {
712                 .sample_size    = 16,
713                 .audio_port_id  = 3,
714                 .is_i2s_master  = 1,
715                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
716         },
717 };
718
719 static struct platform_device cardhu_audio_aic326x_device = {
720         .name   = "tegra-snd-aic326x",
721         .id     = 0,
722         .dev    = {
723                 .platform_data  = &cardhu_audio_aic326x_pdata,
724         },
725 };
726
727 static struct tegra_asoc_platform_data beaver_audio_rt5640_pdata = {
728         .codec_name = "rt5640.4-001c",
729         .codec_dai_name = "rt5640-aif1",
730         .gpio_spkr_en           = TEGRA_GPIO_RTL_SPKR_EN,
731         .gpio_hp_det            = TEGRA_GPIO_RTL_HP_DET,
732         .gpio_hp_mute           = -1,
733         .gpio_int_mic_en        = TEGRA_GPIO_RTL_INT_MIC_EN,
734         .gpio_ext_mic_en        = -1,   /* TEGRA_GPIO_EXT_MIC_EN,*/
735                 .i2s_param[HIFI_CODEC]  = {
736                 .audio_port_id  = 0,
737                 .is_i2s_master  = 1,
738                 .i2s_mode       = TEGRA_DAIFMT_I2S,
739         },
740         .i2s_param[BASEBAND]    = {
741                 .audio_port_id  = -1,
742         },
743         .i2s_param[BT_SCO]      = {
744                 .audio_port_id  = 3,
745                 .is_i2s_master  = 1,
746                 .i2s_mode       = TEGRA_DAIFMT_DSP_A,
747         },
748 };
749
750 static struct platform_device beaver_audio_rt5640_device = {
751         .name   = "tegra-snd-rt5640",
752         .id     = 0,
753         .dev    = {
754                 .platform_data = &beaver_audio_rt5640_pdata,
755         },
756 };
757
758
759 static struct platform_device *cardhu_devices[] __initdata = {
760         &tegra_pmu_device,
761         &tegra_rtc_device,
762         &tegra_udc_device,
763         &tegra_wdt0_device,
764 #if defined(CONFIG_TEGRA_AVP)
765         &tegra_avp_device,
766 #endif
767 #if defined(CONFIG_CRYPTO_DEV_TEGRA_SE)
768         &tegra_se_device,
769 #endif
770         &tegra_ahub_device,
771         &tegra_dam_device0,
772         &tegra_dam_device1,
773         &tegra_dam_device2,
774         &tegra_i2s_device0,
775         &tegra_i2s_device1,
776         &tegra_i2s_device3,
777         &tegra_spdif_device,
778         &spdif_dit_device,
779         &bluetooth_dit_device,
780         &baseband_dit_device,
781 #if defined(CONFIG_BT_BLUESLEEP) || defined(CONFIG_BT_BLUESLEEP_MODULE)
782         &cardhu_bt_rfkill_device,
783 #endif
784         &tegra_pcm_device,
785         &cardhu_audio_max98095_device,
786         &cardhu_audio_aic326x_device,
787         &tegra_hda_device,
788         &tegra_cec_device,
789 #if defined(CONFIG_CRYPTO_DEV_TEGRA_AES)
790         &tegra_aes_device,
791 #endif
792 };
793
794 static u8 read_chg(void)
795 {
796         return gpio_get_value(TEGRA_GPIO_PH4);
797 }
798
799 static struct platform_device *cardhu_audio_devices[] __initdata = {
800                 &cardhu_audio_wm8903_device,
801
802 };
803
804 static struct platform_device *beaver_audio_devices[] __initdata = {
805                 &beaver_audio_rt5640_device,
806
807 };
808
809 #define MXT_CFG_NAME            "Android_Cardhu_2012-12-18.cfg"
810
811 static struct mxt_platform_data atmel_mxt_info = {
812         .irqflags       = IRQF_ONESHOT | IRQF_TRIGGER_LOW,
813         .read_chg       = &read_chg,
814         .mxt_cfg_name   = MXT_CFG_NAME,
815 };
816
817 static struct i2c_board_info __initdata atmel_i2c_info[] = {
818         {
819                 I2C_BOARD_INFO("atmel_mxt_ts", MXT1386_I2C_ADDR3),
820                 .flags = I2C_CLIENT_WAKE,
821                 .platform_data = &atmel_mxt_info,
822         }
823 };
824
825 static struct i2c_board_info __initdata e1506_atmel_i2c_info[] = {
826         {
827                 I2C_BOARD_INFO("atmel_mxt_ts", MXT224_I2C_ADDR1),
828                 .flags = I2C_CLIENT_WAKE,
829                 .platform_data = &atmel_mxt_info,
830         }
831 };
832
833 /* Raydium touchscreen                     Driver data */
834 static __initdata struct tegra_clk_init_table spi_clk_init_table[] = {
835         /* name         parent          rate            enabled */
836         { "sbc1",       "pll_p",        52000000,       true},
837         { NULL,         NULL,           0,              0},
838 };
839
840 static __initdata struct tegra_clk_init_table touch_clk_init_table[] = {
841         /* name         parent          rate            enabled */
842         { "extern3",    "pll_p",        41000000,       true},
843         { "clk_out_3",  "extern3",      40800000,       true},
844         { NULL,         NULL,           0,              0},
845 };
846
847 struct rm_spi_ts_platform_data rm31080ts_cardhu_data = {
848         .gpio_reset = 0,
849         .config = 0,
850         .platform_id = RM_PLATFORM_C210,
851         .name_of_clock = "clk_out_3",
852         .name_of_clock_con = "extern3",
853 };
854
855 struct spi_board_info rm31080a_cardhu_spi_board[1] = {
856         {
857          .modalias = "rm_ts_spidev",
858          .bus_num = 0,
859          .chip_select = 0,
860          .max_speed_hz = 13 * 1000 * 1000,
861          .mode = SPI_MODE_0,
862          .platform_data = &rm31080ts_cardhu_data,
863          },
864 };
865
866 static int __init cardhu_touch_init(void)
867 {
868         struct board_info BoardInfo, DisplayBoardInfo;
869         int ret;
870
871         tegra_get_board_info(&BoardInfo);
872         tegra_get_display_board_info(&DisplayBoardInfo);
873         if ((DisplayBoardInfo.board_id == BOARD_DISPLAY_PM313)
874                                                 || CARDHU_DT_PLATFORM) {
875                 tegra_clk_init_from_table(spi_clk_init_table);
876                 tegra_clk_init_from_table(touch_clk_init_table);
877                 tegra_clk_prepare_enable(tegra_get_clock_by_name("clk_out_3"));
878                 rm31080a_cardhu_spi_board[0].irq = gpio_to_irq(TOUCH_GPIO_IRQ_RAYDIUM_SPI);
879                 touch_init_raydium(TOUCH_GPIO_IRQ_RAYDIUM_SPI,
880                                         TOUCH_GPIO_RST_RAYDIUM_SPI,
881                                         &rm31080ts_cardhu_data,
882                                         &rm31080a_cardhu_spi_board[0],
883                                         ARRAY_SIZE(rm31080a_cardhu_spi_board));
884         } else {
885                 ret = gpio_request(TEGRA_GPIO_PH4, "atmel-irq");
886                 if (ret < 0) {
887                         pr_err("%s() Error in gpio_request() for gpio %d\n",
888                                         __func__, ret);
889                 }
890                 ret = gpio_direction_input(TEGRA_GPIO_PH4);
891                 if (ret < 0) {
892                         pr_err("%s() Error in setting gpio %d to in/out\n",
893                                          __func__, ret);
894                         gpio_free(TEGRA_GPIO_PH4);
895                 }
896                 ret = gpio_request(TEGRA_GPIO_PH6, "atmel-reset");
897                 if (ret < 0) {
898                         pr_err("%s() Error in gpio_request() for gpio %d\n",
899                                         __func__, ret);
900                 }
901                 ret = gpio_direction_output(TEGRA_GPIO_PH6, 0);
902                 if (ret < 0) {
903                         pr_err("%s() Error in setting gpio %d to in/out\n",
904                                          __func__, ret);
905                         gpio_free(TEGRA_GPIO_PH6);
906                 }
907                 msleep(1);
908                 gpio_set_value(TEGRA_GPIO_PH6, 1);
909                 msleep(100);
910
911                 tegra_get_board_info(&BoardInfo);
912                 if ((BoardInfo.sku & SKU_TOUCH_MASK) == SKU_TOUCH_2000)
913                         strncpy(atmel_mxt_info.mxt_cfg_name,
914                                 "Android_Cardhu_SKU2000_2012-12-18.cfg",
915                                 CFG_NAME_SIZE);
916
917                 if (DisplayBoardInfo.board_id == BOARD_DISPLAY_E1506) {
918                         strncpy(atmel_mxt_info.mxt_cfg_name,
919                         "Android_Cardhu_Verbier_E1506_2012-12-18.cfg",
920                         CFG_NAME_SIZE);
921                         e1506_atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH4);
922                         i2c_register_board_info(1, e1506_atmel_i2c_info, 1);
923                 } else {
924                         atmel_i2c_info[0].irq = gpio_to_irq(TEGRA_GPIO_PH4);
925                         i2c_register_board_info(1, atmel_i2c_info, 1);
926                 }
927         }
928
929         return 0;
930 }
931
932 #if defined(CONFIG_USB_SUPPORT)
933
934 static void cardu_usb_hsic_postsupend(void)
935 {
936 #ifdef CONFIG_TEGRA_BB_XMM_POWER
937         baseband_xmm_set_power_status(BBXMM_PS_L2);
938 #endif
939 }
940
941 static void cardu_usb_hsic_preresume(void)
942 {
943 #ifdef CONFIG_TEGRA_BB_XMM_POWER
944         baseband_xmm_set_power_status(BBXMM_PS_L2TOL0);
945 #endif
946 }
947
948 static void cardu_usb_hsic_phy_ready(void)
949 {
950 #ifdef CONFIG_TEGRA_BB_XMM_POWER
951         baseband_xmm_set_power_status(BBXMM_PS_L0);
952 #endif
953 }
954
955 static void cardu_usb_hsic_phy_off(void)
956 {
957 #ifdef CONFIG_TEGRA_BB_XMM_POWER
958         baseband_xmm_set_power_status(BBXMM_PS_L3);
959 #endif
960 }
961
962 static struct tegra_usb_phy_platform_ops hsic_xmm_plat_ops = {
963         .post_suspend = cardu_usb_hsic_postsupend,
964         .pre_resume = cardu_usb_hsic_preresume,
965         .port_power = cardu_usb_hsic_phy_ready,
966         .post_phy_off = cardu_usb_hsic_phy_off,
967 };
968
969 static struct tegra_usb_platform_data tegra_ehci2_hsic_xmm_pdata = {
970         .port_otg = false,
971         .has_hostpc = true,
972         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
973         .op_mode        = TEGRA_USB_OPMODE_HOST,
974         .u_data.host = {
975                 .vbus_gpio = -1,
976                 .hot_plug = false,
977                 .remote_wakeup_supported = false,
978                 .power_off_on_suspend = false,
979         },
980         .ops = &hsic_xmm_plat_ops,
981 };
982 #endif
983
984 static int hsic_enable_gpio = -1;
985 static int hsic_reset_gpio = -1;
986
987 void hsic_platform_open(void)
988 {
989         int reset_gpio = -1, enable_gpio = -1;
990
991         if (hsic_enable_gpio != -1)
992                 enable_gpio = gpio_request(hsic_enable_gpio, "uhsic_enable");
993         if (hsic_reset_gpio != -1)
994                 reset_gpio = gpio_request(hsic_reset_gpio, "uhsic_reset");
995         /* hsic enable signal deasserted, hsic reset asserted */
996         if (!enable_gpio)
997                 gpio_direction_output(hsic_enable_gpio, 0 /* deasserted */);
998         if (!reset_gpio)
999                 gpio_direction_output(hsic_reset_gpio, 0 /* asserted */);
1000         /* keep hsic reset asserted for 1 ms */
1001         udelay(1000);
1002         /* enable (power on) hsic */
1003         if (!enable_gpio)
1004                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
1005         udelay(1000);
1006         /* deassert reset */
1007         if (!reset_gpio)
1008                 gpio_set_value_cansleep(hsic_reset_gpio, 1);
1009
1010 }
1011
1012 void hsic_platform_close(void)
1013 {
1014         if (hsic_enable_gpio != -1) {
1015                 gpio_set_value(hsic_enable_gpio, 0);
1016                 gpio_free(hsic_enable_gpio);
1017         }
1018         if (hsic_reset_gpio != -1) {
1019                 gpio_set_value(hsic_reset_gpio, 0);
1020                 gpio_free(hsic_reset_gpio);
1021         }
1022 }
1023
1024 void hsic_power_on(void)
1025 {
1026         if (hsic_enable_gpio != -1) {
1027                 gpio_set_value_cansleep(hsic_enable_gpio, 1);
1028                 udelay(1000);
1029         }
1030 }
1031
1032 void hsic_power_off(void)
1033 {
1034         if (hsic_enable_gpio != -1) {
1035                 gpio_set_value_cansleep(hsic_enable_gpio, 0);
1036                 udelay(1000);
1037         }
1038 }
1039
1040 #if defined(CONFIG_USB_SUPPORT)
1041 static struct tegra_usb_phy_platform_ops hsic_plat_ops = {
1042         .open = hsic_platform_open,
1043         .close = hsic_platform_close,
1044         .pre_phy_on = hsic_power_on,
1045         .post_phy_off = hsic_power_off,
1046 };
1047
1048 static struct tegra_usb_platform_data tegra_ehci2_hsic_pdata = {
1049         .port_otg = false,
1050         .has_hostpc = true,
1051         .phy_intf = TEGRA_USB_PHY_INTF_HSIC,
1052         .op_mode        = TEGRA_USB_OPMODE_HOST,
1053         .u_data.host = {
1054                 .vbus_gpio = -1,
1055                 .hot_plug = false,
1056                 .remote_wakeup_supported = false,
1057                 .power_off_on_suspend = false,
1058         },
1059         .ops = &hsic_plat_ops,
1060 };
1061
1062 static struct tegra_usb_platform_data tegra_udc_pdata = {
1063         .port_otg = true,
1064         .has_hostpc = true,
1065         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1066         .op_mode = TEGRA_USB_OPMODE_DEVICE,
1067         .u_data.dev = {
1068                 .vbus_pmu_irq = 0,
1069                 .vbus_gpio = -1,
1070                 .charging_supported = false,
1071                 .remote_wakeup_supported = false,
1072         },
1073         .u_cfg.utmi = {
1074                 .hssync_start_delay = 0,
1075                 .elastic_limit = 16,
1076                 .idle_wait_delay = 17,
1077                 .term_range_adj = 6,
1078                 .xcvr_setup = 8,
1079                 .xcvr_lsfslew = 2,
1080                 .xcvr_lsrslew = 2,
1081                 .xcvr_setup_offset = 0,
1082                 .xcvr_use_fuses = 1,
1083         },
1084 };
1085
1086 static struct tegra_usb_platform_data tegra_ehci2_utmi_pdata = {
1087         .port_otg = false,
1088         .has_hostpc = true,
1089         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1090         .op_mode        = TEGRA_USB_OPMODE_HOST,
1091         .u_data.host = {
1092                 .vbus_gpio = -1,
1093                 .hot_plug = true,
1094                 .remote_wakeup_supported = true,
1095                 .power_off_on_suspend = true,
1096         },
1097         .u_cfg.utmi = {
1098                 .hssync_start_delay = 0,
1099                 .elastic_limit = 16,
1100                 .idle_wait_delay = 17,
1101                 .term_range_adj = 6,
1102                 .xcvr_setup = 15,
1103                 .xcvr_lsfslew = 2,
1104                 .xcvr_lsrslew = 2,
1105                 .xcvr_setup_offset = 0,
1106                 .xcvr_use_fuses = 1,
1107         },
1108 };
1109
1110 static struct tegra_usb_platform_data tegra_ehci3_utmi_pdata = {
1111         .port_otg = false,
1112         .has_hostpc = true,
1113         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1114         .op_mode = TEGRA_USB_OPMODE_HOST,
1115         .u_data.host = {
1116                 .vbus_gpio = -1,
1117                 .hot_plug = true,
1118                 .remote_wakeup_supported = true,
1119                 .power_off_on_suspend = true,
1120         },
1121         .u_cfg.utmi = {
1122                 .hssync_start_delay = 0,
1123                 .elastic_limit = 16,
1124                 .idle_wait_delay = 17,
1125                 .term_range_adj = 6,
1126                 .xcvr_setup = 8,
1127                 .xcvr_lsfslew = 2,
1128                 .xcvr_lsrslew = 2,
1129                 .xcvr_setup_offset = 0,
1130                 .xcvr_use_fuses = 1,
1131         },
1132 };
1133
1134 static struct tegra_usb_platform_data tegra_ehci1_utmi_pdata = {
1135         .port_otg = true,
1136         .has_hostpc = true,
1137         .phy_intf = TEGRA_USB_PHY_INTF_UTMI,
1138         .op_mode = TEGRA_USB_OPMODE_HOST,
1139         .u_data.host = {
1140                 .vbus_gpio = -1,
1141                 .hot_plug = true,
1142                 .remote_wakeup_supported = true,
1143                 .power_off_on_suspend = true,
1144         },
1145         .u_cfg.utmi = {
1146                 .hssync_start_delay = 0,
1147                 .elastic_limit = 16,
1148                 .idle_wait_delay = 17,
1149                 .term_range_adj = 6,
1150                 .xcvr_setup = 15,
1151                 .xcvr_lsfslew = 2,
1152                 .xcvr_lsrslew = 2,
1153                 .xcvr_setup_offset = 0,
1154                 .xcvr_use_fuses = 1,
1155         },
1156 };
1157
1158 static struct tegra_usb_otg_data tegra_otg_pdata = {
1159         .ehci_device = &tegra_ehci1_device,
1160         .ehci_pdata = &tegra_ehci1_utmi_pdata,
1161 };
1162 #endif
1163
1164 #if defined(CONFIG_USB_SUPPORT)
1165 static void cardhu_usb_init(void)
1166 {
1167         struct board_info bi;
1168
1169         tegra_get_board_info(&bi);
1170
1171         /* OTG should be the first to be registered */
1172         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
1173         platform_device_register(&tegra_otg_device);
1174
1175         /* setup the udc platform data */
1176         tegra_udc_device.dev.platform_data = &tegra_udc_pdata;
1177
1178         if (bi.board_id == BOARD_PM267) {
1179                 hsic_enable_gpio = EN_HSIC_GPIO;
1180                 hsic_reset_gpio = PM267_SMSC4640_HSIC_HUB_RESET_GPIO;
1181                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1182                 platform_device_register(&tegra_ehci2_device);
1183         } else if (bi.board_id == BOARD_E1256) {
1184                 hsic_enable_gpio = EN_HSIC_GPIO;
1185                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_hsic_pdata;
1186                 platform_device_register(&tegra_ehci2_device);
1187         } else if (bi.board_id == BOARD_E1186) {
1188                 tegra_ehci2_device.dev.platform_data =
1189                                                 &tegra_ehci2_hsic_xmm_pdata;
1190                 /* ehci2 registration happens in baseband-xmm-power  */
1191         }
1192
1193         tegra_ehci3_device.dev.platform_data = &tegra_ehci3_utmi_pdata;
1194         platform_device_register(&tegra_ehci3_device);
1195
1196 }
1197 #else
1198 static void cardhu_usb_init(void) { }
1199 #endif
1200
1201 static struct baseband_power_platform_data tegra_baseband_power_data = {
1202         .baseband_type = BASEBAND_XMM,
1203         .modem = {
1204         .xmm = {
1205                         .bb_rst = XMM_GPIO_BB_RST,
1206                         .bb_on = XMM_GPIO_BB_ON,
1207                         .ipc_bb_wake = XMM_GPIO_IPC_BB_WAKE,
1208                         .ipc_ap_wake = XMM_GPIO_IPC_AP_WAKE,
1209                         .ipc_hsic_active = XMM_GPIO_IPC_HSIC_ACTIVE,
1210                         .ipc_hsic_sus_req = XMM_GPIO_IPC_HSIC_SUS_REQ,
1211                         .hsic_device = &tegra_ehci2_device,
1212                 },
1213         },
1214 };
1215
1216 static struct platform_device tegra_baseband_power_device = {
1217         .name = "baseband_xmm_power",
1218         .id = -1,
1219         .dev = {
1220                 .platform_data = &tegra_baseband_power_data,
1221         },
1222 };
1223
1224 static struct platform_device tegra_baseband_power2_device = {
1225         .name = "baseband_xmm_power2",
1226         .id = -1,
1227         .dev = {
1228                 .platform_data = &tegra_baseband_power_data,
1229         },
1230 };
1231
1232
1233 static struct tegra_pci_platform_data cardhu_pci_platform_data = {
1234         .port_status[0] = 1,
1235         .port_status[1] = 1,
1236         .port_status[2] = 1,
1237         .use_dock_detect        = 0,
1238         .gpio           = 0,
1239 };
1240
1241 static void cardhu_pci_init(void)
1242 {
1243         struct board_info board_info;
1244
1245         tegra_get_board_info(&board_info);
1246         if (board_info.board_id == BOARD_E1291) {
1247                 cardhu_pci_platform_data.port_status[0] = 0;
1248                 cardhu_pci_platform_data.port_status[1] = 0;
1249                 cardhu_pci_platform_data.port_status[2] = 1;
1250                 cardhu_pci_platform_data.use_dock_detect = 1;
1251                 cardhu_pci_platform_data.gpio = DOCK_DETECT_GPIO;
1252         } else if (board_info.board_id == BOARD_PM315) {
1253                 cardhu_pci_platform_data.port_status[0] = 1;
1254                 cardhu_pci_platform_data.port_status[1] = 0;
1255                 cardhu_pci_platform_data.port_status[2] = 1;
1256                 cardhu_pci_platform_data.use_dock_detect = 0;
1257                 cardhu_pci_platform_data.gpio = 0;
1258         }
1259         if ((board_info.board_id == BOARD_E1186) ||
1260                         (board_info.board_id == BOARD_E1187) ||
1261                         (board_info.board_id == BOARD_E1291) ||
1262                         (board_info.board_id == BOARD_PM315)) {
1263                 tegra_pci_device.dev.platform_data = &cardhu_pci_platform_data;
1264                 platform_device_register(&tegra_pci_device);
1265         }
1266 }
1267
1268 static void cardhu_modem_init(void)
1269 {
1270         struct board_info board_info;
1271         int w_disable_gpio, ret;
1272
1273         int modem_id = tegra_get_modem_id();
1274
1275         tegra_get_board_info(&board_info);
1276         switch (board_info.board_id) {
1277         case BOARD_E1291:
1278         case BOARD_E1198:
1279                 if (((board_info.board_id == BOARD_E1291) &&
1280                                 (board_info.fab < BOARD_FAB_A03)) ||
1281                         ((board_info.board_id == BOARD_E1198) &&
1282                                         (board_info.fab < BOARD_FAB_A02))) {
1283                         w_disable_gpio = TEGRA_GPIO_PH5;
1284                 } else {
1285                         w_disable_gpio = TEGRA_GPIO_PDD5;
1286                 }
1287
1288                 ret = gpio_request(w_disable_gpio, "w_disable_gpio");
1289                 if (ret < 0)
1290                         pr_err("%s: gpio_request failed for gpio %d\n",
1291                                 __func__, w_disable_gpio);
1292                 else
1293                         gpio_direction_input(w_disable_gpio);
1294
1295                 /* E1291-A04 & E1198:A02: Set PERST signal to high */
1296                 if (((board_info.board_id == BOARD_E1291) &&
1297                                 (board_info.fab >= BOARD_FAB_A04)) ||
1298                         ((board_info.board_id == BOARD_E1198) &&
1299                                         (board_info.fab >= BOARD_FAB_A02))) {
1300                         ret = gpio_request(TEGRA_GPIO_PH7, "modem_perst");
1301                         if (ret < 0) {
1302                                 pr_err("%s(): Error in allocating gpio "
1303                                         "TEGRA_GPIO_PH7\n", __func__);
1304                                 break;
1305                         }
1306                         gpio_direction_output(TEGRA_GPIO_PH7, 1);
1307                 }
1308                 break;
1309         case BOARD_E1186:
1310                 platform_device_register(&tegra_baseband_power_device);
1311                 platform_device_register(&tegra_baseband_power2_device);
1312                 break;
1313         default:
1314                 break;
1315         }
1316
1317         if (modem_id == TEGRA_BB_TANGO) {
1318                 tegra_ehci2_device.dev.platform_data = &tegra_ehci2_utmi_pdata;
1319                 platform_device_register(&tegra_ehci2_device);
1320         }
1321
1322 }
1323
1324 #ifdef CONFIG_SATA_AHCI_TEGRA
1325 static void cardhu_sata_init(void)
1326 {
1327         platform_device_register(&tegra_sata_device);
1328 }
1329 #else
1330 static void cardhu_sata_init(void) { }
1331 #endif
1332
1333 static void __init tegra_cardhu_init(void)
1334 {
1335         struct board_info board_info;
1336
1337         tegra_get_board_info(&board_info);
1338         tegra_clk_init_from_table(cardhu_clk_init_table);
1339         tegra_enable_pinmux();
1340         tegra_smmu_init();
1341         tegra_soc_device_init("cardhu");
1342         cardhu_pinmux_init();
1343         cardhu_gpio_init();
1344         cardhu_i2c_init();
1345         cardhu_spi_init();
1346         cardhu_usb_init();
1347 #ifdef CONFIG_TEGRA_EDP_LIMITS
1348         cardhu_edp_init();
1349 #endif
1350         cardhu_uart_init();
1351         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
1352         switch (board_info.board_id) {
1353         case BOARD_PM315:
1354                 platform_add_devices(beaver_audio_devices,
1355                                 ARRAY_SIZE(beaver_audio_devices));
1356                 break;
1357         default:
1358                 platform_add_devices(cardhu_audio_devices,
1359                                 ARRAY_SIZE(cardhu_audio_devices));
1360
1361                 break;
1362         }
1363         tegra_ram_console_debug_init();
1364         tegra_io_dpd_init();
1365         cardhu_sdhci_init();
1366         cardhu_regulator_init();
1367         cardhu_dtv_init();
1368         cardhu_suspend_init();
1369         cardhu_touch_init();
1370         cardhu_modem_init();
1371         cardhu_kbc_init();
1372         cardhu_scroll_init();
1373         cardhu_keys_init();
1374         cardhu_panel_init();
1375         cardhu_pmon_init();
1376         cardhu_sensors_init();
1377 #if defined(CONFIG_BT_BLUESLEEP) || defined(CONFIG_BT_BLUESLEEP_MODULE)
1378         cardhu_setup_bluesleep();
1379 #elif defined CONFIG_BLUEDROID_PM
1380         cardhu_setup_bluedroid_pm();
1381 #endif
1382         /*
1383          * if you want to add support for SATA in your board
1384          * then add your board check here like
1385          * board_info.board_id == BOARD_E1186
1386          */
1387         if (board_info.board_id == BOARD_PM315)
1388                 cardhu_sata_init();
1389         cardhu_pins_state_init();
1390         cardhu_emc_init();
1391         tegra_release_bootloader_fb();
1392         cardhu_pci_init();
1393 #ifdef CONFIG_TEGRA_WDT_RECOVERY
1394         tegra_wdt_recovery_init();
1395 #endif
1396         tegra_serial_debug_init(TEGRA_UARTD_BASE, INT_WDT_CPU, NULL, -1, -1);
1397         tegra_vibrator_init();
1398         tegra_register_fuse();
1399 }
1400
1401 static void __init tegra_cardhu_dt_init(void)
1402 {
1403         tegra_cardhu_init();
1404
1405 #ifdef CONFIG_USE_OF
1406         of_platform_populate(NULL,
1407                 of_default_bus_match_table, NULL, NULL);
1408 #endif
1409 }
1410
1411 static void __init tegra_cardhu_reserve(void)
1412 {
1413 #if defined(CONFIG_NVMAP_CONVERT_CARVEOUT_TO_IOVMM)
1414         /* support 1920X1200 with 24bpp */
1415         tegra_reserve(0, SZ_8M + SZ_1M, SZ_16M);
1416 #else
1417         tegra_reserve(SZ_128M, SZ_8M, SZ_16M);
1418 #endif
1419 }
1420
1421 static const char *cardhu_dt_board_compat[] = {
1422         "nvidia,cardhu",
1423         NULL
1424 };
1425
1426 MACHINE_START(CARDHU, "cardhu")
1427         .atag_offset    = 0x100,
1428         .soc            = &tegra_soc_desc,
1429         .map_io         = tegra_map_common_io,
1430         .reserve        = tegra_cardhu_reserve,
1431         .init_early     = tegra30_init_early,
1432         .init_irq       = tegra_init_irq,
1433         .handle_irq     = gic_handle_irq,
1434         .timer          = &tegra_timer,
1435         .init_machine   = tegra_cardhu_dt_init,
1436         .restart        = tegra_assert_system_reset,
1437         .dt_compat      = cardhu_dt_board_compat,
1438 MACHINE_END