7bf79fb87ea6e34196c32d7bb0c02944056f96fc
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu.c
3  *
4  * Copyright (c) 2010, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful, but WITHOUT
12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  * more details.
15  *
16  * You should have received a copy of the GNU General Public License along
17  * with this program; if not, write to the Free Software Foundation, Inc.,
18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
19  */
20
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/gpio_keys.h>
35 #include <linux/input.h>
36 #include <linux/platform_data/tegra_usb.h>
37 #include <mach/clk.h>
38 #include <mach/iomap.h>
39 #include <mach/irqs.h>
40 #include <mach/pinmux.h>
41 #include <mach/iomap.h>
42 #include <mach/io.h>
43 #include <mach/i2s.h>
44 #include <mach/audio.h>
45 #include <asm/mach-types.h>
46 #include <asm/mach/arch.h>
47 #include <mach/usb_phy.h>
48
49 #include "board.h"
50 #include "clock.h"
51 #include "board-cardhu.h"
52 #include "devices.h"
53 #include "gpio-names.h"
54 #include "fuse.h"
55
56 static struct plat_serial8250_port debug_uart_platform_data[] = {
57         {
58                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
59                 .mapbase        = TEGRA_UARTA_BASE,
60                 .irq            = INT_UARTA,
61                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
62                 .type           = PORT_TEGRA,
63                 .iotype         = UPIO_MEM,
64                 .regshift       = 2,
65                 .uartclk        = 13000000,
66         }, {
67                 .flags          = 0,
68         }
69 };
70
71 static struct platform_device debug_uart = {
72         .name = "serial8250",
73         .id = PLAT8250_DEV_PLATFORM,
74         .dev = {
75                 .platform_data = debug_uart_platform_data,
76         },
77 };
78
79 /* !!!TODO: Change for cardhu (Taken from Ventana) */
80 static struct tegra_utmip_config utmi_phy_config[] = {
81         [0] = {
82                         .hssync_start_delay = 0,
83                         .idle_wait_delay = 17,
84                         .elastic_limit = 16,
85                         .term_range_adj = 6,
86                         .xcvr_setup = 15,
87                         .xcvr_lsfslew = 2,
88                         .xcvr_lsrslew = 2,
89         },
90         [1] = {
91                         .hssync_start_delay = 0,
92                         .idle_wait_delay = 17,
93                         .elastic_limit = 16,
94                         .term_range_adj = 6,
95                         .xcvr_setup = 8,
96                         .xcvr_lsfslew = 2,
97                         .xcvr_lsrslew = 2,
98         },
99 };
100
101 /* !!!TODO: Change for cardhu (Taken from Ventana) */
102 static struct tegra_ulpi_config ulpi_phy_config = {
103         /* !!!TODO!!! CABLE DETECT? if so GPIO_PC7 on cardhu */
104         .reset_gpio = TEGRA_GPIO_PG2,
105         .clk = "clk_dev2",
106 };
107
108 #ifdef CONFIG_BCM4329_RFKILL
109 static struct resource cardhu_bcm4329_rfkill_resources[] = {
110         {
111                 .name   = "bcm4329_nreset_gpio",
112                 .start  = TEGRA_GPIO_PU0,
113                 .end    = TEGRA_GPIO_PU0,
114                 .flags  = IORESOURCE_IO,
115         },
116         {
117                 .name   = "bcm4329_nshutdown_gpio",
118                 .start  = TEGRA_GPIO_PK2,
119                 .end    = TEGRA_GPIO_PK2,
120                 .flags  = IORESOURCE_IO,
121         },
122 };
123
124 static struct platform_device cardhu_bcm4329_rfkill_device = {
125         .name = "bcm4329_rfkill",
126         .id             = -1,
127         .num_resources  = ARRAY_SIZE(cardhu_bcm4329_rfkill_resources),
128         .resource       = cardhu_bcm4329_rfkill_resources,
129 };
130
131 static noinline void __init cardhu_bt_rfkill(void)
132 {
133         /*Add Clock Resource*/
134         clk_add_alias("bcm4329_32k_clk", cardhu_bcm4329_rfkill_device.name, \
135                                 "blink", NULL);
136
137         platform_device_register(&cardhu_bcm4329_rfkill_device);
138
139         return;
140 }
141 #else
142 static inline void cardhu_bt_rfkill(void) { }
143 #endif
144
145 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
146         /* name         parent          rate            enabled */
147         { "uarta",      "clk_m",        13000000,       true},
148         { "uartb",      "clk_m",        13000000,       true},
149         { "uartc",      "clk_m",        13000000,       true},
150         { "uartd",      "clk_m",        13000000,       true},
151         { "uarte",      "clk_m",        13000000,       true},
152         { "pll_m",      NULL,           600000000,      true},
153         { "blink",      "clk_32k",      32768,          false},
154         { "pll_p_out4", "pll_p",        24000000,       true },
155         { "pwm",        "clk_32k",      32768,          false},
156         { "blink",      "clk_32k",      32768,          false},
157         { "pll_a",      NULL,           11289600,       true},
158         { "pll_a_out0", NULL,           11289600,       true},
159         { "i2s1",       "pll_a_out0",   11289600,       true},
160         { "i2s2",       "pll_a_out0",   11289600,       true},
161         { "audio",      "pll_a_out0",   11289600,       true},
162         { "audio_2x",   "audio",        22579200,       true},
163         { NULL,         NULL,           0,              0},
164 };
165
166 static struct tegra_ulpi_config cardhu_ehci2_ulpi_phy_config = {
167         .reset_gpio = TEGRA_GPIO_PV1,
168         .clk = "clk_dev2",
169 };
170
171 static struct tegra_ehci_platform_data cardhu_ehci2_ulpi_platform_data = {
172         .operating_mode = TEGRA_USB_HOST,
173         .power_down_on_bus_suspend = 0,
174         .phy_config = &cardhu_ehci2_ulpi_phy_config,
175 };
176
177 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
178         .adapter_nr     = 0,
179         .bus_count      = 1,
180         .bus_clk_rate   = { 400000, 0 },
181 };
182
183 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
184         .adapter_nr     = 1,
185         .bus_count      = 1,
186         .bus_clk_rate   = { 400000, 0 },
187 };
188
189 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
190         .adapter_nr     = 2,
191         .bus_count      = 1,
192         .bus_clk_rate   = { 400000, 0 },
193 };
194
195 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
196         .adapter_nr     = 3,
197         .bus_count      = 1,
198         .bus_clk_rate   = { 400000, 0 },
199         .is_dvc         = true,
200 };
201
202 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
203         .adapter_nr     = 4,
204         .bus_count      = 1,
205         .bus_clk_rate   = { 400000, 0 },
206 };
207
208
209 static void cardhu_i2c_init(void)
210 {
211         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
212         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
213         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
214         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
215         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
216
217         platform_device_register(&tegra_i2c_device5);
218         platform_device_register(&tegra_i2c_device4);
219         platform_device_register(&tegra_i2c_device3);
220         platform_device_register(&tegra_i2c_device2);
221         platform_device_register(&tegra_i2c_device1);
222 }
223
224 #define GPIO_KEY(_id, _gpio, _iswake)           \
225         {                                       \
226                 .code = _id,                    \
227                 .gpio = TEGRA_GPIO_##_gpio,     \
228                 .active_low = 1,                \
229                 .desc = #_id,                   \
230                 .type = EV_KEY,                 \
231                 .wakeup = _iswake,              \
232                 .debounce_interval = 10,        \
233         }
234
235 /* !!!TODO!!! Change for cardhu */
236 static struct gpio_keys_button cardhu_keys[] = {
237         [0] = GPIO_KEY(KEY_MENU, PQ0, 0),
238         [1] = GPIO_KEY(KEY_HOME, PQ1, 0),
239         [2] = GPIO_KEY(KEY_BACK, PQ2, 0),
240         [3] = GPIO_KEY(KEY_VOLUMEUP, PQ3, 0),
241         [4] = GPIO_KEY(KEY_VOLUMEDOWN, PQ4, 0),
242         [5] = GPIO_KEY(KEY_POWER, PV2, 1),
243 };
244
245 static struct gpio_keys_platform_data cardhu_keys_platform_data = {
246         .buttons        = cardhu_keys,
247         .nbuttons       = ARRAY_SIZE(cardhu_keys),
248 };
249
250 static struct platform_device cardhu_keys_device = {
251         .name   = "gpio-keys",
252         .id     = 0,
253         .dev    = {
254                 .platform_data  = &cardhu_keys_platform_data,
255         },
256 };
257
258 static struct resource tegra_rtc_resources[] = {
259         [0] = {
260                 .start = TEGRA_RTC_BASE,
261                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
262                 .flags = IORESOURCE_MEM,
263         },
264         [1] = {
265                 .start = INT_RTC,
266                 .end = INT_RTC,
267                 .flags = IORESOURCE_IRQ,
268         },
269 };
270
271 static struct platform_device tegra_rtc_device = {
272         .name = "tegra_rtc",
273         .id   = -1,
274         .resource = tegra_rtc_resources,
275         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
276 };
277
278 static struct platform_device *cardhu_devices[] __initdata = {
279         &tegra_otg_device,
280         &debug_uart,
281         &tegra_uartb_device,
282         &tegra_uartc_device,
283         &tegra_uartd_device,
284         &tegra_uarte_device,
285         &pmu_device,
286         &tegra_rtc_device,
287         &tegra_udc_device,
288         &tegra_ehci2_device,
289 #if defined(CONFIG_TEGRA_IOVMM_SMMU)
290         &tegra_smmu_device,
291 #endif
292         &cardhu_keys_device,
293         &tegra_wdt_device,
294         &tegra_avp_device,
295 };
296
297 static int __init cardhu_touch_init(void)
298 {
299         return 0;
300 }
301
302
303 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
304         [0] = {
305                         .phy_config = &utmi_phy_config[0],
306                         .operating_mode = TEGRA_USB_HOST,
307                         .power_down_on_bus_suspend = 0,
308         },
309         [1] = {
310                         .phy_config = &ulpi_phy_config,
311                         .operating_mode = TEGRA_USB_HOST,
312                         .power_down_on_bus_suspend = 1,
313         },
314         [2] = {
315                         .phy_config = &utmi_phy_config[1],
316                         .operating_mode = TEGRA_USB_HOST,
317                         .power_down_on_bus_suspend = 0,
318         },
319 };
320
321 static void cardhu_usb_init(void)
322 {
323         tegra_ehci3_device.dev.platform_data = &tegra_ehci_pdata[2];
324         platform_device_register(&tegra_ehci3_device);
325 }
326
327 struct platform_device *tegra_usb_otg_host_register(void)
328 {
329         struct platform_device *pdev;
330         void *platform_data;
331         int val;
332
333         pdev = platform_device_alloc(tegra_ehci1_device.name,
334                 tegra_ehci1_device.id);
335         if (!pdev)
336                 return NULL;
337
338         val = platform_device_add_resources(pdev, tegra_ehci1_device.resource,
339                 tegra_ehci1_device.num_resources);
340         if (val)
341                 goto error;
342
343         pdev->dev.dma_mask =  tegra_ehci1_device.dev.dma_mask;
344         pdev->dev.coherent_dma_mask = tegra_ehci1_device.dev.coherent_dma_mask;
345
346         platform_data = kmalloc(sizeof(struct tegra_ehci_platform_data),
347                 GFP_KERNEL);
348         if (!platform_data)
349                 goto error;
350
351         memcpy(platform_data, &tegra_ehci_pdata[0],
352                                 sizeof(struct tegra_ehci_platform_data));
353         pdev->dev.platform_data = platform_data;
354
355         val = platform_device_add(pdev);
356         if (val)
357                 goto error_add;
358
359         return pdev;
360
361 error_add:
362         kfree(platform_data);
363 error:
364         pr_err("%s: failed to add the host contoller device\n", __func__);
365         platform_device_put(pdev);
366         return NULL;
367 }
368
369 void tegra_usb_otg_host_unregister(struct platform_device *pdev)
370 {
371         platform_device_unregister(pdev);
372 }
373
374 static void __init tegra_cardhu_init(void)
375 {
376         tegra_common_init();
377         tegra_clk_init_from_table(cardhu_clk_init_table);
378         cardhu_pinmux_init();
379
380         tegra_ehci2_device.dev.platform_data
381                 = &cardhu_ehci2_ulpi_platform_data;
382         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
383
384         cardhu_sdhci_init();
385         cardhu_i2c_init();
386         cardhu_regulator_init();
387         cardhu_touch_init();
388         cardhu_usb_init();
389         cardhu_panel_init();
390         cardhu_sensors_init();
391         cardhu_bt_rfkill();
392 }
393
394 static void __init tegra_cardhu_reserve(void)
395 {
396         tegra_reserve(SZ_128M, SZ_8M, SZ_16M);
397 }
398
399 MACHINE_START(CARDHU, "cardhu")
400         .boot_params    = 0x80000100,
401         .phys_io        = IO_APB_PHYS,
402         .io_pg_offst    = ((IO_APB_VIRT) >> 18) & 0xfffc,
403         .init_irq       = tegra_init_irq,
404         .init_machine   = tegra_cardhu_init,
405         .map_io         = tegra_map_common_io,
406         .reserve        = tegra_cardhu_reserve,
407         .timer          = &tegra_timer,
408 MACHINE_END