arch/arm/mach-tegra/board-cardhu.c

   1 /*
   2  * arch/arm/mach-tegra/board-cardhu.c
   3  *
   4  * Copyright (c) 2011, NVIDIA Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along
  17  * with this program; if not, write to the Free Software Foundation, Inc.,
  18  * 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  19  */
  20
  21 #include <linux/kernel.h>
  22 #include <linux/init.h>
  23 #include <linux/slab.h>
  24 #include <linux/ctype.h>
  25 #include <linux/platform_device.h>
  26 #include <linux/clk.h>
  27 #include <linux/serial_8250.h>
  28 #include <linux/i2c.h>
  29 #include <linux/i2c/panjit_ts.h>
  30 #include <linux/dma-mapping.h>
  31 #include <linux/delay.h>
  32 #include <linux/i2c-tegra.h>
  33 #include <linux/gpio.h>
  34 #include <linux/input.h>
  35 #include <linux/platform_data/tegra_usb.h>
  36 #include <mach/clk.h>
  37 #include <mach/iomap.h>
  38 #include <mach/irqs.h>
  39 #include <mach/pinmux.h>
  40 #include <mach/iomap.h>
  41 #include <mach/io.h>
  42 #include <mach/i2s.h>
  43 #include <mach/audio.h>
  44 #include <asm/mach-types.h>
  45 #include <asm/mach/arch.h>
  46 #include <mach/usb_phy.h>
  47
  48 #include "board.h"
  49 #include "clock.h"
  50 #include "board-cardhu.h"
  51 #include "devices.h"
  52 #include "gpio-names.h"
  53 #include "fuse.h"
  54
  55
  56 static struct plat_serial8250_port debug_uart_platform_data[] = {
  57         {
  58                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
  59                 .mapbase        = TEGRA_UARTA_BASE,
  60                 .irq            = INT_UARTA,
  61                 .flags          = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
  62                 .type           = PORT_TEGRA,
  63                 .iotype         = UPIO_MEM,
  64                 .regshift       = 2,
  65                 .uartclk        = 216000000,
  66         }, {
  67                 .flags          = 0,
  68         }
  69 };
  70
  71 static struct platform_device debug_uart = {
  72         .name = "serial8250",
  73         .id = PLAT8250_DEV_PLATFORM,
  74         .dev = {
  75                 .platform_data = debug_uart_platform_data,
  76         },
  77 };
  78
  79 /* !!!TODO: Change for cardhu (Taken from Ventana) */
  80 static struct tegra_utmip_config utmi_phy_config[] = {
  81         [0] = {
  82                         .hssync_start_delay = 0,
  83                         .idle_wait_delay = 17,
  84                         .elastic_limit = 16,
  85                         .term_range_adj = 6,
  86                         .xcvr_setup = 15,
  87                         .xcvr_lsfslew = 2,
  88                         .xcvr_lsrslew = 2,
  89         },
  90         [1] = {
  91                         .hssync_start_delay = 0,
  92                         .idle_wait_delay = 17,
  93                         .elastic_limit = 16,
  94                         .term_range_adj = 6,
  95                         .xcvr_setup = 15,
  96                         .xcvr_lsfslew = 2,
  97                         .xcvr_lsrslew = 2,
  98         },
  99         [2] = {
 100                         .hssync_start_delay = 0,
 101                         .idle_wait_delay = 17,
 102                         .elastic_limit = 16,
 103                         .term_range_adj = 6,
 104                         .xcvr_setup = 8,
 105                         .xcvr_lsfslew = 2,
 106                         .xcvr_lsrslew = 2,
 107         },
 108 };
 109
 110 #ifdef CONFIG_BCM4329_RFKILL
 111 static struct resource cardhu_bcm4329_rfkill_resources[] = {
 112         {
 113                 .name   = "bcm4329_nshutdown_gpio",
 114                 .start  = TEGRA_GPIO_PU0,
 115                 .end    = TEGRA_GPIO_PU0,
 116                 .flags  = IORESOURCE_IO,
 117         },
 118 };
 119
 120 static struct platform_device cardhu_bcm4329_rfkill_device = {
 121         .name = "bcm4329_rfkill",
 122         .id             = -1,
 123         .num_resources  = ARRAY_SIZE(cardhu_bcm4329_rfkill_resources),
 124         .resource       = cardhu_bcm4329_rfkill_resources,
 125 };
 126
 127 static noinline void __init cardhu_bt_rfkill(void)
 128 {
 129         platform_device_register(&cardhu_bcm4329_rfkill_device);
 130
 131         return;
 132 }
 133 #else
 134 static inline void cardhu_bt_rfkill(void) { }
 135 #endif
 136
 137 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
 138         /* name         parent          rate            enabled */
 139         { "uarta",      "pll_p",        216000000,      true},
 140         { "uartb",      "pll_p",        216000000,      false},
 141         { "uartc",      "pll_p",        216000000,      false},
 142         { "uartd",      "pll_p",        216000000,      false},
 143         { "uarte",      "pll_p",        216000000,      false},
 144         { "pll_m",      NULL,           0,              true},
 145         { "hda",        "pll_p",        108000000,      false},
 146         { "hda2codec_2x","pll_p",       48000000,       false},
 147         { "pll_p_out4", "pll_p",        24000000,       true },
 148         { "pwm",        "clk_32k",      32768,          false},
 149         { "blink",      "clk_32k",      32768,          true},
 150         { "pll_a",      NULL,           56448000,       true},
 151         { "pll_a_out0", NULL,           11289600,       true},
 152         { "i2s1",       "pll_a_out0",   11289600,       true},
 153         { "i2s2",       "pll_a_out0",   11289600,       true},
 154         { "audio",      "pll_a_out0",   11289600,       true},
 155         { "audio_2x",   "audio",        22579200,       true},
 156         { NULL,         NULL,           0,              0},
 157 };
 158
 159 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
 160         .adapter_nr     = 0,
 161         .bus_count      = 1,
 162         .bus_clk_rate   = { 100000, 0 },
 163 };
 164
 165 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
 166         .adapter_nr     = 1,
 167         .bus_count      = 1,
 168         .bus_clk_rate   = { 100000, 0 },
 169         .is_clkon_always = true,
 170 };
 171
 172 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
 173         .adapter_nr     = 2,
 174         .bus_count      = 1,
 175         .bus_clk_rate   = { 100000, 0 },
 176 };
 177
 178 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
 179         .adapter_nr     = 3,
 180         .bus_count      = 1,
 181         .bus_clk_rate   = { 100000, 0 },
 182 };
 183
 184 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
 185         .adapter_nr     = 4,
 186         .bus_count      = 1,
 187         .bus_clk_rate   = { 100000, 0 },
 188 };
 189
 190
 191 static void cardhu_i2c_init(void)
 192 {
 193         tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
 194         tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
 195         tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
 196         tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
 197         tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
 198
 199         platform_device_register(&tegra_i2c_device5);
 200         platform_device_register(&tegra_i2c_device4);
 201         platform_device_register(&tegra_i2c_device3);
 202         platform_device_register(&tegra_i2c_device2);
 203         platform_device_register(&tegra_i2c_device1);
 204 }
 205
 206 static struct resource tegra_rtc_resources[] = {
 207         [0] = {
 208                 .start = TEGRA_RTC_BASE,
 209                 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
 210                 .flags = IORESOURCE_MEM,
 211         },
 212         [1] = {
 213                 .start = INT_RTC,
 214                 .end = INT_RTC,
 215                 .flags = IORESOURCE_IRQ,
 216         },
 217 };
 218
 219 static struct platform_device tegra_rtc_device = {
 220         .name = "tegra_rtc",
 221         .id   = -1,
 222         .resource = tegra_rtc_resources,
 223         .num_resources = ARRAY_SIZE(tegra_rtc_resources),
 224 };
 225
 226 static struct platform_device tegra_camera = {
 227         .name = "tegra_camera",
 228         .id = -1,
 229 };
 230
 231 static struct platform_device *cardhu_devices[] __initdata = {
 232         &debug_uart,
 233         &tegra_uartb_device,
 234         &tegra_uartc_device,
 235         &tegra_uartd_device,
 236         &tegra_uarte_device,
 237         &pmu_device,
 238         &tegra_rtc_device,
 239         &tegra_udc_device,
 240 #if defined(CONFIG_SND_HDA_TEGRA)
 241         &tegra_hda_device,
 242 #endif
 243 #if defined(CONFIG_TEGRA_IOVMM_SMMU)
 244         &tegra_smmu_device,
 245 #endif
 246         &tegra_wdt_device,
 247         &tegra_avp_device,
 248         &tegra_camera,
 249 };
 250
 251 static int __init cardhu_touch_init(void)
 252 {
 253         return 0;
 254 }
 255
 256
 257 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
 258         [0] = {
 259                         .phy_config = &utmi_phy_config[0],
 260                         .operating_mode = TEGRA_USB_HOST,
 261                         .power_down_on_bus_suspend = 0,
 262                         .usb_phy_type = TEGRA_USB_PHY_TYPE_UTMIP,
 263         },
 264         [1] = {
 265                         .phy_config = &utmi_phy_config[1],
 266                         .operating_mode = TEGRA_USB_HOST,
 267                         .power_down_on_bus_suspend = 0,
 268                         .usb_phy_type = TEGRA_USB_PHY_TYPE_UTMIP,
 269         },
 270         [2] = {
 271                         .phy_config = &utmi_phy_config[2],
 272                         .operating_mode = TEGRA_USB_HOST,
 273                         .power_down_on_bus_suspend = 0,
 274                         .usb_phy_type = TEGRA_USB_PHY_TYPE_UTMIP,
 275         },
 276 };
 277
 278 struct platform_device *tegra_usb_otg_host_register(void)
 279 {
 280         struct platform_device *pdev;
 281         void *platform_data;
 282         int val;
 283
 284         pdev = platform_device_alloc(tegra_ehci1_device.name,
 285                 tegra_ehci1_device.id);
 286         if (!pdev)
 287                 return NULL;
 288
 289         val = platform_device_add_resources(pdev, tegra_ehci1_device.resource,
 290                 tegra_ehci1_device.num_resources);
 291         if (val)
 292                 goto error;
 293
 294         pdev->dev.dma_mask =  tegra_ehci1_device.dev.dma_mask;
 295         pdev->dev.coherent_dma_mask = tegra_ehci1_device.dev.coherent_dma_mask;
 296
 297         platform_data = kmalloc(sizeof(struct tegra_ehci_platform_data),
 298                 GFP_KERNEL);
 299         if (!platform_data)
 300                 goto error;
 301
 302         memcpy(platform_data, &tegra_ehci_pdata[0],
 303                                 sizeof(struct tegra_ehci_platform_data));
 304         pdev->dev.platform_data = platform_data;
 305
 306         val = platform_device_add(pdev);
 307         if (val)
 308                 goto error_add;
 309
 310         return pdev;
 311
 312 error_add:
 313         kfree(platform_data);
 314 error:
 315         pr_err("%s: failed to add the host contoller device\n", __func__);
 316         platform_device_put(pdev);
 317         return NULL;
 318 }
 319
 320 void tegra_usb_otg_host_unregister(struct platform_device *pdev)
 321 {
 322         platform_device_unregister(pdev);
 323 }
 324
 325 static struct tegra_otg_platform_data tegra_otg_pdata = {
 326         .host_register = &tegra_usb_otg_host_register,
 327         .host_unregister = &tegra_usb_otg_host_unregister,
 328 };
 329
 330 static void cardhu_usb_init(void)
 331 {
 332         tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
 333         platform_device_register(&tegra_otg_device);
 334
 335         tegra_ehci2_device.dev.platform_data = &tegra_ehci_pdata[1];
 336         platform_device_register(&tegra_ehci2_device);
 337
 338         tegra_ehci3_device.dev.platform_data = &tegra_ehci_pdata[2];
 339         platform_device_register(&tegra_ehci3_device);
 340 }
 341
 342 static void cardhu_gps_init(void)
 343 {
 344         tegra_gpio_enable(TEGRA_GPIO_PU2);
 345 }
 346
 347 #ifdef CONFIG_SATA_AHCI_TEGRA
 348 static void cardhu_sata_init(void)
 349 {
 350         platform_device_register(&tegra_sata_device);
 351 }
 352 #else
 353 static void cardhu_sata_init(void) { }
 354 #endif
 355
 356 static void __init tegra_cardhu_init(void)
 357 {
 358         tegra_common_init();
 359         tegra_clk_init_from_table(cardhu_clk_init_table);
 360         cardhu_pinmux_init();
 361         cardhu_i2c_init();
 362         platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
 363         cardhu_sdhci_init();
 364         cardhu_regulator_init();
 365         cardhu_gpio_switch_regulator_init();
 366         cardhu_suspend_init();
 367         cardhu_touch_init();
 368         cardhu_usb_init();
 369         cardhu_gps_init();
 370
 371 #ifdef CONFIG_KEYBOARD_TEGRA
 372         cardhu_kbc_init();
 373 #endif
 374
 375 #ifdef CONFIG_INPUT_ALPS_GPIO_SCROLLWHEEL
 376         cardhu_scroll_init();
 377 #endif
 378
 379 #ifdef CONFIG_KEYBOARD_GPIO
 380         cardhu_keys_init();
 381 #endif
 382
 383         cardhu_panel_init();
 384         cardhu_sensors_init();
 385         cardhu_bt_rfkill();
 386         cardhu_sata_init();
 387 }
 388
 389 static void __init tegra_cardhu_reserve(void)
 390 {
 391         tegra_reserve(SZ_128M, SZ_4M, SZ_8M);
 392 }
 393
 394 MACHINE_START(CARDHU, "cardhu")
 395         .boot_params    = 0x80000100,
 396         .phys_io        = IO_APB_PHYS,
 397         .io_pg_offst    = ((IO_APB_VIRT) >> 18) & 0xfffc,
 398         .init_irq       = tegra_init_irq,
 399         .init_machine   = tegra_cardhu_init,
 400         .map_io         = tegra_map_common_io,
 401         .reserve        = tegra_cardhu_reserve,
 402         .timer          = &tegra_timer,
 403 MACHINE_END