2 * arch/arm/mach-tegra/board-cardhu.c
4 * Copyright (c) 2011, NVIDIA Corporation.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/slab.h>
24 #include <linux/ctype.h>
25 #include <linux/platform_device.h>
26 #include <linux/clk.h>
27 #include <linux/serial_8250.h>
28 #include <linux/i2c.h>
29 #include <linux/i2c/panjit_ts.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/delay.h>
32 #include <linux/i2c-tegra.h>
33 #include <linux/gpio.h>
34 #include <linux/input.h>
35 #include <linux/platform_data/tegra_usb.h>
37 #include <mach/iomap.h>
38 #include <mach/irqs.h>
39 #include <mach/pinmux.h>
40 #include <mach/iomap.h>
43 #include <mach/audio.h>
44 #include <asm/mach-types.h>
45 #include <asm/mach/arch.h>
46 #include <mach/usb_phy.h>
50 #include "board-cardhu.h"
52 #include "gpio-names.h"
56 static struct plat_serial8250_port debug_uart_platform_data[] = {
58 .membase = IO_ADDRESS(TEGRA_UARTA_BASE),
59 .mapbase = TEGRA_UARTA_BASE,
61 .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
71 static struct platform_device debug_uart = {
73 .id = PLAT8250_DEV_PLATFORM,
75 .platform_data = debug_uart_platform_data,
79 /* !!!TODO: Change for cardhu (Taken from Ventana) */
80 static struct tegra_utmip_config utmi_phy_config[] = {
82 .hssync_start_delay = 0,
83 .idle_wait_delay = 17,
91 .hssync_start_delay = 0,
92 .idle_wait_delay = 17,
100 .hssync_start_delay = 0,
101 .idle_wait_delay = 17,
110 #ifdef CONFIG_BCM4329_RFKILL
111 static struct resource cardhu_bcm4329_rfkill_resources[] = {
113 .name = "bcm4329_nshutdown_gpio",
114 .start = TEGRA_GPIO_PU0,
115 .end = TEGRA_GPIO_PU0,
116 .flags = IORESOURCE_IO,
120 static struct platform_device cardhu_bcm4329_rfkill_device = {
121 .name = "bcm4329_rfkill",
123 .num_resources = ARRAY_SIZE(cardhu_bcm4329_rfkill_resources),
124 .resource = cardhu_bcm4329_rfkill_resources,
127 static noinline void __init cardhu_bt_rfkill(void)
129 platform_device_register(&cardhu_bcm4329_rfkill_device);
134 static inline void cardhu_bt_rfkill(void) { }
137 static __initdata struct tegra_clk_init_table cardhu_clk_init_table[] = {
138 /* name parent rate enabled */
139 { "uarta", "pll_p", 216000000, true},
140 { "uartb", "pll_p", 216000000, false},
141 { "uartc", "pll_p", 216000000, false},
142 { "uartd", "pll_p", 216000000, false},
143 { "uarte", "pll_p", 216000000, false},
144 { "pll_m", NULL, 0, true},
145 { "hda", "pll_p", 108000000, false},
146 { "hda2codec_2x","pll_p", 48000000, false},
147 { "pll_p_out4", "pll_p", 24000000, true },
148 { "pwm", "clk_32k", 32768, false},
149 { "blink", "clk_32k", 32768, true},
150 { "pll_a", NULL, 56448000, true},
151 { "pll_a_out0", NULL, 11289600, true},
152 { "i2s1", "pll_a_out0", 11289600, true},
153 { "i2s2", "pll_a_out0", 11289600, true},
154 { "audio", "pll_a_out0", 11289600, true},
155 { "audio_2x", "audio", 22579200, true},
159 static struct tegra_i2c_platform_data cardhu_i2c1_platform_data = {
162 .bus_clk_rate = { 100000, 0 },
165 static struct tegra_i2c_platform_data cardhu_i2c2_platform_data = {
168 .bus_clk_rate = { 100000, 0 },
169 .is_clkon_always = true,
172 static struct tegra_i2c_platform_data cardhu_i2c3_platform_data = {
175 .bus_clk_rate = { 100000, 0 },
178 static struct tegra_i2c_platform_data cardhu_i2c4_platform_data = {
181 .bus_clk_rate = { 100000, 0 },
184 static struct tegra_i2c_platform_data cardhu_i2c5_platform_data = {
187 .bus_clk_rate = { 100000, 0 },
191 static void cardhu_i2c_init(void)
193 tegra_i2c_device1.dev.platform_data = &cardhu_i2c1_platform_data;
194 tegra_i2c_device2.dev.platform_data = &cardhu_i2c2_platform_data;
195 tegra_i2c_device3.dev.platform_data = &cardhu_i2c3_platform_data;
196 tegra_i2c_device4.dev.platform_data = &cardhu_i2c4_platform_data;
197 tegra_i2c_device5.dev.platform_data = &cardhu_i2c5_platform_data;
199 platform_device_register(&tegra_i2c_device5);
200 platform_device_register(&tegra_i2c_device4);
201 platform_device_register(&tegra_i2c_device3);
202 platform_device_register(&tegra_i2c_device2);
203 platform_device_register(&tegra_i2c_device1);
206 static struct resource tegra_rtc_resources[] = {
208 .start = TEGRA_RTC_BASE,
209 .end = TEGRA_RTC_BASE + TEGRA_RTC_SIZE - 1,
210 .flags = IORESOURCE_MEM,
215 .flags = IORESOURCE_IRQ,
219 static struct platform_device tegra_rtc_device = {
222 .resource = tegra_rtc_resources,
223 .num_resources = ARRAY_SIZE(tegra_rtc_resources),
226 static struct platform_device tegra_camera = {
227 .name = "tegra_camera",
231 static struct platform_device *cardhu_devices[] __initdata = {
240 #if defined(CONFIG_SND_HDA_TEGRA)
243 #if defined(CONFIG_TEGRA_IOVMM_SMMU)
251 static int __init cardhu_touch_init(void)
257 static struct tegra_ehci_platform_data tegra_ehci_pdata[] = {
259 .phy_config = &utmi_phy_config[0],
260 .operating_mode = TEGRA_USB_HOST,
261 .power_down_on_bus_suspend = 0,
262 .usb_phy_type = TEGRA_USB_PHY_TYPE_UTMIP,
265 .phy_config = &utmi_phy_config[1],
266 .operating_mode = TEGRA_USB_HOST,
267 .power_down_on_bus_suspend = 0,
268 .usb_phy_type = TEGRA_USB_PHY_TYPE_UTMIP,
271 .phy_config = &utmi_phy_config[2],
272 .operating_mode = TEGRA_USB_HOST,
273 .power_down_on_bus_suspend = 0,
274 .usb_phy_type = TEGRA_USB_PHY_TYPE_UTMIP,
278 struct platform_device *tegra_usb_otg_host_register(void)
280 struct platform_device *pdev;
284 pdev = platform_device_alloc(tegra_ehci1_device.name,
285 tegra_ehci1_device.id);
289 val = platform_device_add_resources(pdev, tegra_ehci1_device.resource,
290 tegra_ehci1_device.num_resources);
294 pdev->dev.dma_mask = tegra_ehci1_device.dev.dma_mask;
295 pdev->dev.coherent_dma_mask = tegra_ehci1_device.dev.coherent_dma_mask;
297 platform_data = kmalloc(sizeof(struct tegra_ehci_platform_data),
302 memcpy(platform_data, &tegra_ehci_pdata[0],
303 sizeof(struct tegra_ehci_platform_data));
304 pdev->dev.platform_data = platform_data;
306 val = platform_device_add(pdev);
313 kfree(platform_data);
315 pr_err("%s: failed to add the host contoller device\n", __func__);
316 platform_device_put(pdev);
320 void tegra_usb_otg_host_unregister(struct platform_device *pdev)
322 platform_device_unregister(pdev);
325 static struct tegra_otg_platform_data tegra_otg_pdata = {
326 .host_register = &tegra_usb_otg_host_register,
327 .host_unregister = &tegra_usb_otg_host_unregister,
330 static void cardhu_usb_init(void)
332 tegra_otg_device.dev.platform_data = &tegra_otg_pdata;
333 platform_device_register(&tegra_otg_device);
335 tegra_ehci2_device.dev.platform_data = &tegra_ehci_pdata[1];
336 platform_device_register(&tegra_ehci2_device);
338 tegra_ehci3_device.dev.platform_data = &tegra_ehci_pdata[2];
339 platform_device_register(&tegra_ehci3_device);
342 static void cardhu_gps_init(void)
344 tegra_gpio_enable(TEGRA_GPIO_PU2);
347 #ifdef CONFIG_SATA_AHCI_TEGRA
348 static void cardhu_sata_init(void)
350 platform_device_register(&tegra_sata_device);
353 static void cardhu_sata_init(void) { }
356 static void __init tegra_cardhu_init(void)
359 tegra_clk_init_from_table(cardhu_clk_init_table);
360 cardhu_pinmux_init();
362 platform_add_devices(cardhu_devices, ARRAY_SIZE(cardhu_devices));
364 cardhu_regulator_init();
365 cardhu_gpio_switch_regulator_init();
366 cardhu_suspend_init();
371 #ifdef CONFIG_KEYBOARD_TEGRA
375 #ifdef CONFIG_INPUT_ALPS_GPIO_SCROLLWHEEL
376 cardhu_scroll_init();
379 #ifdef CONFIG_KEYBOARD_GPIO
384 cardhu_sensors_init();
389 static void __init tegra_cardhu_reserve(void)
391 tegra_reserve(SZ_128M, SZ_4M, SZ_8M);
394 MACHINE_START(CARDHU, "cardhu")
395 .boot_params = 0x80000100,
396 .phys_io = IO_APB_PHYS,
397 .io_pg_offst = ((IO_APB_VIRT) >> 18) & 0xfffc,
398 .init_irq = tegra_init_irq,
399 .init_machine = tegra_cardhu_init,
400 .map_io = tegra_map_common_io,
401 .reserve = tegra_cardhu_reserve,
402 .timer = &tegra_timer,