arm: tegra: cardhu: TPS61050 board support
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu-power.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu-power.c
3  *
4  * Copyright (C) 2011 NVIDIA, Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
18  * 02111-1307, USA
19  */
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/regulator/machine.h>
25 #include <linux/mfd/tps6591x.h>
26 #include <linux/mfd/max77663-core.h>
27 #include <linux/gpio.h>
28 #include <linux/io.h>
29 #include <linux/regulator/gpio-switch-regulator.h>
30 #include <linux/regulator/tps6591x-regulator.h>
31 #include <linux/regulator/tps6236x-regulator.h>
32 #include <linux/power/gpio-charger.h>
33
34 #include <asm/mach-types.h>
35
36 #include <mach/iomap.h>
37 #include <mach/irqs.h>
38 #include <mach/pinmux.h>
39 #include <mach/edp.h>
40 #include <mach/tsensor.h>
41
42 #include "gpio-names.h"
43 #include "board.h"
44 #include "board-cardhu.h"
45 #include "pm.h"
46 #include "wakeups-t3.h"
47
48 #define PMC_CTRL                0x0
49 #define PMC_CTRL_INTR_LOW       (1 << 17)
50
51 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_0[] = {
52         REGULATOR_SUPPLY("vdd_core", NULL),
53         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
54 };
55
56 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_1[] = {
57         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
58 };
59
60 static struct regulator_consumer_supply tps6591x_vdd2_supply_0[] = {
61         REGULATOR_SUPPLY("vdd_gen1v5", NULL),
62         REGULATOR_SUPPLY("vcore_lcd", NULL),
63         REGULATOR_SUPPLY("track_ldo1", NULL),
64         REGULATOR_SUPPLY("external_ldo_1v2", NULL),
65         REGULATOR_SUPPLY("vcore_cam1", NULL),
66         REGULATOR_SUPPLY("vcore_cam2", NULL),
67 };
68
69 static struct regulator_consumer_supply tps6591x_vddctrl_supply_0[] = {
70         REGULATOR_SUPPLY("vdd_cpu_pmu", NULL),
71         REGULATOR_SUPPLY("vdd_cpu", NULL),
72         REGULATOR_SUPPLY("vdd_sys", NULL),
73 };
74
75 static struct regulator_consumer_supply tps6591x_vio_supply_0[] = {
76         REGULATOR_SUPPLY("vdd_gen1v8", NULL),
77         REGULATOR_SUPPLY("avdd_hdmi_pll", NULL),
78         REGULATOR_SUPPLY("avdd_usb_pll", NULL),
79         REGULATOR_SUPPLY("avdd_osc", NULL),
80         REGULATOR_SUPPLY("vddio_sys", NULL),
81         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
82         REGULATOR_SUPPLY("pwrdet_sdmmc4", NULL),
83         REGULATOR_SUPPLY("vdd1v8_satelite", NULL),
84         REGULATOR_SUPPLY("vddio_uart", NULL),
85         REGULATOR_SUPPLY("pwrdet_uart", NULL),
86         REGULATOR_SUPPLY("vddio_audio", NULL),
87         REGULATOR_SUPPLY("pwrdet_audio", NULL),
88         REGULATOR_SUPPLY("vddio_bb", NULL),
89         REGULATOR_SUPPLY("pwrdet_bb", NULL),
90         REGULATOR_SUPPLY("vddio_lcd_pmu", NULL),
91         REGULATOR_SUPPLY("pwrdet_lcd", NULL),
92         REGULATOR_SUPPLY("vddio_cam", NULL),
93         REGULATOR_SUPPLY("pwrdet_cam", NULL),
94         REGULATOR_SUPPLY("vddio_vi", NULL),
95         REGULATOR_SUPPLY("pwrdet_vi", NULL),
96         REGULATOR_SUPPLY("ldo6", NULL),
97         REGULATOR_SUPPLY("ldo7", NULL),
98         REGULATOR_SUPPLY("ldo8", NULL),
99         REGULATOR_SUPPLY("vcore_audio", NULL),
100         REGULATOR_SUPPLY("avcore_audio", NULL),
101         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
102         REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
103         REGULATOR_SUPPLY("vcore1_lpddr2", NULL),
104         REGULATOR_SUPPLY("vcom_1v8", NULL),
105         REGULATOR_SUPPLY("pmuio_1v8", NULL),
106         REGULATOR_SUPPLY("avdd_ic_usb", NULL),
107 };
108
109 static struct regulator_consumer_supply tps6591x_ldo1_supply_0[] = {
110         REGULATOR_SUPPLY("avdd_pexb", NULL),
111         REGULATOR_SUPPLY("vdd_pexb", NULL),
112         REGULATOR_SUPPLY("avdd_pex_pll", NULL),
113         REGULATOR_SUPPLY("avdd_pexa", NULL),
114         REGULATOR_SUPPLY("vdd_pexa", NULL),
115 };
116
117 static struct regulator_consumer_supply tps6591x_ldo2_supply_0[] = {
118         REGULATOR_SUPPLY("avdd_sata", NULL),
119         REGULATOR_SUPPLY("vdd_sata", NULL),
120         REGULATOR_SUPPLY("avdd_sata_pll", NULL),
121         REGULATOR_SUPPLY("avdd_plle", NULL),
122 };
123
124 static struct regulator_consumer_supply tps6591x_ldo3_supply_e118x[] = {
125         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
126         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
127 };
128
129 static struct regulator_consumer_supply tps6591x_ldo3_supply_e1198[] = {
130         REGULATOR_SUPPLY("unused_rail_ldo3", NULL),
131 };
132
133 static struct regulator_consumer_supply tps6591x_ldo4_supply_0[] = {
134         REGULATOR_SUPPLY("vdd_rtc", NULL),
135 };
136
137 static struct regulator_consumer_supply tps6591x_ldo5_supply_e118x[] = {
138         REGULATOR_SUPPLY("avdd_vdac", NULL),
139 };
140
141 static struct regulator_consumer_supply tps6591x_ldo5_supply_e1198[] = {
142         REGULATOR_SUPPLY("avdd_vdac", NULL),
143         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
144         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
145 };
146
147 static struct regulator_consumer_supply tps6591x_ldo6_supply_0[] = {
148         REGULATOR_SUPPLY("avdd_dsi_csi", NULL),
149         REGULATOR_SUPPLY("pwrdet_mipi", NULL),
150 };
151 static struct regulator_consumer_supply tps6591x_ldo7_supply_0[] = {
152         REGULATOR_SUPPLY("avdd_plla_p_c_s", NULL),
153         REGULATOR_SUPPLY("avdd_pllm", NULL),
154         REGULATOR_SUPPLY("avdd_pllu_d", NULL),
155         REGULATOR_SUPPLY("avdd_pllu_d2", NULL),
156         REGULATOR_SUPPLY("avdd_pllx", NULL),
157 };
158
159 static struct regulator_consumer_supply tps6591x_ldo8_supply_0[] = {
160         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
161 };
162
163 #define TPS_PDATA_INIT(_name, _sname, _minmv, _maxmv, _supply_reg, _always_on, \
164         _boot_on, _apply_uv, _init_uV, _init_enable, _init_apply, _ectrl, _flags) \
165         static struct tps6591x_regulator_platform_data pdata_##_name##_##_sname = \
166         {                                                               \
167                 .regulator = {                                          \
168                         .constraints = {                                \
169                                 .min_uV = (_minmv)*1000,                \
170                                 .max_uV = (_maxmv)*1000,                \
171                                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
172                                                      REGULATOR_MODE_STANDBY), \
173                                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
174                                                    REGULATOR_CHANGE_STATUS |  \
175                                                    REGULATOR_CHANGE_VOLTAGE), \
176                                 .always_on = _always_on,                \
177                                 .boot_on = _boot_on,                    \
178                                 .apply_uV = _apply_uv,                  \
179                         },                                              \
180                         .num_consumer_supplies =                        \
181                                 ARRAY_SIZE(tps6591x_##_name##_supply_##_sname), \
182                         .consumer_supplies = tps6591x_##_name##_supply_##_sname,        \
183                         .supply_regulator = _supply_reg,                \
184                 },                                                      \
185                 .init_uV =  _init_uV * 1000,                            \
186                 .init_enable = _init_enable,                            \
187                 .init_apply = _init_apply,                              \
188                 .ectrl = _ectrl,                                        \
189                 .flags = _flags,                                        \
190         }
191
192 TPS_PDATA_INIT(vdd1, skubit0_0, 600,  1500, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF, 0);
193 TPS_PDATA_INIT(vdd1, skubit0_1, 600,  1500, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF, 0);
194 TPS_PDATA_INIT(vdd2, 0,         600,  1500, 0, 1, 1, 0, -1, 0, 0, 0, 0);
195 TPS_PDATA_INIT(vddctrl, 0,      600,  1400, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_EN1, 0);
196 TPS_PDATA_INIT(vio,  0,         1500, 3300, 0, 1, 1, 0, -1, 0, 0, 0, 0);
197
198 TPS_PDATA_INIT(ldo1, 0,         1000, 3300, tps6591x_rails(VDD_2), 0, 0, 0, -1, 0, 1, 0, 0);
199 TPS_PDATA_INIT(ldo2, 0,         1050, 1050, tps6591x_rails(VDD_2), 0, 0, 1, -1, 0, 1, 0, 0);
200
201 TPS_PDATA_INIT(ldo3, e118x,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
202 TPS_PDATA_INIT(ldo3, e1198,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
203 TPS_PDATA_INIT(ldo4, 0,         1000, 3300, 0, 1, 0, 0, -1, 0, 0, 0, 0);
204 TPS_PDATA_INIT(ldo5, e118x,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
205 TPS_PDATA_INIT(ldo5, e1198,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
206
207 TPS_PDATA_INIT(ldo6, 0,         1200, 1200, tps6591x_rails(VIO), 0, 0, 1, -1, 0, 0, 0, 0);
208 TPS_PDATA_INIT(ldo7, 0,         1200, 1200, tps6591x_rails(VIO), 1, 1, 1, -1, 0, 0, EXT_CTRL_SLEEP_OFF, LDO_LOW_POWER_ON_SUSPEND);
209 TPS_PDATA_INIT(ldo8, 0,         1000, 3300, tps6591x_rails(VIO), 1, 0, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF, LDO_LOW_POWER_ON_SUSPEND);
210
211 #if defined(CONFIG_RTC_DRV_TPS6591x)
212 static struct tps6591x_rtc_platform_data rtc_data = {
213         .irq = TEGRA_NR_IRQS + TPS6591X_INT_RTC_ALARM,
214         .time = {
215                 .tm_year = 2000,
216                 .tm_mon = 0,
217                 .tm_mday = 1,
218                 .tm_hour = 0,
219                 .tm_min = 0,
220                 .tm_sec = 0,
221         },
222 };
223
224 #define TPS_RTC_REG()                                   \
225         {                                               \
226                 .id     = 0,                            \
227                 .name   = "rtc_tps6591x",               \
228                 .platform_data = &rtc_data,             \
229         }
230 #endif
231
232 #define TPS_REG(_id, _name, _sname)                             \
233         {                                                       \
234                 .id     = TPS6591X_ID_##_id,                    \
235                 .name   = "tps6591x-regulator",                 \
236                 .platform_data  = &pdata_##_name##_##_sname,    \
237         }
238
239 #define TPS6591X_DEV_COMMON_E118X               \
240         TPS_REG(VDD_2, vdd2, 0),                \
241         TPS_REG(VDDCTRL, vddctrl, 0),           \
242         TPS_REG(LDO_1, ldo1, 0),                \
243         TPS_REG(LDO_2, ldo2, 0),                \
244         TPS_REG(LDO_3, ldo3, e118x),            \
245         TPS_REG(LDO_4, ldo4, 0),                \
246         TPS_REG(LDO_5, ldo5, e118x),            \
247         TPS_REG(LDO_6, ldo6, 0),                \
248         TPS_REG(LDO_7, ldo7, 0),                \
249         TPS_REG(LDO_8, ldo8, 0)
250
251 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_0[] = {
252         TPS_REG(VIO, vio, 0),
253         TPS_REG(VDD_1, vdd1, skubit0_0),
254         TPS6591X_DEV_COMMON_E118X,
255 #if defined(CONFIG_RTC_DRV_TPS6591x)
256         TPS_RTC_REG(),
257 #endif
258 };
259
260 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_1[] = {
261         TPS_REG(VIO, vio, 0),
262         TPS_REG(VDD_1, vdd1, skubit0_1),
263         TPS6591X_DEV_COMMON_E118X,
264 #if defined(CONFIG_RTC_DRV_TPS6591x)
265         TPS_RTC_REG(),
266 #endif
267 };
268
269 #define TPS6591X_DEV_COMMON_CARDHU              \
270         TPS_REG(VDD_2, vdd2, 0),                \
271         TPS_REG(VDDCTRL, vddctrl, 0),           \
272         TPS_REG(LDO_1, ldo1, 0),                \
273         TPS_REG(LDO_2, ldo2, 0),                \
274         TPS_REG(LDO_3, ldo3, e1198),            \
275         TPS_REG(LDO_4, ldo4, 0),                \
276         TPS_REG(LDO_5, ldo5, e1198),            \
277         TPS_REG(LDO_6, ldo6, 0),                \
278         TPS_REG(LDO_7, ldo7, 0),                \
279         TPS_REG(LDO_8, ldo8, 0)
280
281 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_0[] = {
282         TPS_REG(VIO, vio, 0),
283         TPS_REG(VDD_1, vdd1, skubit0_0),
284         TPS6591X_DEV_COMMON_CARDHU,
285 #if defined(CONFIG_RTC_DRV_TPS6591x)
286         TPS_RTC_REG(),
287 #endif
288 };
289
290 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_1[] = {
291         TPS_REG(VIO, vio, 0),
292         TPS_REG(VDD_1, vdd1, skubit0_1),
293         TPS6591X_DEV_COMMON_CARDHU,
294 #if defined(CONFIG_RTC_DRV_TPS6591x)
295         TPS_RTC_REG(),
296 #endif
297 };
298
299 #define TPS_GPIO_INIT_PDATA(gpio_nr, _init_apply, _sleep_en, _pulldn_en, _output_en, _output_val)       \
300         [gpio_nr] = {                                   \
301                         .sleep_en       = _sleep_en,    \
302                         .pulldn_en      = _pulldn_en,   \
303                         .output_mode_en = _output_en,   \
304                         .output_val     = _output_val,  \
305                         .init_apply     = _init_apply,  \
306                      }
307 static struct tps6591x_gpio_init_data tps_gpio_pdata_e1291_a04[] =  {
308         TPS_GPIO_INIT_PDATA(0, 0, 0, 0, 0, 0),
309         TPS_GPIO_INIT_PDATA(1, 0, 0, 0, 0, 0),
310         TPS_GPIO_INIT_PDATA(2, 1, 1, 0, 1, 1),
311         TPS_GPIO_INIT_PDATA(3, 0, 0, 0, 0, 0),
312         TPS_GPIO_INIT_PDATA(4, 0, 0, 0, 0, 0),
313         TPS_GPIO_INIT_PDATA(5, 0, 0, 0, 0, 0),
314         TPS_GPIO_INIT_PDATA(6, 0, 0, 0, 0, 0),
315         TPS_GPIO_INIT_PDATA(7, 0, 0, 0, 0, 0),
316         TPS_GPIO_INIT_PDATA(8, 0, 0, 0, 0, 0),
317 };
318
319 static struct tps6591x_sleep_keepon_data tps_slp_keepon = {
320         .clkout32k_keepon = 1,
321 };
322
323 static struct tps6591x_platform_data tps_platform = {
324         .irq_base       = TPS6591X_IRQ_BASE,
325         .gpio_base      = TPS6591X_GPIO_BASE,
326         .dev_slp_en     = true,
327         .slp_keepon     = &tps_slp_keepon,
328 };
329
330 static struct i2c_board_info __initdata cardhu_regulators[] = {
331         {
332                 I2C_BOARD_INFO("tps6591x", 0x2D),
333                 .irq            = INT_EXTERNAL_PMU,
334                 .platform_data  = &tps_platform,
335         },
336 };
337
338 /* TPS62361B DC-DC converter */
339 static struct regulator_consumer_supply tps6236x_dcdc_supply[] = {
340         REGULATOR_SUPPLY("vdd_core", NULL),
341 };
342
343 static struct tps6236x_regulator_platform_data tps6236x_pdata = {
344         .reg_init_data = {                                      \
345                 .constraints = {                                \
346                         .min_uV = 500000,                       \
347                         .max_uV = 1770000,                      \
348                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
349                                              REGULATOR_MODE_STANDBY), \
350                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
351                                            REGULATOR_CHANGE_STATUS |  \
352                                            REGULATOR_CHANGE_VOLTAGE), \
353                         .always_on = 1,                         \
354                         .boot_on =  1,                          \
355                         .apply_uV = 0,                          \
356                 },                                              \
357                 .num_consumer_supplies = ARRAY_SIZE(tps6236x_dcdc_supply), \
358                 .consumer_supplies = tps6236x_dcdc_supply,              \
359                 },                                                      \
360         .internal_pd_enable = 0,                                        \
361         .enable_discharge = true,                                       \
362         .vsel = 3,                                                      \
363         .init_uV = -1,                                                  \
364         .init_apply = 0,                                                \
365 };
366
367 static struct i2c_board_info __initdata tps6236x_boardinfo[] = {
368         {
369                 I2C_BOARD_INFO("tps62361B", 0x60),
370                 .platform_data  = &tps6236x_pdata,
371         },
372 };
373
374 int __init cardhu_regulator_init(void)
375 {
376         struct board_info board_info;
377         struct board_info pmu_board_info;
378         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
379         u32 pmc_ctrl;
380
381         /* configure the power management controller to trigger PMU
382          * interrupts when low */
383
384         pmc_ctrl = readl(pmc + PMC_CTRL);
385         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
386
387         tegra_get_board_info(&board_info);
388         tegra_get_pmu_board_info(&pmu_board_info);
389
390         if (pmu_board_info.board_id == BOARD_PMU_PM298)
391                 return cardhu_pm298_regulator_init();
392
393         if (pmu_board_info.board_id == BOARD_PMU_PM299)
394                 return cardhu_pm299_regulator_init();
395
396         /* The regulator details have complete constraints */
397         regulator_has_full_constraints();
398
399         /* PMU-E1208, the ldo2 should be set to 1200mV */
400         if (pmu_board_info.board_id == BOARD_E1208) {
401                 pdata_ldo2_0.regulator.constraints.min_uV = 1200000;
402                 pdata_ldo2_0.regulator.constraints.max_uV = 1200000;
403         }
404
405         if ((board_info.board_id == BOARD_E1198) ||
406                 (board_info.board_id == BOARD_E1291)) {
407                 if (board_info.sku & SKU_DCDC_TPS62361_SUPPORT) {
408                         tps_platform.num_subdevs =
409                                         ARRAY_SIZE(tps_devs_e1198_skubit0_1);
410                         tps_platform.subdevs = tps_devs_e1198_skubit0_1;
411                 } else {
412                         tps_platform.num_subdevs =
413                                         ARRAY_SIZE(tps_devs_e1198_skubit0_0);
414                         tps_platform.subdevs = tps_devs_e1198_skubit0_0;
415                 }
416         } else {
417                 if (board_info.board_id == BOARD_PM269)
418                         pdata_ldo3_e118x.slew_rate_uV_per_us = 250;
419
420                 if (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT) {
421                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_1);
422                         tps_platform.subdevs = tps_devs_e118x_skubit0_1;
423                 } else {
424                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_0);
425                         tps_platform.subdevs = tps_devs_e118x_skubit0_0;
426                 }
427         }
428
429         /* E1291-A04/A05: Enable DEV_SLP and enable sleep on GPIO2 */
430         if ((board_info.board_id == BOARD_E1291) &&
431                         ((board_info.fab == BOARD_FAB_A04) ||
432                          (board_info.fab == BOARD_FAB_A05))) {
433                 tps_platform.dev_slp_en = true;
434                 tps_platform.gpio_init_data = tps_gpio_pdata_e1291_a04;
435                 tps_platform.num_gpioinit_data =
436                                         ARRAY_SIZE(tps_gpio_pdata_e1291_a04);
437         }
438
439         i2c_register_board_info(4, cardhu_regulators, 1);
440
441         /* Resgister the TPS6236x for all boards whose sku bit 0 is set. */
442         if ((board_info.sku & SKU_DCDC_TPS62361_SUPPORT) ||
443                         (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT)) {
444                 pr_info("Registering the device TPS62361B\n");
445                 i2c_register_board_info(4, tps6236x_boardinfo, 1);
446         }
447         return 0;
448 }
449
450 /* EN_5V_CP from PMU GP0 */
451 static struct regulator_consumer_supply gpio_switch_en_5v_cp_supply[] = {
452         REGULATOR_SUPPLY("vdd_5v0_sby", NULL),
453         REGULATOR_SUPPLY("vdd_hall", NULL),
454         REGULATOR_SUPPLY("vterm_ddr", NULL),
455         REGULATOR_SUPPLY("v2ref_ddr", NULL),
456 };
457 static int gpio_switch_en_5v_cp_voltages[] = { 5000};
458
459 /* EN_5V0 From PMU GP2 */
460 static struct regulator_consumer_supply gpio_switch_en_5v0_supply[] = {
461         REGULATOR_SUPPLY("vdd_5v0_sys", NULL),
462 };
463 static int gpio_switch_en_5v0_voltages[] = { 5000};
464
465 /* EN_DDR From PMU GP6 */
466 static struct regulator_consumer_supply gpio_switch_en_ddr_supply[] = {
467         REGULATOR_SUPPLY("mem_vddio_ddr", NULL),
468         REGULATOR_SUPPLY("t30_vddio_ddr", NULL),
469 };
470 static int gpio_switch_en_ddr_voltages[] = { 1500};
471
472 /* EN_3V3_SYS From PMU GP7 */
473 static struct regulator_consumer_supply gpio_switch_en_3v3_sys_supply[] = {
474         REGULATOR_SUPPLY("vdd_lvds", NULL),
475         REGULATOR_SUPPLY("vdd_pnl", NULL),
476         REGULATOR_SUPPLY("vcom_3v3", NULL),
477         REGULATOR_SUPPLY("vdd_3v3", NULL),
478         REGULATOR_SUPPLY("vcore_mmc", NULL),
479         REGULATOR_SUPPLY("vddio_pex_ctl", NULL),
480         REGULATOR_SUPPLY("pwrdet_pex_ctl", NULL),
481         REGULATOR_SUPPLY("hvdd_pex_pmu", NULL),
482         REGULATOR_SUPPLY("avdd_hdmi", NULL),
483         REGULATOR_SUPPLY("vpp_fuse", NULL),
484         REGULATOR_SUPPLY("avdd_usb", NULL),
485         REGULATOR_SUPPLY("vdd_ddr_rx", NULL),
486         REGULATOR_SUPPLY("vcore_nand", NULL),
487         REGULATOR_SUPPLY("hvdd_sata", NULL),
488         REGULATOR_SUPPLY("vddio_gmi_pmu", NULL),
489         REGULATOR_SUPPLY("pwrdet_nand", NULL),
490         REGULATOR_SUPPLY("avdd_cam1", NULL),
491         REGULATOR_SUPPLY("vdd_af", NULL),
492         REGULATOR_SUPPLY("avdd_cam2", NULL),
493         REGULATOR_SUPPLY("vdd_acc", NULL),
494         REGULATOR_SUPPLY("vdd_phtl", NULL),
495         REGULATOR_SUPPLY("vddio_tp", NULL),
496         REGULATOR_SUPPLY("vdd_led", NULL),
497         REGULATOR_SUPPLY("vddio_cec", NULL),
498         REGULATOR_SUPPLY("vdd_cmps", NULL),
499         REGULATOR_SUPPLY("vdd_temp", NULL),
500         REGULATOR_SUPPLY("vpp_kfuse", NULL),
501         REGULATOR_SUPPLY("vddio_ts", NULL),
502         REGULATOR_SUPPLY("vdd_ir_led", NULL),
503         REGULATOR_SUPPLY("vddio_1wire", NULL),
504         REGULATOR_SUPPLY("avddio_audio", NULL),
505         REGULATOR_SUPPLY("vdd_ec", NULL),
506         REGULATOR_SUPPLY("vcom_pa", NULL),
507         REGULATOR_SUPPLY("vdd_3v3_devices", NULL),
508         REGULATOR_SUPPLY("vdd_3v3_dock", NULL),
509         REGULATOR_SUPPLY("vdd_3v3_edid", NULL),
510         REGULATOR_SUPPLY("vdd_3v3_hdmi_cec", NULL),
511         REGULATOR_SUPPLY("vdd_3v3_gmi", NULL),
512         REGULATOR_SUPPLY("vdd_spk_amp", "tegra-snd-wm8903"),
513         REGULATOR_SUPPLY("vdd_3v3_sensor", NULL),
514         REGULATOR_SUPPLY("vdd_3v3_cam", NULL),
515         REGULATOR_SUPPLY("vdd_3v3_als", NULL),
516         REGULATOR_SUPPLY("debug_cons", NULL),
517         REGULATOR_SUPPLY("vdd", "4-004c"),
518 };
519 static int gpio_switch_en_3v3_sys_voltages[] = { 3300};
520
521 /* DIS_5V_SWITCH from AP SPI2_SCK X02 */
522 static struct regulator_consumer_supply gpio_switch_dis_5v_switch_supply[] = {
523         REGULATOR_SUPPLY("master_5v_switch", NULL),
524 };
525 static int gpio_switch_dis_5v_switch_voltages[] = { 5000};
526
527 /* EN_VDD_BL */
528 static struct regulator_consumer_supply gpio_switch_en_vdd_bl_supply[] = {
529         REGULATOR_SUPPLY("vdd_backlight", NULL),
530         REGULATOR_SUPPLY("vdd_backlight1", NULL),
531 };
532 static int gpio_switch_en_vdd_bl_voltages[] = { 5000};
533
534 /* EN_VDD_BL2 (E1291-A03) from AP PEX_L0_PRSNT_N DD.00 */
535 static struct regulator_consumer_supply gpio_switch_en_vdd_bl2_supply[] = {
536         REGULATOR_SUPPLY("vdd_backlight2", NULL),
537 };
538 static int gpio_switch_en_vdd_bl2_voltages[] = { 5000};
539
540 /* EN_3V3_MODEM from AP GPIO VI_VSYNCH D06*/
541 static struct regulator_consumer_supply gpio_switch_en_3v3_modem_supply[] = {
542         REGULATOR_SUPPLY("vdd_3v3_mini_card", NULL),
543         REGULATOR_SUPPLY("vdd_mini_card", NULL),
544 };
545 static int gpio_switch_en_3v3_modem_voltages[] = { 3300};
546
547 /* EN_USB1_VBUS_OC*/
548 static struct regulator_consumer_supply gpio_switch_en_usb1_vbus_oc_supply[] = {
549         REGULATOR_SUPPLY("vdd_vbus_micro_usb", NULL),
550 };
551 static int gpio_switch_en_usb1_vbus_oc_voltages[] = { 5000};
552
553 /*EN_USB3_VBUS_OC*/
554 static struct regulator_consumer_supply gpio_switch_en_usb3_vbus_oc_supply[] = {
555         REGULATOR_SUPPLY("vdd_vbus_typea_usb", NULL),
556 };
557 static int gpio_switch_en_usb3_vbus_oc_voltages[] = { 5000};
558
559 /* EN_VDDIO_VID_OC from AP GPIO VI_PCLK T00*/
560 static struct regulator_consumer_supply gpio_switch_en_vddio_vid_oc_supply[] = {
561         REGULATOR_SUPPLY("vdd_hdmi_con", NULL),
562 };
563 static int gpio_switch_en_vddio_vid_oc_voltages[] = { 5000};
564
565 /* EN_VDD_PNL1 from AP GPIO VI_D6 L04*/
566 static struct regulator_consumer_supply gpio_switch_en_vdd_pnl1_supply[] = {
567         REGULATOR_SUPPLY("vdd_lcd_panel", NULL),
568 };
569 static int gpio_switch_en_vdd_pnl1_voltages[] = { 3300};
570
571 /* CAM1_LDO_EN from AP GPIO KB_ROW6 R06*/
572 static struct regulator_consumer_supply gpio_switch_cam1_ldo_en_supply[] = {
573         REGULATOR_SUPPLY("vdd_2v8_cam1", NULL),
574         REGULATOR_SUPPLY("vdd", "6-0072"),
575 };
576 static int gpio_switch_cam1_ldo_en_voltages[] = { 2800};
577
578 /* CAM2_LDO_EN from AP GPIO KB_ROW7 R07*/
579 static struct regulator_consumer_supply gpio_switch_cam2_ldo_en_supply[] = {
580         REGULATOR_SUPPLY("vdd_2v8_cam2", NULL),
581         REGULATOR_SUPPLY("vdd", "7-0072"),
582 };
583 static int gpio_switch_cam2_ldo_en_voltages[] = { 2800};
584
585 /* CAM3_LDO_EN from AP GPIO KB_ROW8 S00*/
586 static struct regulator_consumer_supply gpio_switch_cam3_ldo_en_supply[] = {
587         REGULATOR_SUPPLY("vdd_cam3", NULL),
588 };
589 static int gpio_switch_cam3_ldo_en_voltages[] = { 3300};
590
591 /* EN_VDD_COM from AP GPIO SDMMC3_DAT5 D00*/
592 static struct regulator_consumer_supply gpio_switch_en_vdd_com_supply[] = {
593         REGULATOR_SUPPLY("vdd_com_bd", NULL),
594 };
595 static int gpio_switch_en_vdd_com_voltages[] = { 3300};
596
597 /* EN_VDD_SDMMC1 from AP GPIO VI_HSYNC D07*/
598 static struct regulator_consumer_supply gpio_switch_en_vdd_sdmmc1_supply[] = {
599         REGULATOR_SUPPLY("vddio_sd_slot", "sdhci-tegra.0"),
600 };
601 static int gpio_switch_en_vdd_sdmmc1_voltages[] = { 3300};
602
603 /* EN_3V3_EMMC from AP GPIO SDMMC3_DAT4 D01*/
604 static struct regulator_consumer_supply gpio_switch_en_3v3_emmc_supply[] = {
605         REGULATOR_SUPPLY("vdd_emmc_core", NULL),
606 };
607 static int gpio_switch_en_3v3_emmc_voltages[] = { 3300};
608
609 /* EN_3V3_PEX_HVDD from AP GPIO VI_D09 L07*/
610 static struct regulator_consumer_supply gpio_switch_en_3v3_pex_hvdd_supply[] = {
611         REGULATOR_SUPPLY("hvdd_pex", NULL),
612 };
613 static int gpio_switch_en_3v3_pex_hvdd_voltages[] = { 3300};
614
615 /* EN_3v3_FUSE from AP GPIO VI_D08 L06*/
616 static struct regulator_consumer_supply gpio_switch_en_3v3_fuse_supply[] = {
617         REGULATOR_SUPPLY("vdd_fuse", NULL),
618 };
619 static int gpio_switch_en_3v3_fuse_voltages[] = { 3300};
620
621 /* EN_1V8_CAM from AP GPIO GPIO_PBB4 PBB04*/
622 static struct regulator_consumer_supply gpio_switch_en_1v8_cam_supply[] = {
623         REGULATOR_SUPPLY("vdd_1v8_cam1", NULL),
624         REGULATOR_SUPPLY("vdd_1v8_cam2", NULL),
625         REGULATOR_SUPPLY("vdd_1v8_cam3", NULL),
626         REGULATOR_SUPPLY("vdd_i2c", "6-0072"),
627         REGULATOR_SUPPLY("vdd_i2c", "7-0072"),
628         REGULATOR_SUPPLY("vdd_i2c", "2-0033"),
629 };
630 static int gpio_switch_en_1v8_cam_voltages[] = { 1800};
631
632 static struct regulator_consumer_supply gpio_switch_en_vbrtr_supply[] = {
633         REGULATOR_SUPPLY("vdd_vbrtr", NULL),
634 };
635 static int gpio_switch_en_vbrtr_voltages[] = { 3300};
636
637 static int enable_load_switch_rail(
638                 struct gpio_switch_regulator_subdev_data *psubdev_data)
639 {
640         int ret;
641
642         if (psubdev_data->pin_group <= 0)
643                 return -EINVAL;
644
645         /* Tristate and make pin as input*/
646         ret = tegra_pinmux_set_tristate(psubdev_data->pin_group,
647                                                 TEGRA_TRI_TRISTATE);
648         if (ret < 0)
649                 return ret;
650         return gpio_direction_input(psubdev_data->gpio_nr);
651 }
652
653 static int disable_load_switch_rail(
654                 struct gpio_switch_regulator_subdev_data *psubdev_data)
655 {
656         int ret;
657
658         if (psubdev_data->pin_group <= 0)
659                 return -EINVAL;
660
661         /* Un-tristate and driver low */
662         ret = tegra_pinmux_set_tristate(psubdev_data->pin_group,
663                                                 TEGRA_TRI_NORMAL);
664         if (ret < 0)
665                 return ret;
666         return gpio_direction_output(psubdev_data->gpio_nr, 0);
667 }
668
669
670 /* Macro for defining gpio switch regulator sub device data */
671 #define GREG_INIT(_id, _var, _name, _input_supply, _always_on, _boot_on, \
672         _gpio_nr, _active_low, _init_state, _pg, _enable, _disable)      \
673         static struct gpio_switch_regulator_subdev_data gpio_pdata_##_var =  \
674         {                                                               \
675                 .regulator_name = "gpio-switch-"#_name,                 \
676                 .input_supply   = _input_supply,                        \
677                 .id             = _id,                                  \
678                 .gpio_nr        = _gpio_nr,                             \
679                 .pin_group      = _pg,                                  \
680                 .active_low     = _active_low,                          \
681                 .init_state     = _init_state,                          \
682                 .voltages       = gpio_switch_##_name##_voltages,       \
683                 .n_voltages     = ARRAY_SIZE(gpio_switch_##_name##_voltages), \
684                 .num_consumer_supplies =                                \
685                                 ARRAY_SIZE(gpio_switch_##_name##_supply), \
686                 .consumer_supplies = gpio_switch_##_name##_supply,      \
687                 .constraints = {                                        \
688                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
689                                              REGULATOR_MODE_STANDBY),   \
690                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
691                                            REGULATOR_CHANGE_STATUS |    \
692                                            REGULATOR_CHANGE_VOLTAGE),   \
693                         .always_on = _always_on,                        \
694                         .boot_on = _boot_on,                            \
695                 },                                                      \
696                 .enable_rail = _enable,                                 \
697                 .disable_rail = _disable,                               \
698         }
699
700 /* common to most of boards*/
701 GREG_INIT(0, en_5v_cp,          en_5v_cp,       NULL,                   1,      0,      TPS6591X_GPIO_0,        false,  1,      0,      0,      0);
702 GREG_INIT(1, en_5v0,            en_5v0,         NULL,                   0,      0,      TPS6591X_GPIO_2,        false,  0,      0,      0,      0);
703 GREG_INIT(2, en_ddr,            en_ddr,         NULL,                   0,      0,      TPS6591X_GPIO_6,        false,  0,      0,      0,      0);
704 GREG_INIT(3, en_3v3_sys,        en_3v3_sys,     NULL,                   0,      0,      TPS6591X_GPIO_7,        false,  0,      0,      0,      0);
705 GREG_INIT(4, en_vdd_bl,         en_vdd_bl,      NULL,                   0,      0,      TEGRA_GPIO_PK3,         false,  1,      0,      0,      0);
706 GREG_INIT(5, en_3v3_modem,      en_3v3_modem,   NULL,                   1,      0,      TEGRA_GPIO_PD6,         false,  1,      0,      0,      0);
707 GREG_INIT(6, en_vdd_pnl1,       en_vdd_pnl1,    "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PL4,         false,  1,      0,      0,      0);
708 GREG_INIT(7, cam3_ldo_en,       cam3_ldo_en,    "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PS0,         false,  0,      0,      0,      0);
709 GREG_INIT(8, en_vdd_com,        en_vdd_com,     "vdd_3v3_devices",      1,      0,      TEGRA_GPIO_PD0,         false,  1,      0,      0,      0);
710 GREG_INIT(9, en_3v3_fuse,       en_3v3_fuse,    "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PL6,         false,  0,      0,      0,      0);
711 GREG_INIT(10, en_3v3_emmc,      en_3v3_emmc,    "vdd_3v3_devices",      1,      0,      TEGRA_GPIO_PD1,         false,  1,      0,      0,      0);
712 GREG_INIT(11, en_vdd_sdmmc1,    en_vdd_sdmmc1,  "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PD7,         false,  1,      0,      0,      0);
713 GREG_INIT(12, en_3v3_pex_hvdd,  en_3v3_pex_hvdd, "hvdd_pex_pmu",        0,      0,      TEGRA_GPIO_PL7,         false,  0,      0,      0,      0);
714 GREG_INIT(13, en_1v8_cam,       en_1v8_cam,     "vdd_gen1v8",           0,      0,      TEGRA_GPIO_PBB4,        false,  0,      0,      0,      0);
715
716 /* E1291-A04/A05 specific */
717 GREG_INIT(1, en_5v0_a04,        en_5v0,         NULL,                   0,      0,      TPS6591X_GPIO_8,        false,  0,      0,      0,      0);
718 GREG_INIT(2, en_ddr_a04,        en_ddr,         NULL,                   0,      0,      TPS6591X_GPIO_7,        false,  0,      0,      0,      0);
719 GREG_INIT(3, en_3v3_sys_a04,    en_3v3_sys,     NULL,                   0,      0,      TPS6591X_GPIO_6,        false,  0,      0,      0,      0);
720
721
722 /*Specific to pm269*/
723 GREG_INIT(4, en_vdd_bl_pm269,           en_vdd_bl,              NULL,
724         0,      0,      TEGRA_GPIO_PH3, false,  1,      0,      0,      0);
725 GREG_INIT(6, en_vdd_pnl1_pm269,         en_vdd_pnl1,            "vdd_3v3_devices",
726         0,      0,      TEGRA_GPIO_PW1, false,  1,      0,      0,      0);
727 GREG_INIT(9, en_3v3_fuse_pm269,         en_3v3_fuse,            "vdd_3v3_devices",
728         0,      0,      TEGRA_GPIO_PC1, false,  0,      0,      0,      0);
729 GREG_INIT(12, en_3v3_pex_hvdd_pm269,    en_3v3_pex_hvdd,        "hvdd_pex_pmu",
730         0,      0,      TEGRA_GPIO_PC6, false,  0,      0,      0,      0);
731 GREG_INIT(17, en_vddio_vid_oc_pm269,    en_vddio_vid_oc,        "master_5v_switch",
732         0,      0,      TEGRA_GPIO_PP2, false,  0,      TEGRA_PINGROUP_DAP3_DOUT,
733         enable_load_switch_rail, disable_load_switch_rail);
734
735 /* Specific to E1187/E1186/E1256 */
736 GREG_INIT(14, dis_5v_switch_e118x,      dis_5v_switch,          "vdd_5v0_sys",
737                 0,      0,      TEGRA_GPIO_PX2,         true,   0,      0,      0,      0);
738 GREG_INIT(15, en_usb1_vbus_oc_e118x,    en_usb1_vbus_oc,        "master_5v_switch",
739                 0,      0,      TEGRA_GPIO_PI4,         false,  0,      TEGRA_PINGROUP_GMI_RST_N,
740                 enable_load_switch_rail, disable_load_switch_rail);
741 GREG_INIT(16, en_usb3_vbus_oc_e118x,    en_usb3_vbus_oc,        "master_5v_switch",
742                 0,      0,      TEGRA_GPIO_PH7,         false,  0,      TEGRA_PINGROUP_GMI_AD15,
743                 enable_load_switch_rail, disable_load_switch_rail);
744 GREG_INIT(17, en_vddio_vid_oc_e118x,    en_vddio_vid_oc,        "master_5v_switch",
745                 0,      0,      TEGRA_GPIO_PT0,         false,  0,      TEGRA_PINGROUP_VI_PCLK,
746                 enable_load_switch_rail, disable_load_switch_rail);
747
748 /* E1198/E1291 specific  fab < A03 */
749 GREG_INIT(15, en_usb1_vbus_oc,          en_usb1_vbus_oc,        "vdd_5v0_sys",
750                 0,      0,      TEGRA_GPIO_PI4,         false,  0,      TEGRA_PINGROUP_GMI_RST_N,
751                 enable_load_switch_rail, disable_load_switch_rail);
752 GREG_INIT(16, en_usb3_vbus_oc,          en_usb3_vbus_oc,        "vdd_5v0_sys",
753                 0,      0,      TEGRA_GPIO_PH7,         false,  0,      TEGRA_PINGROUP_GMI_AD15,
754                 enable_load_switch_rail, disable_load_switch_rail);
755
756 /* E1198/E1291 specific  fab >= A03 */
757 GREG_INIT(15, en_usb1_vbus_oc_a03,      en_usb1_vbus_oc,        "vdd_5v0_sys",
758                 0,      0,      TEGRA_GPIO_PDD6,                false,  0,      TEGRA_PINGROUP_PEX_L1_CLKREQ_N,
759                 enable_load_switch_rail, disable_load_switch_rail);
760 GREG_INIT(16, en_usb3_vbus_oc_a03,              en_usb3_vbus_oc,        "vdd_5v0_sys",
761                 0,      0,      TEGRA_GPIO_PDD4,                false,  0,      TEGRA_PINGROUP_PEX_L1_PRSNT_N,
762                 enable_load_switch_rail, disable_load_switch_rail);
763
764 /* E1198/E1291 specific */
765 GREG_INIT(17, en_vddio_vid_oc,          en_vddio_vid_oc,        "vdd_5v0_sys",
766                 0,      0,      TEGRA_GPIO_PT0,         false,  0,      TEGRA_PINGROUP_VI_PCLK,
767                 enable_load_switch_rail, disable_load_switch_rail);
768
769 /* E1198/E1291 specific*/
770 GREG_INIT(18, cam1_ldo_en,      cam1_ldo_en,    "vdd_3v3_cam",  0,      0,      TEGRA_GPIO_PR6,         false,  0,      0,      0,      0);
771 GREG_INIT(19, cam2_ldo_en,      cam2_ldo_en,    "vdd_3v3_cam",  0,      0,      TEGRA_GPIO_PR7,         false,  0,      0,      0,      0);
772
773 /* E1291 A03 specific */
774 GREG_INIT(20, en_vdd_bl1_a03,   en_vdd_bl,      NULL,           0,      0,      TEGRA_GPIO_PDD2,        false,  1,      0,      0,      0);
775 GREG_INIT(21, en_vdd_bl2_a03,   en_vdd_bl2,     NULL,           0,      0,      TEGRA_GPIO_PDD0,        false,  1,      0,      0,      0);
776
777 GREG_INIT(22, en_vbrtr,         en_vbrtr,       "vdd_3v3_devices",      0,      0,      PMU_TCA6416_GPIO_PORT12,        false,  0,      0,      0,      0);
778
779 /* PM313 display board specific */
780 GREG_INIT(4, en_vdd_bl_pm313,       en_vdd_bl,      NULL,
781                 0,      0,      TEGRA_GPIO_PK3, false,  1,  0,  0,  0);
782 GREG_INIT(6, en_vdd_pnl1_pm313,     en_vdd_pnl1,        "vdd_3v3_devices",
783                 0,      0,      TEGRA_GPIO_PH3, false,  1,  0,  0,  0);
784
785 #define ADD_GPIO_REG(_name) &gpio_pdata_##_name
786
787 #define COMMON_GPIO_REG \
788         ADD_GPIO_REG(en_5v_cp),                 \
789         ADD_GPIO_REG(en_5v0),                   \
790         ADD_GPIO_REG(en_ddr),                   \
791         ADD_GPIO_REG(en_3v3_sys),               \
792         ADD_GPIO_REG(en_3v3_modem),             \
793         ADD_GPIO_REG(en_vdd_pnl1),              \
794         ADD_GPIO_REG(cam3_ldo_en),              \
795         ADD_GPIO_REG(en_vdd_com),               \
796         ADD_GPIO_REG(en_3v3_fuse),              \
797         ADD_GPIO_REG(en_3v3_emmc),              \
798         ADD_GPIO_REG(en_vdd_sdmmc1),            \
799         ADD_GPIO_REG(en_3v3_pex_hvdd),          \
800         ADD_GPIO_REG(en_1v8_cam),
801
802 #define COMMON_GPIO_REG_E1291_A04 \
803         ADD_GPIO_REG(en_5v_cp),                 \
804         ADD_GPIO_REG(en_5v0_a04),               \
805         ADD_GPIO_REG(en_ddr_a04),               \
806         ADD_GPIO_REG(en_3v3_sys_a04),           \
807         ADD_GPIO_REG(en_3v3_modem),             \
808         ADD_GPIO_REG(en_vdd_pnl1),              \
809         ADD_GPIO_REG(cam3_ldo_en),              \
810         ADD_GPIO_REG(en_vdd_com),               \
811         ADD_GPIO_REG(en_3v3_fuse),              \
812         ADD_GPIO_REG(en_3v3_emmc),              \
813         ADD_GPIO_REG(en_vdd_sdmmc1),            \
814         ADD_GPIO_REG(en_3v3_pex_hvdd),          \
815         ADD_GPIO_REG(en_1v8_cam),
816
817 #define PM269_GPIO_REG \
818         ADD_GPIO_REG(en_5v_cp),                 \
819         ADD_GPIO_REG(en_5v0),                   \
820         ADD_GPIO_REG(en_ddr),                   \
821         ADD_GPIO_REG(en_3v3_sys),               \
822         ADD_GPIO_REG(en_3v3_modem),             \
823         ADD_GPIO_REG(cam1_ldo_en),              \
824         ADD_GPIO_REG(cam2_ldo_en),              \
825         ADD_GPIO_REG(cam3_ldo_en),              \
826         ADD_GPIO_REG(en_vdd_com),               \
827         ADD_GPIO_REG(en_3v3_fuse_pm269),        \
828         ADD_GPIO_REG(en_3v3_emmc),              \
829         ADD_GPIO_REG(en_3v3_pex_hvdd_pm269),    \
830         ADD_GPIO_REG(en_1v8_cam),               \
831         ADD_GPIO_REG(dis_5v_switch_e118x),      \
832         ADD_GPIO_REG(en_usb1_vbus_oc_e118x),    \
833         ADD_GPIO_REG(en_usb3_vbus_oc_e118x),    \
834         ADD_GPIO_REG(en_vddio_vid_oc_pm269),
835
836 #define E1247_DISPLAY_GPIO_REG          \
837         ADD_GPIO_REG(en_vdd_bl_pm269),  \
838         ADD_GPIO_REG(en_vdd_pnl1_pm269),
839
840 #define PM313_DISPLAY_GPIO_REG          \
841         ADD_GPIO_REG(en_vdd_bl_pm313),  \
842         ADD_GPIO_REG(en_vdd_pnl1_pm313),
843
844 #define E118x_GPIO_REG                          \
845         ADD_GPIO_REG(en_5v_cp),                 \
846         ADD_GPIO_REG(en_5v0),                   \
847         ADD_GPIO_REG(en_ddr),                   \
848         ADD_GPIO_REG(en_3v3_sys),               \
849         ADD_GPIO_REG(en_3v3_modem),             \
850         ADD_GPIO_REG(cam3_ldo_en),              \
851         ADD_GPIO_REG(en_vdd_com),               \
852         ADD_GPIO_REG(en_3v3_fuse),              \
853         ADD_GPIO_REG(en_3v3_emmc),              \
854         ADD_GPIO_REG(en_vdd_sdmmc1),            \
855         ADD_GPIO_REG(en_3v3_pex_hvdd),          \
856         ADD_GPIO_REG(en_1v8_cam),               \
857         ADD_GPIO_REG(dis_5v_switch_e118x),      \
858         ADD_GPIO_REG(en_usb1_vbus_oc_e118x),    \
859         ADD_GPIO_REG(en_usb3_vbus_oc_e118x),    \
860         ADD_GPIO_REG(en_vddio_vid_oc_e118x),    \
861         ADD_GPIO_REG(en_vbrtr),
862
863 #define E1198_GPIO_REG                  \
864         ADD_GPIO_REG(en_vddio_vid_oc),  \
865         ADD_GPIO_REG(cam1_ldo_en),      \
866         ADD_GPIO_REG(cam2_ldo_en),
867
868 #define E1291_1198_A00_GPIO_REG \
869         ADD_GPIO_REG(en_usb1_vbus_oc),          \
870         ADD_GPIO_REG(en_usb3_vbus_oc),          \
871         ADD_GPIO_REG(en_vdd_bl),
872
873 #define E1291_A03_GPIO_REG      \
874         ADD_GPIO_REG(en_usb1_vbus_oc_a03),              \
875         ADD_GPIO_REG(en_usb3_vbus_oc_a03),              \
876         ADD_GPIO_REG(en_vdd_bl1_a03), \
877         ADD_GPIO_REG(en_vdd_bl2_a03),
878
879 /* Gpio switch regulator platform data  for E1186/E1187/E1256*/
880 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e118x[] = {
881         E118x_GPIO_REG
882         E1247_DISPLAY_GPIO_REG
883 };
884
885 /* Gpio switch regulator platform data  for E1186/E1187/E1256*/
886 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e118x_pm313[] = {
887         E118x_GPIO_REG
888         PM313_DISPLAY_GPIO_REG
889 };
890
891 /* Gpio switch regulator platform data for E1198 and E1291*/
892 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1198_base[] = {
893         COMMON_GPIO_REG
894         E1291_1198_A00_GPIO_REG
895         E1198_GPIO_REG
896 };
897
898 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1198_a02[] = {
899         ADD_GPIO_REG(en_5v_cp),
900         ADD_GPIO_REG(en_5v0),
901         ADD_GPIO_REG(en_ddr_a04),
902         ADD_GPIO_REG(en_3v3_sys_a04),
903         ADD_GPIO_REG(en_3v3_modem),
904         ADD_GPIO_REG(en_vdd_pnl1),
905         ADD_GPIO_REG(cam3_ldo_en),
906         ADD_GPIO_REG(en_vdd_com),
907         ADD_GPIO_REG(en_3v3_fuse),
908         ADD_GPIO_REG(en_3v3_emmc),
909         ADD_GPIO_REG(en_vdd_sdmmc1),
910         ADD_GPIO_REG(en_3v3_pex_hvdd),
911         ADD_GPIO_REG(en_1v8_cam),
912         ADD_GPIO_REG(en_usb1_vbus_oc_a03),
913         ADD_GPIO_REG(en_usb3_vbus_oc_a03),
914         ADD_GPIO_REG(en_vdd_bl1_a03),
915         ADD_GPIO_REG(en_vdd_bl2_a03),
916         ADD_GPIO_REG(en_vddio_vid_oc),
917         ADD_GPIO_REG(cam1_ldo_en),
918         ADD_GPIO_REG(cam2_ldo_en),
919 };
920
921 /* Gpio switch regulator platform data for PM269*/
922 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_pm269[] = {
923         PM269_GPIO_REG
924         E1247_DISPLAY_GPIO_REG
925 };
926
927 /* Gpio switch regulator platform data for PM269*/
928 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_pm269_pm313[] = {
929         PM269_GPIO_REG
930         PM313_DISPLAY_GPIO_REG
931 };
932
933 /* Gpio switch regulator platform data for E1291 A03*/
934 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1291_a03[] = {
935         COMMON_GPIO_REG
936         E1291_A03_GPIO_REG
937         E1198_GPIO_REG
938 };
939
940 /* Gpio switch regulator platform data for E1291 A04/A05*/
941 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1291_a04[] = {
942         COMMON_GPIO_REG_E1291_A04
943         E1291_A03_GPIO_REG
944         E1198_GPIO_REG
945 };
946
947
948 static struct gpio_switch_regulator_platform_data  gswitch_pdata;
949 static struct platform_device gswitch_regulator_pdata = {
950         .name = "gpio-switch-regulator",
951         .id   = -1,
952         .dev  = {
953              .platform_data = &gswitch_pdata,
954         },
955 };
956
957 int __init cardhu_gpio_switch_regulator_init(void)
958 {
959         int i;
960         struct board_info board_info;
961         struct board_info pmu_board_info;
962         struct board_info display_board_info;
963
964         tegra_get_board_info(&board_info);
965         tegra_get_pmu_board_info(&pmu_board_info);
966         tegra_get_display_board_info(&display_board_info);
967
968         if (pmu_board_info.board_id == BOARD_PMU_PM298)
969                 return cardhu_pm298_gpio_switch_regulator_init();
970
971         if (pmu_board_info.board_id == BOARD_PMU_PM299)
972                 return cardhu_pm299_gpio_switch_regulator_init();
973
974         switch (board_info.board_id) {
975         case BOARD_E1198:
976                 if (board_info.fab <= BOARD_FAB_A01) {
977                         gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e1198_base);
978                         gswitch_pdata.subdevs = gswitch_subdevs_e1198_base;
979                 } else {
980                         gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e1198_a02);
981                         gswitch_pdata.subdevs = gswitch_subdevs_e1198_a02;
982                 }
983                 break;
984
985         case BOARD_E1291:
986                 if (board_info.fab == BOARD_FAB_A03) {
987                         gswitch_pdata.num_subdevs =
988                                         ARRAY_SIZE(gswitch_subdevs_e1291_a03);
989                         gswitch_pdata.subdevs = gswitch_subdevs_e1291_a03;
990                 } else if ((board_info.fab == BOARD_FAB_A04) ||
991                                 (board_info.fab == BOARD_FAB_A05)) {
992                         gswitch_pdata.num_subdevs =
993                                         ARRAY_SIZE(gswitch_subdevs_e1291_a04);
994                         gswitch_pdata.subdevs = gswitch_subdevs_e1291_a04;
995                 } else {
996                         gswitch_pdata.num_subdevs =
997                                         ARRAY_SIZE(gswitch_subdevs_e1198_base);
998                         gswitch_pdata.subdevs = gswitch_subdevs_e1198_base;
999                 }
1000                 break;
1001
1002         case BOARD_PM269:
1003         case BOARD_PM305:
1004         case BOARD_PM311:
1005         case BOARD_E1257:
1006                 gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_pm269);
1007                 gswitch_pdata.subdevs = gswitch_subdevs_pm269;
1008                 if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
1009                         gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_pm269_pm313);
1010                         gswitch_pdata.subdevs = gswitch_subdevs_pm269_pm313;
1011                 } else {
1012                         gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_pm269);
1013                         gswitch_pdata.subdevs = gswitch_subdevs_pm269;
1014                 }
1015                 break;
1016         default:
1017                 if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
1018                         gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e118x_pm313);
1019                         gswitch_pdata.subdevs = gswitch_subdevs_e118x_pm313;
1020                 } else {
1021                         gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e118x);
1022                         gswitch_pdata.subdevs = gswitch_subdevs_e118x;
1023                 }
1024                 break;
1025         }
1026
1027         for (i = 0; i < gswitch_pdata.num_subdevs; ++i) {
1028                 struct gpio_switch_regulator_subdev_data *gswitch_data = gswitch_pdata.subdevs[i];
1029                 if (gswitch_data->gpio_nr < TEGRA_NR_GPIOS)
1030                         tegra_gpio_enable(gswitch_data->gpio_nr);
1031         }
1032
1033         return platform_device_register(&gswitch_regulator_pdata);
1034 }
1035
1036 static void cardhu_board_suspend(int lp_state, enum suspend_stage stg)
1037 {
1038         if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_SUSPEND_BEFORE_CPU))
1039                 tegra_console_uart_suspend();
1040 }
1041
1042 static void cardhu_board_resume(int lp_state, enum resume_stage stg)
1043 {
1044         if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_RESUME_AFTER_CPU))
1045                 tegra_console_uart_resume();
1046 }
1047
1048 static struct tegra_suspend_platform_data cardhu_suspend_data = {
1049         .cpu_timer      = 2000,
1050         .cpu_off_timer  = 200,
1051         .suspend_mode   = TEGRA_SUSPEND_LP0,
1052         .core_timer     = 0x7e7e,
1053         .core_off_timer = 0,
1054         .corereq_high   = true,
1055         .sysclkreq_high = true,
1056         .cpu_lp2_min_residency = 2000,
1057         .board_suspend = cardhu_board_suspend,
1058         .board_resume = cardhu_board_resume,
1059 };
1060
1061 int __init cardhu_suspend_init(void)
1062 {
1063         struct board_info board_info;
1064         struct board_info pmu_board_info;
1065
1066         tegra_get_board_info(&board_info);
1067         tegra_get_pmu_board_info(&pmu_board_info);
1068
1069         /* For PMU Fab A03, A04 and A05 make core_pwr_req to high */
1070         if ((pmu_board_info.fab == BOARD_FAB_A03) ||
1071                 (pmu_board_info.fab == BOARD_FAB_A04) ||
1072                  (pmu_board_info.fab == BOARD_FAB_A05))
1073                 cardhu_suspend_data.corereq_high = true;
1074
1075         /* CORE_PWR_REQ to be high for all processor/pmu board whose sku bit 0
1076          * is set. This is require to enable the dc-dc converter tps62361x */
1077         if ((board_info.sku & SKU_DCDC_TPS62361_SUPPORT) || (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT))
1078                 cardhu_suspend_data.corereq_high = true;
1079
1080         switch (board_info.board_id) {
1081         case BOARD_E1291:
1082                 /* CORE_PWR_REQ to be high for E1291-A03 */
1083                 if (board_info.fab == BOARD_FAB_A03)
1084                         cardhu_suspend_data.corereq_high = true;
1085                 break;
1086         case BOARD_E1198:
1087         case BOARD_PM269:
1088         case BOARD_PM305:
1089         case BOARD_PM311:
1090                 break;
1091         case BOARD_E1187:
1092         case BOARD_E1186:
1093         case BOARD_E1256:
1094         case BOARD_E1257:
1095                 cardhu_suspend_data.cpu_timer = 5000;
1096                 cardhu_suspend_data.cpu_off_timer = 5000;
1097                 break;
1098         default:
1099                 break;
1100         }
1101
1102         tegra_init_suspend(&cardhu_suspend_data);
1103         return 0;
1104 }
1105
1106 static void cardhu_power_off(void)
1107 {
1108         int ret;
1109         pr_err("cardhu: Powering off the device\n");
1110         ret = tps6591x_power_off();
1111         if (ret)
1112                 pr_err("cardhu: failed to power off\n");
1113
1114         while (1);
1115 }
1116
1117 static void cardhu_pm298_power_off(void)
1118 {
1119         int ret;
1120         pr_err("cardhu-pm298: Powering off the device\n");
1121         ret = max77663_power_off();
1122         if (ret)
1123                 pr_err("cardhu-pm298: failed to power off\n");
1124
1125         while (1);
1126 }
1127
1128 int __init cardhu_power_off_init(void)
1129 {
1130         struct board_info pmu_board_info;
1131
1132         tegra_get_pmu_board_info(&pmu_board_info);
1133
1134         if (pmu_board_info.board_id == BOARD_PMU_PM298)
1135                 pm_power_off = cardhu_pm298_power_off;
1136         else
1137                 pm_power_off = cardhu_power_off;
1138
1139         return 0;
1140 }
1141
1142 static struct tegra_tsensor_pmu_data  tpdata = {
1143         .poweroff_reg_addr = 0x3F,
1144         .poweroff_reg_data = 0x80,
1145         .reset_tegra = 1,
1146         .controller_type = 0,
1147         .i2c_controller_id = 4,
1148         .pinmux = 0,
1149         .pmu_16bit_ops = 0,
1150         .pmu_i2c_addr = 0x2D,
1151 };
1152
1153 void __init cardhu_tsensor_init(void)
1154 {
1155         tegra3_tsensor_init(&tpdata);
1156 }
1157
1158 #ifdef CONFIG_TEGRA_EDP_LIMITS
1159
1160 int __init cardhu_edp_init(void)
1161 {
1162         unsigned int regulator_mA;
1163
1164         regulator_mA = get_maximum_cpu_current_supported();
1165         if (!regulator_mA) {
1166                 regulator_mA = 5000; /* regular T30/s */
1167         }
1168         pr_info("%s: CPU regulator %d mA\n", __func__, regulator_mA);
1169
1170         tegra_init_cpu_edp_limits(regulator_mA);
1171         return 0;
1172 }
1173 #endif
1174
1175 static char *cardhu_battery[] = {
1176         "bq27510-0",
1177 };
1178
1179 static struct gpio_charger_platform_data cardhu_charger_pdata = {
1180         .name = "ac",
1181         .type = POWER_SUPPLY_TYPE_MAINS,
1182         .gpio = AC_PRESENT_GPIO,
1183         .gpio_active_low = 0,
1184         .supplied_to = cardhu_battery,
1185         .num_supplicants = ARRAY_SIZE(cardhu_battery),
1186 };
1187
1188 static struct platform_device cardhu_charger_device = {
1189         .name = "gpio-charger",
1190         .dev = {
1191                 .platform_data = &cardhu_charger_pdata,
1192         },
1193 };
1194
1195 static int __init cardhu_charger_late_init(void)
1196 {
1197         if (!machine_is_cardhu())
1198                 return 0;
1199
1200         platform_device_register(&cardhu_charger_device);
1201         return 0;
1202 }
1203
1204 late_initcall(cardhu_charger_late_init);
1205