arm: tegra: cardhu: Put LDO7/8 to OFF in sleep state
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu-power.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu-power.c
3  *
4  * Copyright (C) 2011 NVIDIA, Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
18  * 02111-1307, USA
19  */
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/regulator/machine.h>
25 #include <linux/mfd/tps6591x.h>
26 #include <linux/gpio.h>
27 #include <linux/io.h>
28 #include <linux/regulator/gpio-switch-regulator.h>
29 #include <linux/regulator/tps6591x-regulator.h>
30 #include <linux/regulator/tps6236x-regulator.h>
31 #include <linux/power/gpio-charger.h>
32
33 #include <asm/mach-types.h>
34
35 #include <mach/iomap.h>
36 #include <mach/irqs.h>
37 #include <mach/pinmux.h>
38 #include <mach/edp.h>
39 #include <mach/tsensor.h>
40
41 #include "gpio-names.h"
42 #include "board.h"
43 #include "board-cardhu.h"
44 #include "pm.h"
45 #include "wakeups-t3.h"
46
47 #define PMC_CTRL                0x0
48 #define PMC_CTRL_INTR_LOW       (1 << 17)
49
50 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_0[] = {
51         REGULATOR_SUPPLY("vdd_core", NULL),
52         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
53 };
54
55 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_1[] = {
56         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
57 };
58
59 static struct regulator_consumer_supply tps6591x_vdd2_supply_0[] = {
60         REGULATOR_SUPPLY("vdd_gen1v5", NULL),
61         REGULATOR_SUPPLY("vcore_lcd", NULL),
62         REGULATOR_SUPPLY("track_ldo1", NULL),
63         REGULATOR_SUPPLY("external_ldo_1v2", NULL),
64         REGULATOR_SUPPLY("vcore_cam1", NULL),
65         REGULATOR_SUPPLY("vcore_cam2", NULL),
66 };
67
68 static struct regulator_consumer_supply tps6591x_vddctrl_supply_0[] = {
69         REGULATOR_SUPPLY("vdd_cpu_pmu", NULL),
70         REGULATOR_SUPPLY("vdd_cpu", NULL),
71         REGULATOR_SUPPLY("vdd_sys", NULL),
72 };
73
74 static struct regulator_consumer_supply tps6591x_vio_supply_0[] = {
75         REGULATOR_SUPPLY("vdd_gen1v8", NULL),
76         REGULATOR_SUPPLY("avdd_hdmi_pll", NULL),
77         REGULATOR_SUPPLY("avdd_usb_pll", NULL),
78         REGULATOR_SUPPLY("avdd_osc", NULL),
79         REGULATOR_SUPPLY("vddio_sys", NULL),
80         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
81         REGULATOR_SUPPLY("pwrdet_sdmmc4", NULL),
82         REGULATOR_SUPPLY("vdd1v8_satelite", NULL),
83         REGULATOR_SUPPLY("vddio_uart", NULL),
84         REGULATOR_SUPPLY("pwrdet_uart", NULL),
85         REGULATOR_SUPPLY("vddio_audio", NULL),
86         REGULATOR_SUPPLY("pwrdet_audio", NULL),
87         REGULATOR_SUPPLY("vddio_bb", NULL),
88         REGULATOR_SUPPLY("pwrdet_bb", NULL),
89         REGULATOR_SUPPLY("vddio_lcd_pmu", NULL),
90         REGULATOR_SUPPLY("pwrdet_lcd", NULL),
91         REGULATOR_SUPPLY("vddio_cam", NULL),
92         REGULATOR_SUPPLY("pwrdet_cam", NULL),
93         REGULATOR_SUPPLY("vddio_vi", NULL),
94         REGULATOR_SUPPLY("pwrdet_vi", NULL),
95         REGULATOR_SUPPLY("ldo6", NULL),
96         REGULATOR_SUPPLY("ldo7", NULL),
97         REGULATOR_SUPPLY("ldo8", NULL),
98         REGULATOR_SUPPLY("vcore_audio", NULL),
99         REGULATOR_SUPPLY("avcore_audio", NULL),
100         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
101         REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
102         REGULATOR_SUPPLY("vcore1_lpddr2", NULL),
103         REGULATOR_SUPPLY("vcom_1v8", NULL),
104         REGULATOR_SUPPLY("pmuio_1v8", NULL),
105         REGULATOR_SUPPLY("avdd_ic_usb", NULL),
106 };
107
108 static struct regulator_consumer_supply tps6591x_ldo1_supply_0[] = {
109         REGULATOR_SUPPLY("avdd_pexb", NULL),
110         REGULATOR_SUPPLY("vdd_pexb", NULL),
111         REGULATOR_SUPPLY("avdd_pex_pll", NULL),
112         REGULATOR_SUPPLY("avdd_pexa", NULL),
113         REGULATOR_SUPPLY("vdd_pexa", NULL),
114 };
115
116 static struct regulator_consumer_supply tps6591x_ldo2_supply_0[] = {
117         REGULATOR_SUPPLY("avdd_sata", NULL),
118         REGULATOR_SUPPLY("vdd_sata", NULL),
119         REGULATOR_SUPPLY("avdd_sata_pll", NULL),
120         REGULATOR_SUPPLY("avdd_plle", NULL),
121 };
122
123 static struct regulator_consumer_supply tps6591x_ldo3_supply_e118x[] = {
124         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
125         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
126 };
127
128 static struct regulator_consumer_supply tps6591x_ldo3_supply_e1198[] = {
129         REGULATOR_SUPPLY("unused_rail_ldo3", NULL),
130 };
131
132 static struct regulator_consumer_supply tps6591x_ldo4_supply_0[] = {
133         REGULATOR_SUPPLY("vdd_rtc", NULL),
134 };
135
136 static struct regulator_consumer_supply tps6591x_ldo5_supply_e118x[] = {
137         REGULATOR_SUPPLY("avdd_vdac", NULL),
138 };
139
140 static struct regulator_consumer_supply tps6591x_ldo5_supply_e1198[] = {
141         REGULATOR_SUPPLY("avdd_vdac", NULL),
142         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
143         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
144 };
145
146 static struct regulator_consumer_supply tps6591x_ldo6_supply_0[] = {
147         REGULATOR_SUPPLY("avdd_dsi_csi", NULL),
148         REGULATOR_SUPPLY("pwrdet_mipi", NULL),
149 };
150 static struct regulator_consumer_supply tps6591x_ldo7_supply_0[] = {
151         REGULATOR_SUPPLY("avdd_plla_p_c_s", NULL),
152         REGULATOR_SUPPLY("avdd_pllm", NULL),
153         REGULATOR_SUPPLY("avdd_pllu_d", NULL),
154         REGULATOR_SUPPLY("avdd_pllu_d2", NULL),
155         REGULATOR_SUPPLY("avdd_pllx", NULL),
156 };
157
158 static struct regulator_consumer_supply tps6591x_ldo8_supply_0[] = {
159         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
160 };
161
162 #define TPS_PDATA_INIT(_name, _sname, _minmv, _maxmv, _supply_reg, _always_on, \
163         _boot_on, _apply_uv, _init_uV, _init_enable, _init_apply, _ectrl, _flags) \
164         static struct tps6591x_regulator_platform_data pdata_##_name##_##_sname = \
165         {                                                               \
166                 .regulator = {                                          \
167                         .constraints = {                                \
168                                 .min_uV = (_minmv)*1000,                \
169                                 .max_uV = (_maxmv)*1000,                \
170                                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
171                                                      REGULATOR_MODE_STANDBY), \
172                                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
173                                                    REGULATOR_CHANGE_STATUS |  \
174                                                    REGULATOR_CHANGE_VOLTAGE), \
175                                 .always_on = _always_on,                \
176                                 .boot_on = _boot_on,                    \
177                                 .apply_uV = _apply_uv,                  \
178                         },                                              \
179                         .num_consumer_supplies =                        \
180                                 ARRAY_SIZE(tps6591x_##_name##_supply_##_sname), \
181                         .consumer_supplies = tps6591x_##_name##_supply_##_sname,        \
182                         .supply_regulator = _supply_reg,                \
183                 },                                                      \
184                 .init_uV =  _init_uV * 1000,                            \
185                 .init_enable = _init_enable,                            \
186                 .init_apply = _init_apply,                              \
187                 .ectrl = _ectrl,                                        \
188                 .flags = _flags,                                        \
189         }
190
191 TPS_PDATA_INIT(vdd1, skubit0_0, 600,  1500, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF, 0);
192 TPS_PDATA_INIT(vdd1, skubit0_1, 600,  1500, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF, 0);
193 TPS_PDATA_INIT(vdd2, 0,         600,  1500, 0, 1, 1, 0, -1, 0, 0, 0, 0);
194 TPS_PDATA_INIT(vddctrl, 0,      600,  1400, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_EN1, 0);
195 TPS_PDATA_INIT(vio,  0,         1500, 3300, 0, 1, 1, 0, -1, 0, 0, 0, 0);
196
197 TPS_PDATA_INIT(ldo1, 0,         1000, 3300, tps6591x_rails(VDD_2), 0, 0, 0, -1, 0, 1, 0, 0);
198 TPS_PDATA_INIT(ldo2, 0,         1050, 1050, tps6591x_rails(VDD_2), 0, 0, 1, -1, 0, 1, 0, 0);
199
200 TPS_PDATA_INIT(ldo3, e118x,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
201 TPS_PDATA_INIT(ldo3, e1198,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
202 TPS_PDATA_INIT(ldo4, 0,         1000, 3300, 0, 1, 0, 0, -1, 0, 0, 0, LDO_LOW_POWER_ON_SUSPEND);
203 TPS_PDATA_INIT(ldo5, e118x,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
204 TPS_PDATA_INIT(ldo5, e1198,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
205
206 TPS_PDATA_INIT(ldo6, 0,         1200, 1200, tps6591x_rails(VIO), 0, 0, 1, -1, 0, 0, 0, 0);
207 TPS_PDATA_INIT(ldo7, 0,         1200, 1200, tps6591x_rails(VIO), 1, 1, 1, -1, 0, 0, EXT_CTRL_SLEEP_OFF, LDO_LOW_POWER_ON_SUSPEND);
208 TPS_PDATA_INIT(ldo8, 0,         1000, 3300, tps6591x_rails(VIO), 1, 0, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF, LDO_LOW_POWER_ON_SUSPEND);
209
210 #if defined(CONFIG_RTC_DRV_TPS6591x)
211 static struct tps6591x_rtc_platform_data rtc_data = {
212         .irq = TEGRA_NR_IRQS + TPS6591X_INT_RTC_ALARM,
213         .time = {
214                 .tm_year = 2000,
215                 .tm_mon = 0,
216                 .tm_mday = 1,
217                 .tm_hour = 0,
218                 .tm_min = 0,
219                 .tm_sec = 0,
220         },
221 };
222
223 #define TPS_RTC_REG()                                   \
224         {                                               \
225                 .id     = 0,                            \
226                 .name   = "rtc_tps6591x",               \
227                 .platform_data = &rtc_data,             \
228         }
229 #endif
230
231 #define TPS_REG(_id, _name, _sname)                             \
232         {                                                       \
233                 .id     = TPS6591X_ID_##_id,                    \
234                 .name   = "tps6591x-regulator",                 \
235                 .platform_data  = &pdata_##_name##_##_sname,    \
236         }
237
238 #define TPS6591X_DEV_COMMON_E118X               \
239         TPS_REG(VDD_2, vdd2, 0),                \
240         TPS_REG(VDDCTRL, vddctrl, 0),           \
241         TPS_REG(LDO_1, ldo1, 0),                \
242         TPS_REG(LDO_2, ldo2, 0),                \
243         TPS_REG(LDO_3, ldo3, e118x),            \
244         TPS_REG(LDO_4, ldo4, 0),                \
245         TPS_REG(LDO_5, ldo5, e118x),            \
246         TPS_REG(LDO_6, ldo6, 0),                \
247         TPS_REG(LDO_7, ldo7, 0),                \
248         TPS_REG(LDO_8, ldo8, 0)
249
250 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_0[] = {
251         TPS_REG(VIO, vio, 0),
252         TPS_REG(VDD_1, vdd1, skubit0_0),
253         TPS6591X_DEV_COMMON_E118X,
254 #if defined(CONFIG_RTC_DRV_TPS6591x)
255         TPS_RTC_REG(),
256 #endif
257 };
258
259 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_1[] = {
260         TPS_REG(VIO, vio, 0),
261         TPS_REG(VDD_1, vdd1, skubit0_1),
262         TPS6591X_DEV_COMMON_E118X,
263 #if defined(CONFIG_RTC_DRV_TPS6591x)
264         TPS_RTC_REG(),
265 #endif
266 };
267
268 #define TPS6591X_DEV_COMMON_CARDHU              \
269         TPS_REG(VDD_2, vdd2, 0),                \
270         TPS_REG(VDDCTRL, vddctrl, 0),           \
271         TPS_REG(LDO_1, ldo1, 0),                \
272         TPS_REG(LDO_2, ldo2, 0),                \
273         TPS_REG(LDO_3, ldo3, e1198),            \
274         TPS_REG(LDO_4, ldo4, 0),                \
275         TPS_REG(LDO_5, ldo5, e1198),            \
276         TPS_REG(LDO_6, ldo6, 0),                \
277         TPS_REG(LDO_7, ldo7, 0),                \
278         TPS_REG(LDO_8, ldo8, 0)
279
280 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_0[] = {
281         TPS_REG(VIO, vio, 0),
282         TPS_REG(VDD_1, vdd1, skubit0_0),
283         TPS6591X_DEV_COMMON_CARDHU,
284 #if defined(CONFIG_RTC_DRV_TPS6591x)
285         TPS_RTC_REG(),
286 #endif
287 };
288
289 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_1[] = {
290         TPS_REG(VIO, vio, 0),
291         TPS_REG(VDD_1, vdd1, skubit0_1),
292         TPS6591X_DEV_COMMON_CARDHU,
293 #if defined(CONFIG_RTC_DRV_TPS6591x)
294         TPS_RTC_REG(),
295 #endif
296 };
297
298 #define TPS_GPIO_INIT_PDATA(gpio_nr, _init_apply, _sleep_en, _pulldn_en, _output_en, _output_val)       \
299         [gpio_nr] = {                                   \
300                         .sleep_en       = _sleep_en,    \
301                         .pulldn_en      = _pulldn_en,   \
302                         .output_mode_en = _output_en,   \
303                         .output_val     = _output_val,  \
304                         .init_apply     = _init_apply,  \
305                      }
306 static struct tps6591x_gpio_init_data tps_gpio_pdata_e1291_a04[] =  {
307         TPS_GPIO_INIT_PDATA(0, 0, 0, 0, 0, 0),
308         TPS_GPIO_INIT_PDATA(1, 0, 0, 0, 0, 0),
309         TPS_GPIO_INIT_PDATA(2, 1, 1, 0, 1, 1),
310         TPS_GPIO_INIT_PDATA(3, 0, 0, 0, 0, 0),
311         TPS_GPIO_INIT_PDATA(4, 0, 0, 0, 0, 0),
312         TPS_GPIO_INIT_PDATA(5, 0, 0, 0, 0, 0),
313         TPS_GPIO_INIT_PDATA(6, 0, 0, 0, 0, 0),
314         TPS_GPIO_INIT_PDATA(7, 0, 0, 0, 0, 0),
315         TPS_GPIO_INIT_PDATA(8, 0, 0, 0, 0, 0),
316 };
317
318 static struct tps6591x_sleep_keepon_data tps_slp_keepon = {
319         .clkout32k_keepon = 1,
320 };
321
322 static struct tps6591x_platform_data tps_platform = {
323         .irq_base       = TPS6591X_IRQ_BASE,
324         .gpio_base      = TPS6591X_GPIO_BASE,
325         .dev_slp_en     = true,
326         .slp_keepon     = &tps_slp_keepon,
327 };
328
329 static struct i2c_board_info __initdata cardhu_regulators[] = {
330         {
331                 I2C_BOARD_INFO("tps6591x", 0x2D),
332                 .irq            = INT_EXTERNAL_PMU,
333                 .platform_data  = &tps_platform,
334         },
335 };
336
337 /* TPS62361B DC-DC converter */
338 static struct regulator_consumer_supply tps6236x_dcdc_supply[] = {
339         REGULATOR_SUPPLY("vdd_core", NULL),
340 };
341
342 static struct tps6236x_regulator_platform_data tps6236x_pdata = {
343         .reg_init_data = {                                      \
344                 .constraints = {                                \
345                         .min_uV = 500000,                       \
346                         .max_uV = 1770000,                      \
347                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
348                                              REGULATOR_MODE_STANDBY), \
349                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
350                                            REGULATOR_CHANGE_STATUS |  \
351                                            REGULATOR_CHANGE_VOLTAGE), \
352                         .always_on = 1,                         \
353                         .boot_on =  1,                          \
354                         .apply_uV = 0,                          \
355                 },                                              \
356                 .num_consumer_supplies = ARRAY_SIZE(tps6236x_dcdc_supply), \
357                 .consumer_supplies = tps6236x_dcdc_supply,              \
358                 },                                                      \
359         .internal_pd_enable = 0,                                        \
360         .vsel = 3,                                                      \
361         .init_uV = -1,                                                  \
362         .init_apply = 0,                                                \
363 };
364
365 static struct i2c_board_info __initdata tps6236x_boardinfo[] = {
366         {
367                 I2C_BOARD_INFO("tps62361B", 0x60),
368                 .platform_data  = &tps6236x_pdata,
369         },
370 };
371
372 int __init cardhu_regulator_init(void)
373 {
374         struct board_info board_info;
375         struct board_info pmu_board_info;
376         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
377         u32 pmc_ctrl;
378
379         /* configure the power management controller to trigger PMU
380          * interrupts when low */
381
382         pmc_ctrl = readl(pmc + PMC_CTRL);
383         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
384
385         tegra_get_board_info(&board_info);
386         tegra_get_pmu_board_info(&pmu_board_info);
387
388         if (pmu_board_info.board_id == BOARD_PMU_PM299)
389                 return cardhu_pm299_regulator_init();
390
391         /* The regulator details have complete constraints */
392         regulator_has_full_constraints();
393
394         /* PMU-E1208, the ldo2 should be set to 1200mV */
395         if (pmu_board_info.board_id == BOARD_E1208) {
396                 pdata_ldo2_0.regulator.constraints.min_uV = 1200000;
397                 pdata_ldo2_0.regulator.constraints.max_uV = 1200000;
398         }
399
400         if ((board_info.board_id == BOARD_E1198) ||
401                 (board_info.board_id == BOARD_E1291)) {
402                 if (board_info.sku & SKU_DCDC_TPS62361_SUPPORT) {
403                         tps_platform.num_subdevs =
404                                         ARRAY_SIZE(tps_devs_e1198_skubit0_1);
405                         tps_platform.subdevs = tps_devs_e1198_skubit0_1;
406                 } else {
407                         tps_platform.num_subdevs =
408                                         ARRAY_SIZE(tps_devs_e1198_skubit0_0);
409                         tps_platform.subdevs = tps_devs_e1198_skubit0_0;
410                 }
411         } else {
412                 if (board_info.board_id == BOARD_PM269)
413                         pdata_ldo3_e118x.slew_rate_uV_per_us = 250;
414
415                 if (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT) {
416                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_1);
417                         tps_platform.subdevs = tps_devs_e118x_skubit0_1;
418                 } else {
419                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_0);
420                         tps_platform.subdevs = tps_devs_e118x_skubit0_0;
421                 }
422         }
423
424         /* E1291-A04/A05: Enable DEV_SLP and enable sleep on GPIO2 */
425         if ((board_info.board_id == BOARD_E1291) &&
426                         ((board_info.fab == BOARD_FAB_A04) ||
427                          (board_info.fab == BOARD_FAB_A05))) {
428                 tps_platform.dev_slp_en = true;
429                 tps_platform.gpio_init_data = tps_gpio_pdata_e1291_a04;
430                 tps_platform.num_gpioinit_data =
431                                         ARRAY_SIZE(tps_gpio_pdata_e1291_a04);
432         }
433
434         i2c_register_board_info(4, cardhu_regulators, 1);
435
436         /* Resgister the TPS6236x for all boards whose sku bit 0 is set. */
437         if ((board_info.sku & SKU_DCDC_TPS62361_SUPPORT) ||
438                         (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT)) {
439                 pr_info("Registering the device TPS62361B\n");
440                 i2c_register_board_info(4, tps6236x_boardinfo, 1);
441         }
442         return 0;
443 }
444
445 /* EN_5V_CP from PMU GP0 */
446 static struct regulator_consumer_supply gpio_switch_en_5v_cp_supply[] = {
447         REGULATOR_SUPPLY("vdd_5v0_sby", NULL),
448         REGULATOR_SUPPLY("vdd_hall", NULL),
449         REGULATOR_SUPPLY("vterm_ddr", NULL),
450         REGULATOR_SUPPLY("v2ref_ddr", NULL),
451 };
452 static int gpio_switch_en_5v_cp_voltages[] = { 5000};
453
454 /* EN_5V0 From PMU GP2 */
455 static struct regulator_consumer_supply gpio_switch_en_5v0_supply[] = {
456         REGULATOR_SUPPLY("vdd_5v0_sys", NULL),
457 };
458 static int gpio_switch_en_5v0_voltages[] = { 5000};
459
460 /* EN_DDR From PMU GP6 */
461 static struct regulator_consumer_supply gpio_switch_en_ddr_supply[] = {
462         REGULATOR_SUPPLY("mem_vddio_ddr", NULL),
463         REGULATOR_SUPPLY("t30_vddio_ddr", NULL),
464 };
465 static int gpio_switch_en_ddr_voltages[] = { 1500};
466
467 /* EN_3V3_SYS From PMU GP7 */
468 static struct regulator_consumer_supply gpio_switch_en_3v3_sys_supply[] = {
469         REGULATOR_SUPPLY("vdd_lvds", NULL),
470         REGULATOR_SUPPLY("vdd_pnl", NULL),
471         REGULATOR_SUPPLY("vcom_3v3", NULL),
472         REGULATOR_SUPPLY("vdd_3v3", NULL),
473         REGULATOR_SUPPLY("vcore_mmc", NULL),
474         REGULATOR_SUPPLY("vddio_pex_ctl", NULL),
475         REGULATOR_SUPPLY("pwrdet_pex_ctl", NULL),
476         REGULATOR_SUPPLY("hvdd_pex_pmu", NULL),
477         REGULATOR_SUPPLY("avdd_hdmi", NULL),
478         REGULATOR_SUPPLY("vpp_fuse", NULL),
479         REGULATOR_SUPPLY("avdd_usb", NULL),
480         REGULATOR_SUPPLY("vdd_ddr_rx", NULL),
481         REGULATOR_SUPPLY("vcore_nand", NULL),
482         REGULATOR_SUPPLY("hvdd_sata", NULL),
483         REGULATOR_SUPPLY("vddio_gmi_pmu", NULL),
484         REGULATOR_SUPPLY("pwrdet_nand", NULL),
485         REGULATOR_SUPPLY("avdd_cam1", NULL),
486         REGULATOR_SUPPLY("vdd_af", NULL),
487         REGULATOR_SUPPLY("avdd_cam2", NULL),
488         REGULATOR_SUPPLY("vdd_acc", NULL),
489         REGULATOR_SUPPLY("vdd_phtl", NULL),
490         REGULATOR_SUPPLY("vddio_tp", NULL),
491         REGULATOR_SUPPLY("vdd_led", NULL),
492         REGULATOR_SUPPLY("vddio_cec", NULL),
493         REGULATOR_SUPPLY("vdd_cmps", NULL),
494         REGULATOR_SUPPLY("vdd_temp", NULL),
495         REGULATOR_SUPPLY("vpp_kfuse", NULL),
496         REGULATOR_SUPPLY("vddio_ts", NULL),
497         REGULATOR_SUPPLY("vdd_ir_led", NULL),
498         REGULATOR_SUPPLY("vddio_1wire", NULL),
499         REGULATOR_SUPPLY("avddio_audio", NULL),
500         REGULATOR_SUPPLY("vdd_ec", NULL),
501         REGULATOR_SUPPLY("vcom_pa", NULL),
502         REGULATOR_SUPPLY("vdd_3v3_devices", NULL),
503         REGULATOR_SUPPLY("vdd_3v3_dock", NULL),
504         REGULATOR_SUPPLY("vdd_3v3_edid", NULL),
505         REGULATOR_SUPPLY("vdd_3v3_hdmi_cec", NULL),
506         REGULATOR_SUPPLY("vdd_3v3_gmi", NULL),
507         REGULATOR_SUPPLY("vdd_spk_amp", "tegra-snd-wm8903"),
508         REGULATOR_SUPPLY("vdd_3v3_sensor", NULL),
509         REGULATOR_SUPPLY("vdd_3v3_cam", NULL),
510         REGULATOR_SUPPLY("vdd_3v3_als", NULL),
511         REGULATOR_SUPPLY("debug_cons", NULL),
512         REGULATOR_SUPPLY("vdd", "4-004c"),
513 };
514 static int gpio_switch_en_3v3_sys_voltages[] = { 3300};
515
516 /* DIS_5V_SWITCH from AP SPI2_SCK X02 */
517 static struct regulator_consumer_supply gpio_switch_dis_5v_switch_supply[] = {
518         REGULATOR_SUPPLY("master_5v_switch", NULL),
519 };
520 static int gpio_switch_dis_5v_switch_voltages[] = { 5000};
521
522 /* EN_VDD_BL */
523 static struct regulator_consumer_supply gpio_switch_en_vdd_bl_supply[] = {
524         REGULATOR_SUPPLY("vdd_backlight", NULL),
525         REGULATOR_SUPPLY("vdd_backlight1", NULL),
526 };
527 static int gpio_switch_en_vdd_bl_voltages[] = { 5000};
528
529 /* EN_VDD_BL2 (E1291-A03) from AP PEX_L0_PRSNT_N DD.00 */
530 static struct regulator_consumer_supply gpio_switch_en_vdd_bl2_supply[] = {
531         REGULATOR_SUPPLY("vdd_backlight2", NULL),
532 };
533 static int gpio_switch_en_vdd_bl2_voltages[] = { 5000};
534
535 /* EN_3V3_MODEM from AP GPIO VI_VSYNCH D06*/
536 static struct regulator_consumer_supply gpio_switch_en_3v3_modem_supply[] = {
537         REGULATOR_SUPPLY("vdd_3v3_mini_card", NULL),
538         REGULATOR_SUPPLY("vdd_mini_card", NULL),
539 };
540 static int gpio_switch_en_3v3_modem_voltages[] = { 3300};
541
542 /* EN_USB1_VBUS_OC*/
543 static struct regulator_consumer_supply gpio_switch_en_usb1_vbus_oc_supply[] = {
544         REGULATOR_SUPPLY("vdd_vbus_micro_usb", NULL),
545 };
546 static int gpio_switch_en_usb1_vbus_oc_voltages[] = { 5000};
547
548 /*EN_USB3_VBUS_OC*/
549 static struct regulator_consumer_supply gpio_switch_en_usb3_vbus_oc_supply[] = {
550         REGULATOR_SUPPLY("vdd_vbus_typea_usb", NULL),
551 };
552 static int gpio_switch_en_usb3_vbus_oc_voltages[] = { 5000};
553
554 /* EN_VDDIO_VID_OC from AP GPIO VI_PCLK T00*/
555 static struct regulator_consumer_supply gpio_switch_en_vddio_vid_oc_supply[] = {
556         REGULATOR_SUPPLY("vdd_hdmi_con", NULL),
557 };
558 static int gpio_switch_en_vddio_vid_oc_voltages[] = { 5000};
559
560 /* EN_VDD_PNL1 from AP GPIO VI_D6 L04*/
561 static struct regulator_consumer_supply gpio_switch_en_vdd_pnl1_supply[] = {
562         REGULATOR_SUPPLY("vdd_lcd_panel", NULL),
563 };
564 static int gpio_switch_en_vdd_pnl1_voltages[] = { 3300};
565
566 /* CAM1_LDO_EN from AP GPIO KB_ROW6 R06*/
567 static struct regulator_consumer_supply gpio_switch_cam1_ldo_en_supply[] = {
568         REGULATOR_SUPPLY("vdd_2v8_cam1", NULL),
569         REGULATOR_SUPPLY("vdd_2v8_cam1_af", NULL),
570 };
571 static int gpio_switch_cam1_ldo_en_voltages[] = { 2800};
572
573 /* CAM2_LDO_EN from AP GPIO KB_ROW7 R07*/
574 static struct regulator_consumer_supply gpio_switch_cam2_ldo_en_supply[] = {
575         REGULATOR_SUPPLY("vdd_2v8_cam2", NULL),
576         REGULATOR_SUPPLY("vdd_2v8_cam2_af", NULL),
577 };
578 static int gpio_switch_cam2_ldo_en_voltages[] = { 2800};
579
580 /* CAM3_LDO_EN from AP GPIO KB_ROW8 S00*/
581 static struct regulator_consumer_supply gpio_switch_cam3_ldo_en_supply[] = {
582         REGULATOR_SUPPLY("vdd_cam3", NULL),
583 };
584 static int gpio_switch_cam3_ldo_en_voltages[] = { 3300};
585
586 /* EN_VDD_COM from AP GPIO SDMMC3_DAT5 D00*/
587 static struct regulator_consumer_supply gpio_switch_en_vdd_com_supply[] = {
588         REGULATOR_SUPPLY("vdd_com_bd", NULL),
589 };
590 static int gpio_switch_en_vdd_com_voltages[] = { 3300};
591
592 /* EN_VDD_SDMMC1 from AP GPIO VI_HSYNC D07*/
593 static struct regulator_consumer_supply gpio_switch_en_vdd_sdmmc1_supply[] = {
594         REGULATOR_SUPPLY("vddio_sd_slot", "sdhci-tegra.0"),
595 };
596 static int gpio_switch_en_vdd_sdmmc1_voltages[] = { 3300};
597
598 /* EN_3V3_EMMC from AP GPIO SDMMC3_DAT4 D01*/
599 static struct regulator_consumer_supply gpio_switch_en_3v3_emmc_supply[] = {
600         REGULATOR_SUPPLY("vdd_emmc_core", NULL),
601 };
602 static int gpio_switch_en_3v3_emmc_voltages[] = { 3300};
603
604 /* EN_3V3_PEX_HVDD from AP GPIO VI_D09 L07*/
605 static struct regulator_consumer_supply gpio_switch_en_3v3_pex_hvdd_supply[] = {
606         REGULATOR_SUPPLY("hvdd_pex", NULL),
607 };
608 static int gpio_switch_en_3v3_pex_hvdd_voltages[] = { 3300};
609
610 /* EN_3v3_FUSE from AP GPIO VI_D08 L06*/
611 static struct regulator_consumer_supply gpio_switch_en_3v3_fuse_supply[] = {
612         REGULATOR_SUPPLY("vdd_fuse", NULL),
613 };
614 static int gpio_switch_en_3v3_fuse_voltages[] = { 3300};
615
616 /* EN_1V8_CAM from AP GPIO GPIO_PBB4 PBB04*/
617 static struct regulator_consumer_supply gpio_switch_en_1v8_cam_supply[] = {
618         REGULATOR_SUPPLY("vdd_1v8_cam1", NULL),
619         REGULATOR_SUPPLY("vdd_1v8_cam2", NULL),
620         REGULATOR_SUPPLY("vdd_1v8_cam3", NULL),
621 };
622 static int gpio_switch_en_1v8_cam_voltages[] = { 1800};
623
624 static struct regulator_consumer_supply gpio_switch_en_vbrtr_supply[] = {
625         REGULATOR_SUPPLY("vdd_vbrtr", NULL),
626 };
627 static int gpio_switch_en_vbrtr_voltages[] = { 3300};
628
629 static int enable_load_switch_rail(
630                 struct gpio_switch_regulator_subdev_data *psubdev_data)
631 {
632         int ret;
633
634         if (psubdev_data->pin_group <= 0)
635                 return -EINVAL;
636
637         /* Tristate and make pin as input*/
638         ret = tegra_pinmux_set_tristate(psubdev_data->pin_group,
639                                                 TEGRA_TRI_TRISTATE);
640         if (ret < 0)
641                 return ret;
642         return gpio_direction_input(psubdev_data->gpio_nr);
643 }
644
645 static int disable_load_switch_rail(
646                 struct gpio_switch_regulator_subdev_data *psubdev_data)
647 {
648         int ret;
649
650         if (psubdev_data->pin_group <= 0)
651                 return -EINVAL;
652
653         /* Un-tristate and driver low */
654         ret = tegra_pinmux_set_tristate(psubdev_data->pin_group,
655                                                 TEGRA_TRI_NORMAL);
656         if (ret < 0)
657                 return ret;
658         return gpio_direction_output(psubdev_data->gpio_nr, 0);
659 }
660
661
662 /* Macro for defining gpio switch regulator sub device data */
663 #define GREG_INIT(_id, _var, _name, _input_supply, _always_on, _boot_on, \
664         _gpio_nr, _active_low, _init_state, _pg, _enable, _disable)      \
665         static struct gpio_switch_regulator_subdev_data gpio_pdata_##_var =  \
666         {                                                               \
667                 .regulator_name = "gpio-switch-"#_name,                 \
668                 .input_supply   = _input_supply,                        \
669                 .id             = _id,                                  \
670                 .gpio_nr        = _gpio_nr,                             \
671                 .pin_group      = _pg,                                  \
672                 .active_low     = _active_low,                          \
673                 .init_state     = _init_state,                          \
674                 .voltages       = gpio_switch_##_name##_voltages,       \
675                 .n_voltages     = ARRAY_SIZE(gpio_switch_##_name##_voltages), \
676                 .num_consumer_supplies =                                \
677                                 ARRAY_SIZE(gpio_switch_##_name##_supply), \
678                 .consumer_supplies = gpio_switch_##_name##_supply,      \
679                 .constraints = {                                        \
680                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
681                                              REGULATOR_MODE_STANDBY),   \
682                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
683                                            REGULATOR_CHANGE_STATUS |    \
684                                            REGULATOR_CHANGE_VOLTAGE),   \
685                         .always_on = _always_on,                        \
686                         .boot_on = _boot_on,                            \
687                 },                                                      \
688                 .enable_rail = _enable,                                 \
689                 .disable_rail = _disable,                               \
690         }
691
692 /* common to most of boards*/
693 GREG_INIT(0, en_5v_cp,          en_5v_cp,       NULL,                   1,      0,      TPS6591X_GPIO_0,        false,  1,      0,      0,      0);
694 GREG_INIT(1, en_5v0,            en_5v0,         NULL,                   0,      0,      TPS6591X_GPIO_2,        false,  0,      0,      0,      0);
695 GREG_INIT(2, en_ddr,            en_ddr,         NULL,                   0,      0,      TPS6591X_GPIO_6,        false,  0,      0,      0,      0);
696 GREG_INIT(3, en_3v3_sys,        en_3v3_sys,     NULL,                   0,      0,      TPS6591X_GPIO_7,        false,  0,      0,      0,      0);
697 GREG_INIT(4, en_vdd_bl,         en_vdd_bl,      NULL,                   0,      0,      TEGRA_GPIO_PK3,         false,  1,      0,      0,      0);
698 GREG_INIT(5, en_3v3_modem,      en_3v3_modem,   NULL,                   1,      0,      TEGRA_GPIO_PD6,         false,  1,      0,      0,      0);
699 GREG_INIT(6, en_vdd_pnl1,       en_vdd_pnl1,    "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PL4,         false,  1,      0,      0,      0);
700 GREG_INIT(7, cam3_ldo_en,       cam3_ldo_en,    "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PS0,         false,  0,      0,      0,      0);
701 GREG_INIT(8, en_vdd_com,        en_vdd_com,     "vdd_3v3_devices",      1,      0,      TEGRA_GPIO_PD0,         false,  1,      0,      0,      0);
702 GREG_INIT(9, en_3v3_fuse,       en_3v3_fuse,    "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PL6,         false,  0,      0,      0,      0);
703 GREG_INIT(10, en_3v3_emmc,      en_3v3_emmc,    "vdd_3v3_devices",      1,      0,      TEGRA_GPIO_PD1,         false,  1,      0,      0,      0);
704 GREG_INIT(11, en_vdd_sdmmc1,    en_vdd_sdmmc1,  "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PD7,         false,  1,      0,      0,      0);
705 GREG_INIT(12, en_3v3_pex_hvdd,  en_3v3_pex_hvdd, "hvdd_pex_pmu",        0,      0,      TEGRA_GPIO_PL7,         false,  0,      0,      0,      0);
706 GREG_INIT(13, en_1v8_cam,       en_1v8_cam,     "vdd_gen1v8",           0,      0,      TEGRA_GPIO_PBB4,        false,  0,      0,      0,      0);
707
708 /* E1291-A04/A05 specific */
709 GREG_INIT(1, en_5v0_a04,        en_5v0,         NULL,                   0,      0,      TPS6591X_GPIO_8,        false,  0,      0,      0,      0);
710 GREG_INIT(2, en_ddr_a04,        en_ddr,         NULL,                   0,      0,      TPS6591X_GPIO_7,        false,  0,      0,      0,      0);
711 GREG_INIT(3, en_3v3_sys_a04,    en_3v3_sys,     NULL,                   0,      0,      TPS6591X_GPIO_6,        false,  0,      0,      0,      0);
712
713
714 /*Specific to pm269*/
715 GREG_INIT(4, en_vdd_bl_pm269,           en_vdd_bl,              NULL,
716         0,      0,      TEGRA_GPIO_PH3, false,  1,      0,      0,      0);
717 GREG_INIT(6, en_vdd_pnl1_pm269,         en_vdd_pnl1,            "vdd_3v3_devices",
718         0,      0,      TEGRA_GPIO_PW1, false,  1,      0,      0,      0);
719 GREG_INIT(9, en_3v3_fuse_pm269,         en_3v3_fuse,            "vdd_3v3_devices",
720         0,      0,      TEGRA_GPIO_PC1, false,  0,      0,      0,      0);
721 GREG_INIT(12, en_3v3_pex_hvdd_pm269,    en_3v3_pex_hvdd,        "hvdd_pex_pmu",
722         0,      0,      TEGRA_GPIO_PC6, false,  0,      0,      0,      0);
723 GREG_INIT(17, en_vddio_vid_oc_pm269,    en_vddio_vid_oc,        "master_5v_switch",
724         0,      0,      TEGRA_GPIO_PP2, false,  0,      TEGRA_PINGROUP_DAP3_DOUT,
725         enable_load_switch_rail, disable_load_switch_rail);
726
727 /* Specific to E1187/E1186/E1256 */
728 GREG_INIT(14, dis_5v_switch_e118x,      dis_5v_switch,          "vdd_5v0_sys",
729                 0,      0,      TEGRA_GPIO_PX2,         true,   0,      0,      0,      0);
730 GREG_INIT(15, en_usb1_vbus_oc_e118x,    en_usb1_vbus_oc,        "master_5v_switch",
731                 0,      0,      TEGRA_GPIO_PI4,         false,  0,      TEGRA_PINGROUP_GMI_RST_N,
732                 enable_load_switch_rail, disable_load_switch_rail);
733 GREG_INIT(16, en_usb3_vbus_oc_e118x,    en_usb3_vbus_oc,        "master_5v_switch",
734                 0,      0,      TEGRA_GPIO_PH7,         false,  0,      TEGRA_PINGROUP_GMI_AD15,
735                 enable_load_switch_rail, disable_load_switch_rail);
736 GREG_INIT(17, en_vddio_vid_oc_e118x,    en_vddio_vid_oc,        "master_5v_switch",
737                 0,      0,      TEGRA_GPIO_PT0,         false,  0,      TEGRA_PINGROUP_VI_PCLK,
738                 enable_load_switch_rail, disable_load_switch_rail);
739
740 /* E1198/E1291 specific  fab < A03 */
741 GREG_INIT(15, en_usb1_vbus_oc,          en_usb1_vbus_oc,        "vdd_5v0_sys",
742                 0,      0,      TEGRA_GPIO_PI4,         false,  0,      TEGRA_PINGROUP_GMI_RST_N,
743                 enable_load_switch_rail, disable_load_switch_rail);
744 GREG_INIT(16, en_usb3_vbus_oc,          en_usb3_vbus_oc,        "vdd_5v0_sys",
745                 0,      0,      TEGRA_GPIO_PH7,         false,  0,      TEGRA_PINGROUP_GMI_AD15,
746                 enable_load_switch_rail, disable_load_switch_rail);
747
748 /* E1198/E1291 specific  fab >= A03 */
749 GREG_INIT(15, en_usb1_vbus_oc_a03,      en_usb1_vbus_oc,        "vdd_5v0_sys",
750                 0,      0,      TEGRA_GPIO_PDD6,                false,  0,      TEGRA_PINGROUP_PEX_L1_CLKREQ_N,
751                 enable_load_switch_rail, disable_load_switch_rail);
752 GREG_INIT(16, en_usb3_vbus_oc_a03,              en_usb3_vbus_oc,        "vdd_5v0_sys",
753                 0,      0,      TEGRA_GPIO_PDD4,                false,  0,      TEGRA_PINGROUP_PEX_L1_PRSNT_N,
754                 enable_load_switch_rail, disable_load_switch_rail);
755
756 /* E1198/E1291 specific */
757 GREG_INIT(17, en_vddio_vid_oc,          en_vddio_vid_oc,        "vdd_5v0_sys",
758                 0,      0,      TEGRA_GPIO_PT0,         false,  0,      TEGRA_PINGROUP_VI_PCLK,
759                 enable_load_switch_rail, disable_load_switch_rail);
760
761 /* E1198/E1291 specific*/
762 GREG_INIT(18, cam1_ldo_en,      cam1_ldo_en,    "vdd_3v3_cam",  0,      0,      TEGRA_GPIO_PR6,         false,  0,      0,      0,      0);
763 GREG_INIT(19, cam2_ldo_en,      cam2_ldo_en,    "vdd_3v3_cam",  0,      0,      TEGRA_GPIO_PR7,         false,  0,      0,      0,      0);
764
765 /* E1291 A03 specific */
766 GREG_INIT(20, en_vdd_bl1_a03,   en_vdd_bl,      NULL,           0,      0,      TEGRA_GPIO_PDD2,        false,  1,      0,      0,      0);
767 GREG_INIT(21, en_vdd_bl2_a03,   en_vdd_bl2,     NULL,           0,      0,      TEGRA_GPIO_PDD0,        false,  1,      0,      0,      0);
768
769 GREG_INIT(22, en_vbrtr,         en_vbrtr,       "vdd_3v3_devices",      0,      0,      PMU_TCA6416_GPIO_PORT12,        false,  0,      0,      0,      0);
770
771 /* PM313 display board specific */
772 GREG_INIT(4, en_vdd_bl_pm313,       en_vdd_bl,      NULL,
773                 0,      0,      TEGRA_GPIO_PK3, false,  1,  0,  0,  0);
774 GREG_INIT(6, en_vdd_pnl1_pm313,     en_vdd_pnl1,        "vdd_3v3_devices",
775                 0,      0,      TEGRA_GPIO_PH3, false,  1,  0,  0,  0);
776
777 #define ADD_GPIO_REG(_name) &gpio_pdata_##_name
778
779 #define COMMON_GPIO_REG \
780         ADD_GPIO_REG(en_5v_cp),                 \
781         ADD_GPIO_REG(en_5v0),                   \
782         ADD_GPIO_REG(en_ddr),                   \
783         ADD_GPIO_REG(en_3v3_sys),               \
784         ADD_GPIO_REG(en_3v3_modem),             \
785         ADD_GPIO_REG(en_vdd_pnl1),              \
786         ADD_GPIO_REG(cam3_ldo_en),              \
787         ADD_GPIO_REG(en_vdd_com),               \
788         ADD_GPIO_REG(en_3v3_fuse),              \
789         ADD_GPIO_REG(en_3v3_emmc),              \
790         ADD_GPIO_REG(en_vdd_sdmmc1),            \
791         ADD_GPIO_REG(en_3v3_pex_hvdd),          \
792         ADD_GPIO_REG(en_1v8_cam),
793
794 #define COMMON_GPIO_REG_E1291_A04 \
795         ADD_GPIO_REG(en_5v_cp),                 \
796         ADD_GPIO_REG(en_5v0_a04),               \
797         ADD_GPIO_REG(en_ddr_a04),               \
798         ADD_GPIO_REG(en_3v3_sys_a04),           \
799         ADD_GPIO_REG(en_3v3_modem),             \
800         ADD_GPIO_REG(en_vdd_pnl1),              \
801         ADD_GPIO_REG(cam3_ldo_en),              \
802         ADD_GPIO_REG(en_vdd_com),               \
803         ADD_GPIO_REG(en_3v3_fuse),              \
804         ADD_GPIO_REG(en_3v3_emmc),              \
805         ADD_GPIO_REG(en_vdd_sdmmc1),            \
806         ADD_GPIO_REG(en_3v3_pex_hvdd),          \
807         ADD_GPIO_REG(en_1v8_cam),
808
809 #define PM269_GPIO_REG \
810         ADD_GPIO_REG(en_5v_cp),                 \
811         ADD_GPIO_REG(en_5v0),                   \
812         ADD_GPIO_REG(en_ddr),                   \
813         ADD_GPIO_REG(en_3v3_sys),               \
814         ADD_GPIO_REG(en_3v3_modem),             \
815         ADD_GPIO_REG(cam1_ldo_en),              \
816         ADD_GPIO_REG(cam2_ldo_en),              \
817         ADD_GPIO_REG(cam3_ldo_en),              \
818         ADD_GPIO_REG(en_vdd_com),               \
819         ADD_GPIO_REG(en_3v3_fuse_pm269),        \
820         ADD_GPIO_REG(en_3v3_emmc),              \
821         ADD_GPIO_REG(en_3v3_pex_hvdd_pm269),    \
822         ADD_GPIO_REG(en_1v8_cam),               \
823         ADD_GPIO_REG(dis_5v_switch_e118x),      \
824         ADD_GPIO_REG(en_usb1_vbus_oc_e118x),    \
825         ADD_GPIO_REG(en_usb3_vbus_oc_e118x),    \
826         ADD_GPIO_REG(en_vddio_vid_oc_pm269),
827
828 #define E1247_DISPLAY_GPIO_REG          \
829         ADD_GPIO_REG(en_vdd_bl_pm269),  \
830         ADD_GPIO_REG(en_vdd_pnl1_pm269),
831
832 #define PM313_DISPLAY_GPIO_REG          \
833         ADD_GPIO_REG(en_vdd_bl_pm313),  \
834         ADD_GPIO_REG(en_vdd_pnl1_pm313),
835
836 #define E118x_GPIO_REG                          \
837         ADD_GPIO_REG(en_5v_cp),                 \
838         ADD_GPIO_REG(en_5v0),                   \
839         ADD_GPIO_REG(en_ddr),                   \
840         ADD_GPIO_REG(en_3v3_sys),               \
841         ADD_GPIO_REG(en_3v3_modem),             \
842         ADD_GPIO_REG(cam3_ldo_en),              \
843         ADD_GPIO_REG(en_vdd_com),               \
844         ADD_GPIO_REG(en_3v3_fuse),              \
845         ADD_GPIO_REG(en_3v3_emmc),              \
846         ADD_GPIO_REG(en_vdd_sdmmc1),            \
847         ADD_GPIO_REG(en_3v3_pex_hvdd),          \
848         ADD_GPIO_REG(en_1v8_cam),               \
849         ADD_GPIO_REG(dis_5v_switch_e118x),      \
850         ADD_GPIO_REG(en_usb1_vbus_oc_e118x),    \
851         ADD_GPIO_REG(en_usb3_vbus_oc_e118x),    \
852         ADD_GPIO_REG(en_vddio_vid_oc_e118x),    \
853         ADD_GPIO_REG(en_vbrtr),
854
855 #define E1198_GPIO_REG                  \
856         ADD_GPIO_REG(en_vddio_vid_oc),  \
857         ADD_GPIO_REG(cam1_ldo_en),      \
858         ADD_GPIO_REG(cam2_ldo_en),
859
860 #define E1291_1198_A00_GPIO_REG \
861         ADD_GPIO_REG(en_usb1_vbus_oc),          \
862         ADD_GPIO_REG(en_usb3_vbus_oc),          \
863         ADD_GPIO_REG(en_vdd_bl),
864
865 #define E1291_A03_GPIO_REG      \
866         ADD_GPIO_REG(en_usb1_vbus_oc_a03),              \
867         ADD_GPIO_REG(en_usb3_vbus_oc_a03),              \
868         ADD_GPIO_REG(en_vdd_bl1_a03), \
869         ADD_GPIO_REG(en_vdd_bl2_a03),
870
871 /* Gpio switch regulator platform data  for E1186/E1187/E1256*/
872 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e118x[] = {
873         E118x_GPIO_REG
874         E1247_DISPLAY_GPIO_REG
875 };
876
877 /* Gpio switch regulator platform data  for E1186/E1187/E1256*/
878 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e118x_pm313[] = {
879         E118x_GPIO_REG
880         PM313_DISPLAY_GPIO_REG
881 };
882
883 /* Gpio switch regulator platform data for E1198 and E1291*/
884 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1198_base[] = {
885         COMMON_GPIO_REG
886         E1291_1198_A00_GPIO_REG
887         E1198_GPIO_REG
888 };
889
890 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1198_a02[] = {
891         ADD_GPIO_REG(en_5v_cp),
892         ADD_GPIO_REG(en_5v0),
893         ADD_GPIO_REG(en_ddr_a04),
894         ADD_GPIO_REG(en_3v3_sys_a04),
895         ADD_GPIO_REG(en_3v3_modem),
896         ADD_GPIO_REG(en_vdd_pnl1),
897         ADD_GPIO_REG(cam3_ldo_en),
898         ADD_GPIO_REG(en_vdd_com),
899         ADD_GPIO_REG(en_3v3_fuse),
900         ADD_GPIO_REG(en_3v3_emmc),
901         ADD_GPIO_REG(en_vdd_sdmmc1),
902         ADD_GPIO_REG(en_3v3_pex_hvdd),
903         ADD_GPIO_REG(en_1v8_cam),
904         ADD_GPIO_REG(en_usb1_vbus_oc_a03),
905         ADD_GPIO_REG(en_usb3_vbus_oc_a03),
906         ADD_GPIO_REG(en_vdd_bl1_a03),
907         ADD_GPIO_REG(en_vdd_bl2_a03),
908         ADD_GPIO_REG(en_vddio_vid_oc),
909         ADD_GPIO_REG(cam1_ldo_en),
910         ADD_GPIO_REG(cam2_ldo_en),
911 };
912
913 /* Gpio switch regulator platform data for PM269*/
914 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_pm269[] = {
915         PM269_GPIO_REG
916         E1247_DISPLAY_GPIO_REG
917 };
918
919 /* Gpio switch regulator platform data for PM269*/
920 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_pm269_pm313[] = {
921         PM269_GPIO_REG
922         PM313_DISPLAY_GPIO_REG
923 };
924
925 /* Gpio switch regulator platform data for E1291 A03*/
926 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1291_a03[] = {
927         COMMON_GPIO_REG
928         E1291_A03_GPIO_REG
929         E1198_GPIO_REG
930 };
931
932 /* Gpio switch regulator platform data for E1291 A04/A05*/
933 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1291_a04[] = {
934         COMMON_GPIO_REG_E1291_A04
935         E1291_A03_GPIO_REG
936         E1198_GPIO_REG
937 };
938
939
940 static struct gpio_switch_regulator_platform_data  gswitch_pdata;
941 static struct platform_device gswitch_regulator_pdata = {
942         .name = "gpio-switch-regulator",
943         .id   = -1,
944         .dev  = {
945              .platform_data = &gswitch_pdata,
946         },
947 };
948
949 int __init cardhu_gpio_switch_regulator_init(void)
950 {
951         int i;
952         struct board_info board_info;
953         struct board_info pmu_board_info;
954         struct board_info display_board_info;
955
956         tegra_get_board_info(&board_info);
957         tegra_get_pmu_board_info(&pmu_board_info);
958         tegra_get_display_board_info(&display_board_info);
959
960         if (pmu_board_info.board_id == BOARD_PMU_PM299)
961                 return cardhu_pm299_gpio_switch_regulator_init();
962
963         switch (board_info.board_id) {
964         case BOARD_E1198:
965                 if (board_info.fab <= BOARD_FAB_A01) {
966                         gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e1198_base);
967                         gswitch_pdata.subdevs = gswitch_subdevs_e1198_base;
968                 } else {
969                         gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e1198_a02);
970                         gswitch_pdata.subdevs = gswitch_subdevs_e1198_a02;
971                 }
972                 break;
973
974         case BOARD_E1291:
975                 if (board_info.fab == BOARD_FAB_A03) {
976                         gswitch_pdata.num_subdevs =
977                                         ARRAY_SIZE(gswitch_subdevs_e1291_a03);
978                         gswitch_pdata.subdevs = gswitch_subdevs_e1291_a03;
979                 } else if ((board_info.fab == BOARD_FAB_A04) ||
980                                 (board_info.fab == BOARD_FAB_A05)) {
981                         gswitch_pdata.num_subdevs =
982                                         ARRAY_SIZE(gswitch_subdevs_e1291_a04);
983                         gswitch_pdata.subdevs = gswitch_subdevs_e1291_a04;
984                 } else {
985                         gswitch_pdata.num_subdevs =
986                                         ARRAY_SIZE(gswitch_subdevs_e1198_base);
987                         gswitch_pdata.subdevs = gswitch_subdevs_e1198_base;
988                 }
989                 break;
990
991         case BOARD_PM269:
992         case BOARD_PM305:
993         case BOARD_PM311:
994         case BOARD_E1257:
995                 gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_pm269);
996                 gswitch_pdata.subdevs = gswitch_subdevs_pm269;
997                 if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
998                         gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_pm269_pm313);
999                         gswitch_pdata.subdevs = gswitch_subdevs_pm269_pm313;
1000                 } else {
1001                         gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_pm269);
1002                         gswitch_pdata.subdevs = gswitch_subdevs_pm269;
1003                 }
1004                 break;
1005         default:
1006                 if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
1007                         gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e118x_pm313);
1008                         gswitch_pdata.subdevs = gswitch_subdevs_e118x_pm313;
1009                 } else {
1010                         gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e118x);
1011                         gswitch_pdata.subdevs = gswitch_subdevs_e118x;
1012                 }
1013                 break;
1014         }
1015
1016         for (i = 0; i < gswitch_pdata.num_subdevs; ++i) {
1017                 struct gpio_switch_regulator_subdev_data *gswitch_data = gswitch_pdata.subdevs[i];
1018                 if (gswitch_data->gpio_nr <= TEGRA_NR_GPIOS)
1019                         tegra_gpio_enable(gswitch_data->gpio_nr);
1020         }
1021
1022         return platform_device_register(&gswitch_regulator_pdata);
1023 }
1024
1025 static void cardhu_board_suspend(int lp_state, enum suspend_stage stg)
1026 {
1027         if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_SUSPEND_BEFORE_CPU))
1028                 tegra_console_uart_suspend();
1029 }
1030
1031 static void cardhu_board_resume(int lp_state, enum resume_stage stg)
1032 {
1033         if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_RESUME_AFTER_CPU))
1034                 tegra_console_uart_resume();
1035 }
1036
1037 static struct tegra_suspend_platform_data cardhu_suspend_data = {
1038         .cpu_timer      = 2000,
1039         .cpu_off_timer  = 200,
1040         .suspend_mode   = TEGRA_SUSPEND_LP0,
1041         .core_timer     = 0x7e7e,
1042         .core_off_timer = 0,
1043         .corereq_high   = true,
1044         .sysclkreq_high = true,
1045         .cpu_lp2_min_residency = 2000,
1046         .board_suspend = cardhu_board_suspend,
1047         .board_resume = cardhu_board_resume,
1048 };
1049
1050 int __init cardhu_suspend_init(void)
1051 {
1052         struct board_info board_info;
1053         struct board_info pmu_board_info;
1054
1055         tegra_get_board_info(&board_info);
1056         tegra_get_pmu_board_info(&pmu_board_info);
1057
1058         /* For PMU Fab A03, A04 and A05 make core_pwr_req to high */
1059         if ((pmu_board_info.fab == BOARD_FAB_A03) ||
1060                 (pmu_board_info.fab == BOARD_FAB_A04) ||
1061                  (pmu_board_info.fab == BOARD_FAB_A05))
1062                 cardhu_suspend_data.corereq_high = true;
1063
1064         /* CORE_PWR_REQ to be high for all processor/pmu board whose sku bit 0
1065          * is set. This is require to enable the dc-dc converter tps62361x */
1066         if ((board_info.sku & SKU_DCDC_TPS62361_SUPPORT) || (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT))
1067                 cardhu_suspend_data.corereq_high = true;
1068
1069         switch (board_info.board_id) {
1070         case BOARD_E1291:
1071                 /* CORE_PWR_REQ to be high for E1291-A03 */
1072                 if (board_info.fab == BOARD_FAB_A03)
1073                         cardhu_suspend_data.corereq_high = true;
1074                 break;
1075         case BOARD_E1198:
1076         case BOARD_PM269:
1077         case BOARD_PM305:
1078         case BOARD_PM311:
1079                 break;
1080         case BOARD_E1187:
1081         case BOARD_E1186:
1082         case BOARD_E1256:
1083         case BOARD_E1257:
1084                 cardhu_suspend_data.cpu_timer = 5000;
1085                 cardhu_suspend_data.cpu_off_timer = 5000;
1086                 break;
1087         default:
1088                 break;
1089         }
1090
1091         tegra_init_suspend(&cardhu_suspend_data);
1092         return 0;
1093 }
1094
1095 static void cardhu_power_off(void)
1096 {
1097         int ret;
1098         pr_err("cardhu: Powering off the device\n");
1099         ret = tps6591x_power_off();
1100         if (ret)
1101                 pr_err("cardhu: failed to power off\n");
1102
1103         while (1);
1104 }
1105
1106 int __init cardhu_power_off_init(void)
1107 {
1108         pm_power_off = cardhu_power_off;
1109         return 0;
1110 }
1111
1112 static struct tegra_tsensor_pmu_data  tpdata = {
1113         .poweroff_reg_addr = 0x3F,
1114         .poweroff_reg_data = 0x80,
1115         .reset_tegra = 1,
1116         .controller_type = 0,
1117         .i2c_controller_id = 4,
1118         .pinmux = 0,
1119         .pmu_16bit_ops = 0,
1120         .pmu_i2c_addr = 0x2D,
1121 };
1122
1123 void __init cardhu_tsensor_init(void)
1124 {
1125         tegra3_tsensor_init(&tpdata);
1126 }
1127
1128 #ifdef CONFIG_TEGRA_EDP_LIMITS
1129
1130 int __init cardhu_edp_init(void)
1131 {
1132         /* Temporary initalization, needs to be set to the actual
1133            regulator current */
1134         tegra_init_cpu_edp_limits(5000);
1135         return 0;
1136 }
1137 #endif
1138
1139 static char *cardhu_battery[] = {
1140         "bq27510-0",
1141 };
1142
1143 static struct gpio_charger_platform_data cardhu_charger_pdata = {
1144         .name = "ac",
1145         .type = POWER_SUPPLY_TYPE_MAINS,
1146         .gpio = AC_PRESENT_GPIO,
1147         .gpio_active_low = 0,
1148         .supplied_to = cardhu_battery,
1149         .num_supplicants = ARRAY_SIZE(cardhu_battery),
1150 };
1151
1152 static struct platform_device cardhu_charger_device = {
1153         .name = "gpio-charger",
1154         .dev = {
1155                 .platform_data = &cardhu_charger_pdata,
1156         },
1157 };
1158
1159 static int __init cardhu_charger_late_init(void)
1160 {
1161         if (!machine_is_cardhu())
1162                 return 0;
1163
1164         platform_device_register(&cardhu_charger_device);
1165         return 0;
1166 }
1167
1168 late_initcall(cardhu_charger_late_init);
1169