arm: tegra: cardhu: pm269: Remove SDMMC1_VDD control
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu-power.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu-power.c
3  *
4  * Copyright (C) 2011 NVIDIA, Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
18  * 02111-1307, USA
19  */
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/regulator/machine.h>
25 #include <linux/mfd/tps6591x.h>
26 #include <linux/gpio.h>
27 #include <linux/io.h>
28 #include <linux/regulator/gpio-switch-regulator.h>
29 #include <linux/regulator/tps6591x-regulator.h>
30 #include <linux/regulator/tps6236x-regulator.h>
31 #include <linux/power/gpio-charger.h>
32
33 #include <mach/iomap.h>
34 #include <mach/irqs.h>
35 #include <mach/pinmux.h>
36 #include <mach/edp.h>
37 #include <mach/tsensor.h>
38
39 #include "gpio-names.h"
40 #include "board.h"
41 #include "board-cardhu.h"
42 #include "pm.h"
43 #include "wakeups-t3.h"
44
45 #define PMC_CTRL                0x0
46 #define PMC_CTRL_INTR_LOW       (1 << 17)
47
48 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_0[] = {
49         REGULATOR_SUPPLY("vdd_core", NULL),
50         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
51 };
52
53 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_1[] = {
54         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
55 };
56
57 static struct regulator_consumer_supply tps6591x_vdd2_supply_0[] = {
58         REGULATOR_SUPPLY("vdd_gen1v5", NULL),
59         REGULATOR_SUPPLY("vcore_lcd", NULL),
60         REGULATOR_SUPPLY("track_ldo1", NULL),
61         REGULATOR_SUPPLY("external_ldo_1v2", NULL),
62         REGULATOR_SUPPLY("vcore_cam1", NULL),
63         REGULATOR_SUPPLY("vcore_cam2", NULL),
64 };
65
66 static struct regulator_consumer_supply tps6591x_vddctrl_supply_0[] = {
67         REGULATOR_SUPPLY("vdd_cpu_pmu", NULL),
68         REGULATOR_SUPPLY("vdd_cpu", NULL),
69         REGULATOR_SUPPLY("vdd_sys", NULL),
70 };
71
72 static struct regulator_consumer_supply tps6591x_vio_supply_0[] = {
73         REGULATOR_SUPPLY("vdd_gen1v8", NULL),
74         REGULATOR_SUPPLY("avdd_hdmi_pll", NULL),
75         REGULATOR_SUPPLY("avdd_usb_pll", NULL),
76         REGULATOR_SUPPLY("avdd_osc", NULL),
77         REGULATOR_SUPPLY("vddio_sys", NULL),
78         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
79         REGULATOR_SUPPLY("pwrdet_sdmmc4", NULL),
80         REGULATOR_SUPPLY("vdd1v8_satelite", NULL),
81         REGULATOR_SUPPLY("vddio_uart", NULL),
82         REGULATOR_SUPPLY("pwrdet_uart", NULL),
83         REGULATOR_SUPPLY("vddio_audio", NULL),
84         REGULATOR_SUPPLY("pwrdet_audio", NULL),
85         REGULATOR_SUPPLY("vddio_bb", NULL),
86         REGULATOR_SUPPLY("pwrdet_bb", NULL),
87         REGULATOR_SUPPLY("vddio_lcd_pmu", NULL),
88         REGULATOR_SUPPLY("pwrdet_lcd", NULL),
89         REGULATOR_SUPPLY("vddio_cam", NULL),
90         REGULATOR_SUPPLY("pwrdet_cam", NULL),
91         REGULATOR_SUPPLY("vddio_vi", NULL),
92         REGULATOR_SUPPLY("pwrdet_vi", NULL),
93         REGULATOR_SUPPLY("ldo6", NULL),
94         REGULATOR_SUPPLY("ldo7", NULL),
95         REGULATOR_SUPPLY("ldo8", NULL),
96         REGULATOR_SUPPLY("vcore_audio", NULL),
97         REGULATOR_SUPPLY("avcore_audio", NULL),
98         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
99         REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
100         REGULATOR_SUPPLY("vcore1_lpddr2", NULL),
101         REGULATOR_SUPPLY("vcom_1v8", NULL),
102         REGULATOR_SUPPLY("pmuio_1v8", NULL),
103         REGULATOR_SUPPLY("avdd_ic_usb", NULL),
104 };
105
106 static struct regulator_consumer_supply tps6591x_ldo1_supply_0[] = {
107         REGULATOR_SUPPLY("avdd_pexb", NULL),
108         REGULATOR_SUPPLY("vdd_pexb", NULL),
109         REGULATOR_SUPPLY("avdd_pex_pll", NULL),
110         REGULATOR_SUPPLY("avdd_pexa", NULL),
111         REGULATOR_SUPPLY("vdd_pexa", NULL),
112 };
113
114 static struct regulator_consumer_supply tps6591x_ldo2_supply_0[] = {
115         REGULATOR_SUPPLY("avdd_sata", NULL),
116         REGULATOR_SUPPLY("vdd_sata", NULL),
117         REGULATOR_SUPPLY("avdd_sata_pll", NULL),
118         REGULATOR_SUPPLY("avdd_plle", NULL),
119 };
120
121 static struct regulator_consumer_supply tps6591x_ldo3_supply_e118x[] = {
122         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
123         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
124 };
125
126 static struct regulator_consumer_supply tps6591x_ldo3_supply_e1198[] = {
127         REGULATOR_SUPPLY("unused_rail_ldo3", NULL),
128 };
129
130 static struct regulator_consumer_supply tps6591x_ldo4_supply_0[] = {
131         REGULATOR_SUPPLY("vdd_rtc", NULL),
132 };
133
134 static struct regulator_consumer_supply tps6591x_ldo5_supply_e118x[] = {
135         REGULATOR_SUPPLY("avdd_vdac", NULL),
136 };
137
138 static struct regulator_consumer_supply tps6591x_ldo5_supply_e1198[] = {
139         REGULATOR_SUPPLY("avdd_vdac", NULL),
140         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
141         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
142 };
143
144 static struct regulator_consumer_supply tps6591x_ldo6_supply_0[] = {
145         REGULATOR_SUPPLY("avdd_dsi_csi", NULL),
146         REGULATOR_SUPPLY("pwrdet_mipi", NULL),
147 };
148 static struct regulator_consumer_supply tps6591x_ldo7_supply_0[] = {
149         REGULATOR_SUPPLY("avdd_plla_p_c_s", NULL),
150         REGULATOR_SUPPLY("avdd_pllm", NULL),
151         REGULATOR_SUPPLY("avdd_pllu_d", NULL),
152         REGULATOR_SUPPLY("avdd_pllu_d2", NULL),
153         REGULATOR_SUPPLY("avdd_pllx", NULL),
154 };
155
156 static struct regulator_consumer_supply tps6591x_ldo8_supply_0[] = {
157         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
158 };
159
160 #define TPS_PDATA_INIT(_name, _sname, _minmv, _maxmv, _supply_reg, _always_on, \
161         _boot_on, _apply_uv, _init_uV, _init_enable, _init_apply, _ectrl) \
162         static struct tps6591x_regulator_platform_data pdata_##_name##_##_sname = \
163         {                                                               \
164                 .regulator = {                                          \
165                         .constraints = {                                \
166                                 .min_uV = (_minmv)*1000,                \
167                                 .max_uV = (_maxmv)*1000,                \
168                                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
169                                                      REGULATOR_MODE_STANDBY), \
170                                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
171                                                    REGULATOR_CHANGE_STATUS |  \
172                                                    REGULATOR_CHANGE_VOLTAGE), \
173                                 .always_on = _always_on,                \
174                                 .boot_on = _boot_on,                    \
175                                 .apply_uV = _apply_uv,                  \
176                         },                                              \
177                         .num_consumer_supplies =                        \
178                                 ARRAY_SIZE(tps6591x_##_name##_supply_##_sname), \
179                         .consumer_supplies = tps6591x_##_name##_supply_##_sname,        \
180                         .supply_regulator = _supply_reg,                \
181                 },                                                      \
182                 .init_uV =  _init_uV * 1000,                            \
183                 .init_enable = _init_enable,                            \
184                 .init_apply = _init_apply,                              \
185                 .ectrl = _ectrl                                         \
186         }
187
188 TPS_PDATA_INIT(vdd1, skubit0_0, 600,  1500, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF);
189 TPS_PDATA_INIT(vdd1, skubit0_1, 600,  1500, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF);
190 TPS_PDATA_INIT(vdd2, 0,         600,  1500, 0, 1, 1, 0, -1, 0, 0, 0);
191 TPS_PDATA_INIT(vddctrl, 0,      600,  1400, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_EN1);
192 TPS_PDATA_INIT(vio,  0,         1500, 3300, 0, 1, 1, 0, -1, 0, 0, 0);
193
194 TPS_PDATA_INIT(ldo1, 0,         1000, 3300, tps6591x_rails(VDD_2), 0, 0, 0, -1, 0, 1, 0);
195 TPS_PDATA_INIT(ldo2, 0,         1050, 1050, tps6591x_rails(VDD_2), 0, 0, 1, -1, 0, 1, 0);
196
197 TPS_PDATA_INIT(ldo3, e118x,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0);
198 TPS_PDATA_INIT(ldo3, e1198,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0);
199 TPS_PDATA_INIT(ldo4, 0,         1000, 3300, 0, 1, 0, 0, -1, 0, 0, 0);
200 TPS_PDATA_INIT(ldo5, e118x,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0);
201 TPS_PDATA_INIT(ldo5, e1198,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0);
202
203 TPS_PDATA_INIT(ldo6, 0,         1200, 1200, tps6591x_rails(VIO), 0, 0, 1, -1, 0, 0, 0);
204 TPS_PDATA_INIT(ldo7, 0,         1200, 1200, tps6591x_rails(VIO), 1, 1, 1, -1, 0, 0, 0);
205 TPS_PDATA_INIT(ldo8, 0,         1000, 3300, tps6591x_rails(VIO), 1, 0, 0, -1, 0, 0, 0);
206
207 #if defined(CONFIG_RTC_DRV_TPS6591x)
208 static struct tps6591x_rtc_platform_data rtc_data = {
209         .irq = TEGRA_NR_IRQS + TPS6591X_INT_RTC_ALARM,
210         .time = {
211                 .tm_year = 2000,
212                 .tm_mon = 0,
213                 .tm_mday = 1,
214                 .tm_hour = 0,
215                 .tm_min = 0,
216                 .tm_sec = 0,
217         },
218 };
219
220 #define TPS_RTC_REG()                                   \
221         {                                               \
222                 .id     = 0,                            \
223                 .name   = "rtc_tps6591x",               \
224                 .platform_data = &rtc_data,             \
225         }
226 #endif
227
228 #define TPS_REG(_id, _name, _sname)                             \
229         {                                                       \
230                 .id     = TPS6591X_ID_##_id,                    \
231                 .name   = "tps6591x-regulator",                 \
232                 .platform_data  = &pdata_##_name##_##_sname,    \
233         }
234
235 #define TPS6591X_DEV_COMMON_E118X               \
236         TPS_REG(VDD_2, vdd2, 0),                \
237         TPS_REG(VDDCTRL, vddctrl, 0),           \
238         TPS_REG(LDO_1, ldo1, 0),                \
239         TPS_REG(LDO_2, ldo2, 0),                \
240         TPS_REG(LDO_3, ldo3, e118x),            \
241         TPS_REG(LDO_4, ldo4, 0),                \
242         TPS_REG(LDO_5, ldo5, e118x),            \
243         TPS_REG(LDO_6, ldo6, 0),                \
244         TPS_REG(LDO_7, ldo7, 0),                \
245         TPS_REG(LDO_8, ldo8, 0)
246
247 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_0[] = {
248         TPS_REG(VIO, vio, 0),
249         TPS_REG(VDD_1, vdd1, skubit0_0),
250         TPS6591X_DEV_COMMON_E118X,
251 #if defined(CONFIG_RTC_DRV_TPS6591x)
252         TPS_RTC_REG(),
253 #endif
254 };
255
256 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_1[] = {
257         TPS_REG(VIO, vio, 0),
258         TPS_REG(VDD_1, vdd1, skubit0_1),
259         TPS6591X_DEV_COMMON_E118X,
260 #if defined(CONFIG_RTC_DRV_TPS6591x)
261         TPS_RTC_REG(),
262 #endif
263 };
264
265 #define TPS6591X_DEV_COMMON_CARDHU              \
266         TPS_REG(VDD_2, vdd2, 0),                \
267         TPS_REG(VDDCTRL, vddctrl, 0),           \
268         TPS_REG(LDO_1, ldo1, 0),                \
269         TPS_REG(LDO_2, ldo2, 0),                \
270         TPS_REG(LDO_3, ldo3, e1198),            \
271         TPS_REG(LDO_4, ldo4, 0),                \
272         TPS_REG(LDO_5, ldo5, e1198),            \
273         TPS_REG(LDO_6, ldo6, 0),                \
274         TPS_REG(LDO_7, ldo7, 0),                \
275         TPS_REG(LDO_8, ldo8, 0)
276
277 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_0[] = {
278         TPS_REG(VIO, vio, 0),
279         TPS_REG(VDD_1, vdd1, skubit0_0),
280         TPS6591X_DEV_COMMON_CARDHU,
281 #if defined(CONFIG_RTC_DRV_TPS6591x)
282         TPS_RTC_REG(),
283 #endif
284 };
285
286 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_1[] = {
287         TPS_REG(VIO, vio, 0),
288         TPS_REG(VDD_1, vdd1, skubit0_1),
289         TPS6591X_DEV_COMMON_CARDHU,
290 #if defined(CONFIG_RTC_DRV_TPS6591x)
291         TPS_RTC_REG(),
292 #endif
293 };
294
295 #define TPS_GPIO_INIT_PDATA(gpio_nr, _init_apply, _sleep_en, _pulldn_en, _output_en, _output_val)       \
296         [gpio_nr] = {                                   \
297                         .sleep_en       = _sleep_en,    \
298                         .pulldn_en      = _pulldn_en,   \
299                         .output_mode_en = _output_en,   \
300                         .output_val     = _output_val,  \
301                         .init_apply     = _init_apply,  \
302                      }
303 static struct tps6591x_gpio_init_data tps_gpio_pdata_e1291_a04[] =  {
304         TPS_GPIO_INIT_PDATA(0, 0, 0, 0, 0, 0),
305         TPS_GPIO_INIT_PDATA(1, 0, 0, 0, 0, 0),
306         TPS_GPIO_INIT_PDATA(2, 1, 1, 0, 1, 1),
307         TPS_GPIO_INIT_PDATA(3, 0, 0, 0, 0, 0),
308         TPS_GPIO_INIT_PDATA(4, 0, 0, 0, 0, 0),
309         TPS_GPIO_INIT_PDATA(5, 0, 0, 0, 0, 0),
310         TPS_GPIO_INIT_PDATA(6, 0, 0, 0, 0, 0),
311         TPS_GPIO_INIT_PDATA(7, 0, 0, 0, 0, 0),
312         TPS_GPIO_INIT_PDATA(8, 0, 0, 0, 0, 0),
313 };
314
315 static struct tps6591x_sleep_keepon_data tps_slp_keepon = {
316         .clkout32k_keepon = 1,
317 };
318
319 static struct tps6591x_platform_data tps_platform = {
320         .irq_base       = TPS6591X_IRQ_BASE,
321         .gpio_base      = TPS6591X_GPIO_BASE,
322         .dev_slp_en     = true,
323         .slp_keepon     = &tps_slp_keepon,
324 };
325
326 static struct i2c_board_info __initdata cardhu_regulators[] = {
327         {
328                 I2C_BOARD_INFO("tps6591x", 0x2D),
329                 .irq            = INT_EXTERNAL_PMU,
330                 .platform_data  = &tps_platform,
331         },
332 };
333
334 /* TPS62361B DC-DC converter */
335 static struct regulator_consumer_supply tps6236x_dcdc_supply[] = {
336         REGULATOR_SUPPLY("vdd_core", NULL),
337 };
338
339 static struct tps6236x_regulator_platform_data tps6236x_pdata = {
340         .reg_init_data = {                                      \
341                 .constraints = {                                \
342                         .min_uV = 500000,                       \
343                         .max_uV = 1770000,                      \
344                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
345                                              REGULATOR_MODE_STANDBY), \
346                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
347                                            REGULATOR_CHANGE_STATUS |  \
348                                            REGULATOR_CHANGE_VOLTAGE), \
349                         .always_on = 1,                         \
350                         .boot_on =  1,                          \
351                         .apply_uV = 0,                          \
352                 },                                              \
353                 .num_consumer_supplies = ARRAY_SIZE(tps6236x_dcdc_supply), \
354                 .consumer_supplies = tps6236x_dcdc_supply,              \
355                 },                                                      \
356         .internal_pd_enable = 0,                                        \
357         .vsel = 3,                                                      \
358         .init_uV = -1,                                                  \
359         .init_apply = 0,                                                \
360 };
361
362 static struct i2c_board_info __initdata tps6236x_boardinfo[] = {
363         {
364                 I2C_BOARD_INFO("tps62361B", 0x60),
365                 .platform_data  = &tps6236x_pdata,
366         },
367 };
368
369 int __init cardhu_regulator_init(void)
370 {
371         struct board_info board_info;
372         struct board_info pmu_board_info;
373         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
374         u32 pmc_ctrl;
375
376         /* configure the power management controller to trigger PMU
377          * interrupts when low */
378
379         pmc_ctrl = readl(pmc + PMC_CTRL);
380         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
381
382         /* The regulator details have complete constraints */
383         regulator_has_full_constraints();
384
385         tegra_get_board_info(&board_info);
386         tegra_get_pmu_board_info(&pmu_board_info);
387
388         /* PMU-E1208-A03, the ldo2 should be set to 1200mV */
389         if ((pmu_board_info.board_id == BOARD_E1208) &&
390                 (pmu_board_info.fab == BOARD_FAB_A03)) {
391                 pdata_ldo2_0.regulator.constraints.min_uV = 1200000;
392                 pdata_ldo2_0.regulator.constraints.max_uV = 1200000;
393         }
394
395         if ((board_info.board_id == BOARD_E1198) ||
396                 (board_info.board_id == BOARD_E1291)) {
397                 if (board_info.sku & SKU_DCDC_TPS62361_SUPPORT) {
398                         tps_platform.num_subdevs =
399                                         ARRAY_SIZE(tps_devs_e1198_skubit0_1);
400                         tps_platform.subdevs = tps_devs_e1198_skubit0_1;
401                 } else {
402                         tps_platform.num_subdevs =
403                                         ARRAY_SIZE(tps_devs_e1198_skubit0_0);
404                         tps_platform.subdevs = tps_devs_e1198_skubit0_0;
405                 }
406         } else {
407                 if (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT) {
408                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_1);
409                         tps_platform.subdevs = tps_devs_e118x_skubit0_1;
410                 } else {
411                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_0);
412                         tps_platform.subdevs = tps_devs_e118x_skubit0_0;
413                 }
414         }
415
416         /* E1291-A04: Enable DEV_SLP and enable sleep on GPIO2 */
417         if ((board_info.board_id == BOARD_E1291) && (board_info.fab == BOARD_FAB_A04)) {
418                 tps_platform.dev_slp_en = true;
419                 tps_platform.gpio_init_data = tps_gpio_pdata_e1291_a04;
420                 tps_platform.num_gpioinit_data =
421                                         ARRAY_SIZE(tps_gpio_pdata_e1291_a04);
422         }
423
424         i2c_register_board_info(4, cardhu_regulators, 1);
425
426         /* Resgister the TPS6236x for all boards whose sku bit 0 is set. */
427         if ((board_info.sku & SKU_DCDC_TPS62361_SUPPORT) ||
428                         (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT)) {
429                 pr_info("Registering the device TPS62361B\n");
430                 i2c_register_board_info(4, tps6236x_boardinfo, 1);
431         }
432         return 0;
433 }
434
435 /* EN_5V_CP from PMU GP0 */
436 static struct regulator_consumer_supply gpio_switch_en_5v_cp_supply[] = {
437         REGULATOR_SUPPLY("vdd_5v0_sby", NULL),
438         REGULATOR_SUPPLY("vdd_hall", NULL),
439         REGULATOR_SUPPLY("vterm_ddr", NULL),
440         REGULATOR_SUPPLY("v2ref_ddr", NULL),
441 };
442 static int gpio_switch_en_5v_cp_voltages[] = { 5000};
443
444 /* EN_5V0 From PMU GP2 */
445 static struct regulator_consumer_supply gpio_switch_en_5v0_supply[] = {
446         REGULATOR_SUPPLY("vdd_5v0_sys", NULL),
447 };
448 static int gpio_switch_en_5v0_voltages[] = { 5000};
449
450 /* EN_DDR From PMU GP6 */
451 static struct regulator_consumer_supply gpio_switch_en_ddr_supply[] = {
452         REGULATOR_SUPPLY("mem_vddio_ddr", NULL),
453         REGULATOR_SUPPLY("t30_vddio_ddr", NULL),
454 };
455 static int gpio_switch_en_ddr_voltages[] = { 1500};
456
457 /* EN_3V3_SYS From PMU GP7 */
458 static struct regulator_consumer_supply gpio_switch_en_3v3_sys_supply[] = {
459         REGULATOR_SUPPLY("vdd_lvds", NULL),
460         REGULATOR_SUPPLY("vdd_pnl", NULL),
461         REGULATOR_SUPPLY("vcom_3v3", NULL),
462         REGULATOR_SUPPLY("vdd_3v3", NULL),
463         REGULATOR_SUPPLY("vcore_mmc", NULL),
464         REGULATOR_SUPPLY("vddio_pex_ctl", NULL),
465         REGULATOR_SUPPLY("pwrdet_pex_ctl", NULL),
466         REGULATOR_SUPPLY("hvdd_pex_pmu", NULL),
467         REGULATOR_SUPPLY("avdd_hdmi", NULL),
468         REGULATOR_SUPPLY("vpp_fuse", NULL),
469         REGULATOR_SUPPLY("avdd_usb", NULL),
470         REGULATOR_SUPPLY("vdd_ddr_rx", NULL),
471         REGULATOR_SUPPLY("vcore_nand", NULL),
472         REGULATOR_SUPPLY("hvdd_sata", NULL),
473         REGULATOR_SUPPLY("vddio_gmi_pmu", NULL),
474         REGULATOR_SUPPLY("pwrdet_nand", NULL),
475         REGULATOR_SUPPLY("avdd_cam1", NULL),
476         REGULATOR_SUPPLY("vdd_af", NULL),
477         REGULATOR_SUPPLY("avdd_cam2", NULL),
478         REGULATOR_SUPPLY("vdd_acc", NULL),
479         REGULATOR_SUPPLY("vdd_phtl", NULL),
480         REGULATOR_SUPPLY("vddio_tp", NULL),
481         REGULATOR_SUPPLY("vdd_led", NULL),
482         REGULATOR_SUPPLY("vddio_cec", NULL),
483         REGULATOR_SUPPLY("vdd_cmps", NULL),
484         REGULATOR_SUPPLY("vdd_temp", NULL),
485         REGULATOR_SUPPLY("vpp_kfuse", NULL),
486         REGULATOR_SUPPLY("vddio_ts", NULL),
487         REGULATOR_SUPPLY("vdd_ir_led", NULL),
488         REGULATOR_SUPPLY("vddio_1wire", NULL),
489         REGULATOR_SUPPLY("avddio_audio", NULL),
490         REGULATOR_SUPPLY("vdd_ec", NULL),
491         REGULATOR_SUPPLY("vcom_pa", NULL),
492         REGULATOR_SUPPLY("vdd_3v3_devices", NULL),
493         REGULATOR_SUPPLY("vdd_3v3_dock", NULL),
494         REGULATOR_SUPPLY("vdd_3v3_edid", NULL),
495         REGULATOR_SUPPLY("vdd_3v3_hdmi_cec", NULL),
496         REGULATOR_SUPPLY("vdd_3v3_gmi", NULL),
497         REGULATOR_SUPPLY("vdd_spk_amp", "tegra-snd-wm8903"),
498         REGULATOR_SUPPLY("vdd_3v3_sensor", NULL),
499         REGULATOR_SUPPLY("vdd_3v3_cam", NULL),
500         REGULATOR_SUPPLY("vdd_3v3_als", NULL),
501         REGULATOR_SUPPLY("debug_cons", NULL),
502         REGULATOR_SUPPLY("vdd", "4-004c"),
503 };
504 static int gpio_switch_en_3v3_sys_voltages[] = { 3300};
505
506 /* DIS_5V_SWITCH from AP SPI2_SCK X02 */
507 static struct regulator_consumer_supply gpio_switch_dis_5v_switch_supply[] = {
508         REGULATOR_SUPPLY("master_5v_switch", NULL),
509 };
510 static int gpio_switch_dis_5v_switch_voltages[] = { 5000};
511
512 /* EN_VDD_BL */
513 static struct regulator_consumer_supply gpio_switch_en_vdd_bl_supply[] = {
514         REGULATOR_SUPPLY("vdd_backlight", NULL),
515         REGULATOR_SUPPLY("vdd_backlight1", NULL),
516 };
517 static int gpio_switch_en_vdd_bl_voltages[] = { 5000};
518
519 /* EN_VDD_BL2 (E1291-A03) from AP PEX_L0_PRSNT_N DD.00 */
520 static struct regulator_consumer_supply gpio_switch_en_vdd_bl2_supply[] = {
521         REGULATOR_SUPPLY("vdd_backlight2", NULL),
522 };
523 static int gpio_switch_en_vdd_bl2_voltages[] = { 5000};
524
525 /* EN_3V3_MODEM from AP GPIO VI_VSYNCH D06*/
526 static struct regulator_consumer_supply gpio_switch_en_3v3_modem_supply[] = {
527         REGULATOR_SUPPLY("vdd_3v3_mini_card", NULL),
528         REGULATOR_SUPPLY("vdd_mini_card", NULL),
529 };
530 static int gpio_switch_en_3v3_modem_voltages[] = { 3300};
531
532 /* EN_USB1_VBUS_OC*/
533 static struct regulator_consumer_supply gpio_switch_en_usb1_vbus_oc_supply[] = {
534         REGULATOR_SUPPLY("vdd_vbus_micro_usb", NULL),
535 };
536 static int gpio_switch_en_usb1_vbus_oc_voltages[] = { 5000};
537
538 /*EN_USB3_VBUS_OC*/
539 static struct regulator_consumer_supply gpio_switch_en_usb3_vbus_oc_supply[] = {
540         REGULATOR_SUPPLY("vdd_vbus_typea_usb", NULL),
541 };
542 static int gpio_switch_en_usb3_vbus_oc_voltages[] = { 5000};
543
544 /* EN_VDDIO_VID_OC from AP GPIO VI_PCLK T00*/
545 static struct regulator_consumer_supply gpio_switch_en_vddio_vid_oc_supply[] = {
546         REGULATOR_SUPPLY("vdd_hdmi_con", NULL),
547 };
548 static int gpio_switch_en_vddio_vid_oc_voltages[] = { 5000};
549
550 /* EN_VDD_PNL1 from AP GPIO VI_D6 L04*/
551 static struct regulator_consumer_supply gpio_switch_en_vdd_pnl1_supply[] = {
552         REGULATOR_SUPPLY("vdd_lcd_panel", NULL),
553 };
554 static int gpio_switch_en_vdd_pnl1_voltages[] = { 3300};
555
556 /* CAM1_LDO_EN from AP GPIO KB_ROW6 R06*/
557 static struct regulator_consumer_supply gpio_switch_cam1_ldo_en_supply[] = {
558         REGULATOR_SUPPLY("vdd_2v8_cam1", NULL),
559         REGULATOR_SUPPLY("vdd_2v8_cam1_af", NULL),
560 };
561 static int gpio_switch_cam1_ldo_en_voltages[] = { 2800};
562
563 /* CAM2_LDO_EN from AP GPIO KB_ROW7 R07*/
564 static struct regulator_consumer_supply gpio_switch_cam2_ldo_en_supply[] = {
565         REGULATOR_SUPPLY("vdd_2v8_cam2", NULL),
566         REGULATOR_SUPPLY("vdd_2v8_cam2_af", NULL),
567 };
568 static int gpio_switch_cam2_ldo_en_voltages[] = { 2800};
569
570 /* CAM3_LDO_EN from AP GPIO KB_ROW8 S00*/
571 static struct regulator_consumer_supply gpio_switch_cam3_ldo_en_supply[] = {
572         REGULATOR_SUPPLY("vdd_cam3", NULL),
573 };
574 static int gpio_switch_cam3_ldo_en_voltages[] = { 3300};
575
576 /* EN_VDD_COM from AP GPIO SDMMC3_DAT5 D00*/
577 static struct regulator_consumer_supply gpio_switch_en_vdd_com_supply[] = {
578         REGULATOR_SUPPLY("vdd_com_bd", NULL),
579 };
580 static int gpio_switch_en_vdd_com_voltages[] = { 3300};
581
582 /* EN_VDD_SDMMC1 from AP GPIO VI_HSYNC D07*/
583 static struct regulator_consumer_supply gpio_switch_en_vdd_sdmmc1_supply[] = {
584         REGULATOR_SUPPLY("vddio_sd_slot", "sdhci-tegra.0"),
585 };
586 static int gpio_switch_en_vdd_sdmmc1_voltages[] = { 3300};
587
588 /* EN_3V3_EMMC from AP GPIO SDMMC3_DAT4 D01*/
589 static struct regulator_consumer_supply gpio_switch_en_3v3_emmc_supply[] = {
590         REGULATOR_SUPPLY("vdd_emmc_core", NULL),
591 };
592 static int gpio_switch_en_3v3_emmc_voltages[] = { 3300};
593
594 /* EN_3V3_PEX_HVDD from AP GPIO VI_D09 L07*/
595 static struct regulator_consumer_supply gpio_switch_en_3v3_pex_hvdd_supply[] = {
596         REGULATOR_SUPPLY("hvdd_pex", NULL),
597 };
598 static int gpio_switch_en_3v3_pex_hvdd_voltages[] = { 3300};
599
600 /* EN_3v3_FUSE from AP GPIO VI_D08 L06*/
601 static struct regulator_consumer_supply gpio_switch_en_3v3_fuse_supply[] = {
602         REGULATOR_SUPPLY("vdd_fuse", NULL),
603 };
604 static int gpio_switch_en_3v3_fuse_voltages[] = { 3300};
605
606 /* EN_1V8_CAM from AP GPIO GPIO_PBB4 PBB04*/
607 static struct regulator_consumer_supply gpio_switch_en_1v8_cam_supply[] = {
608         REGULATOR_SUPPLY("vdd_1v8_cam1", NULL),
609         REGULATOR_SUPPLY("vdd_1v8_cam2", NULL),
610         REGULATOR_SUPPLY("vdd_1v8_cam3", NULL),
611 };
612 static int gpio_switch_en_1v8_cam_voltages[] = { 1800};
613
614 static struct regulator_consumer_supply gpio_switch_en_vbrtr_supply[] = {
615         REGULATOR_SUPPLY("vdd_vbrtr", NULL),
616 };
617 static int gpio_switch_en_vbrtr_voltages[] = { 3300};
618
619 static int enable_load_switch_rail(
620                 struct gpio_switch_regulator_subdev_data *psubdev_data)
621 {
622         int ret;
623
624         if (psubdev_data->pin_group <= 0)
625                 return -EINVAL;
626
627         /* Tristate and make pin as input*/
628         ret = tegra_pinmux_set_tristate(psubdev_data->pin_group,
629                                                 TEGRA_TRI_TRISTATE);
630         if (ret < 0)
631                 return ret;
632         return gpio_direction_input(psubdev_data->gpio_nr);
633 }
634
635 static int disable_load_switch_rail(
636                 struct gpio_switch_regulator_subdev_data *psubdev_data)
637 {
638         int ret;
639
640         if (psubdev_data->pin_group <= 0)
641                 return -EINVAL;
642
643         /* Un-tristate and driver low */
644         ret = tegra_pinmux_set_tristate(psubdev_data->pin_group,
645                                                 TEGRA_TRI_NORMAL);
646         if (ret < 0)
647                 return ret;
648         return gpio_direction_output(psubdev_data->gpio_nr, 0);
649 }
650
651
652 /* Macro for defining gpio switch regulator sub device data */
653 #define GREG_INIT(_id, _var, _name, _input_supply, _always_on, _boot_on, \
654         _gpio_nr, _active_low, _init_state, _pg, _enable, _disable)      \
655         static struct gpio_switch_regulator_subdev_data gpio_pdata_##_var =  \
656         {                                                               \
657                 .regulator_name = "gpio-switch-"#_name,                 \
658                 .input_supply   = _input_supply,                        \
659                 .id             = _id,                                  \
660                 .gpio_nr        = _gpio_nr,                             \
661                 .pin_group      = _pg,                                  \
662                 .active_low     = _active_low,                          \
663                 .init_state     = _init_state,                          \
664                 .voltages       = gpio_switch_##_name##_voltages,       \
665                 .n_voltages     = ARRAY_SIZE(gpio_switch_##_name##_voltages), \
666                 .num_consumer_supplies =                                \
667                                 ARRAY_SIZE(gpio_switch_##_name##_supply), \
668                 .consumer_supplies = gpio_switch_##_name##_supply,      \
669                 .constraints = {                                        \
670                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
671                                              REGULATOR_MODE_STANDBY),   \
672                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
673                                            REGULATOR_CHANGE_STATUS |    \
674                                            REGULATOR_CHANGE_VOLTAGE),   \
675                         .always_on = _always_on,                        \
676                         .boot_on = _boot_on,                            \
677                 },                                                      \
678                 .enable_rail = _enable,                                 \
679                 .disable_rail = _disable,                               \
680         }
681
682 /* common to most of boards*/
683 GREG_INIT(0, en_5v_cp,          en_5v_cp,       NULL,                   1,      0,      TPS6591X_GPIO_0,        false,  1,      0,      0,      0);
684 GREG_INIT(1, en_5v0,            en_5v0,         NULL,                   0,      0,      TPS6591X_GPIO_2,        false,  0,      0,      0,      0);
685 GREG_INIT(2, en_ddr,            en_ddr,         NULL,                   0,      0,      TPS6591X_GPIO_6,        false,  0,      0,      0,      0);
686 GREG_INIT(3, en_3v3_sys,        en_3v3_sys,     NULL,                   0,      0,      TPS6591X_GPIO_7,        false,  0,      0,      0,      0);
687 GREG_INIT(4, en_vdd_bl,         en_vdd_bl,      NULL,                   0,      0,      TEGRA_GPIO_PK3,         false,  1,      0,      0,      0);
688 GREG_INIT(5, en_3v3_modem,      en_3v3_modem,   NULL,                   1,      0,      TEGRA_GPIO_PD6,         false,  1,      0,      0,      0);
689 GREG_INIT(6, en_vdd_pnl1,       en_vdd_pnl1,    "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PL4,         false,  1,      0,      0,      0);
690 GREG_INIT(7, cam3_ldo_en,       cam3_ldo_en,    "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PS0,         false,  0,      0,      0,      0);
691 GREG_INIT(8, en_vdd_com,        en_vdd_com,     "vdd_3v3_devices",      1,      0,      TEGRA_GPIO_PD0,         false,  1,      0,      0,      0);
692 GREG_INIT(9, en_3v3_fuse,       en_3v3_fuse,    "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PL6,         false,  0,      0,      0,      0);
693 GREG_INIT(10, en_3v3_emmc,      en_3v3_emmc,    "vdd_3v3_devices",      1,      0,      TEGRA_GPIO_PD1,         false,  1,      0,      0,      0);
694 GREG_INIT(11, en_vdd_sdmmc1,    en_vdd_sdmmc1,  "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PD7,         false,  1,      0,      0,      0);
695 GREG_INIT(12, en_3v3_pex_hvdd,  en_3v3_pex_hvdd, "hvdd_pex_pmu",        0,      0,      TEGRA_GPIO_PL7,         false,  0,      0,      0,      0);
696 GREG_INIT(13, en_1v8_cam,       en_1v8_cam,     "vdd_gen1v8",           0,      0,      TEGRA_GPIO_PBB4,        false,  0,      0,      0,      0);
697
698 /* E1291-A04 specific */
699 GREG_INIT(1, en_5v0_a04,        en_5v0,         NULL,                   0,      0,      TPS6591X_GPIO_8,        false,  0,      0,      0,      0);
700 GREG_INIT(2, en_ddr_a04,        en_ddr,         NULL,                   0,      0,      TPS6591X_GPIO_7,        false,  0,      0,      0,      0);
701 GREG_INIT(3, en_3v3_sys_a04,    en_3v3_sys,     NULL,                   0,      0,      TPS6591X_GPIO_6,        false,  0,      0,      0,      0);
702
703
704 /*Specific to pm269*/
705 GREG_INIT(4, en_vdd_bl_pm269,           en_vdd_bl,              NULL,
706         0,      0,      TEGRA_GPIO_PH3, false,  1,      0,      0,      0);
707 GREG_INIT(6, en_vdd_pnl1_pm269,         en_vdd_pnl1,            "vdd_3v3_devices",
708         0,      0,      TEGRA_GPIO_PW1, false,  1,      0,      0,      0);
709 GREG_INIT(9, en_3v3_fuse_pm269,         en_3v3_fuse,            "vdd_3v3_devices",
710         0,      0,      TEGRA_GPIO_PC1, false,  0,      0,      0,      0);
711 GREG_INIT(12, en_3v3_pex_hvdd_pm269,    en_3v3_pex_hvdd,        "hvdd_pex_pmu",
712         0,      0,      TEGRA_GPIO_PC6, false,  0,      0,      0,      0);
713 GREG_INIT(17, en_vddio_vid_oc_pm269,    en_vddio_vid_oc,        "master_5v_switch",
714         0,      0,      TEGRA_GPIO_PP2, false,  0,      TEGRA_PINGROUP_DAP3_DOUT,
715         enable_load_switch_rail, disable_load_switch_rail);
716
717 /* Specific to E1187/E1186/E1256 */
718 GREG_INIT(14, dis_5v_switch_e118x,      dis_5v_switch,          "vdd_5v0_sys",
719                 0,      0,      TEGRA_GPIO_PX2,         true,   0,      0,      0,      0);
720 GREG_INIT(15, en_usb1_vbus_oc_e118x,    en_usb1_vbus_oc,        "master_5v_switch",
721                 0,      0,      TEGRA_GPIO_PI4,         false,  0,      TEGRA_PINGROUP_GMI_RST_N,
722                 enable_load_switch_rail, disable_load_switch_rail);
723 GREG_INIT(16, en_usb3_vbus_oc_e118x,    en_usb3_vbus_oc,        "master_5v_switch",
724                 0,      0,      TEGRA_GPIO_PH7,         false,  0,      TEGRA_PINGROUP_GMI_AD15,
725                 enable_load_switch_rail, disable_load_switch_rail);
726 GREG_INIT(17, en_vddio_vid_oc_e118x,    en_vddio_vid_oc,        "master_5v_switch",
727                 0,      0,      TEGRA_GPIO_PT0,         false,  0,      TEGRA_PINGROUP_VI_PCLK,
728                 enable_load_switch_rail, disable_load_switch_rail);
729
730 /* E1198/E1291 specific  fab < A03 */
731 GREG_INIT(15, en_usb1_vbus_oc,          en_usb1_vbus_oc,        "vdd_5v0_sys",
732                 0,      0,      TEGRA_GPIO_PI4,         false,  0,      TEGRA_PINGROUP_GMI_RST_N,
733                 enable_load_switch_rail, disable_load_switch_rail);
734 GREG_INIT(16, en_usb3_vbus_oc,          en_usb3_vbus_oc,        "vdd_5v0_sys",
735                 0,      0,      TEGRA_GPIO_PH7,         false,  0,      TEGRA_PINGROUP_GMI_AD15,
736                 enable_load_switch_rail, disable_load_switch_rail);
737
738 /* E1198/E1291 specific  fab >= A03 */
739 GREG_INIT(15, en_usb1_vbus_oc_a03,      en_usb1_vbus_oc,        "vdd_5v0_sys",
740                 0,      0,      TEGRA_GPIO_PDD6,                false,  0,      TEGRA_PINGROUP_PEX_L1_CLKREQ_N,
741                 enable_load_switch_rail, disable_load_switch_rail);
742 GREG_INIT(16, en_usb3_vbus_oc_a03,              en_usb3_vbus_oc,        "vdd_5v0_sys",
743                 0,      0,      TEGRA_GPIO_PDD4,                false,  0,      TEGRA_PINGROUP_PEX_L1_PRSNT_N,
744                 enable_load_switch_rail, disable_load_switch_rail);
745
746 /* E1198/E1291 specific */
747 GREG_INIT(17, en_vddio_vid_oc,          en_vddio_vid_oc,        "vdd_5v0_sys",
748                 0,      0,      TEGRA_GPIO_PT0,         false,  0,      TEGRA_PINGROUP_VI_PCLK,
749                 enable_load_switch_rail, disable_load_switch_rail);
750
751 /* E1198/E1291 specific*/
752 GREG_INIT(18, cam1_ldo_en,      cam1_ldo_en,    "vdd_3v3_cam",  0,      0,      TEGRA_GPIO_PR6,         false,  0,      0,      0,      0);
753 GREG_INIT(19, cam2_ldo_en,      cam2_ldo_en,    "vdd_3v3_cam",  0,      0,      TEGRA_GPIO_PR7,         false,  0,      0,      0,      0);
754
755 /* E1291 A03 specific */
756 GREG_INIT(20, en_vdd_bl1_a03,   en_vdd_bl,      NULL,           0,      0,      TEGRA_GPIO_PDD2,        false,  1,      0,      0,      0);
757 GREG_INIT(21, en_vdd_bl2_a03,   en_vdd_bl2,     NULL,           0,      0,      TEGRA_GPIO_PDD0,        false,  1,      0,      0,      0);
758
759 GREG_INIT(22, en_vbrtr,         en_vbrtr,       "vdd_3v3_devices",      0,      0,      PMU_TCA6416_GPIO_PORT12,        false,  0,      0,      0,      0);
760
761 #define ADD_GPIO_REG(_name) &gpio_pdata_##_name
762
763 #define COMMON_GPIO_REG \
764         ADD_GPIO_REG(en_5v_cp),                 \
765         ADD_GPIO_REG(en_5v0),                   \
766         ADD_GPIO_REG(en_ddr),                   \
767         ADD_GPIO_REG(en_3v3_sys),               \
768         ADD_GPIO_REG(en_3v3_modem),             \
769         ADD_GPIO_REG(en_vdd_pnl1),              \
770         ADD_GPIO_REG(cam3_ldo_en),              \
771         ADD_GPIO_REG(en_vdd_com),               \
772         ADD_GPIO_REG(en_3v3_fuse),              \
773         ADD_GPIO_REG(en_3v3_emmc),              \
774         ADD_GPIO_REG(en_vdd_sdmmc1),            \
775         ADD_GPIO_REG(en_3v3_pex_hvdd),          \
776         ADD_GPIO_REG(en_1v8_cam),
777
778 #define COMMON_GPIO_REG_E1291_A04 \
779         ADD_GPIO_REG(en_5v_cp),                 \
780         ADD_GPIO_REG(en_5v0_a04),               \
781         ADD_GPIO_REG(en_ddr_a04),               \
782         ADD_GPIO_REG(en_3v3_sys_a04),           \
783         ADD_GPIO_REG(en_3v3_modem),             \
784         ADD_GPIO_REG(en_vdd_pnl1),              \
785         ADD_GPIO_REG(cam3_ldo_en),              \
786         ADD_GPIO_REG(en_vdd_com),               \
787         ADD_GPIO_REG(en_3v3_fuse),              \
788         ADD_GPIO_REG(en_3v3_emmc),              \
789         ADD_GPIO_REG(en_vdd_sdmmc1),            \
790         ADD_GPIO_REG(en_3v3_pex_hvdd),          \
791         ADD_GPIO_REG(en_1v8_cam),
792
793 #define PM269_GPIO_REG \
794         ADD_GPIO_REG(en_5v_cp),                 \
795         ADD_GPIO_REG(en_5v0),                   \
796         ADD_GPIO_REG(en_ddr),                   \
797         ADD_GPIO_REG(en_vdd_bl_pm269),          \
798         ADD_GPIO_REG(en_3v3_sys),               \
799         ADD_GPIO_REG(en_3v3_modem),             \
800         ADD_GPIO_REG(en_vdd_pnl1_pm269),                \
801         ADD_GPIO_REG(cam1_ldo_en),              \
802         ADD_GPIO_REG(cam2_ldo_en),              \
803         ADD_GPIO_REG(cam3_ldo_en),              \
804         ADD_GPIO_REG(en_vdd_com),               \
805         ADD_GPIO_REG(en_3v3_fuse_pm269),        \
806         ADD_GPIO_REG(en_3v3_emmc),              \
807         ADD_GPIO_REG(en_3v3_pex_hvdd_pm269),    \
808         ADD_GPIO_REG(en_1v8_cam),               \
809         ADD_GPIO_REG(dis_5v_switch_e118x),      \
810         ADD_GPIO_REG(en_usb1_vbus_oc_e118x),    \
811         ADD_GPIO_REG(en_usb3_vbus_oc_e118x),    \
812         ADD_GPIO_REG(en_vddio_vid_oc_pm269),
813
814 #define E118x_GPIO_REG  \
815         ADD_GPIO_REG(en_vdd_bl),                \
816         ADD_GPIO_REG(dis_5v_switch_e118x),      \
817         ADD_GPIO_REG(en_usb1_vbus_oc_e118x),    \
818         ADD_GPIO_REG(en_usb3_vbus_oc_e118x),    \
819         ADD_GPIO_REG(en_vddio_vid_oc_e118x), \
820         ADD_GPIO_REG(en_vbrtr),
821
822 #define E1198_GPIO_REG  \
823         ADD_GPIO_REG(en_vddio_vid_oc),          \
824         ADD_GPIO_REG(cam1_ldo_en),              \
825         ADD_GPIO_REG(cam2_ldo_en),
826
827 #define E1291_1198_A00_GPIO_REG \
828         ADD_GPIO_REG(en_usb1_vbus_oc),          \
829         ADD_GPIO_REG(en_usb3_vbus_oc),          \
830         ADD_GPIO_REG(en_vdd_bl),
831
832 #define E1291_A03_GPIO_REG      \
833         ADD_GPIO_REG(en_usb1_vbus_oc_a03),              \
834         ADD_GPIO_REG(en_usb3_vbus_oc_a03),              \
835         ADD_GPIO_REG(en_vdd_bl1_a03), \
836         ADD_GPIO_REG(en_vdd_bl2_a03),
837
838 /* Gpio switch regulator platform data  for E1186/E1187/E1256*/
839 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e118x[] = {
840         COMMON_GPIO_REG
841         E118x_GPIO_REG
842 };
843
844 /* Gpio switch regulator platform data for E1198 and E1291*/
845 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1198_base[] = {
846         COMMON_GPIO_REG
847         E1291_1198_A00_GPIO_REG
848         E1198_GPIO_REG
849 };
850
851 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1198_a02[] = {
852         ADD_GPIO_REG(en_5v_cp),
853         ADD_GPIO_REG(en_5v0),
854         ADD_GPIO_REG(en_ddr_a04),
855         ADD_GPIO_REG(en_3v3_sys_a04),
856         ADD_GPIO_REG(en_3v3_modem),
857         ADD_GPIO_REG(en_vdd_pnl1),
858         ADD_GPIO_REG(cam3_ldo_en),
859         ADD_GPIO_REG(en_vdd_com),
860         ADD_GPIO_REG(en_3v3_fuse),
861         ADD_GPIO_REG(en_3v3_emmc),
862         ADD_GPIO_REG(en_vdd_sdmmc1),
863         ADD_GPIO_REG(en_3v3_pex_hvdd),
864         ADD_GPIO_REG(en_1v8_cam),
865         ADD_GPIO_REG(en_usb1_vbus_oc_a03),
866         ADD_GPIO_REG(en_usb3_vbus_oc_a03),
867         ADD_GPIO_REG(en_vdd_bl1_a03),
868         ADD_GPIO_REG(en_vdd_bl2_a03),
869         ADD_GPIO_REG(en_vddio_vid_oc),
870         ADD_GPIO_REG(cam1_ldo_en),
871         ADD_GPIO_REG(cam2_ldo_en),
872 };
873
874 /* Gpio switch regulator platform data for PM269*/
875 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_pm269[] = {
876         PM269_GPIO_REG
877 };
878
879 /* Gpio switch regulator platform data for E1291 A03*/
880 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1291_a03[] = {
881         COMMON_GPIO_REG
882         E1291_A03_GPIO_REG
883         E1198_GPIO_REG
884 };
885
886 /* Gpio switch regulator platform data for E1291 A04*/
887 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1291_a04[] = {
888         COMMON_GPIO_REG_E1291_A04
889         E1291_A03_GPIO_REG
890         E1198_GPIO_REG
891 };
892
893
894 static struct gpio_switch_regulator_platform_data  gswitch_pdata;
895 static struct platform_device gswitch_regulator_pdata = {
896         .name = "gpio-switch-regulator",
897         .id   = -1,
898         .dev  = {
899              .platform_data = &gswitch_pdata,
900         },
901 };
902
903 int __init cardhu_gpio_switch_regulator_init(void)
904 {
905         int i;
906         struct board_info board_info;
907         tegra_get_board_info(&board_info);
908         switch (board_info.board_id) {
909         case BOARD_E1198:
910                 if (board_info.fab <= BOARD_FAB_A01) {
911                         gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e1198_base);
912                         gswitch_pdata.subdevs = gswitch_subdevs_e1198_base;
913                 } else {
914                         gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e1198_a02);
915                         gswitch_pdata.subdevs = gswitch_subdevs_e1198_a02;
916                 }
917                 break;
918
919         case BOARD_E1291:
920                 if (board_info.fab == BOARD_FAB_A03) {
921                         gswitch_pdata.num_subdevs =
922                                         ARRAY_SIZE(gswitch_subdevs_e1291_a03);
923                         gswitch_pdata.subdevs = gswitch_subdevs_e1291_a03;
924                 } else if (board_info.fab == BOARD_FAB_A04) {
925                         gswitch_pdata.num_subdevs =
926                                         ARRAY_SIZE(gswitch_subdevs_e1291_a04);
927                         gswitch_pdata.subdevs = gswitch_subdevs_e1291_a04;
928                 } else {
929                         gswitch_pdata.num_subdevs =
930                                         ARRAY_SIZE(gswitch_subdevs_e1198_base);
931                         gswitch_pdata.subdevs = gswitch_subdevs_e1198_base;
932                 }
933                 break;
934
935         case BOARD_PM269:
936         case BOARD_PM305:
937         case BOARD_PM311:
938                 gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_pm269);
939                 gswitch_pdata.subdevs = gswitch_subdevs_pm269;
940                 break;
941         default:
942                 gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e118x);
943                 gswitch_pdata.subdevs = gswitch_subdevs_e118x;
944                 break;
945         }
946
947         for (i = 0; i < gswitch_pdata.num_subdevs; ++i) {
948                 struct gpio_switch_regulator_subdev_data *gswitch_data = gswitch_pdata.subdevs[i];
949                 if (gswitch_data->gpio_nr <= TEGRA_NR_GPIOS)
950                         tegra_gpio_enable(gswitch_data->gpio_nr);
951         }
952
953         return platform_device_register(&gswitch_regulator_pdata);
954 }
955
956 static void cardhu_board_suspend(int lp_state, enum suspend_stage stg)
957 {
958         if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_SUSPEND_BEFORE_CPU))
959                 tegra_console_uart_suspend();
960 }
961
962 static void cardhu_board_resume(int lp_state, enum resume_stage stg)
963 {
964         if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_RESUME_AFTER_CPU))
965                 tegra_console_uart_resume();
966 }
967
968 static struct tegra_suspend_platform_data cardhu_suspend_data = {
969         .cpu_timer      = 2000,
970         .cpu_off_timer  = 200,
971         .suspend_mode   = TEGRA_SUSPEND_LP1,
972         .core_timer     = 0x7e7e,
973         .core_off_timer = 0,
974         .corereq_high   = true,
975         .sysclkreq_high = true,
976         .cpu_lp2_min_residency = 2000,
977         .board_suspend = cardhu_board_suspend,
978         .board_resume = cardhu_board_resume,
979 };
980
981 int __init cardhu_suspend_init(void)
982 {
983         struct board_info board_info;
984         struct board_info pmu_board_info;
985
986         tegra_get_board_info(&board_info);
987         tegra_get_pmu_board_info(&pmu_board_info);
988
989         /* For PMU Fab A03 and A04 make core_pwr_req to high */
990         if ((pmu_board_info.fab == BOARD_FAB_A03) || (pmu_board_info.fab == BOARD_FAB_A04))
991                 cardhu_suspend_data.corereq_high = true;
992
993         /* CORE_PWR_REQ to be high for all processor/pmu board whose sku bit 0
994          * is set. This is require to enable the dc-dc converter tps62361x */
995         if ((board_info.sku & SKU_DCDC_TPS62361_SUPPORT) || (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT))
996                 cardhu_suspend_data.corereq_high = true;
997
998         switch (board_info.board_id) {
999         case BOARD_E1291:
1000                 /* CORE_PWR_REQ to be high for E1291-A03 */
1001                 if (board_info.fab == BOARD_FAB_A03)
1002                         cardhu_suspend_data.corereq_high = true;
1003                 break;
1004         case BOARD_E1198:
1005         case BOARD_PM269:
1006         case BOARD_PM305:
1007         case BOARD_PM311:
1008                 break;
1009         case BOARD_E1187:
1010         case BOARD_E1186:
1011         case BOARD_E1256:
1012                 cardhu_suspend_data.cpu_timer = 5000;
1013                 cardhu_suspend_data.cpu_off_timer = 5000;
1014                 break;
1015         default:
1016                 break;
1017         }
1018
1019         tegra_init_suspend(&cardhu_suspend_data);
1020         return 0;
1021 }
1022
1023 static void cardhu_power_off(void)
1024 {
1025         int ret;
1026         pr_err("cardhu: Powering off the device\n");
1027         ret = tps6591x_power_off();
1028         if (ret)
1029                 pr_err("cardhu: failed to power off\n");
1030
1031         while (1);
1032 }
1033
1034 int __init cardhu_power_off_init(void)
1035 {
1036         pm_power_off = cardhu_power_off;
1037         return 0;
1038 }
1039
1040 static struct tegra_tsensor_pmu_data  tpdata = {
1041         .poweroff_reg_addr = 0x3F,
1042         .poweroff_reg_data = 0x80,
1043         .reset_tegra = 1,
1044         .controller_type = 0,
1045         .i2c_controller_id = 4,
1046         .pinmux = 0,
1047         .pmu_16bit_ops = 0,
1048         .pmu_i2c_addr = 0x2D,
1049 };
1050
1051 void __init cardhu_tsensor_init(void)
1052 {
1053         tegra3_tsensor_init(&tpdata);
1054 }
1055
1056 #ifdef CONFIG_TEGRA_EDP_LIMITS
1057
1058 int __init cardhu_edp_init(void)
1059 {
1060         /* Temporary initalization, needs to be set to the actual
1061            regulator current */
1062         tegra_init_cpu_edp_limits(5000);
1063         return 0;
1064 }
1065 #endif
1066
1067 static char *cardhu_battery[] = {
1068         "battery",
1069 };
1070
1071 static struct gpio_charger_platform_data cardhu_charger_pdata = {
1072         .name = "ac",
1073         .type = POWER_SUPPLY_TYPE_MAINS,
1074         .gpio = AC_PRESENT_GPIO,
1075         .gpio_active_low = 0,
1076         .supplied_to = cardhu_battery,
1077         .num_supplicants = ARRAY_SIZE(cardhu_battery),
1078 };
1079
1080 static struct platform_device cardhu_charger_device = {
1081         .name = "gpio-charger",
1082         .dev = {
1083                 .platform_data = &cardhu_charger_pdata,
1084         },
1085 };
1086
1087 static int __init cardhu_charger_late_init(void)
1088 {
1089         platform_device_register(&cardhu_charger_device);
1090         return 0;
1091 }
1092
1093 late_initcall(cardhu_charger_late_init);
1094