arm: tegra: cardhu: Support for PM305
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu-power.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu-power.c
3  *
4  * Copyright (C) 2011 NVIDIA, Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
18  * 02111-1307, USA
19  */
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/regulator/machine.h>
25 #include <linux/mfd/tps6591x.h>
26 #include <linux/gpio.h>
27 #include <linux/io.h>
28 #include <linux/regulator/gpio-switch-regulator.h>
29 #include <linux/regulator/tps6591x-regulator.h>
30 #include <linux/regulator/tps6236x-regulator.h>
31
32 #include <mach/iomap.h>
33 #include <mach/irqs.h>
34 #include <mach/pinmux.h>
35 #include <mach/edp.h>
36 #include <mach/tsensor.h>
37
38 #include "gpio-names.h"
39 #include "board.h"
40 #include "board-cardhu.h"
41 #include "pm.h"
42 #include "wakeups-t3.h"
43
44 #define PMC_CTRL                0x0
45 #define PMC_CTRL_INTR_LOW       (1 << 17)
46
47 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_0[] = {
48         REGULATOR_SUPPLY("vdd_core", NULL),
49         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
50 };
51
52 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_1[] = {
53         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
54 };
55
56 static struct regulator_consumer_supply tps6591x_vdd2_supply_0[] = {
57         REGULATOR_SUPPLY("vdd_gen1v5", NULL),
58         REGULATOR_SUPPLY("vcore_lcd", NULL),
59         REGULATOR_SUPPLY("track_ldo1", NULL),
60         REGULATOR_SUPPLY("external_ldo_1v2", NULL),
61         REGULATOR_SUPPLY("vcore_cam1", NULL),
62         REGULATOR_SUPPLY("vcore_cam2", NULL),
63 };
64
65 static struct regulator_consumer_supply tps6591x_vddctrl_supply_0[] = {
66         REGULATOR_SUPPLY("vdd_cpu_pmu", NULL),
67         REGULATOR_SUPPLY("vdd_cpu", NULL),
68         REGULATOR_SUPPLY("vdd_sys", NULL),
69 };
70
71 static struct regulator_consumer_supply tps6591x_vio_supply_0[] = {
72         REGULATOR_SUPPLY("vdd_gen1v8", NULL),
73         REGULATOR_SUPPLY("avdd_hdmi_pll", NULL),
74         REGULATOR_SUPPLY("avdd_usb_pll", NULL),
75         REGULATOR_SUPPLY("avdd_osc", NULL),
76         REGULATOR_SUPPLY("vddio_sys", NULL),
77         REGULATOR_SUPPLY("vddio_sdmmc4", NULL),
78         REGULATOR_SUPPLY("pwrdet_sdmmc4", NULL),
79         REGULATOR_SUPPLY("vdd1v8_satelite", NULL),
80         REGULATOR_SUPPLY("vddio_uart", NULL),
81         REGULATOR_SUPPLY("pwrdet_uart", NULL),
82         REGULATOR_SUPPLY("vddio_audio", NULL),
83         REGULATOR_SUPPLY("pwrdet_audio", NULL),
84         REGULATOR_SUPPLY("vddio_bb", NULL),
85         REGULATOR_SUPPLY("pwrdet_bb", NULL),
86         REGULATOR_SUPPLY("vddio_lcd_pmu", NULL),
87         REGULATOR_SUPPLY("pwrdet_lcd", NULL),
88         REGULATOR_SUPPLY("vddio_cam", NULL),
89         REGULATOR_SUPPLY("pwrdet_cam", NULL),
90         REGULATOR_SUPPLY("vddio_vi", NULL),
91         REGULATOR_SUPPLY("pwrdet_vi", NULL),
92         REGULATOR_SUPPLY("ldo6", NULL),
93         REGULATOR_SUPPLY("ldo7", NULL),
94         REGULATOR_SUPPLY("ldo8", NULL),
95         REGULATOR_SUPPLY("vcore_audio", NULL),
96         REGULATOR_SUPPLY("avcore_audio", NULL),
97         REGULATOR_SUPPLY("vddio_sdmmc3", NULL),
98         REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
99         REGULATOR_SUPPLY("vcore1_lpddr2", NULL),
100         REGULATOR_SUPPLY("vcom_1v8", NULL),
101         REGULATOR_SUPPLY("pmuio_1v8", NULL),
102         REGULATOR_SUPPLY("avdd_ic_usb", NULL),
103 };
104
105 static struct regulator_consumer_supply tps6591x_ldo1_supply_0[] = {
106         REGULATOR_SUPPLY("avdd_pexb", NULL),
107         REGULATOR_SUPPLY("vdd_pexb", NULL),
108         REGULATOR_SUPPLY("avdd_pex_pll", NULL),
109         REGULATOR_SUPPLY("avdd_pexa", NULL),
110         REGULATOR_SUPPLY("vdd_pexa", NULL),
111 };
112
113 static struct regulator_consumer_supply tps6591x_ldo2_supply_0[] = {
114         REGULATOR_SUPPLY("avdd_sata", NULL),
115         REGULATOR_SUPPLY("vdd_sata", NULL),
116         REGULATOR_SUPPLY("avdd_sata_pll", NULL),
117         REGULATOR_SUPPLY("avdd_plle", NULL),
118 };
119
120 static struct regulator_consumer_supply tps6591x_ldo3_supply_e118x[] = {
121         REGULATOR_SUPPLY("vddio_sdmmc1", NULL),
122         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
123 };
124
125 static struct regulator_consumer_supply tps6591x_ldo3_supply_e1198[] = {
126         REGULATOR_SUPPLY("unused_rail_ldo3", NULL),
127 };
128
129 static struct regulator_consumer_supply tps6591x_ldo4_supply_0[] = {
130         REGULATOR_SUPPLY("vdd_rtc", NULL),
131 };
132
133 static struct regulator_consumer_supply tps6591x_ldo5_supply_e118x[] = {
134         REGULATOR_SUPPLY("avdd_vdac", NULL),
135 };
136
137 static struct regulator_consumer_supply tps6591x_ldo5_supply_e1198[] = {
138         REGULATOR_SUPPLY("avdd_vdac", NULL),
139         REGULATOR_SUPPLY("vddio_sdmmc1", NULL),
140         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
141 };
142
143 static struct regulator_consumer_supply tps6591x_ldo6_supply_0[] = {
144         REGULATOR_SUPPLY("avdd_dsi_csi", NULL),
145         REGULATOR_SUPPLY("pwrdet_mipi", NULL),
146 };
147 static struct regulator_consumer_supply tps6591x_ldo7_supply_0[] = {
148         REGULATOR_SUPPLY("avdd_plla_p_c_s", NULL),
149         REGULATOR_SUPPLY("avdd_pllm", NULL),
150         REGULATOR_SUPPLY("avdd_pllu_d", NULL),
151         REGULATOR_SUPPLY("avdd_pllu_d2", NULL),
152         REGULATOR_SUPPLY("avdd_pllx", NULL),
153 };
154
155 static struct regulator_consumer_supply tps6591x_ldo8_supply_0[] = {
156         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
157 };
158
159 #define TPS_PDATA_INIT(_name, _sname, _minmv, _maxmv, _supply_reg, _always_on, \
160         _boot_on, _apply_uv, _init_uV, _init_enable, _init_apply, _ectrl) \
161         static struct tps6591x_regulator_platform_data pdata_##_name##_##_sname = \
162         {                                                               \
163                 .regulator = {                                          \
164                         .constraints = {                                \
165                                 .min_uV = (_minmv)*1000,                \
166                                 .max_uV = (_maxmv)*1000,                \
167                                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
168                                                      REGULATOR_MODE_STANDBY), \
169                                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
170                                                    REGULATOR_CHANGE_STATUS |  \
171                                                    REGULATOR_CHANGE_VOLTAGE), \
172                                 .always_on = _always_on,                \
173                                 .boot_on = _boot_on,                    \
174                                 .apply_uV = _apply_uv,                  \
175                         },                                              \
176                         .num_consumer_supplies =                        \
177                                 ARRAY_SIZE(tps6591x_##_name##_supply_##_sname), \
178                         .consumer_supplies = tps6591x_##_name##_supply_##_sname,        \
179                         .supply_regulator = _supply_reg,                \
180                 },                                                      \
181                 .init_uV =  _init_uV * 1000,                            \
182                 .init_enable = _init_enable,                            \
183                 .init_apply = _init_apply,                              \
184                 .ectrl = _ectrl                                         \
185         }
186
187 TPS_PDATA_INIT(vdd1, skubit0_0, 600,  1500, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF);
188 TPS_PDATA_INIT(vdd1, skubit0_1, 600,  1500, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF);
189 TPS_PDATA_INIT(vdd2, 0,         600,  1500, 0, 1, 1, 0, -1, 0, 0, 0);
190 TPS_PDATA_INIT(vddctrl, 0,      600,  1400, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_EN1);
191 TPS_PDATA_INIT(vio,  0,         1500, 3300, 0, 1, 1, 0, -1, 0, 0, 0);
192
193 TPS_PDATA_INIT(ldo1, 0,         1000, 3300, tps6591x_rails(VDD_2), 0, 0, 0, -1, 0, 1, 0);
194 TPS_PDATA_INIT(ldo2, 0,         1050, 1050, tps6591x_rails(VDD_2), 0, 0, 1, -1, 0, 1, 0);
195
196 TPS_PDATA_INIT(ldo3, e118x,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0);
197 TPS_PDATA_INIT(ldo3, e1198,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0);
198 TPS_PDATA_INIT(ldo4, 0,         1000, 3300, 0, 1, 0, 0, -1, 0, 0, 0);
199 TPS_PDATA_INIT(ldo5, e118x,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0);
200 TPS_PDATA_INIT(ldo5, e1198,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0);
201
202 TPS_PDATA_INIT(ldo6, 0,         1200, 1200, tps6591x_rails(VIO), 0, 0, 1, -1, 0, 0, 0);
203 TPS_PDATA_INIT(ldo7, 0,         1200, 1200, tps6591x_rails(VIO), 1, 1, 1, -1, 0, 0, 0);
204 TPS_PDATA_INIT(ldo8, 0,         1000, 3300, tps6591x_rails(VIO), 1, 0, 0, -1, 0, 0, 0);
205
206 #if defined(CONFIG_RTC_DRV_TPS6591x)
207 static struct tps6591x_rtc_platform_data rtc_data = {
208         .irq = TEGRA_NR_IRQS + TPS6591X_INT_RTC_ALARM,
209         .time = {
210                 .tm_year = 2000,
211                 .tm_mon = 0,
212                 .tm_mday = 1,
213                 .tm_hour = 0,
214                 .tm_min = 0,
215                 .tm_sec = 0,
216         },
217 };
218
219 #define TPS_RTC_REG()                                   \
220         {                                               \
221                 .id     = 0,                            \
222                 .name   = "rtc_tps6591x",               \
223                 .platform_data = &rtc_data,             \
224         }
225 #endif
226
227 #define TPS_REG(_id, _name, _sname)                             \
228         {                                                       \
229                 .id     = TPS6591X_ID_##_id,                    \
230                 .name   = "tps6591x-regulator",                 \
231                 .platform_data  = &pdata_##_name##_##_sname,    \
232         }
233
234 #define TPS6591X_DEV_COMMON_E118X               \
235         TPS_REG(VDD_2, vdd2, 0),                \
236         TPS_REG(VDDCTRL, vddctrl, 0),           \
237         TPS_REG(LDO_1, ldo1, 0),                \
238         TPS_REG(LDO_2, ldo2, 0),                \
239         TPS_REG(LDO_3, ldo3, e118x),            \
240         TPS_REG(LDO_4, ldo4, 0),                \
241         TPS_REG(LDO_5, ldo5, e118x),            \
242         TPS_REG(LDO_6, ldo6, 0),                \
243         TPS_REG(LDO_7, ldo7, 0),                \
244         TPS_REG(LDO_8, ldo8, 0)
245
246 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_0[] = {
247         TPS_REG(VIO, vio, 0),
248         TPS_REG(VDD_1, vdd1, skubit0_0),
249         TPS6591X_DEV_COMMON_E118X,
250 #if defined(CONFIG_RTC_DRV_TPS6591x)
251         TPS_RTC_REG(),
252 #endif
253 };
254
255 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_1[] = {
256         TPS_REG(VIO, vio, 0),
257         TPS_REG(VDD_1, vdd1, skubit0_1),
258         TPS6591X_DEV_COMMON_E118X,
259 #if defined(CONFIG_RTC_DRV_TPS6591x)
260         TPS_RTC_REG(),
261 #endif
262 };
263
264 #define TPS6591X_DEV_COMMON_CARDHU              \
265         TPS_REG(VDD_2, vdd2, 0),                \
266         TPS_REG(VDDCTRL, vddctrl, 0),           \
267         TPS_REG(LDO_1, ldo1, 0),                \
268         TPS_REG(LDO_2, ldo2, 0),                \
269         TPS_REG(LDO_3, ldo3, e1198),            \
270         TPS_REG(LDO_4, ldo4, 0),                \
271         TPS_REG(LDO_5, ldo5, e1198),            \
272         TPS_REG(LDO_6, ldo6, 0),                \
273         TPS_REG(LDO_7, ldo7, 0),                \
274         TPS_REG(LDO_8, ldo8, 0)
275
276 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_0[] = {
277         TPS_REG(VIO, vio, 0),
278         TPS_REG(VDD_1, vdd1, skubit0_0),
279         TPS6591X_DEV_COMMON_CARDHU,
280 #if defined(CONFIG_RTC_DRV_TPS6591x)
281         TPS_RTC_REG(),
282 #endif
283 };
284
285 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_1[] = {
286         TPS_REG(VIO, vio, 0),
287         TPS_REG(VDD_1, vdd1, skubit0_1),
288         TPS6591X_DEV_COMMON_CARDHU,
289 #if defined(CONFIG_RTC_DRV_TPS6591x)
290         TPS_RTC_REG(),
291 #endif
292 };
293
294 #define TPS_GPIO_INIT_PDATA(gpio_nr, _init_apply, _sleep_en, _pulldn_en, _output_en, _output_val)       \
295         [gpio_nr] = {                                   \
296                         .sleep_en       = _sleep_en,    \
297                         .pulldn_en      = _pulldn_en,   \
298                         .output_mode_en = _output_en,   \
299                         .output_val     = _output_val,  \
300                         .init_apply     = _init_apply,  \
301                      }
302 static struct tps6591x_gpio_init_data tps_gpio_pdata_e1291_a04[] =  {
303         TPS_GPIO_INIT_PDATA(0, 0, 0, 0, 0, 0),
304         TPS_GPIO_INIT_PDATA(1, 0, 0, 0, 0, 0),
305         TPS_GPIO_INIT_PDATA(2, 1, 1, 0, 1, 1),
306         TPS_GPIO_INIT_PDATA(3, 0, 0, 0, 0, 0),
307         TPS_GPIO_INIT_PDATA(4, 0, 0, 0, 0, 0),
308         TPS_GPIO_INIT_PDATA(5, 0, 0, 0, 0, 0),
309         TPS_GPIO_INIT_PDATA(6, 0, 0, 0, 0, 0),
310         TPS_GPIO_INIT_PDATA(7, 0, 0, 0, 0, 0),
311         TPS_GPIO_INIT_PDATA(8, 0, 0, 0, 0, 0),
312 };
313
314 static struct tps6591x_sleep_keepon_data tps_slp_keepon = {
315         .clkout32k_keepon = 1,
316 };
317
318 static struct tps6591x_platform_data tps_platform = {
319         .irq_base       = TPS6591X_IRQ_BASE,
320         .gpio_base      = TPS6591X_GPIO_BASE,
321         .dev_slp_en     = true,
322         .slp_keepon     = &tps_slp_keepon,
323 };
324
325 static struct i2c_board_info __initdata cardhu_regulators[] = {
326         {
327                 I2C_BOARD_INFO("tps6591x", 0x2D),
328                 .irq            = INT_EXTERNAL_PMU,
329                 .platform_data  = &tps_platform,
330         },
331 };
332
333 /* TPS62361B DC-DC converter */
334 static struct regulator_consumer_supply tps6236x_dcdc_supply[] = {
335         REGULATOR_SUPPLY("vdd_core", NULL),
336 };
337
338 static struct tps6236x_regulator_platform_data tps6236x_pdata = {
339         .reg_init_data = {                                      \
340                 .constraints = {                                \
341                         .min_uV = 500000,                       \
342                         .max_uV = 1770000,                      \
343                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
344                                              REGULATOR_MODE_STANDBY), \
345                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
346                                            REGULATOR_CHANGE_STATUS |  \
347                                            REGULATOR_CHANGE_VOLTAGE), \
348                         .always_on = 1,                         \
349                         .boot_on =  1,                          \
350                         .apply_uV = 0,                          \
351                 },                                              \
352                 .num_consumer_supplies = ARRAY_SIZE(tps6236x_dcdc_supply), \
353                 .consumer_supplies = tps6236x_dcdc_supply,              \
354                 },                                                      \
355         .internal_pd_enable = 0,                                        \
356         .vsel = 3,                                                      \
357         .init_uV = -1,                                                  \
358         .init_apply = 0,                                                \
359 };
360
361 static struct i2c_board_info __initdata tps6236x_boardinfo[] = {
362         {
363                 I2C_BOARD_INFO("tps62361B", 0x60),
364                 .platform_data  = &tps6236x_pdata,
365         },
366 };
367
368 int __init cardhu_regulator_init(void)
369 {
370         struct board_info board_info;
371         struct board_info pmu_board_info;
372         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
373         u32 pmc_ctrl;
374
375         /* configure the power management controller to trigger PMU
376          * interrupts when low */
377
378         pmc_ctrl = readl(pmc + PMC_CTRL);
379         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
380
381         /* The regulator details have complete constraints */
382         regulator_has_full_constraints();
383
384         tegra_get_board_info(&board_info);
385         tegra_get_pmu_board_info(&pmu_board_info);
386
387         /* PMU-E1208-A03, the ldo2 should be set to 1200mV */
388         if ((pmu_board_info.board_id == BOARD_E1208) &&
389                 (pmu_board_info.fab == BOARD_FAB_A03)) {
390                 pdata_ldo2_0.regulator.constraints.min_uV = 1200000;
391                 pdata_ldo2_0.regulator.constraints.max_uV = 1200000;
392         }
393
394         if ((board_info.board_id == BOARD_E1198) ||
395                 (board_info.board_id == BOARD_E1291)) {
396                 if (board_info.sku & SKU_DCDC_TPS62361_SUPPORT) {
397                         tps_platform.num_subdevs =
398                                         ARRAY_SIZE(tps_devs_e1198_skubit0_1);
399                         tps_platform.subdevs = tps_devs_e1198_skubit0_1;
400                 } else {
401                         tps_platform.num_subdevs =
402                                         ARRAY_SIZE(tps_devs_e1198_skubit0_0);
403                         tps_platform.subdevs = tps_devs_e1198_skubit0_0;
404                 }
405         } else {
406                 if (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT) {
407                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_1);
408                         tps_platform.subdevs = tps_devs_e118x_skubit0_1;
409                 } else {
410                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_0);
411                         tps_platform.subdevs = tps_devs_e118x_skubit0_0;
412                 }
413         }
414
415         /* E1291-A04: Enable DEV_SLP and enable sleep on GPIO2 */
416         if ((board_info.board_id == BOARD_E1291) && (board_info.fab == BOARD_FAB_A04)) {
417                 tps_platform.dev_slp_en = true;
418                 tps_platform.gpio_init_data = tps_gpio_pdata_e1291_a04;
419                 tps_platform.num_gpioinit_data =
420                                         ARRAY_SIZE(tps_gpio_pdata_e1291_a04);
421         }
422
423         i2c_register_board_info(4, cardhu_regulators, 1);
424
425         /* Resgister the TPS6236x for all boards whose sku bit 0 is set. */
426         if ((board_info.sku & SKU_DCDC_TPS62361_SUPPORT) ||
427                         (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT)) {
428                 pr_info("Registering the device TPS62361B\n");
429                 i2c_register_board_info(4, tps6236x_boardinfo, 1);
430         }
431         return 0;
432 }
433
434 /* EN_5V_CP from PMU GP0 */
435 static struct regulator_consumer_supply gpio_switch_en_5v_cp_supply[] = {
436         REGULATOR_SUPPLY("vdd_5v0_sby", NULL),
437         REGULATOR_SUPPLY("vdd_hall", NULL),
438         REGULATOR_SUPPLY("vterm_ddr", NULL),
439         REGULATOR_SUPPLY("v2ref_ddr", NULL),
440 };
441 static int gpio_switch_en_5v_cp_voltages[] = { 5000};
442
443 /* EN_5V0 From PMU GP2 */
444 static struct regulator_consumer_supply gpio_switch_en_5v0_supply[] = {
445         REGULATOR_SUPPLY("vdd_5v0_sys", NULL),
446 };
447 static int gpio_switch_en_5v0_voltages[] = { 5000};
448
449 /* EN_DDR From PMU GP6 */
450 static struct regulator_consumer_supply gpio_switch_en_ddr_supply[] = {
451         REGULATOR_SUPPLY("mem_vddio_ddr", NULL),
452         REGULATOR_SUPPLY("t30_vddio_ddr", NULL),
453 };
454 static int gpio_switch_en_ddr_voltages[] = { 1500};
455
456 /* EN_3V3_SYS From PMU GP7 */
457 static struct regulator_consumer_supply gpio_switch_en_3v3_sys_supply[] = {
458         REGULATOR_SUPPLY("vdd_lvds", NULL),
459         REGULATOR_SUPPLY("vdd_pnl", NULL),
460         REGULATOR_SUPPLY("vcom_3v3", NULL),
461         REGULATOR_SUPPLY("vdd_3v3", NULL),
462         REGULATOR_SUPPLY("vcore_mmc", NULL),
463         REGULATOR_SUPPLY("vddio_pex_ctl", NULL),
464         REGULATOR_SUPPLY("pwrdet_pex_ctl", NULL),
465         REGULATOR_SUPPLY("hvdd_pex_pmu", NULL),
466         REGULATOR_SUPPLY("avdd_hdmi", NULL),
467         REGULATOR_SUPPLY("vpp_fuse", NULL),
468         REGULATOR_SUPPLY("avdd_usb", NULL),
469         REGULATOR_SUPPLY("vdd_ddr_rx", NULL),
470         REGULATOR_SUPPLY("vcore_nand", NULL),
471         REGULATOR_SUPPLY("hvdd_sata", NULL),
472         REGULATOR_SUPPLY("vddio_gmi_pmu", NULL),
473         REGULATOR_SUPPLY("pwrdet_nand", NULL),
474         REGULATOR_SUPPLY("avdd_cam1", NULL),
475         REGULATOR_SUPPLY("vdd_af", NULL),
476         REGULATOR_SUPPLY("avdd_cam2", NULL),
477         REGULATOR_SUPPLY("vdd_acc", NULL),
478         REGULATOR_SUPPLY("vdd_phtl", NULL),
479         REGULATOR_SUPPLY("vddio_tp", NULL),
480         REGULATOR_SUPPLY("vdd_led", NULL),
481         REGULATOR_SUPPLY("vddio_cec", NULL),
482         REGULATOR_SUPPLY("vdd_cmps", NULL),
483         REGULATOR_SUPPLY("vdd_temp", NULL),
484         REGULATOR_SUPPLY("vpp_kfuse", NULL),
485         REGULATOR_SUPPLY("vddio_ts", NULL),
486         REGULATOR_SUPPLY("vdd_ir_led", NULL),
487         REGULATOR_SUPPLY("vddio_1wire", NULL),
488         REGULATOR_SUPPLY("avddio_audio", NULL),
489         REGULATOR_SUPPLY("vdd_ec", NULL),
490         REGULATOR_SUPPLY("vcom_pa", NULL),
491         REGULATOR_SUPPLY("vdd_3v3_devices", NULL),
492         REGULATOR_SUPPLY("vdd_3v3_dock", NULL),
493         REGULATOR_SUPPLY("vdd_3v3_edid", NULL),
494         REGULATOR_SUPPLY("vdd_3v3_hdmi_cec", NULL),
495         REGULATOR_SUPPLY("vdd_3v3_gmi", NULL),
496         REGULATOR_SUPPLY("vdd_3v3_spk_amp", NULL),
497         REGULATOR_SUPPLY("vdd_3v3_sensor", NULL),
498         REGULATOR_SUPPLY("vdd_3v3_cam", NULL),
499         REGULATOR_SUPPLY("vdd_3v3_als", NULL),
500         REGULATOR_SUPPLY("debug_cons", NULL),
501 };
502 static int gpio_switch_en_3v3_sys_voltages[] = { 3300};
503
504 /* DIS_5V_SWITCH from AP SPI2_SCK X02 */
505 static struct regulator_consumer_supply gpio_switch_dis_5v_switch_supply[] = {
506         REGULATOR_SUPPLY("master_5v_switch", NULL),
507 };
508 static int gpio_switch_dis_5v_switch_voltages[] = { 5000};
509
510 /* EN_VDD_BL */
511 static struct regulator_consumer_supply gpio_switch_en_vdd_bl_supply[] = {
512         REGULATOR_SUPPLY("vdd_backlight", NULL),
513         REGULATOR_SUPPLY("vdd_backlight1", NULL),
514 };
515 static int gpio_switch_en_vdd_bl_voltages[] = { 5000};
516
517 /* EN_VDD_BL2 (E1291-A03) from AP PEX_L0_PRSNT_N DD.00 */
518 static struct regulator_consumer_supply gpio_switch_en_vdd_bl2_supply[] = {
519         REGULATOR_SUPPLY("vdd_backlight2", NULL),
520 };
521 static int gpio_switch_en_vdd_bl2_voltages[] = { 5000};
522
523 /* EN_3V3_MODEM from AP GPIO VI_VSYNCH D06*/
524 static struct regulator_consumer_supply gpio_switch_en_3v3_modem_supply[] = {
525         REGULATOR_SUPPLY("vdd_3v3_mini_card", NULL),
526         REGULATOR_SUPPLY("vdd_mini_card", NULL),
527 };
528 static int gpio_switch_en_3v3_modem_voltages[] = { 3300};
529
530 /* EN_USB1_VBUS_OC*/
531 static struct regulator_consumer_supply gpio_switch_en_usb1_vbus_oc_supply[] = {
532         REGULATOR_SUPPLY("vdd_vbus_micro_usb", NULL),
533 };
534 static int gpio_switch_en_usb1_vbus_oc_voltages[] = { 5000};
535
536 /*EN_USB3_VBUS_OC*/
537 static struct regulator_consumer_supply gpio_switch_en_usb3_vbus_oc_supply[] = {
538         REGULATOR_SUPPLY("vdd_vbus_typea_usb", NULL),
539 };
540 static int gpio_switch_en_usb3_vbus_oc_voltages[] = { 5000};
541
542 /* EN_VDDIO_VID_OC from AP GPIO VI_PCLK T00*/
543 static struct regulator_consumer_supply gpio_switch_en_vddio_vid_oc_supply[] = {
544         REGULATOR_SUPPLY("vdd_hdmi_con", NULL),
545 };
546 static int gpio_switch_en_vddio_vid_oc_voltages[] = { 5000};
547
548 /* EN_VDD_PNL1 from AP GPIO VI_D6 L04*/
549 static struct regulator_consumer_supply gpio_switch_en_vdd_pnl1_supply[] = {
550         REGULATOR_SUPPLY("vdd_lcd_panel", NULL),
551 };
552 static int gpio_switch_en_vdd_pnl1_voltages[] = { 3300};
553
554 /* CAM1_LDO_EN from AP GPIO KB_ROW6 R06*/
555 static struct regulator_consumer_supply gpio_switch_cam1_ldo_en_supply[] = {
556         REGULATOR_SUPPLY("vdd_2v8_cam1", NULL),
557         REGULATOR_SUPPLY("vdd_2v8_cam1_af", NULL),
558 };
559 static int gpio_switch_cam1_ldo_en_voltages[] = { 2800};
560
561 /* CAM2_LDO_EN from AP GPIO KB_ROW7 R07*/
562 static struct regulator_consumer_supply gpio_switch_cam2_ldo_en_supply[] = {
563         REGULATOR_SUPPLY("vdd_2v8_cam2", NULL),
564         REGULATOR_SUPPLY("vdd_2v8_cam2_af", NULL),
565 };
566 static int gpio_switch_cam2_ldo_en_voltages[] = { 2800};
567
568 /* CAM3_LDO_EN from AP GPIO KB_ROW8 S00*/
569 static struct regulator_consumer_supply gpio_switch_cam3_ldo_en_supply[] = {
570         REGULATOR_SUPPLY("vdd_cam3", NULL),
571 };
572 static int gpio_switch_cam3_ldo_en_voltages[] = { 3300};
573
574 /* EN_VDD_COM from AP GPIO SDMMC3_DAT5 D00*/
575 static struct regulator_consumer_supply gpio_switch_en_vdd_com_supply[] = {
576         REGULATOR_SUPPLY("vdd_com_bd", NULL),
577 };
578 static int gpio_switch_en_vdd_com_voltages[] = { 3300};
579
580 /* EN_VDD_SDMMC1 from AP GPIO VI_HSYNC D07*/
581 static struct regulator_consumer_supply gpio_switch_en_vdd_sdmmc1_supply[] = {
582         REGULATOR_SUPPLY("vddio_sd_slot", NULL),
583 };
584 static int gpio_switch_en_vdd_sdmmc1_voltages[] = { 3300};
585
586 /* EN_3V3_EMMC from AP GPIO SDMMC3_DAT4 D01*/
587 static struct regulator_consumer_supply gpio_switch_en_3v3_emmc_supply[] = {
588         REGULATOR_SUPPLY("vdd_emmc_core", NULL),
589 };
590 static int gpio_switch_en_3v3_emmc_voltages[] = { 3300};
591
592 /* EN_3V3_PEX_HVDD from AP GPIO VI_D09 L07*/
593 static struct regulator_consumer_supply gpio_switch_en_3v3_pex_hvdd_supply[] = {
594         REGULATOR_SUPPLY("hvdd_pex", NULL),
595 };
596 static int gpio_switch_en_3v3_pex_hvdd_voltages[] = { 3300};
597
598 /* EN_3v3_FUSE from AP GPIO VI_D08 L06*/
599 static struct regulator_consumer_supply gpio_switch_en_3v3_fuse_supply[] = {
600         REGULATOR_SUPPLY("vdd_fuse", NULL),
601 };
602 static int gpio_switch_en_3v3_fuse_voltages[] = { 3300};
603
604 /* EN_1V8_CAM from AP GPIO GPIO_PBB4 PBB04*/
605 static struct regulator_consumer_supply gpio_switch_en_1v8_cam_supply[] = {
606         REGULATOR_SUPPLY("vdd_1v8_cam1", NULL),
607         REGULATOR_SUPPLY("vdd_1v8_cam2", NULL),
608         REGULATOR_SUPPLY("vdd_1v8_cam3", NULL),
609 };
610 static int gpio_switch_en_1v8_cam_voltages[] = { 1800};
611
612 static struct regulator_consumer_supply gpio_switch_en_vbrtr_supply[] = {
613         REGULATOR_SUPPLY("vdd_vbrtr", NULL),
614 };
615 static int gpio_switch_en_vbrtr_voltages[] = { 3300};
616
617 static int enable_load_switch_rail(
618                 struct gpio_switch_regulator_subdev_data *psubdev_data)
619 {
620         int ret;
621
622         if (psubdev_data->pin_group <= 0)
623                 return -EINVAL;
624
625         /* Tristate and make pin as input*/
626         ret = tegra_pinmux_set_tristate(psubdev_data->pin_group,
627                                                 TEGRA_TRI_TRISTATE);
628         if (ret < 0)
629                 return ret;
630         return gpio_direction_input(psubdev_data->gpio_nr);
631 }
632
633 static int disable_load_switch_rail(
634                 struct gpio_switch_regulator_subdev_data *psubdev_data)
635 {
636         int ret;
637
638         if (psubdev_data->pin_group <= 0)
639                 return -EINVAL;
640
641         /* Un-tristate and driver low */
642         ret = tegra_pinmux_set_tristate(psubdev_data->pin_group,
643                                                 TEGRA_TRI_NORMAL);
644         if (ret < 0)
645                 return ret;
646         return gpio_direction_output(psubdev_data->gpio_nr, 0);
647 }
648
649
650 /* Macro for defining gpio switch regulator sub device data */
651 #define GREG_INIT(_id, _var, _name, _input_supply, _always_on, _boot_on, \
652         _gpio_nr, _active_low, _init_state, _pg, _enable, _disable)      \
653         static struct gpio_switch_regulator_subdev_data gpio_pdata_##_var =  \
654         {                                                               \
655                 .regulator_name = "gpio-switch-"#_name,                 \
656                 .input_supply   = _input_supply,                        \
657                 .id             = _id,                                  \
658                 .gpio_nr        = _gpio_nr,                             \
659                 .pin_group      = _pg,                                  \
660                 .active_low     = _active_low,                          \
661                 .init_state     = _init_state,                          \
662                 .voltages       = gpio_switch_##_name##_voltages,       \
663                 .n_voltages     = ARRAY_SIZE(gpio_switch_##_name##_voltages), \
664                 .num_consumer_supplies =                                \
665                                 ARRAY_SIZE(gpio_switch_##_name##_supply), \
666                 .consumer_supplies = gpio_switch_##_name##_supply,      \
667                 .constraints = {                                        \
668                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
669                                              REGULATOR_MODE_STANDBY),   \
670                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
671                                            REGULATOR_CHANGE_STATUS |    \
672                                            REGULATOR_CHANGE_VOLTAGE),   \
673                         .always_on = _always_on,                        \
674                         .boot_on = _boot_on,                            \
675                 },                                                      \
676                 .enable_rail = _enable,                                 \
677                 .disable_rail = _disable,                               \
678         }
679
680 /* common to most of boards*/
681 GREG_INIT(0, en_5v_cp,          en_5v_cp,       NULL,                   1,      0,      TPS6591X_GPIO_0,        false,  1,      0,      0,      0);
682 GREG_INIT(1, en_5v0,            en_5v0,         NULL,                   0,      0,      TPS6591X_GPIO_2,        false,  0,      0,      0,      0);
683 GREG_INIT(2, en_ddr,            en_ddr,         NULL,                   0,      0,      TPS6591X_GPIO_6,        false,  0,      0,      0,      0);
684 GREG_INIT(3, en_3v3_sys,        en_3v3_sys,     NULL,                   0,      0,      TPS6591X_GPIO_7,        false,  0,      0,      0,      0);
685 GREG_INIT(4, en_vdd_bl,         en_vdd_bl,      NULL,                   0,      0,      TEGRA_GPIO_PK3,         false,  1,      0,      0,      0);
686 GREG_INIT(5, en_3v3_modem,      en_3v3_modem,   NULL,                   1,      0,      TEGRA_GPIO_PD6,         false,  1,      0,      0,      0);
687 GREG_INIT(6, en_vdd_pnl1,       en_vdd_pnl1,    "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PL4,         false,  1,      0,      0,      0);
688 GREG_INIT(7, cam3_ldo_en,       cam3_ldo_en,    "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PS0,         false,  0,      0,      0,      0);
689 GREG_INIT(8, en_vdd_com,        en_vdd_com,     "vdd_3v3_devices",      1,      0,      TEGRA_GPIO_PD0,         false,  1,      0,      0,      0);
690 GREG_INIT(9, en_3v3_fuse,       en_3v3_fuse,    "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PL6,         false,  0,      0,      0,      0);
691 GREG_INIT(10, en_3v3_emmc,      en_3v3_emmc,    "vdd_3v3_devices",      1,      0,      TEGRA_GPIO_PD1,         false,  1,      0,      0,      0);
692 GREG_INIT(11, en_vdd_sdmmc1,    en_vdd_sdmmc1,  "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PD7,         false,  1,      0,      0,      0);
693 GREG_INIT(12, en_3v3_pex_hvdd,  en_3v3_pex_hvdd, "hvdd_pex_pmu",        0,      0,      TEGRA_GPIO_PL7,         false,  0,      0,      0,      0);
694 GREG_INIT(13, en_1v8_cam,       en_1v8_cam,     "vdd_gen1v8",           0,      0,      TEGRA_GPIO_PBB4,        false,  0,      0,      0,      0);
695
696 /* E1291-A04 specific */
697 GREG_INIT(1, en_5v0_a04,        en_5v0,         NULL,                   0,      0,      TPS6591X_GPIO_8,        false,  0,      0,      0,      0);
698 GREG_INIT(2, en_ddr_a04,        en_ddr,         NULL,                   0,      0,      TPS6591X_GPIO_7,        false,  0,      0,      0,      0);
699 GREG_INIT(3, en_3v3_sys_a04,    en_3v3_sys,     NULL,                   0,      0,      TPS6591X_GPIO_6,        false,  0,      0,      0,      0);
700
701
702 /*Specific to pm269*/
703 GREG_INIT(4, en_vdd_bl_pm269,           en_vdd_bl,              NULL,
704         0,      0,      TEGRA_GPIO_PH3, false,  1,      0,      0,      0);
705 GREG_INIT(6, en_vdd_pnl1_pm269,         en_vdd_pnl1,            "vdd_3v3_devices",
706         0,      0,      TEGRA_GPIO_PW1, false,  1,      0,      0,      0);
707 GREG_INIT(9, en_3v3_fuse_pm269,         en_3v3_fuse,            "vdd_3v3_devices",
708         0,      0,      TEGRA_GPIO_PC1, false,  0,      0,      0,      0);
709 GREG_INIT(11, en_vdd_sdmmc1_pm269,      en_vdd_sdmmc1,          "vdd_3v3_devices",
710         0,      0,      TEGRA_GPIO_PP1, false,  1,      0,      0,      0);
711 GREG_INIT(12, en_3v3_pex_hvdd_pm269,    en_3v3_pex_hvdd,        "hvdd_pex_pmu",
712         0,      0,      TEGRA_GPIO_PC6, false,  0,      0,      0,      0);
713 GREG_INIT(17, en_vddio_vid_oc_pm269,    en_vddio_vid_oc,        "master_5v_switch",
714         0,      0,      TEGRA_GPIO_PP2, false,  0,      TEGRA_PINGROUP_DAP3_DOUT,
715         enable_load_switch_rail, disable_load_switch_rail);
716
717 /* Specific to E1187/E1186/E1256 */
718 GREG_INIT(14, dis_5v_switch_e118x,      dis_5v_switch,          "vdd_5v0_sys",
719                 0,      0,      TEGRA_GPIO_PX2,         true,   0,      0,      0,      0);
720 GREG_INIT(15, en_usb1_vbus_oc_e118x,    en_usb1_vbus_oc,        "master_5v_switch",
721                 0,      0,      TEGRA_GPIO_PI4,         false,  0,      TEGRA_PINGROUP_GMI_RST_N,
722                 enable_load_switch_rail, disable_load_switch_rail);
723 GREG_INIT(16, en_usb3_vbus_oc_e118x,    en_usb3_vbus_oc,        "master_5v_switch",
724                 0,      0,      TEGRA_GPIO_PH7,         false,  0,      TEGRA_PINGROUP_GMI_AD15,
725                 enable_load_switch_rail, disable_load_switch_rail);
726 GREG_INIT(17, en_vddio_vid_oc_e118x,    en_vddio_vid_oc,        "master_5v_switch",
727                 0,      0,      TEGRA_GPIO_PT0,         false,  0,      TEGRA_PINGROUP_VI_PCLK,
728                 enable_load_switch_rail, disable_load_switch_rail);
729
730 /* E1198/E1291 specific  fab < A03 */
731 GREG_INIT(15, en_usb1_vbus_oc,          en_usb1_vbus_oc,        "vdd_5v0_sys",
732                 0,      0,      TEGRA_GPIO_PI4,         false,  0,      TEGRA_PINGROUP_GMI_RST_N,
733                 enable_load_switch_rail, disable_load_switch_rail);
734 GREG_INIT(16, en_usb3_vbus_oc,          en_usb3_vbus_oc,        "vdd_5v0_sys",
735                 0,      0,      TEGRA_GPIO_PH7,         false,  0,      TEGRA_PINGROUP_GMI_AD15,
736                 enable_load_switch_rail, disable_load_switch_rail);
737
738 /* E1198/E1291 specific  fab >= A03 */
739 GREG_INIT(15, en_usb1_vbus_oc_a03,      en_usb1_vbus_oc,        "vdd_5v0_sys",
740                 0,      0,      TEGRA_GPIO_PDD6,                false,  0,      TEGRA_PINGROUP_PEX_L1_CLKREQ_N,
741                 enable_load_switch_rail, disable_load_switch_rail);
742 GREG_INIT(16, en_usb3_vbus_oc_a03,              en_usb3_vbus_oc,        "vdd_5v0_sys",
743                 0,      0,      TEGRA_GPIO_PDD4,                false,  0,      TEGRA_PINGROUP_PEX_L1_PRSNT_N,
744                 enable_load_switch_rail, disable_load_switch_rail);
745
746 /* E1198/E1291 specific */
747 GREG_INIT(17, en_vddio_vid_oc,          en_vddio_vid_oc,        "vdd_5v0_sys",
748                 0,      0,      TEGRA_GPIO_PT0,         false,  0,      TEGRA_PINGROUP_VI_PCLK,
749                 enable_load_switch_rail, disable_load_switch_rail);
750
751 /* E1198/E1291 specific*/
752 GREG_INIT(18, cam1_ldo_en,      cam1_ldo_en,    "vdd_3v3_cam",  0,      0,      TEGRA_GPIO_PR6,         false,  0,      0,      0,      0);
753 GREG_INIT(19, cam2_ldo_en,      cam2_ldo_en,    "vdd_3v3_cam",  0,      0,      TEGRA_GPIO_PR7,         false,  0,      0,      0,      0);
754
755 /* E1291 A03 specific */
756 GREG_INIT(20, en_vdd_bl1_a03,   en_vdd_bl,      NULL,           0,      0,      TEGRA_GPIO_PDD2,        false,  1,      0,      0,      0);
757 GREG_INIT(21, en_vdd_bl2_a03,   en_vdd_bl2,     NULL,           0,      0,      TEGRA_GPIO_PDD0,        false,  1,      0,      0,      0);
758
759 GREG_INIT(22, en_vbrtr,         en_vbrtr,       "vdd_3v3_devices",      0,      0,      PMU_TCA6416_GPIO_PORT12,        false,  0,      0,      0,      0);
760
761 #define ADD_GPIO_REG(_name) &gpio_pdata_##_name
762
763 #define COMMON_GPIO_REG \
764         ADD_GPIO_REG(en_5v_cp),                 \
765         ADD_GPIO_REG(en_5v0),                   \
766         ADD_GPIO_REG(en_ddr),                   \
767         ADD_GPIO_REG(en_3v3_sys),               \
768         ADD_GPIO_REG(en_3v3_modem),             \
769         ADD_GPIO_REG(en_vdd_pnl1),              \
770         ADD_GPIO_REG(cam3_ldo_en),              \
771         ADD_GPIO_REG(en_vdd_com),               \
772         ADD_GPIO_REG(en_3v3_fuse),              \
773         ADD_GPIO_REG(en_3v3_emmc),              \
774         ADD_GPIO_REG(en_vdd_sdmmc1),            \
775         ADD_GPIO_REG(en_3v3_pex_hvdd),          \
776         ADD_GPIO_REG(en_1v8_cam),
777
778 #define COMMON_GPIO_REG_E1291_A04 \
779         ADD_GPIO_REG(en_5v_cp),                 \
780         ADD_GPIO_REG(en_5v0_a04),               \
781         ADD_GPIO_REG(en_ddr_a04),               \
782         ADD_GPIO_REG(en_3v3_sys_a04),           \
783         ADD_GPIO_REG(en_3v3_modem),             \
784         ADD_GPIO_REG(en_vdd_pnl1),              \
785         ADD_GPIO_REG(cam3_ldo_en),              \
786         ADD_GPIO_REG(en_vdd_com),               \
787         ADD_GPIO_REG(en_3v3_fuse),              \
788         ADD_GPIO_REG(en_3v3_emmc),              \
789         ADD_GPIO_REG(en_vdd_sdmmc1),            \
790         ADD_GPIO_REG(en_3v3_pex_hvdd),          \
791         ADD_GPIO_REG(en_1v8_cam),
792
793 #define PM269_GPIO_REG \
794         ADD_GPIO_REG(en_5v_cp),                 \
795         ADD_GPIO_REG(en_5v0),                   \
796         ADD_GPIO_REG(en_ddr),                   \
797         ADD_GPIO_REG(en_vdd_bl_pm269),          \
798         ADD_GPIO_REG(en_3v3_sys),               \
799         ADD_GPIO_REG(en_3v3_modem),             \
800         ADD_GPIO_REG(en_vdd_pnl1_pm269),                \
801         ADD_GPIO_REG(cam1_ldo_en),              \
802         ADD_GPIO_REG(cam2_ldo_en),              \
803         ADD_GPIO_REG(cam3_ldo_en),              \
804         ADD_GPIO_REG(en_vdd_com),               \
805         ADD_GPIO_REG(en_3v3_fuse_pm269),        \
806         ADD_GPIO_REG(en_3v3_emmc),              \
807         ADD_GPIO_REG(en_vdd_sdmmc1_pm269),      \
808         ADD_GPIO_REG(en_3v3_pex_hvdd_pm269),    \
809         ADD_GPIO_REG(en_1v8_cam),               \
810         ADD_GPIO_REG(dis_5v_switch_e118x),      \
811         ADD_GPIO_REG(en_usb1_vbus_oc_e118x),    \
812         ADD_GPIO_REG(en_usb3_vbus_oc_e118x),    \
813         ADD_GPIO_REG(en_vddio_vid_oc_pm269),
814
815 #define E118x_GPIO_REG  \
816         ADD_GPIO_REG(en_vdd_bl),                \
817         ADD_GPIO_REG(dis_5v_switch_e118x),      \
818         ADD_GPIO_REG(en_usb1_vbus_oc_e118x),    \
819         ADD_GPIO_REG(en_usb3_vbus_oc_e118x),    \
820         ADD_GPIO_REG(en_vddio_vid_oc_e118x), \
821         ADD_GPIO_REG(en_vbrtr),
822
823 #define E1198_GPIO_REG  \
824         ADD_GPIO_REG(en_vddio_vid_oc),          \
825         ADD_GPIO_REG(cam1_ldo_en),              \
826         ADD_GPIO_REG(cam2_ldo_en),
827
828 #define E1291_1198_A00_GPIO_REG \
829         ADD_GPIO_REG(en_usb1_vbus_oc),          \
830         ADD_GPIO_REG(en_usb3_vbus_oc),          \
831         ADD_GPIO_REG(en_vdd_bl),
832
833 #define E1291_A03_GPIO_REG      \
834         ADD_GPIO_REG(en_usb1_vbus_oc_a03),              \
835         ADD_GPIO_REG(en_usb3_vbus_oc_a03),              \
836         ADD_GPIO_REG(en_vdd_bl1_a03), \
837         ADD_GPIO_REG(en_vdd_bl2_a03),
838
839 /* Gpio switch regulator platform data  for E1186/E1187/E1256*/
840 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e118x[] = {
841         COMMON_GPIO_REG
842         E118x_GPIO_REG
843 };
844
845 /* Gpio switch regulator platform data for E1198 and E1291*/
846 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1198_base[] = {
847         COMMON_GPIO_REG
848         E1291_1198_A00_GPIO_REG
849         E1198_GPIO_REG
850 };
851
852 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1198_a02[] = {
853         ADD_GPIO_REG(en_5v_cp),
854         ADD_GPIO_REG(en_5v0),
855         ADD_GPIO_REG(en_ddr_a04),
856         ADD_GPIO_REG(en_3v3_sys_a04),
857         ADD_GPIO_REG(en_3v3_modem),
858         ADD_GPIO_REG(en_vdd_pnl1),
859         ADD_GPIO_REG(cam3_ldo_en),
860         ADD_GPIO_REG(en_vdd_com),
861         ADD_GPIO_REG(en_3v3_fuse),
862         ADD_GPIO_REG(en_3v3_emmc),
863         ADD_GPIO_REG(en_vdd_sdmmc1),
864         ADD_GPIO_REG(en_3v3_pex_hvdd),
865         ADD_GPIO_REG(en_1v8_cam),
866         ADD_GPIO_REG(en_usb1_vbus_oc_a03),
867         ADD_GPIO_REG(en_usb3_vbus_oc_a03),
868         ADD_GPIO_REG(en_vdd_bl1_a03),
869         ADD_GPIO_REG(en_vdd_bl2_a03),
870         ADD_GPIO_REG(en_vddio_vid_oc),
871         ADD_GPIO_REG(cam1_ldo_en),
872         ADD_GPIO_REG(cam2_ldo_en),
873 };
874
875 /* Gpio switch regulator platform data for PM269*/
876 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_pm269[] = {
877         PM269_GPIO_REG
878 };
879
880 /* Gpio switch regulator platform data for E1291 A03*/
881 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1291_a03[] = {
882         COMMON_GPIO_REG
883         E1291_A03_GPIO_REG
884         E1198_GPIO_REG
885 };
886
887 /* Gpio switch regulator platform data for E1291 A04*/
888 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1291_a04[] = {
889         COMMON_GPIO_REG_E1291_A04
890         E1291_A03_GPIO_REG
891         E1198_GPIO_REG
892 };
893
894
895 static struct gpio_switch_regulator_platform_data  gswitch_pdata;
896 static struct platform_device gswitch_regulator_pdata = {
897         .name = "gpio-switch-regulator",
898         .id   = -1,
899         .dev  = {
900              .platform_data = &gswitch_pdata,
901         },
902 };
903
904 int __init cardhu_gpio_switch_regulator_init(void)
905 {
906         int i;
907         struct board_info board_info;
908         tegra_get_board_info(&board_info);
909         switch (board_info.board_id) {
910         case BOARD_E1198:
911                 if (board_info.fab <= BOARD_FAB_A01) {
912                         gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e1198_base);
913                         gswitch_pdata.subdevs = gswitch_subdevs_e1198_base;
914                 } else {
915                         gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e1198_a02);
916                         gswitch_pdata.subdevs = gswitch_subdevs_e1198_a02;
917                 }
918                 break;
919
920         case BOARD_E1291:
921                 if (board_info.fab == BOARD_FAB_A03) {
922                         gswitch_pdata.num_subdevs =
923                                         ARRAY_SIZE(gswitch_subdevs_e1291_a03);
924                         gswitch_pdata.subdevs = gswitch_subdevs_e1291_a03;
925                 } else if (board_info.fab == BOARD_FAB_A04) {
926                         gswitch_pdata.num_subdevs =
927                                         ARRAY_SIZE(gswitch_subdevs_e1291_a04);
928                         gswitch_pdata.subdevs = gswitch_subdevs_e1291_a04;
929                 } else {
930                         gswitch_pdata.num_subdevs =
931                                         ARRAY_SIZE(gswitch_subdevs_e1198_base);
932                         gswitch_pdata.subdevs = gswitch_subdevs_e1198_base;
933                 }
934                 break;
935
936         case BOARD_PM269:
937         case BOARD_PM305:
938                 gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_pm269);
939                 gswitch_pdata.subdevs = gswitch_subdevs_pm269;
940                 break;
941         default:
942                 gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e118x);
943                 gswitch_pdata.subdevs = gswitch_subdevs_e118x;
944                 break;
945         }
946
947         for (i = 0; i < gswitch_pdata.num_subdevs; ++i) {
948                 struct gpio_switch_regulator_subdev_data *gswitch_data = gswitch_pdata.subdevs[i];
949                 if (gswitch_data->gpio_nr <= TEGRA_NR_GPIOS)
950                         tegra_gpio_enable(gswitch_data->gpio_nr);
951         }
952
953         return platform_device_register(&gswitch_regulator_pdata);
954 }
955
956 static void cardhu_board_suspend(int lp_state, enum suspend_stage stg)
957 {
958         if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_SUSPEND_BEFORE_CPU))
959                 tegra_console_uart_suspend();
960 }
961
962 static void cardhu_board_resume(int lp_state, enum resume_stage stg)
963 {
964         if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_RESUME_AFTER_CPU))
965                 tegra_console_uart_resume();
966 }
967
968 static struct tegra_suspend_platform_data cardhu_suspend_data = {
969         .cpu_timer      = 2000,
970         .cpu_off_timer  = 200,
971         .suspend_mode   = TEGRA_SUSPEND_LP2,
972         .core_timer     = 0x7e7e,
973         .core_off_timer = 0,
974         .corereq_high   = true,
975         .sysclkreq_high = true,
976         .cpu_lp2_min_residency = 2000,
977         .board_suspend = cardhu_board_suspend,
978         .board_resume = cardhu_board_resume,
979 };
980
981 int __init cardhu_suspend_init(void)
982 {
983         struct board_info board_info;
984         struct board_info pmu_board_info;
985
986         tegra_get_board_info(&board_info);
987         tegra_get_pmu_board_info(&pmu_board_info);
988
989         /* For PMU Fab A03 and A04 make core_pwr_req to high */
990         if ((pmu_board_info.fab == BOARD_FAB_A03) || (pmu_board_info.fab == BOARD_FAB_A04))
991                 cardhu_suspend_data.corereq_high = true;
992
993         /* CORE_PWR_REQ to be high for all processor/pmu board whose sku bit 0
994          * is set. This is require to enable the dc-dc converter tps62361x */
995         if ((board_info.sku & SKU_DCDC_TPS62361_SUPPORT) || (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT))
996                 cardhu_suspend_data.corereq_high = true;
997
998         switch (board_info.board_id) {
999         case BOARD_E1291:
1000                 /* CORE_PWR_REQ to be high for E1291-A03 */
1001                 if (board_info.fab == BOARD_FAB_A03)
1002                         cardhu_suspend_data.corereq_high = true;
1003                 break;
1004         case BOARD_E1198:
1005         case BOARD_PM269:
1006         case BOARD_PM305:
1007                 break;
1008         case BOARD_E1187:
1009         case BOARD_E1186:
1010         case BOARD_E1256:
1011                 cardhu_suspend_data.cpu_timer = 5000;
1012                 cardhu_suspend_data.cpu_off_timer = 5000;
1013                 break;
1014         default:
1015                 break;
1016         }
1017
1018         tegra_init_suspend(&cardhu_suspend_data);
1019         return 0;
1020 }
1021
1022 static void cardhu_power_off(void)
1023 {
1024         int ret;
1025         pr_err("cardhu: Powering off the device\n");
1026         ret = tps6591x_power_off();
1027         if (ret)
1028                 pr_err("cardhu: failed to power off\n");
1029
1030         while (1);
1031 }
1032
1033 int __init cardhu_power_off_init(void)
1034 {
1035         pm_power_off = cardhu_power_off;
1036         return 0;
1037 }
1038
1039 static struct tegra_tsensor_pmu_data  tpdata = {
1040         .poweroff_reg_addr = 0x3F,
1041         .poweroff_reg_data = 0x80,
1042         .reset_tegra = 1,
1043         .controller_type = 0,
1044         .i2c_controller_id = 4,
1045         .pinmux = 0,
1046         .pmu_16bit_ops = 0,
1047         .pmu_i2c_addr = 0x2D,
1048 };
1049
1050 void __init cardhu_tsensor_init(void)
1051 {
1052         tegra3_tsensor_init(&tpdata);
1053 }
1054
1055 #ifdef CONFIG_TEGRA_EDP_LIMITS
1056
1057 int __init cardhu_edp_init(void)
1058 {
1059         /* Temporary initalization, needs to be set to the actual
1060            regulator current */
1061         tegra_init_cpu_edp_limits(5000);
1062         return 0;
1063 }
1064 #endif