ARM: tegra: cardhu: Add IO power detection consumers
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu-power.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu-power.c
3  *
4  * Copyright (C) 2011 NVIDIA, Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
18  * 02111-1307, USA
19  */
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/regulator/machine.h>
25 #include <linux/mfd/tps6591x.h>
26 #include <linux/gpio.h>
27 #include <linux/io.h>
28 #include <linux/regulator/gpio-switch-regulator.h>
29 #include <linux/regulator/tps6591x-regulator.h>
30 #include <linux/regulator/tps6236x-regulator.h>
31
32 #include <mach/iomap.h>
33 #include <mach/irqs.h>
34 #include <mach/pinmux.h>
35 #include <mach/edp.h>
36
37 #include "gpio-names.h"
38 #include "board.h"
39 #include "board-cardhu.h"
40 #include "pm.h"
41 #include "wakeups-t3.h"
42
43 #define PMC_CTRL                0x0
44 #define PMC_CTRL_INTR_LOW       (1 << 17)
45
46 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_0[] = {
47         REGULATOR_SUPPLY("vdd_core", NULL),
48         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
49 };
50
51 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_1[] = {
52         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
53 };
54
55 static struct regulator_consumer_supply tps6591x_vdd2_supply_0[] = {
56         REGULATOR_SUPPLY("vdd_gen1v5", NULL),
57         REGULATOR_SUPPLY("vcore_lcd", NULL),
58         REGULATOR_SUPPLY("track_ldo1", NULL),
59         REGULATOR_SUPPLY("external_ldo_1v2", NULL),
60         REGULATOR_SUPPLY("vcore_cam1", NULL),
61         REGULATOR_SUPPLY("vcore_cam2", NULL),
62 };
63
64 static struct regulator_consumer_supply tps6591x_vddctrl_supply_0[] = {
65         REGULATOR_SUPPLY("vdd_cpu_pmu", NULL),
66         REGULATOR_SUPPLY("vdd_cpu", NULL),
67         REGULATOR_SUPPLY("vdd_sys", NULL),
68 };
69
70 static struct regulator_consumer_supply tps6591x_vio_supply_0[] = {
71         REGULATOR_SUPPLY("vdd_gen1v8", NULL),
72         REGULATOR_SUPPLY("avdd_hdmi_pll", NULL),
73         REGULATOR_SUPPLY("avdd_usb_pll", NULL),
74         REGULATOR_SUPPLY("avdd_osc", NULL),
75         REGULATOR_SUPPLY("vddio_sys", NULL),
76         REGULATOR_SUPPLY("vddio_sdmmc4", NULL),
77         REGULATOR_SUPPLY("pwrdet_sdmmc4", NULL),
78         REGULATOR_SUPPLY("vdd1v8_satelite", NULL),
79         REGULATOR_SUPPLY("vddio_uart", NULL),
80         REGULATOR_SUPPLY("pwrdet_uart", NULL),
81         REGULATOR_SUPPLY("vddio_audio", NULL),
82         REGULATOR_SUPPLY("pwrdet_audio", NULL),
83         REGULATOR_SUPPLY("vddio_bb", NULL),
84         REGULATOR_SUPPLY("pwrdet_bb", NULL),
85         REGULATOR_SUPPLY("vddio_lcd_pmu", NULL),
86         REGULATOR_SUPPLY("pwrdet_lcd", NULL),
87         REGULATOR_SUPPLY("vddio_cam", NULL),
88         REGULATOR_SUPPLY("pwrdet_cam", NULL),
89         REGULATOR_SUPPLY("vddio_vi", NULL),
90         REGULATOR_SUPPLY("pwrdet_vi", NULL),
91         REGULATOR_SUPPLY("ldo6", NULL),
92         REGULATOR_SUPPLY("ldo7", NULL),
93         REGULATOR_SUPPLY("ldo8", NULL),
94         REGULATOR_SUPPLY("vcore_audio", NULL),
95         REGULATOR_SUPPLY("avcore_audio", NULL),
96         REGULATOR_SUPPLY("vddio_sdmmc3", NULL),
97         REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
98         REGULATOR_SUPPLY("vcore1_lpddr2", NULL),
99         REGULATOR_SUPPLY("vcom_1v8", NULL),
100         REGULATOR_SUPPLY("pmuio_1v8", NULL),
101         REGULATOR_SUPPLY("avdd_ic_usb", NULL),
102 };
103
104 static struct regulator_consumer_supply tps6591x_ldo1_supply_0[] = {
105         REGULATOR_SUPPLY("avdd_pexb", NULL),
106         REGULATOR_SUPPLY("vdd_pexb", NULL),
107         REGULATOR_SUPPLY("avdd_pex_pll", NULL),
108         REGULATOR_SUPPLY("avdd_pexa", NULL),
109         REGULATOR_SUPPLY("vdd_pexa", NULL),
110 };
111
112 static struct regulator_consumer_supply tps6591x_ldo2_supply_0[] = {
113         REGULATOR_SUPPLY("avdd_sata", NULL),
114         REGULATOR_SUPPLY("vdd_sata", NULL),
115         REGULATOR_SUPPLY("avdd_sata_pll", NULL),
116         REGULATOR_SUPPLY("avdd_plle", NULL),
117 };
118
119 static struct regulator_consumer_supply tps6591x_ldo3_supply_e118x[] = {
120         REGULATOR_SUPPLY("vddio_sdmmc1", NULL),
121         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
122 };
123
124 static struct regulator_consumer_supply tps6591x_ldo3_supply_e1198[] = {
125         REGULATOR_SUPPLY("unused_rail_ldo3", NULL),
126 };
127
128 static struct regulator_consumer_supply tps6591x_ldo4_supply_0[] = {
129         REGULATOR_SUPPLY("vdd_rtc", NULL),
130 };
131
132 static struct regulator_consumer_supply tps6591x_ldo5_supply_e118x[] = {
133         REGULATOR_SUPPLY("avdd_vdac", NULL),
134 };
135
136 static struct regulator_consumer_supply tps6591x_ldo5_supply_e1198[] = {
137         REGULATOR_SUPPLY("avdd_vdac", NULL),
138         REGULATOR_SUPPLY("vddio_sdmmc1", NULL),
139         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
140 };
141
142 static struct regulator_consumer_supply tps6591x_ldo6_supply_0[] = {
143         REGULATOR_SUPPLY("avdd_dsi_csi", NULL),
144         REGULATOR_SUPPLY("pwrdet_mipi", NULL),
145 };
146 static struct regulator_consumer_supply tps6591x_ldo7_supply_0[] = {
147         REGULATOR_SUPPLY("avdd_plla_p_c_s", NULL),
148         REGULATOR_SUPPLY("avdd_pllm", NULL),
149         REGULATOR_SUPPLY("avdd_pllu_d", NULL),
150         REGULATOR_SUPPLY("avdd_pllu_d2", NULL),
151         REGULATOR_SUPPLY("avdd_pllx", NULL),
152 };
153
154 static struct regulator_consumer_supply tps6591x_ldo8_supply_0[] = {
155         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
156 };
157
158 #define TPS_PDATA_INIT(_name, _sname, _minmv, _maxmv, _supply_reg, _always_on, \
159         _boot_on, _apply_uv, _init_uV, _init_enable, _init_apply, _ectrl) \
160         static struct tps6591x_regulator_platform_data pdata_##_name##_##_sname = \
161         {                                                               \
162                 .regulator = {                                          \
163                         .constraints = {                                \
164                                 .min_uV = (_minmv)*1000,                \
165                                 .max_uV = (_maxmv)*1000,                \
166                                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
167                                                      REGULATOR_MODE_STANDBY), \
168                                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
169                                                    REGULATOR_CHANGE_STATUS |  \
170                                                    REGULATOR_CHANGE_VOLTAGE), \
171                                 .always_on = _always_on,                \
172                                 .boot_on = _boot_on,                    \
173                                 .apply_uV = _apply_uv,                  \
174                         },                                              \
175                         .num_consumer_supplies =                        \
176                                 ARRAY_SIZE(tps6591x_##_name##_supply_##_sname), \
177                         .consumer_supplies = tps6591x_##_name##_supply_##_sname,        \
178                         .supply_regulator = _supply_reg,                \
179                 },                                                      \
180                 .init_uV =  _init_uV * 1000,                            \
181                 .init_enable = _init_enable,                            \
182                 .init_apply = _init_apply,                              \
183                 .ectrl = _ectrl                                         \
184         }
185
186 TPS_PDATA_INIT(vdd1, skubit0_0, 600,  1500, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF);
187 TPS_PDATA_INIT(vdd1, skubit0_1, 600,  1500, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF);
188 TPS_PDATA_INIT(vdd2, 0,         600,  1500, 0, 1, 1, 0, -1, 0, 0, 0);
189 TPS_PDATA_INIT(vddctrl, 0,      600,  1400, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_EN1);
190 TPS_PDATA_INIT(vio,  0,         1500, 3300, 0, 1, 1, 0, -1, 0, 0, 0);
191
192 TPS_PDATA_INIT(ldo1, 0,         1000, 3300, tps6591x_rails(VDD_2), 0, 0, 0, -1, 0, 1, 0);
193 TPS_PDATA_INIT(ldo2, 0,         1050, 1050, tps6591x_rails(VDD_2), 0, 0, 1, -1, 0, 1, 0);
194
195 TPS_PDATA_INIT(ldo3, e118x,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0);
196 TPS_PDATA_INIT(ldo3, e1198,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0);
197 TPS_PDATA_INIT(ldo4, 0,         1000, 3300, 0, 1, 0, 0, -1, 0, 0, 0);
198 TPS_PDATA_INIT(ldo5, e118x,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0);
199 TPS_PDATA_INIT(ldo5, e1198,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0);
200
201 TPS_PDATA_INIT(ldo6, 0,         1000, 3300, tps6591x_rails(VIO), 0, 0, 0, -1, 0, 0, 0);
202 TPS_PDATA_INIT(ldo7, 0,         1200, 1200, tps6591x_rails(VIO), 1, 1, 1, -1, 0, 0, 0);
203 TPS_PDATA_INIT(ldo8, 0,         1000, 3300, tps6591x_rails(VIO), 1, 0, 0, -1, 0, 0, 0);
204
205 #if defined(CONFIG_RTC_DRV_TPS6591x)
206 static struct tps6591x_rtc_platform_data rtc_data = {
207         .irq = TEGRA_NR_IRQS + TPS6591X_INT_RTC_ALARM,
208         .time = {
209                 .tm_year = 2000,
210                 .tm_mon = 0,
211                 .tm_mday = 1,
212                 .tm_hour = 0,
213                 .tm_min = 0,
214                 .tm_sec = 0,
215         },
216 };
217
218 #define TPS_RTC_REG()                                   \
219         {                                               \
220                 .id     = 0,                            \
221                 .name   = "rtc_tps6591x",               \
222                 .platform_data = &rtc_data,             \
223         }
224 #endif
225
226 #define TPS_REG(_id, _name, _sname)                             \
227         {                                                       \
228                 .id     = TPS6591X_ID_##_id,                    \
229                 .name   = "tps6591x-regulator",                 \
230                 .platform_data  = &pdata_##_name##_##_sname,    \
231         }
232
233 #define TPS6591X_DEV_COMMON_E118X               \
234         TPS_REG(VDD_2, vdd2, 0),                \
235         TPS_REG(VDDCTRL, vddctrl, 0),           \
236         TPS_REG(LDO_1, ldo1, 0),                \
237         TPS_REG(LDO_2, ldo2, 0),                \
238         TPS_REG(LDO_3, ldo3, e118x),            \
239         TPS_REG(LDO_4, ldo4, 0),                \
240         TPS_REG(LDO_5, ldo5, e118x),            \
241         TPS_REG(LDO_6, ldo6, 0),                \
242         TPS_REG(LDO_7, ldo7, 0),                \
243         TPS_REG(LDO_8, ldo8, 0)
244
245 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_0[] = {
246         TPS_REG(VIO, vio, 0),
247         TPS_REG(VDD_1, vdd1, skubit0_0),
248         TPS6591X_DEV_COMMON_E118X,
249 #if defined(CONFIG_RTC_DRV_TPS6591x)
250         TPS_RTC_REG(),
251 #endif
252 };
253
254 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_1[] = {
255         TPS_REG(VIO, vio, 0),
256         TPS_REG(VDD_1, vdd1, skubit0_1),
257         TPS6591X_DEV_COMMON_E118X,
258 #if defined(CONFIG_RTC_DRV_TPS6591x)
259         TPS_RTC_REG(),
260 #endif
261 };
262
263 #define TPS6591X_DEV_COMMON_CARDHU              \
264         TPS_REG(VDD_2, vdd2, 0),                \
265         TPS_REG(VDDCTRL, vddctrl, 0),           \
266         TPS_REG(LDO_1, ldo1, 0),                \
267         TPS_REG(LDO_2, ldo2, 0),                \
268         TPS_REG(LDO_3, ldo3, e1198),            \
269         TPS_REG(LDO_4, ldo4, 0),                \
270         TPS_REG(LDO_5, ldo5, e1198),            \
271         TPS_REG(LDO_6, ldo6, 0),                \
272         TPS_REG(LDO_7, ldo7, 0),                \
273         TPS_REG(LDO_8, ldo8, 0)
274
275 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_0[] = {
276         TPS_REG(VIO, vio, 0),
277         TPS_REG(VDD_1, vdd1, skubit0_0),
278         TPS6591X_DEV_COMMON_CARDHU,
279 #if defined(CONFIG_RTC_DRV_TPS6591x)
280         TPS_RTC_REG(),
281 #endif
282 };
283
284 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_1[] = {
285         TPS_REG(VIO, vio, 0),
286         TPS_REG(VDD_1, vdd1, skubit0_1),
287         TPS6591X_DEV_COMMON_CARDHU,
288 #if defined(CONFIG_RTC_DRV_TPS6591x)
289         TPS_RTC_REG(),
290 #endif
291 };
292
293 #define TPS_GPIO_INIT_PDATA(gpio_nr, _init_apply, _sleep_en, _pulldn_en, _output_en, _output_val)       \
294         [gpio_nr] = {                                   \
295                         .sleep_en       = _sleep_en,    \
296                         .pulldn_en      = _pulldn_en,   \
297                         .output_mode_en = _output_en,   \
298                         .output_val     = _output_val,  \
299                         .init_apply     = _init_apply,  \
300                      }
301 static struct tps6591x_gpio_init_data tps_gpio_pdata_e1291_a04[] =  {
302         TPS_GPIO_INIT_PDATA(0, 0, 0, 0, 0, 0),
303         TPS_GPIO_INIT_PDATA(1, 0, 0, 0, 0, 0),
304         TPS_GPIO_INIT_PDATA(2, 1, 1, 0, 1, 1),
305         TPS_GPIO_INIT_PDATA(3, 0, 0, 0, 0, 0),
306         TPS_GPIO_INIT_PDATA(4, 0, 0, 0, 0, 0),
307         TPS_GPIO_INIT_PDATA(5, 0, 0, 0, 0, 0),
308         TPS_GPIO_INIT_PDATA(6, 0, 0, 0, 0, 0),
309         TPS_GPIO_INIT_PDATA(7, 0, 0, 0, 0, 0),
310         TPS_GPIO_INIT_PDATA(8, 0, 0, 0, 0, 0),
311 };
312
313 static struct tps6591x_sleep_keepon_data tps_slp_keepon = {
314         .clkout32k_keepon = 1,
315 };
316
317 static struct tps6591x_platform_data tps_platform = {
318         .irq_base       = TPS6591X_IRQ_BASE,
319         .gpio_base      = TPS6591X_GPIO_BASE,
320         .dev_slp_en     = true,
321         .slp_keepon     = &tps_slp_keepon,
322 };
323
324 static struct i2c_board_info __initdata cardhu_regulators[] = {
325         {
326                 I2C_BOARD_INFO("tps6591x", 0x2D),
327                 .irq            = INT_EXTERNAL_PMU,
328                 .platform_data  = &tps_platform,
329         },
330 };
331
332 /* TPS62361B DC-DC converter */
333 static struct regulator_consumer_supply tps6236x_dcdc_supply[] = {
334         REGULATOR_SUPPLY("vdd_core", NULL),
335 };
336
337 static struct tps6236x_regulator_platform_data tps6236x_pdata = {
338         .reg_init_data = {                                      \
339                 .constraints = {                                \
340                         .min_uV = 500000,                       \
341                         .max_uV = 1770000,                      \
342                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
343                                              REGULATOR_MODE_STANDBY), \
344                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
345                                            REGULATOR_CHANGE_STATUS |  \
346                                            REGULATOR_CHANGE_VOLTAGE), \
347                         .always_on = 1,                         \
348                         .boot_on =  1,                          \
349                         .apply_uV = 0,                          \
350                 },                                              \
351                 .num_consumer_supplies = ARRAY_SIZE(tps6236x_dcdc_supply), \
352                 .consumer_supplies = tps6236x_dcdc_supply,              \
353                 },                                                      \
354         .internal_pd_enable = 0,                                        \
355         .vsel = 3,                                                      \
356         .init_uV = -1,                                                  \
357         .init_apply = 0,                                                \
358 };
359
360 static struct i2c_board_info __initdata tps6236x_boardinfo[] = {
361         {
362                 I2C_BOARD_INFO("tps62361B", 0x60),
363                 .platform_data  = &tps6236x_pdata,
364         },
365 };
366
367 int __init cardhu_regulator_init(void)
368 {
369         struct board_info board_info;
370         struct board_info pmu_board_info;
371         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
372         u32 pmc_ctrl;
373
374         /* configure the power management controller to trigger PMU
375          * interrupts when low */
376
377         pmc_ctrl = readl(pmc + PMC_CTRL);
378         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
379
380         /* The regulator details have complete constraints */
381         regulator_has_full_constraints();
382
383         tegra_get_board_info(&board_info);
384         tegra_get_pmu_board_info(&pmu_board_info);
385
386         if ((board_info.board_id == BOARD_E1198) ||
387                 (board_info.board_id == BOARD_E1291)) {
388                 if (board_info.sku & SKU_DCDC_TPS62361_SUPPORT) {
389                         tps_platform.num_subdevs =
390                                         ARRAY_SIZE(tps_devs_e1198_skubit0_1);
391                         tps_platform.subdevs = tps_devs_e1198_skubit0_1;
392                 } else {
393                         tps_platform.num_subdevs =
394                                         ARRAY_SIZE(tps_devs_e1198_skubit0_0);
395                         tps_platform.subdevs = tps_devs_e1198_skubit0_0;
396                 }
397         } else {
398                 if (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT) {
399                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_1);
400                         tps_platform.subdevs = tps_devs_e118x_skubit0_1;
401                 } else {
402                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_0);
403                         tps_platform.subdevs = tps_devs_e118x_skubit0_0;
404                 }
405         }
406
407         /* E1291-A04: Enable DEV_SLP and enable sleep on GPIO2 */
408         if ((board_info.board_id == BOARD_E1291) && (board_info.fab == BOARD_FAB_A04)) {
409                 tps_platform.dev_slp_en = true;
410                 tps_platform.gpio_init_data = tps_gpio_pdata_e1291_a04;
411                 tps_platform.num_gpioinit_data =
412                                         ARRAY_SIZE(tps_gpio_pdata_e1291_a04);
413         }
414
415         i2c_register_board_info(4, cardhu_regulators, 1);
416
417         /* Resgister the TPS6236x for all boards whose sku bit 0 is set. */
418         if ((board_info.sku & SKU_DCDC_TPS62361_SUPPORT) ||
419                         (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT)) {
420                 pr_info("Registering the device TPS62361B\n");
421                 i2c_register_board_info(4, tps6236x_boardinfo, 1);
422         }
423         return 0;
424 }
425
426 /* EN_5V_CP from PMU GP0 */
427 static struct regulator_consumer_supply gpio_switch_en_5v_cp_supply[] = {
428         REGULATOR_SUPPLY("vdd_5v0_sby", NULL),
429         REGULATOR_SUPPLY("vdd_hall", NULL),
430         REGULATOR_SUPPLY("vterm_ddr", NULL),
431         REGULATOR_SUPPLY("v2ref_ddr", NULL),
432 };
433 static int gpio_switch_en_5v_cp_voltages[] = { 5000};
434
435 /* EN_5V0 From PMU GP2 */
436 static struct regulator_consumer_supply gpio_switch_en_5v0_supply[] = {
437         REGULATOR_SUPPLY("vdd_5v0_sys", NULL),
438 };
439 static int gpio_switch_en_5v0_voltages[] = { 5000};
440
441 /* EN_DDR From PMU GP6 */
442 static struct regulator_consumer_supply gpio_switch_en_ddr_supply[] = {
443         REGULATOR_SUPPLY("mem_vddio_ddr", NULL),
444         REGULATOR_SUPPLY("t30_vddio_ddr", NULL),
445 };
446 static int gpio_switch_en_ddr_voltages[] = { 1500};
447
448 /* EN_3V3_SYS From PMU GP7 */
449 static struct regulator_consumer_supply gpio_switch_en_3v3_sys_supply[] = {
450         REGULATOR_SUPPLY("vdd_lvds", NULL),
451         REGULATOR_SUPPLY("vdd_pnl", NULL),
452         REGULATOR_SUPPLY("vcom_3v3", NULL),
453         REGULATOR_SUPPLY("vdd_3v3", NULL),
454         REGULATOR_SUPPLY("vcore_mmc", NULL),
455         REGULATOR_SUPPLY("vddio_pex_ctl", NULL),
456         REGULATOR_SUPPLY("pwrdet_pex_ctl", NULL),
457         REGULATOR_SUPPLY("hvdd_pex", NULL),
458         REGULATOR_SUPPLY("avdd_hdmi", NULL),
459         REGULATOR_SUPPLY("vpp_fuse", NULL),
460         REGULATOR_SUPPLY("avdd_usb", NULL),
461         REGULATOR_SUPPLY("vdd_ddr_rx", NULL),
462         REGULATOR_SUPPLY("vcore_nand", NULL),
463         REGULATOR_SUPPLY("hvdd_sata", NULL),
464         REGULATOR_SUPPLY("vddio_gmi_pmu", NULL),
465         REGULATOR_SUPPLY("pwrdet_nand", NULL),
466         REGULATOR_SUPPLY("avdd_cam1", NULL),
467         REGULATOR_SUPPLY("vdd_af", NULL),
468         REGULATOR_SUPPLY("avdd_cam2", NULL),
469         REGULATOR_SUPPLY("vdd_acc", NULL),
470         REGULATOR_SUPPLY("vdd_phtl", NULL),
471         REGULATOR_SUPPLY("vddio_tp", NULL),
472         REGULATOR_SUPPLY("vdd_led", NULL),
473         REGULATOR_SUPPLY("vddio_cec", NULL),
474         REGULATOR_SUPPLY("vdd_cmps", NULL),
475         REGULATOR_SUPPLY("vdd_temp", NULL),
476         REGULATOR_SUPPLY("vpp_kfuse", NULL),
477         REGULATOR_SUPPLY("vddio_ts", NULL),
478         REGULATOR_SUPPLY("vdd_ir_led", NULL),
479         REGULATOR_SUPPLY("vddio_1wire", NULL),
480         REGULATOR_SUPPLY("avddio_audio", NULL),
481         REGULATOR_SUPPLY("vdd_ec", NULL),
482         REGULATOR_SUPPLY("vcom_pa", NULL),
483         REGULATOR_SUPPLY("vdd_3v3_devices", NULL),
484         REGULATOR_SUPPLY("vdd_3v3_dock", NULL),
485         REGULATOR_SUPPLY("vdd_3v3_edid", NULL),
486         REGULATOR_SUPPLY("vdd_3v3_hdmi_cec", NULL),
487         REGULATOR_SUPPLY("vdd_3v3_gmi", NULL),
488         REGULATOR_SUPPLY("vdd_3v3_spk_amp", NULL),
489         REGULATOR_SUPPLY("vdd_3v3_sensor", NULL),
490         REGULATOR_SUPPLY("vdd_3v3_cam", NULL),
491         REGULATOR_SUPPLY("vdd_3v3_als", NULL),
492         REGULATOR_SUPPLY("debug_cons", NULL),
493 };
494 static int gpio_switch_en_3v3_sys_voltages[] = { 3300};
495
496 /* DIS_5V_SWITCH from AP SPI2_SCK X02 */
497 static struct regulator_consumer_supply gpio_switch_dis_5v_switch_supply[] = {
498         REGULATOR_SUPPLY("master_5v_switch", NULL),
499 };
500 static int gpio_switch_dis_5v_switch_voltages[] = { 5000};
501
502 /* EN_VDD_BL */
503 static struct regulator_consumer_supply gpio_switch_en_vdd_bl_supply[] = {
504         REGULATOR_SUPPLY("vdd_backlight", NULL),
505         REGULATOR_SUPPLY("vdd_backlight1", NULL),
506 };
507 static int gpio_switch_en_vdd_bl_voltages[] = { 5000};
508
509 /* EN_VDD_BL2 (E1291-A03) from AP PEX_L0_PRSNT_N DD.00 */
510 static struct regulator_consumer_supply gpio_switch_en_vdd_bl2_supply[] = {
511         REGULATOR_SUPPLY("vdd_backlight2", NULL),
512 };
513 static int gpio_switch_en_vdd_bl2_voltages[] = { 5000};
514
515 /* EN_3V3_MODEM from AP GPIO VI_VSYNCH D06*/
516 static struct regulator_consumer_supply gpio_switch_en_3v3_modem_supply[] = {
517         REGULATOR_SUPPLY("vdd_3v3_mini_card", NULL),
518         REGULATOR_SUPPLY("vdd_mini_card", NULL),
519 };
520 static int gpio_switch_en_3v3_modem_voltages[] = { 3300};
521
522 /* EN_USB1_VBUS_OC*/
523 static struct regulator_consumer_supply gpio_switch_en_usb1_vbus_oc_supply[] = {
524         REGULATOR_SUPPLY("vdd_vbus_micro_usb", NULL),
525 };
526 static int gpio_switch_en_usb1_vbus_oc_voltages[] = { 5000};
527
528 /*EN_USB3_VBUS_OC*/
529 static struct regulator_consumer_supply gpio_switch_en_usb3_vbus_oc_supply[] = {
530         REGULATOR_SUPPLY("vdd_vbus_typea_usb", NULL),
531 };
532 static int gpio_switch_en_usb3_vbus_oc_voltages[] = { 5000};
533
534 /* EN_VDDIO_VID_OC from AP GPIO VI_PCLK T00*/
535 static struct regulator_consumer_supply gpio_switch_en_vddio_vid_oc_supply[] = {
536         REGULATOR_SUPPLY("vdd_hdmi_con", NULL),
537 };
538 static int gpio_switch_en_vddio_vid_oc_voltages[] = { 5000};
539
540 /* EN_VDD_PNL1 from AP GPIO VI_D6 L04*/
541 static struct regulator_consumer_supply gpio_switch_en_vdd_pnl1_supply[] = {
542         REGULATOR_SUPPLY("vdd_lcd_panel", NULL),
543 };
544 static int gpio_switch_en_vdd_pnl1_voltages[] = { 3300};
545
546 /* CAM1_LDO_EN from AP GPIO KB_ROW6 R06*/
547 static struct regulator_consumer_supply gpio_switch_cam1_ldo_en_supply[] = {
548         REGULATOR_SUPPLY("vdd_2v8_cam1", NULL),
549         REGULATOR_SUPPLY("vdd_2v8_cam1_af", NULL),
550 };
551 static int gpio_switch_cam1_ldo_en_voltages[] = { 2800};
552
553 /* CAM2_LDO_EN from AP GPIO KB_ROW7 R07*/
554 static struct regulator_consumer_supply gpio_switch_cam2_ldo_en_supply[] = {
555         REGULATOR_SUPPLY("vdd_2v8_cam2", NULL),
556         REGULATOR_SUPPLY("vdd_2v8_cam2_af", NULL),
557 };
558 static int gpio_switch_cam2_ldo_en_voltages[] = { 2800};
559
560 /* CAM3_LDO_EN from AP GPIO KB_ROW8 S00*/
561 static struct regulator_consumer_supply gpio_switch_cam3_ldo_en_supply[] = {
562         REGULATOR_SUPPLY("vdd_cam3", NULL),
563 };
564 static int gpio_switch_cam3_ldo_en_voltages[] = { 3300};
565
566 /* EN_VDD_COM from AP GPIO SDMMC3_DAT5 D00*/
567 static struct regulator_consumer_supply gpio_switch_en_vdd_com_supply[] = {
568         REGULATOR_SUPPLY("vdd_com_bd", NULL),
569 };
570 static int gpio_switch_en_vdd_com_voltages[] = { 3300};
571
572 /* EN_VDD_SDMMC1 from AP GPIO VI_HSYNC D07*/
573 static struct regulator_consumer_supply gpio_switch_en_vdd_sdmmc1_supply[] = {
574         REGULATOR_SUPPLY("vddio_sd_slot", NULL),
575 };
576 static int gpio_switch_en_vdd_sdmmc1_voltages[] = { 3300};
577
578 /* EN_3V3_EMMC from AP GPIO SDMMC3_DAT4 D01*/
579 static struct regulator_consumer_supply gpio_switch_en_3v3_emmc_supply[] = {
580         REGULATOR_SUPPLY("vdd_emmc_core", NULL),
581 };
582 static int gpio_switch_en_3v3_emmc_voltages[] = { 3300};
583
584 /* EN_3V3_PEX_HVDD from AP GPIO VI_D09 L07*/
585 static struct regulator_consumer_supply gpio_switch_en_3v3_pex_hvdd_supply[] = {
586         REGULATOR_SUPPLY("hvdd_pex_3v3", NULL),
587 };
588 static int gpio_switch_en_3v3_pex_hvdd_voltages[] = { 3300};
589
590 /* EN_3v3_FUSE from AP GPIO VI_D08 L06*/
591 static struct regulator_consumer_supply gpio_switch_en_3v3_fuse_supply[] = {
592         REGULATOR_SUPPLY("vdd_fuse", NULL),
593 };
594 static int gpio_switch_en_3v3_fuse_voltages[] = { 3300};
595
596 /* EN_1V8_CAM from AP GPIO GPIO_PBB4 PBB04*/
597 static struct regulator_consumer_supply gpio_switch_en_1v8_cam_supply[] = {
598         REGULATOR_SUPPLY("vdd_1v8_cam1", NULL),
599         REGULATOR_SUPPLY("vdd_1v8_cam2", NULL),
600         REGULATOR_SUPPLY("vdd_1v8_cam3", NULL),
601 };
602 static int gpio_switch_en_1v8_cam_voltages[] = { 1800};
603
604 static struct regulator_consumer_supply gpio_switch_en_vbrtr_supply[] = {
605         REGULATOR_SUPPLY("vdd_vbrtr", NULL),
606 };
607 static int gpio_switch_en_vbrtr_voltages[] = { 3300};
608
609 static int enable_load_switch_rail(
610                 struct gpio_switch_regulator_subdev_data *psubdev_data)
611 {
612         int ret;
613
614         if (psubdev_data->pin_group <= 0)
615                 return -EINVAL;
616
617         /* Tristate and make pin as input*/
618         ret = tegra_pinmux_set_tristate(psubdev_data->pin_group,
619                                                 TEGRA_TRI_TRISTATE);
620         if (ret < 0)
621                 return ret;
622         return gpio_direction_input(psubdev_data->gpio_nr);
623 }
624
625 static int disable_load_switch_rail(
626                 struct gpio_switch_regulator_subdev_data *psubdev_data)
627 {
628         int ret;
629
630         if (psubdev_data->pin_group <= 0)
631                 return -EINVAL;
632
633         /* Un-tristate and driver low */
634         ret = tegra_pinmux_set_tristate(psubdev_data->pin_group,
635                                                 TEGRA_TRI_NORMAL);
636         if (ret < 0)
637                 return ret;
638         return gpio_direction_output(psubdev_data->gpio_nr, 0);
639 }
640
641
642 /* Macro for defining gpio switch regulator sub device data */
643 #define GREG_INIT(_id, _var, _name, _input_supply, _always_on, _boot_on, \
644         _gpio_nr, _active_low, _init_state, _pg, _enable, _disable)      \
645         static struct gpio_switch_regulator_subdev_data gpio_pdata_##_var =  \
646         {                                                               \
647                 .regulator_name = "gpio-switch-"#_name,                 \
648                 .input_supply   = _input_supply,                        \
649                 .id             = _id,                                  \
650                 .gpio_nr        = _gpio_nr,                             \
651                 .pin_group      = _pg,                                  \
652                 .active_low     = _active_low,                          \
653                 .init_state     = _init_state,                          \
654                 .voltages       = gpio_switch_##_name##_voltages,       \
655                 .n_voltages     = ARRAY_SIZE(gpio_switch_##_name##_voltages), \
656                 .num_consumer_supplies =                                \
657                                 ARRAY_SIZE(gpio_switch_##_name##_supply), \
658                 .consumer_supplies = gpio_switch_##_name##_supply,      \
659                 .constraints = {                                        \
660                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
661                                              REGULATOR_MODE_STANDBY),   \
662                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
663                                            REGULATOR_CHANGE_STATUS |    \
664                                            REGULATOR_CHANGE_VOLTAGE),   \
665                         .always_on = _always_on,                        \
666                         .boot_on = _boot_on,                            \
667                 },                                                      \
668                 .enable_rail = _enable,                                 \
669                 .disable_rail = _disable,                               \
670         }
671
672 /* common to most of boards*/
673 GREG_INIT(0, en_5v_cp,          en_5v_cp,       NULL,                   1,      0,      TPS6591X_GPIO_0,        false,  1,      0,      0,      0);
674 GREG_INIT(1, en_5v0,            en_5v0,         NULL,                   0,      0,      TPS6591X_GPIO_2,        false,  0,      0,      0,      0);
675 GREG_INIT(2, en_ddr,            en_ddr,         NULL,                   0,      0,      TPS6591X_GPIO_6,        false,  0,      0,      0,      0);
676 GREG_INIT(3, en_3v3_sys,        en_3v3_sys,     NULL,                   0,      0,      TPS6591X_GPIO_7,        false,  0,      0,      0,      0);
677 GREG_INIT(4, en_vdd_bl,         en_vdd_bl,      NULL,                   0,      0,      TEGRA_GPIO_PK3,         false,  1,      0,      0,      0);
678 GREG_INIT(5, en_3v3_modem,      en_3v3_modem,   NULL,                   1,      0,      TEGRA_GPIO_PD6,         false,  1,      0,      0,      0);
679 GREG_INIT(6, en_vdd_pnl1,       en_vdd_pnl1,    "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PL4,         false,  1,      0,      0,      0);
680 GREG_INIT(7, cam3_ldo_en,       cam3_ldo_en,    "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PS0,         false,  0,      0,      0,      0);
681 GREG_INIT(8, en_vdd_com,        en_vdd_com,     "vdd_3v3_devices",      1,      0,      TEGRA_GPIO_PD0,         false,  1,      0,      0,      0);
682 GREG_INIT(9, en_3v3_fuse,       en_3v3_fuse,    "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PL6,         false,  0,      0,      0,      0);
683 GREG_INIT(10, en_3v3_emmc,      en_3v3_emmc,    "vdd_3v3_devices",      1,      0,      TEGRA_GPIO_PD1,         false,  1,      0,      0,      0);
684 GREG_INIT(11, en_vdd_sdmmc1,    en_vdd_sdmmc1,  "vdd_3v3_devices",      0,      0,      TEGRA_GPIO_PD7,         false,  1,      0,      0,      0);
685 GREG_INIT(12, en_3v3_pex_hvdd,  en_3v3_pex_hvdd, "vdd_3v3_devices",     0,      0,      TEGRA_GPIO_PL7,         false,  0,      0,      0,      0);
686 GREG_INIT(13, en_1v8_cam,       en_1v8_cam,     "vdd_gen1v8",           0,      0,      TEGRA_GPIO_PBB4,        false,  0,      0,      0,      0);
687
688 /* E1291-A04 specific */
689 GREG_INIT(1, en_5v0_a04,        en_5v0,         NULL,                   0,      0,      TPS6591X_GPIO_8,        false,  0,      0,      0,      0);
690 GREG_INIT(2, en_ddr_a04,        en_ddr,         NULL,                   0,      0,      TPS6591X_GPIO_7,        false,  0,      0,      0,      0);
691 GREG_INIT(3, en_3v3_sys_a04,    en_3v3_sys,     NULL,                   0,      0,      TPS6591X_GPIO_6,        false,  0,      0,      0,      0);
692
693
694 /*Specific to pm269*/
695 GREG_INIT(4, en_vdd_bl_pm269,           en_vdd_bl,              NULL,
696         0,      0,      TEGRA_GPIO_PH3, false,  1,      0,      0,      0);
697 GREG_INIT(6, en_vdd_pnl1_pm269,         en_vdd_pnl1,            "vdd_3v3_devices",
698         0,      0,      TEGRA_GPIO_PW1, false,  1,      0,      0,      0);
699 GREG_INIT(9, en_3v3_fuse_pm269,         en_3v3_fuse,            "vdd_3v3_devices",
700         0,      0,      TEGRA_GPIO_PC1, false,  0,      0,      0,      0);
701 GREG_INIT(11, en_vdd_sdmmc1_pm269,      en_vdd_sdmmc1,          "vdd_3v3_devices",
702         0,      0,      TEGRA_GPIO_PP1, false,  1,      0,      0,      0);
703 GREG_INIT(12, en_3v3_pex_hvdd_pm269,    en_3v3_pex_hvdd,        "vdd_3v3_devices",
704         0,      0,      TEGRA_GPIO_PC6, false,  0,      0,      0,      0);
705 GREG_INIT(17, en_vddio_vid_oc_pm269,    en_vddio_vid_oc,        "master_5v_switch",
706         0,      0,      TEGRA_GPIO_PP2, false,  0,      TEGRA_PINGROUP_DAP3_DOUT,
707         enable_load_switch_rail, disable_load_switch_rail);
708
709 /* Specific to E1187/E1186/E1256 */
710 GREG_INIT(14, dis_5v_switch_e118x,      dis_5v_switch,          "vdd_5v0_sys",
711                 0,      0,      TEGRA_GPIO_PX2,         true,   0,      0,      0,      0);
712 GREG_INIT(15, en_usb1_vbus_oc_e118x,    en_usb1_vbus_oc,        "master_5v_switch",
713                 0,      0,      TEGRA_GPIO_PI4,         false,  0,      TEGRA_PINGROUP_GMI_RST_N,
714                 enable_load_switch_rail, disable_load_switch_rail);
715 GREG_INIT(16, en_usb3_vbus_oc_e118x,    en_usb3_vbus_oc,        "master_5v_switch",
716                 0,      0,      TEGRA_GPIO_PH7,         false,  0,      TEGRA_PINGROUP_GMI_AD15,
717                 enable_load_switch_rail, disable_load_switch_rail);
718 GREG_INIT(17, en_vddio_vid_oc_e118x,    en_vddio_vid_oc,        "master_5v_switch",
719                 0,      0,      TEGRA_GPIO_PT0,         false,  0,      TEGRA_PINGROUP_VI_PCLK,
720                 enable_load_switch_rail, disable_load_switch_rail);
721
722 /* E1198/E1291 specific  fab < A03 */
723 GREG_INIT(15, en_usb1_vbus_oc,          en_usb1_vbus_oc,        "vdd_5v0_sys",
724                 0,      0,      TEGRA_GPIO_PI4,         false,  0,      TEGRA_PINGROUP_GMI_RST_N,
725                 enable_load_switch_rail, disable_load_switch_rail);
726 GREG_INIT(16, en_usb3_vbus_oc,          en_usb3_vbus_oc,        "vdd_5v0_sys",
727                 0,      0,      TEGRA_GPIO_PH7,         false,  0,      TEGRA_PINGROUP_GMI_AD15,
728                 enable_load_switch_rail, disable_load_switch_rail);
729
730 /* E1198/E1291 specific  fab >= A03 */
731 GREG_INIT(15, en_usb1_vbus_oc_a03,      en_usb1_vbus_oc,        "vdd_5v0_sys",
732                 0,      0,      TEGRA_GPIO_PDD6,                false,  0,      TEGRA_PINGROUP_PEX_L1_CLKREQ_N,
733                 enable_load_switch_rail, disable_load_switch_rail);
734 GREG_INIT(16, en_usb3_vbus_oc_a03,              en_usb3_vbus_oc,        "vdd_5v0_sys",
735                 0,      0,      TEGRA_GPIO_PDD4,                false,  0,      TEGRA_PINGROUP_PEX_L1_PRSNT_N,
736                 enable_load_switch_rail, disable_load_switch_rail);
737
738 /* E1198/E1291 specific */
739 GREG_INIT(17, en_vddio_vid_oc,          en_vddio_vid_oc,        "vdd_5v0_sys",
740                 0,      0,      TEGRA_GPIO_PT0,         false,  0,      TEGRA_PINGROUP_VI_PCLK,
741                 enable_load_switch_rail, disable_load_switch_rail);
742
743 /* E1198/E1291 specific*/
744 GREG_INIT(18, cam1_ldo_en,      cam1_ldo_en,    "vdd_3v3_cam",  0,      0,      TEGRA_GPIO_PR6,         false,  0,      0,      0,      0);
745 GREG_INIT(19, cam2_ldo_en,      cam2_ldo_en,    "vdd_3v3_cam",  0,      0,      TEGRA_GPIO_PR7,         false,  0,      0,      0,      0);
746
747 /* E1291 A03 specific */
748 GREG_INIT(20, en_vdd_bl1_a03,   en_vdd_bl,      NULL,           0,      0,      TEGRA_GPIO_PDD2,        false,  1,      0,      0,      0);
749 GREG_INIT(21, en_vdd_bl2_a03,   en_vdd_bl2,     NULL,           0,      0,      TEGRA_GPIO_PDD0,        false,  1,      0,      0,      0);
750
751 GREG_INIT(22, en_vbrtr,         en_vbrtr,       "vdd_3v3_devices",      0,      0,      PMU_TCA6416_GPIO_PORT12,        false,  0,      0,      0,      0);
752
753 #define ADD_GPIO_REG(_name) &gpio_pdata_##_name
754
755 #define COMMON_GPIO_REG \
756         ADD_GPIO_REG(en_5v_cp),                 \
757         ADD_GPIO_REG(en_5v0),                   \
758         ADD_GPIO_REG(en_ddr),                   \
759         ADD_GPIO_REG(en_3v3_sys),               \
760         ADD_GPIO_REG(en_3v3_modem),             \
761         ADD_GPIO_REG(en_vdd_pnl1),              \
762         ADD_GPIO_REG(cam3_ldo_en),              \
763         ADD_GPIO_REG(en_vdd_com),               \
764         ADD_GPIO_REG(en_3v3_fuse),              \
765         ADD_GPIO_REG(en_3v3_emmc),              \
766         ADD_GPIO_REG(en_vdd_sdmmc1),            \
767         ADD_GPIO_REG(en_3v3_pex_hvdd),          \
768         ADD_GPIO_REG(en_1v8_cam),
769
770 #define COMMON_GPIO_REG_E1291_A04 \
771         ADD_GPIO_REG(en_5v_cp),                 \
772         ADD_GPIO_REG(en_5v0_a04),               \
773         ADD_GPIO_REG(en_ddr_a04),               \
774         ADD_GPIO_REG(en_3v3_sys_a04),           \
775         ADD_GPIO_REG(en_3v3_modem),             \
776         ADD_GPIO_REG(en_vdd_pnl1),              \
777         ADD_GPIO_REG(cam3_ldo_en),              \
778         ADD_GPIO_REG(en_vdd_com),               \
779         ADD_GPIO_REG(en_3v3_fuse),              \
780         ADD_GPIO_REG(en_3v3_emmc),              \
781         ADD_GPIO_REG(en_vdd_sdmmc1),            \
782         ADD_GPIO_REG(en_3v3_pex_hvdd),          \
783         ADD_GPIO_REG(en_1v8_cam),
784
785 #define PM269_GPIO_REG \
786         ADD_GPIO_REG(en_5v_cp),                 \
787         ADD_GPIO_REG(en_5v0),                   \
788         ADD_GPIO_REG(en_ddr),                   \
789         ADD_GPIO_REG(en_vdd_bl_pm269),          \
790         ADD_GPIO_REG(en_3v3_sys),               \
791         ADD_GPIO_REG(en_3v3_modem),             \
792         ADD_GPIO_REG(en_vdd_pnl1_pm269),                \
793         ADD_GPIO_REG(cam3_ldo_en),              \
794         ADD_GPIO_REG(en_vdd_com),               \
795         ADD_GPIO_REG(en_3v3_fuse_pm269),        \
796         ADD_GPIO_REG(en_3v3_emmc),              \
797         ADD_GPIO_REG(en_vdd_sdmmc1_pm269),      \
798         ADD_GPIO_REG(en_3v3_pex_hvdd_pm269),    \
799         ADD_GPIO_REG(en_1v8_cam),               \
800         ADD_GPIO_REG(dis_5v_switch_e118x),      \
801         ADD_GPIO_REG(en_usb1_vbus_oc_e118x),    \
802         ADD_GPIO_REG(en_usb3_vbus_oc_e118x),    \
803         ADD_GPIO_REG(en_vddio_vid_oc_pm269),
804
805 #define E118x_GPIO_REG  \
806         ADD_GPIO_REG(en_vdd_bl),                \
807         ADD_GPIO_REG(dis_5v_switch_e118x),      \
808         ADD_GPIO_REG(en_usb1_vbus_oc_e118x),    \
809         ADD_GPIO_REG(en_usb3_vbus_oc_e118x),    \
810         ADD_GPIO_REG(en_vddio_vid_oc_e118x), \
811         ADD_GPIO_REG(en_vbrtr),
812
813 #define E1198_GPIO_REG  \
814         ADD_GPIO_REG(en_vddio_vid_oc),          \
815         ADD_GPIO_REG(cam1_ldo_en),              \
816         ADD_GPIO_REG(cam2_ldo_en),
817
818 #define E1291_1198_A00_GPIO_REG \
819         ADD_GPIO_REG(en_usb1_vbus_oc),          \
820         ADD_GPIO_REG(en_usb3_vbus_oc),          \
821         ADD_GPIO_REG(en_vdd_bl),
822
823 #define E1291_A03_GPIO_REG      \
824         ADD_GPIO_REG(en_usb1_vbus_oc_a03),              \
825         ADD_GPIO_REG(en_usb3_vbus_oc_a03),              \
826         ADD_GPIO_REG(en_vdd_bl1_a03), \
827         ADD_GPIO_REG(en_vdd_bl2_a03),
828
829 /* Gpio switch regulator platform data  for E1186/E1187/E1256*/
830 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e118x[] = {
831         COMMON_GPIO_REG
832         E118x_GPIO_REG
833 };
834
835 /* Gpio switch regulator platform data for E1198 and E1291*/
836 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1198[] = {
837         COMMON_GPIO_REG
838         E1291_1198_A00_GPIO_REG
839         E1198_GPIO_REG
840 };
841
842 /* Gpio switch regulator platform data for PM269*/
843 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_pm269[] = {
844         PM269_GPIO_REG
845 };
846
847 /* Gpio switch regulator platform data for E1291 A03*/
848 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1291_a03[] = {
849         COMMON_GPIO_REG
850         E1291_A03_GPIO_REG
851         E1198_GPIO_REG
852 };
853
854 /* Gpio switch regulator platform data for E1291 A04*/
855 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1291_a04[] = {
856         COMMON_GPIO_REG_E1291_A04
857         E1291_A03_GPIO_REG
858         E1198_GPIO_REG
859 };
860
861
862 static struct gpio_switch_regulator_platform_data  gswitch_pdata;
863 static struct platform_device gswitch_regulator_pdata = {
864         .name = "gpio-switch-regulator",
865         .id   = -1,
866         .dev  = {
867              .platform_data = &gswitch_pdata,
868         },
869 };
870
871 int __init cardhu_gpio_switch_regulator_init(void)
872 {
873         int i;
874         struct board_info board_info;
875         tegra_get_board_info(&board_info);
876         switch (board_info.board_id) {
877         case BOARD_E1198:
878                 gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e1198);
879                 gswitch_pdata.subdevs = gswitch_subdevs_e1198;
880                 break;
881         case BOARD_E1291:
882                 if (board_info.fab == BOARD_FAB_A03) {
883                         gswitch_pdata.num_subdevs =
884                                         ARRAY_SIZE(gswitch_subdevs_e1291_a03);
885                         gswitch_pdata.subdevs = gswitch_subdevs_e1291_a03;
886                 } else if (board_info.fab == BOARD_FAB_A04) {
887                         gswitch_pdata.num_subdevs =
888                                         ARRAY_SIZE(gswitch_subdevs_e1291_a04);
889                         gswitch_pdata.subdevs = gswitch_subdevs_e1291_a04;
890                 } else {
891                         gswitch_pdata.num_subdevs =
892                                         ARRAY_SIZE(gswitch_subdevs_e1198);
893                         gswitch_pdata.subdevs = gswitch_subdevs_e1198;
894                 }
895                 break;
896         case BOARD_PM269:
897                 gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_pm269);
898                 gswitch_pdata.subdevs = gswitch_subdevs_pm269;
899                 break;
900         default:
901                 gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e118x);
902                 gswitch_pdata.subdevs = gswitch_subdevs_e118x;
903                 break;
904         }
905
906         for (i = 0; i < gswitch_pdata.num_subdevs; ++i) {
907                 struct gpio_switch_regulator_subdev_data *gswitch_data = gswitch_pdata.subdevs[i];
908                 if (gswitch_data->gpio_nr <= TEGRA_NR_GPIOS)
909                         tegra_gpio_enable(gswitch_data->gpio_nr);
910         }
911
912         return platform_device_register(&gswitch_regulator_pdata);
913 }
914
915 static void cardhu_board_suspend(int lp_state, enum suspend_stage stg)
916 {
917         if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_SUSPEND_BEFORE_CPU))
918                 tegra_console_uart_suspend();
919 }
920
921 static void cardhu_board_resume(int lp_state, enum resume_stage stg)
922 {
923         if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_RESUME_AFTER_CPU))
924                 tegra_console_uart_resume();
925 }
926
927 static struct tegra_suspend_platform_data cardhu_suspend_data = {
928         .cpu_timer      = 2000,
929         .cpu_off_timer  = 200,
930         .suspend_mode   = TEGRA_SUSPEND_LP2,
931         .core_timer     = 0x7e7e,
932         .core_off_timer = 0,
933         .corereq_high   = true,
934         .sysclkreq_high = true,
935         .cpu_lp2_min_residency = 2000,
936         .board_suspend = cardhu_board_suspend,
937         .board_resume = cardhu_board_resume,
938 };
939
940 int __init cardhu_suspend_init(void)
941 {
942         struct board_info board_info;
943         struct board_info pmu_board_info;
944
945         tegra_get_board_info(&board_info);
946         tegra_get_pmu_board_info(&pmu_board_info);
947
948         /* For PMU Fab A03 and A04 make core_pwr_req to high */
949         if ((pmu_board_info.fab == BOARD_FAB_A03) || (pmu_board_info.fab == BOARD_FAB_A04))
950                 cardhu_suspend_data.corereq_high = true;
951
952         /* CORE_PWR_REQ to be high for all processor/pmu board whose sku bit 0
953          * is set. This is require to enable the dc-dc converter tps62361x */
954         if ((board_info.sku & SKU_DCDC_TPS62361_SUPPORT) || (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT))
955                 cardhu_suspend_data.corereq_high = true;
956
957         switch (board_info.board_id) {
958         case BOARD_E1291:
959                 /* CORE_PWR_REQ to be high for E1291-A03 */
960                 if (board_info.fab == BOARD_FAB_A03)
961                         cardhu_suspend_data.corereq_high = true;
962                 break;
963         case BOARD_E1198:
964         case BOARD_PM269:
965                 break;
966         case BOARD_E1187:
967         case BOARD_E1186:
968         case BOARD_E1256:
969                 cardhu_suspend_data.cpu_timer = 5000;
970                 cardhu_suspend_data.cpu_off_timer = 5000;
971                 break;
972         default:
973                 break;
974         }
975
976         tegra_init_suspend(&cardhu_suspend_data);
977         return 0;
978 }
979
980 static void cardhu_power_off(void)
981 {
982         int ret;
983         pr_err("cardhu: Powering off the device\n");
984         ret = tps6591x_power_off();
985         if (ret)
986                 pr_err("cardhu: failed to power off\n");
987
988         while (1);
989 }
990
991 int __init cardhu_power_off_init(void)
992 {
993         pm_power_off = cardhu_power_off;
994         return 0;
995 }
996
997 #ifdef CONFIG_TEGRA_EDP_LIMITS
998
999 int __init cardhu_edp_init(void)
1000 {
1001         /* Temporary initalization, needs to be set to the actual
1002            regulator current */
1003         tegra_init_cpu_edp_limits(5000);
1004         return 0;
1005 }
1006 #endif