f6c8b33bed5b935f1e7eb318f96b35c8e81a954b
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu-power.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu-power.c
3  *
4  * Copyright (C) 2011 NVIDIA, Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
18  * 02111-1307, USA
19  */
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/regulator/machine.h>
25 #include <linux/mfd/tps6591x.h>
26 #include <linux/mfd/max77663-core.h>
27 #include <linux/gpio.h>
28 #include <linux/io.h>
29 #include <linux/regulator/gpio-switch-regulator.h>
30 #include <linux/regulator/fixed.h>
31 #include <linux/regulator/tps6591x-regulator.h>
32 #include <linux/regulator/tps62360.h>
33 #include <linux/power/gpio-charger.h>
34
35 #include <asm/mach-types.h>
36
37 #include <mach/iomap.h>
38 #include <mach/irqs.h>
39 #include <mach/pinmux.h>
40 #include <mach/edp.h>
41 #include <mach/gpio-tegra.h>
42 #include <mach/pinmux-tegra30.h>
43
44 #include "gpio-names.h"
45 #include "board.h"
46 #include "board-cardhu.h"
47 #include "pm.h"
48 #include "wakeups-t3.h"
49 #include "tegra3_tsensor.h"
50
51 #define PMC_CTRL                0x0
52 #define PMC_CTRL_INTR_LOW       (1 << 17)
53
54 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_0[] = {
55         REGULATOR_SUPPLY("vdd_core", NULL),
56         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
57 };
58
59 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_1[] = {
60         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
61 };
62
63 static struct regulator_consumer_supply tps6591x_vdd2_supply_0[] = {
64         REGULATOR_SUPPLY("vdd_gen1v5", NULL),
65         REGULATOR_SUPPLY("vcore_lcd", NULL),
66         REGULATOR_SUPPLY("track_ldo1", NULL),
67         REGULATOR_SUPPLY("external_ldo_1v2", NULL),
68         REGULATOR_SUPPLY("vcore_cam1", NULL),
69         REGULATOR_SUPPLY("vcore_cam2", NULL),
70 };
71
72 static struct regulator_consumer_supply tps6591x_vddctrl_supply_0[] = {
73         REGULATOR_SUPPLY("vdd_cpu_pmu", NULL),
74         REGULATOR_SUPPLY("vdd_cpu", NULL),
75         REGULATOR_SUPPLY("vdd_sys", NULL),
76 };
77
78 static struct regulator_consumer_supply tps6591x_vio_supply_0[] = {
79         REGULATOR_SUPPLY("vdd_gen1v8", NULL),
80         REGULATOR_SUPPLY("avdd_hdmi_pll", NULL),
81         REGULATOR_SUPPLY("avdd_usb_pll", NULL),
82         REGULATOR_SUPPLY("avdd_osc", NULL),
83         REGULATOR_SUPPLY("vddio_sys", NULL),
84         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
85         REGULATOR_SUPPLY("pwrdet_sdmmc4", NULL),
86         REGULATOR_SUPPLY("vdd1v8_satelite", NULL),
87         REGULATOR_SUPPLY("vddio_uart", NULL),
88         REGULATOR_SUPPLY("pwrdet_uart", NULL),
89         REGULATOR_SUPPLY("vddio_audio", NULL),
90         REGULATOR_SUPPLY("pwrdet_audio", NULL),
91         REGULATOR_SUPPLY("vddio_bb", NULL),
92         REGULATOR_SUPPLY("pwrdet_bb", NULL),
93         REGULATOR_SUPPLY("vddio_lcd_pmu", NULL),
94         REGULATOR_SUPPLY("pwrdet_lcd", NULL),
95         REGULATOR_SUPPLY("vddio_cam", NULL),
96         REGULATOR_SUPPLY("pwrdet_cam", NULL),
97         REGULATOR_SUPPLY("vddio_vi", NULL),
98         REGULATOR_SUPPLY("pwrdet_vi", NULL),
99         REGULATOR_SUPPLY("ldo6", NULL),
100         REGULATOR_SUPPLY("ldo7", NULL),
101         REGULATOR_SUPPLY("ldo8", NULL),
102         REGULATOR_SUPPLY("vcore_audio", NULL),
103         REGULATOR_SUPPLY("avcore_audio", NULL),
104         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
105         REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
106         REGULATOR_SUPPLY("vcore1_lpddr2", NULL),
107         REGULATOR_SUPPLY("vcom_1v8", NULL),
108         REGULATOR_SUPPLY("pmuio_1v8", NULL),
109         REGULATOR_SUPPLY("avdd_ic_usb", NULL),
110 };
111
112 static struct regulator_consumer_supply tps6591x_ldo1_supply_0[] = {
113         REGULATOR_SUPPLY("avdd_pexb", NULL),
114         REGULATOR_SUPPLY("vdd_pexb", NULL),
115         REGULATOR_SUPPLY("avdd_pex_pll", NULL),
116         REGULATOR_SUPPLY("avdd_pexa", NULL),
117         REGULATOR_SUPPLY("vdd_pexa", NULL),
118 };
119
120 static struct regulator_consumer_supply tps6591x_ldo2_supply_0[] = {
121         REGULATOR_SUPPLY("avdd_sata", NULL),
122         REGULATOR_SUPPLY("vdd_sata", NULL),
123         REGULATOR_SUPPLY("avdd_sata_pll", NULL),
124         REGULATOR_SUPPLY("avdd_plle", NULL),
125 };
126
127 static struct regulator_consumer_supply tps6591x_ldo3_supply_e118x[] = {
128         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
129         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
130 };
131
132 static struct regulator_consumer_supply tps6591x_ldo3_supply_e1198[] = {
133         REGULATOR_SUPPLY("unused_rail_ldo3", NULL),
134 };
135
136 static struct regulator_consumer_supply tps6591x_ldo4_supply_0[] = {
137         REGULATOR_SUPPLY("vdd_rtc", NULL),
138 };
139
140 static struct regulator_consumer_supply tps6591x_ldo5_supply_e118x[] = {
141         REGULATOR_SUPPLY("avdd_vdac", NULL),
142 };
143
144 static struct regulator_consumer_supply tps6591x_ldo5_supply_e1198[] = {
145         REGULATOR_SUPPLY("avdd_vdac", NULL),
146         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
147         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
148 };
149
150 static struct regulator_consumer_supply tps6591x_ldo6_supply_0[] = {
151         REGULATOR_SUPPLY("avdd_dsi_csi", NULL),
152         REGULATOR_SUPPLY("pwrdet_mipi", NULL),
153 };
154 static struct regulator_consumer_supply tps6591x_ldo7_supply_0[] = {
155         REGULATOR_SUPPLY("avdd_plla_p_c_s", NULL),
156         REGULATOR_SUPPLY("avdd_pllm", NULL),
157         REGULATOR_SUPPLY("avdd_pllu_d", NULL),
158         REGULATOR_SUPPLY("avdd_pllu_d2", NULL),
159         REGULATOR_SUPPLY("avdd_pllx", NULL),
160 };
161
162 static struct regulator_consumer_supply tps6591x_ldo8_supply_0[] = {
163         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
164 };
165
166 #define TPS_PDATA_INIT(_name, _sname, _minmv, _maxmv, _supply_reg, _always_on, \
167         _boot_on, _apply_uv, _init_uV, _init_enable, _init_apply, _ectrl, _flags) \
168         static struct tps6591x_regulator_platform_data pdata_##_name##_##_sname = \
169         {                                                               \
170                 .regulator = {                                          \
171                         .constraints = {                                \
172                                 .min_uV = (_minmv)*1000,                \
173                                 .max_uV = (_maxmv)*1000,                \
174                                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
175                                                      REGULATOR_MODE_STANDBY), \
176                                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
177                                                    REGULATOR_CHANGE_STATUS |  \
178                                                    REGULATOR_CHANGE_VOLTAGE), \
179                                 .always_on = _always_on,                \
180                                 .boot_on = _boot_on,                    \
181                                 .apply_uV = _apply_uv,                  \
182                         },                                              \
183                         .num_consumer_supplies =                        \
184                                 ARRAY_SIZE(tps6591x_##_name##_supply_##_sname), \
185                         .consumer_supplies = tps6591x_##_name##_supply_##_sname,        \
186                         .supply_regulator = _supply_reg,                \
187                 },                                                      \
188                 .init_uV =  _init_uV * 1000,                            \
189                 .init_enable = _init_enable,                            \
190                 .init_apply = _init_apply,                              \
191                 .ectrl = _ectrl,                                        \
192                 .flags = _flags,                                        \
193         }
194
195 TPS_PDATA_INIT(vdd1, skubit0_0, 600,  1500, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF, 0);
196 TPS_PDATA_INIT(vdd1, skubit0_1, 600,  1500, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF, 0);
197 TPS_PDATA_INIT(vdd2, 0,         600,  1500, 0, 1, 1, 0, -1, 0, 0, 0, 0);
198 TPS_PDATA_INIT(vddctrl, 0,      600,  1400, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_EN1, 0);
199 TPS_PDATA_INIT(vio,  0,         1500, 3300, 0, 1, 1, 0, -1, 0, 0, 0, 0);
200
201 TPS_PDATA_INIT(ldo1, 0,         1000, 3300, tps6591x_rails(VDD_2), 0, 0, 0, -1, 0, 1, 0, 0);
202 TPS_PDATA_INIT(ldo2, 0,         1050, 1050, tps6591x_rails(VDD_2), 0, 0, 1, -1, 0, 1, 0, 0);
203
204 TPS_PDATA_INIT(ldo3, e118x,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
205 TPS_PDATA_INIT(ldo3, e1198,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
206 TPS_PDATA_INIT(ldo4, 0,         1000, 3300, 0, 1, 0, 0, -1, 0, 0, 0, 0);
207 TPS_PDATA_INIT(ldo5, e118x,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
208 TPS_PDATA_INIT(ldo5, e1198,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
209
210 TPS_PDATA_INIT(ldo6, 0,         1200, 1200, tps6591x_rails(VIO), 0, 0, 1, -1, 0, 0, 0, 0);
211 TPS_PDATA_INIT(ldo7, 0,         1200, 1200, tps6591x_rails(VIO), 1, 1, 1, -1, 0, 0, EXT_CTRL_SLEEP_OFF, LDO_LOW_POWER_ON_SUSPEND);
212 TPS_PDATA_INIT(ldo8, 0,         1000, 3300, tps6591x_rails(VIO), 1, 0, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF, LDO_LOW_POWER_ON_SUSPEND);
213
214 #if defined(CONFIG_RTC_DRV_TPS6591x)
215 static struct tps6591x_rtc_platform_data rtc_data = {
216         .irq = TEGRA_NR_IRQS + TPS6591X_INT_RTC_ALARM,
217         .time = {
218                 .tm_year = 2000,
219                 .tm_mon = 0,
220                 .tm_mday = 1,
221                 .tm_hour = 0,
222                 .tm_min = 0,
223                 .tm_sec = 0,
224         },
225 };
226
227 #define TPS_RTC_REG()                                   \
228         {                                               \
229                 .id     = 0,                            \
230                 .name   = "rtc_tps6591x",               \
231                 .platform_data = &rtc_data,             \
232         }
233 #endif
234
235 #define TPS_REG(_id, _name, _sname)                             \
236         {                                                       \
237                 .id     = TPS6591X_ID_##_id,                    \
238                 .name   = "tps6591x-regulator",                 \
239                 .platform_data  = &pdata_##_name##_##_sname,    \
240         }
241
242 #define TPS6591X_DEV_COMMON_E118X               \
243         TPS_REG(VDD_2, vdd2, 0),                \
244         TPS_REG(VDDCTRL, vddctrl, 0),           \
245         TPS_REG(LDO_1, ldo1, 0),                \
246         TPS_REG(LDO_2, ldo2, 0),                \
247         TPS_REG(LDO_3, ldo3, e118x),            \
248         TPS_REG(LDO_4, ldo4, 0),                \
249         TPS_REG(LDO_5, ldo5, e118x),            \
250         TPS_REG(LDO_6, ldo6, 0),                \
251         TPS_REG(LDO_7, ldo7, 0),                \
252         TPS_REG(LDO_8, ldo8, 0)
253
254 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_0[] = {
255         TPS_REG(VIO, vio, 0),
256         TPS_REG(VDD_1, vdd1, skubit0_0),
257         TPS6591X_DEV_COMMON_E118X,
258 #if defined(CONFIG_RTC_DRV_TPS6591x)
259         TPS_RTC_REG(),
260 #endif
261 };
262
263 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_1[] = {
264         TPS_REG(VIO, vio, 0),
265         TPS_REG(VDD_1, vdd1, skubit0_1),
266         TPS6591X_DEV_COMMON_E118X,
267 #if defined(CONFIG_RTC_DRV_TPS6591x)
268         TPS_RTC_REG(),
269 #endif
270 };
271
272 #define TPS6591X_DEV_COMMON_CARDHU              \
273         TPS_REG(VDD_2, vdd2, 0),                \
274         TPS_REG(VDDCTRL, vddctrl, 0),           \
275         TPS_REG(LDO_1, ldo1, 0),                \
276         TPS_REG(LDO_2, ldo2, 0),                \
277         TPS_REG(LDO_3, ldo3, e1198),            \
278         TPS_REG(LDO_4, ldo4, 0),                \
279         TPS_REG(LDO_5, ldo5, e1198),            \
280         TPS_REG(LDO_6, ldo6, 0),                \
281         TPS_REG(LDO_7, ldo7, 0),                \
282         TPS_REG(LDO_8, ldo8, 0)
283
284 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_0[] = {
285         TPS_REG(VIO, vio, 0),
286         TPS_REG(VDD_1, vdd1, skubit0_0),
287         TPS6591X_DEV_COMMON_CARDHU,
288 #if defined(CONFIG_RTC_DRV_TPS6591x)
289         TPS_RTC_REG(),
290 #endif
291 };
292
293 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_1[] = {
294         TPS_REG(VIO, vio, 0),
295         TPS_REG(VDD_1, vdd1, skubit0_1),
296         TPS6591X_DEV_COMMON_CARDHU,
297 #if defined(CONFIG_RTC_DRV_TPS6591x)
298         TPS_RTC_REG(),
299 #endif
300 };
301
302 #define TPS_GPIO_INIT_PDATA(gpio_nr, _init_apply, _sleep_en, _pulldn_en, _output_en, _output_val)       \
303         [gpio_nr] = {                                   \
304                         .sleep_en       = _sleep_en,    \
305                         .pulldn_en      = _pulldn_en,   \
306                         .output_mode_en = _output_en,   \
307                         .output_val     = _output_val,  \
308                         .init_apply     = _init_apply,  \
309                      }
310 static struct tps6591x_gpio_init_data tps_gpio_pdata_e1291_a04[] =  {
311         TPS_GPIO_INIT_PDATA(0, 0, 0, 0, 0, 0),
312         TPS_GPIO_INIT_PDATA(1, 0, 0, 0, 0, 0),
313         TPS_GPIO_INIT_PDATA(2, 1, 1, 0, 1, 1),
314         TPS_GPIO_INIT_PDATA(3, 0, 0, 0, 0, 0),
315         TPS_GPIO_INIT_PDATA(4, 0, 0, 0, 0, 0),
316         TPS_GPIO_INIT_PDATA(5, 0, 0, 0, 0, 0),
317         TPS_GPIO_INIT_PDATA(6, 0, 0, 0, 0, 0),
318         TPS_GPIO_INIT_PDATA(7, 0, 0, 0, 0, 0),
319         TPS_GPIO_INIT_PDATA(8, 0, 0, 0, 0, 0),
320 };
321
322 static struct tps6591x_sleep_keepon_data tps_slp_keepon = {
323         .clkout32k_keepon = 1,
324 };
325
326 static struct tps6591x_platform_data tps_platform = {
327         .irq_base       = TPS6591X_IRQ_BASE,
328         .gpio_base      = TPS6591X_GPIO_BASE,
329         .dev_slp_en     = true,
330         .slp_keepon     = &tps_slp_keepon,
331         .use_power_off  = true,
332 };
333
334 static struct i2c_board_info __initdata cardhu_regulators[] = {
335         {
336                 I2C_BOARD_INFO("tps6591x", 0x2D),
337                 .irq            = INT_EXTERNAL_PMU,
338                 .platform_data  = &tps_platform,
339         },
340 };
341
342 /* TPS62361B DC-DC converter */
343 static struct regulator_consumer_supply tps62361_dcdc_supply[] = {
344         REGULATOR_SUPPLY("vdd_core", NULL),
345 };
346
347 static struct tps62360_regulator_platform_data tps62361_pdata = {
348         .reg_init_data = {                                      \
349                 .constraints = {                                \
350                         .min_uV = 500000,                       \
351                         .max_uV = 1770000,                      \
352                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
353                                              REGULATOR_MODE_STANDBY), \
354                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
355                                            REGULATOR_CHANGE_STATUS |  \
356                                            REGULATOR_CHANGE_VOLTAGE), \
357                         .always_on = 1,                         \
358                         .boot_on =  1,                          \
359                         .apply_uV = 0,                          \
360                 },                                              \
361                 .num_consumer_supplies = ARRAY_SIZE(tps62361_dcdc_supply), \
362                 .consumer_supplies = tps62361_dcdc_supply,      \
363                 },                                              \
364         .en_discharge = true,                                   \
365         .vsel0_gpio = -1,                                       \
366         .vsel1_gpio = -1,                                       \
367         .vsel0_def_state = 1,                                   \
368         .vsel1_def_state = 1,                                   \
369 };
370
371 static struct i2c_board_info __initdata tps62361_boardinfo[] = {
372         {
373                 I2C_BOARD_INFO("tps62361", 0x60),
374                 .platform_data  = &tps62361_pdata,
375         },
376 };
377
378 int __init cardhu_regulator_init(void)
379 {
380         struct board_info board_info;
381         struct board_info pmu_board_info;
382         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
383         u32 pmc_ctrl;
384         bool ext_core_regulator = false;
385
386         /* configure the power management controller to trigger PMU
387          * interrupts when low */
388
389         pmc_ctrl = readl(pmc + PMC_CTRL);
390         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
391
392         tegra_get_board_info(&board_info);
393         tegra_get_pmu_board_info(&pmu_board_info);
394
395         if (pmu_board_info.board_id == BOARD_PMU_PM298)
396                 return cardhu_pm298_regulator_init();
397
398         if (pmu_board_info.board_id == BOARD_PMU_PM299)
399                 return cardhu_pm299_regulator_init();
400
401         /* The regulator details have complete constraints */
402         regulator_has_full_constraints();
403
404         /* PMU-E1208, the ldo2 should be set to 1200mV */
405         if (pmu_board_info.board_id == BOARD_E1208) {
406                 pdata_ldo2_0.regulator.constraints.min_uV = 1200000;
407                 pdata_ldo2_0.regulator.constraints.max_uV = 1200000;
408         }
409
410         /*
411          * E1198 will have different core regulator decoding.
412          * A01/A02: Based on sku bit 0.
413          * A03: Based on bit 2 and bit 0
414          *       2,0: 00 no core regulator,
415          *            01:TPS62365
416          *            10:TPS62366
417          *            11:TPS623850
418          */
419         if (board_info.board_id == BOARD_E1198) {
420                 int vsels;
421                 switch(board_info.fab) {
422                 case BOARD_FAB_A00:
423                 case BOARD_FAB_A01:
424                 case BOARD_FAB_A02:
425                         if (board_info.sku & SKU_DCDC_TPS62361_SUPPORT)
426                                 ext_core_regulator = true;
427                         break;
428
429                 case BOARD_FAB_A03:
430                         vsels = ((board_info.sku >> 1) & 0x2) | (board_info.sku & 1);
431                         switch(vsels) {
432                         case 1:
433                                 ext_core_regulator = true;
434                                 tps62361_pdata.vsel0_def_state = 1;
435                                 tps62361_pdata.vsel1_def_state = 1;
436                                 break;
437                         case 2:
438                                 ext_core_regulator = true;
439                                 tps62361_pdata.vsel0_def_state = 0;
440                                 tps62361_pdata.vsel1_def_state = 0;
441                                 break;
442                         case 3:
443                                 ext_core_regulator = true;
444                                 tps62361_pdata.vsel0_def_state = 1;
445                                 tps62361_pdata.vsel1_def_state = 0;
446                                 break;
447                         }
448                         break;
449                 }
450
451                 pr_info("BoardId:SKU:Fab 0x%04x:0x%04x:0x%02x\n",
452                         board_info.board_id, board_info.sku , board_info.fab);
453                 pr_info("Core regulator %s\n",
454                         (ext_core_regulator)? "true": "false");
455                 pr_info("VSEL 1:0 %d%d\n",
456                         tps62361_pdata.vsel1_def_state,
457                         tps62361_pdata.vsel0_def_state);
458         }
459
460         if ((board_info.board_id == BOARD_E1291) &&
461                 (board_info.sku & SKU_DCDC_TPS62361_SUPPORT))
462                 ext_core_regulator = true;
463
464         if ((board_info.board_id == BOARD_E1198) ||
465                 (board_info.board_id == BOARD_E1291)) {
466                 if (ext_core_regulator) {
467                         tps_platform.num_subdevs =
468                                         ARRAY_SIZE(tps_devs_e1198_skubit0_1);
469                         tps_platform.subdevs = tps_devs_e1198_skubit0_1;
470                 } else {
471                         tps_platform.num_subdevs =
472                                         ARRAY_SIZE(tps_devs_e1198_skubit0_0);
473                         tps_platform.subdevs = tps_devs_e1198_skubit0_0;
474                 }
475         } else {
476                 if (board_info.board_id == BOARD_PM269)
477                         pdata_ldo3_e118x.slew_rate_uV_per_us = 250;
478
479                 if (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT) {
480                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_1);
481                         tps_platform.subdevs = tps_devs_e118x_skubit0_1;
482                         ext_core_regulator = true;
483                 } else {
484                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_0);
485                         tps_platform.subdevs = tps_devs_e118x_skubit0_0;
486                 }
487         }
488
489         /* E1291-A04/A05: Enable DEV_SLP and enable sleep on GPIO2 */
490         if ((board_info.board_id == BOARD_E1291) &&
491                         ((board_info.fab == BOARD_FAB_A04) ||
492                          (board_info.fab == BOARD_FAB_A05))) {
493                 tps_platform.dev_slp_en = true;
494                 tps_platform.gpio_init_data = tps_gpio_pdata_e1291_a04;
495                 tps_platform.num_gpioinit_data =
496                                         ARRAY_SIZE(tps_gpio_pdata_e1291_a04);
497         }
498
499         i2c_register_board_info(4, cardhu_regulators, 1);
500
501         /* Register the external core regulator if it is require */
502         if (ext_core_regulator) {
503                 pr_info("Registering the core regulator\n");
504                 i2c_register_board_info(4, tps62361_boardinfo, 1);
505         }
506         return 0;
507 }
508
509
510 /**************** GPIO based fixed regulator *****************/
511 /* EN_5V_CP from PMU GP0 */
512 static struct regulator_consumer_supply fixed_reg_en_5v_cp_supply[] = {
513         REGULATOR_SUPPLY("vdd_5v0_sby", NULL),
514         REGULATOR_SUPPLY("vdd_hall", NULL),
515         REGULATOR_SUPPLY("vterm_ddr", NULL),
516         REGULATOR_SUPPLY("v2ref_ddr", NULL),
517 };
518
519 /* EN_5V0 From PMU GP2 */
520 static struct regulator_consumer_supply fixed_reg_en_5v0_supply[] = {
521         REGULATOR_SUPPLY("vdd_5v0_sys", NULL),
522 };
523
524 /* EN_DDR From PMU GP6 */
525 static struct regulator_consumer_supply fixed_reg_en_ddr_supply[] = {
526         REGULATOR_SUPPLY("mem_vddio_ddr", NULL),
527         REGULATOR_SUPPLY("t30_vddio_ddr", NULL),
528 };
529
530 /* EN_3V3_SYS From PMU GP7 */
531 static struct regulator_consumer_supply fixed_reg_en_3v3_sys_supply[] = {
532         REGULATOR_SUPPLY("vdd_lvds", NULL),
533         REGULATOR_SUPPLY("vdd_pnl", NULL),
534         REGULATOR_SUPPLY("vcom_3v3", NULL),
535         REGULATOR_SUPPLY("vdd_3v3", NULL),
536         REGULATOR_SUPPLY("vcore_mmc", NULL),
537         REGULATOR_SUPPLY("vddio_pex_ctl", NULL),
538         REGULATOR_SUPPLY("pwrdet_pex_ctl", NULL),
539         REGULATOR_SUPPLY("hvdd_pex_pmu", NULL),
540         REGULATOR_SUPPLY("avdd_hdmi", NULL),
541         REGULATOR_SUPPLY("vpp_fuse", NULL),
542         REGULATOR_SUPPLY("avdd_usb", NULL),
543         REGULATOR_SUPPLY("vdd_ddr_rx", NULL),
544         REGULATOR_SUPPLY("vcore_nand", NULL),
545         REGULATOR_SUPPLY("hvdd_sata", NULL),
546         REGULATOR_SUPPLY("vddio_gmi_pmu", NULL),
547         REGULATOR_SUPPLY("pwrdet_nand", NULL),
548         REGULATOR_SUPPLY("avdd_cam1", NULL),
549         REGULATOR_SUPPLY("vdd_af", NULL),
550         REGULATOR_SUPPLY("avdd_cam2", NULL),
551         REGULATOR_SUPPLY("vdd_acc", NULL),
552         REGULATOR_SUPPLY("vdd_phtl", NULL),
553         REGULATOR_SUPPLY("vddio_tp", NULL),
554         REGULATOR_SUPPLY("vdd_led", NULL),
555         REGULATOR_SUPPLY("vddio_cec", NULL),
556         REGULATOR_SUPPLY("vdd_cmps", NULL),
557         REGULATOR_SUPPLY("vdd_temp", NULL),
558         REGULATOR_SUPPLY("vpp_kfuse", NULL),
559         REGULATOR_SUPPLY("vddio_ts", NULL),
560         REGULATOR_SUPPLY("vdd_ir_led", NULL),
561         REGULATOR_SUPPLY("vddio_1wire", NULL),
562         REGULATOR_SUPPLY("avddio_audio", NULL),
563         REGULATOR_SUPPLY("vdd_ec", NULL),
564         REGULATOR_SUPPLY("vcom_pa", NULL),
565         REGULATOR_SUPPLY("vdd_3v3_devices", NULL),
566         REGULATOR_SUPPLY("vdd_3v3_dock", NULL),
567         REGULATOR_SUPPLY("vdd_3v3_edid", NULL),
568         REGULATOR_SUPPLY("vdd_3v3_hdmi_cec", NULL),
569         REGULATOR_SUPPLY("vdd_3v3_gmi", NULL),
570         REGULATOR_SUPPLY("vdd_spk_amp", "tegra-snd-wm8903.0"),
571         REGULATOR_SUPPLY("vdd_3v3_sensor", NULL),
572         REGULATOR_SUPPLY("vdd_3v3_cam", NULL),
573         REGULATOR_SUPPLY("vdd_3v3_als", NULL),
574         REGULATOR_SUPPLY("debug_cons", NULL),
575         REGULATOR_SUPPLY("vdd", "4-004c"),
576 };
577
578 /* DIS_5V_SWITCH from AP SPI2_SCK X02 */
579 static struct regulator_consumer_supply fixed_reg_dis_5v_switch_supply[] = {
580         REGULATOR_SUPPLY("master_5v_switch", NULL),
581 };
582
583 /* EN_VDD_BL */
584 static struct regulator_consumer_supply fixed_reg_en_vdd_bl_supply[] = {
585         REGULATOR_SUPPLY("vdd_backlight", NULL),
586         REGULATOR_SUPPLY("vdd_backlight1", NULL),
587 };
588
589 /* EN_VDD_BL2 (E1291-A03) from AP PEX_L0_PRSNT_N DD.00 */
590 static struct regulator_consumer_supply fixed_reg_en_vdd_bl2_supply[] = {
591         REGULATOR_SUPPLY("vdd_backlight2", NULL),
592 };
593
594 /* EN_3V3_MODEM from AP GPIO VI_VSYNCH D06*/
595 static struct regulator_consumer_supply fixed_reg_en_3v3_modem_supply[] = {
596         REGULATOR_SUPPLY("vdd_3v3_mini_card", NULL),
597         REGULATOR_SUPPLY("vdd_mini_card", NULL),
598 };
599
600 /* EN_VDD_PNL1 from AP GPIO VI_D6 L04*/
601 static struct regulator_consumer_supply fixed_reg_en_vdd_pnl1_supply[] = {
602         REGULATOR_SUPPLY("vdd_lcd_panel", NULL),
603 };
604
605 /* CAM1_LDO_EN from AP GPIO KB_ROW6 R06*/
606 static struct regulator_consumer_supply fixed_reg_cam1_ldo_en_supply[] = {
607         REGULATOR_SUPPLY("vdd_2v8_cam1", NULL),
608         REGULATOR_SUPPLY("vdd", "6-0072"),
609 };
610
611 /* CAM2_LDO_EN from AP GPIO KB_ROW7 R07*/
612 static struct regulator_consumer_supply fixed_reg_cam2_ldo_en_supply[] = {
613         REGULATOR_SUPPLY("vdd_2v8_cam2", NULL),
614         REGULATOR_SUPPLY("vdd", "7-0072"),
615 };
616
617 /* CAM3_LDO_EN from AP GPIO KB_ROW8 S00*/
618 static struct regulator_consumer_supply fixed_reg_cam3_ldo_en_supply[] = {
619         REGULATOR_SUPPLY("vdd_cam3", NULL),
620 };
621
622 /* EN_VDD_COM from AP GPIO SDMMC3_DAT5 D00*/
623 static struct regulator_consumer_supply fixed_reg_en_vdd_com_supply[] = {
624         REGULATOR_SUPPLY("vdd_com_bd", NULL),
625 };
626
627 /* EN_VDD_SDMMC1 from AP GPIO VI_HSYNC D07*/
628 static struct regulator_consumer_supply fixed_reg_en_vdd_sdmmc1_supply[] = {
629         REGULATOR_SUPPLY("vddio_sd_slot", "sdhci-tegra.0"),
630 };
631
632 /* EN_3V3_EMMC from AP GPIO SDMMC3_DAT4 D01*/
633 static struct regulator_consumer_supply fixed_reg_en_3v3_emmc_supply[] = {
634         REGULATOR_SUPPLY("vdd_emmc_core", NULL),
635 };
636
637 /* EN_3V3_PEX_HVDD from AP GPIO VI_D09 L07*/
638 static struct regulator_consumer_supply fixed_reg_en_3v3_pex_hvdd_supply[] = {
639         REGULATOR_SUPPLY("hvdd_pex", NULL),
640 };
641
642 /* EN_3v3_FUSE from AP GPIO VI_D08 L06*/
643 static struct regulator_consumer_supply fixed_reg_en_3v3_fuse_supply[] = {
644         REGULATOR_SUPPLY("vdd_fuse", NULL),
645 };
646
647 /* EN_1V8_CAM from AP GPIO GPIO_PBB4 PBB04*/
648 static struct regulator_consumer_supply fixed_reg_en_1v8_cam_supply[] = {
649         REGULATOR_SUPPLY("vdd_1v8_cam1", NULL),
650         REGULATOR_SUPPLY("vdd_1v8_cam2", NULL),
651         REGULATOR_SUPPLY("vdd_1v8_cam3", NULL),
652         REGULATOR_SUPPLY("vdd_i2c", "6-0072"),
653         REGULATOR_SUPPLY("vdd_i2c", "7-0072"),
654         REGULATOR_SUPPLY("vdd_i2c", "2-0033"),
655 };
656
657 static struct regulator_consumer_supply fixed_reg_en_vbrtr_supply[] = {
658         REGULATOR_SUPPLY("vdd_vbrtr", NULL),
659 };
660
661 /* EN_USB1_VBUS_OC*/
662 static struct regulator_consumer_supply gpio_switch_en_usb1_vbus_oc_supply[] = {
663         REGULATOR_SUPPLY("vdd_vbus_micro_usb", NULL),
664 };
665 static int gpio_switch_en_usb1_vbus_oc_voltages[] = { 5000};
666
667 /*EN_USB3_VBUS_OC*/
668 static struct regulator_consumer_supply gpio_switch_en_usb3_vbus_oc_supply[] = {
669         REGULATOR_SUPPLY("vdd_vbus_typea_usb", NULL),
670 };
671 static int gpio_switch_en_usb3_vbus_oc_voltages[] = { 5000};
672
673 /* EN_VDDIO_VID_OC from AP GPIO VI_PCLK T00*/
674 static struct regulator_consumer_supply gpio_switch_en_vddio_vid_oc_supply[] = {
675         REGULATOR_SUPPLY("vdd_hdmi_con", NULL),
676 };
677 static int gpio_switch_en_vddio_vid_oc_voltages[] = { 5000};
678
679 static int enable_load_switch_rail(
680                 struct gpio_switch_regulator_subdev_data *psubdev_data)
681 {
682         int ret;
683
684         if (psubdev_data->pin_group <= 0)
685                 return -EINVAL;
686
687         /* Tristate and make pin as input*/
688         ret = tegra_pinmux_set_tristate(psubdev_data->pin_group,
689                                                 TEGRA_TRI_TRISTATE);
690         if (ret < 0)
691                 return ret;
692         return gpio_direction_input(psubdev_data->gpio_nr);
693 }
694
695 static int disable_load_switch_rail(
696                 struct gpio_switch_regulator_subdev_data *psubdev_data)
697 {
698         int ret;
699
700         if (psubdev_data->pin_group <= 0)
701                 return -EINVAL;
702
703         /* Un-tristate and driver low */
704         ret = tegra_pinmux_set_tristate(psubdev_data->pin_group,
705                                                 TEGRA_TRI_NORMAL);
706         if (ret < 0)
707                 return ret;
708         return gpio_direction_output(psubdev_data->gpio_nr, 0);
709 }
710
711 /* Macro for defining gpio switch regulator sub device data */
712 #define GREG_INIT(_id, _var, _name, _input_supply, _always_on, _boot_on, \
713         _gpio_nr, _active_low, _init_state, _pg, _enable, _disable)      \
714         static struct gpio_switch_regulator_subdev_data gpio_pdata_##_var =  \
715         {                                                               \
716                 .regulator_name = "gpio-switch-"#_name,                 \
717                 .input_supply   = _input_supply,                        \
718                 .id             = _id,                                  \
719                 .gpio_nr        = _gpio_nr,                             \
720                 .pin_group      = _pg,                                  \
721                 .active_low     = _active_low,                          \
722                 .init_state     = _init_state,                          \
723                 .voltages       = gpio_switch_##_name##_voltages,       \
724                 .n_voltages     = ARRAY_SIZE(gpio_switch_##_name##_voltages), \
725                 .num_consumer_supplies =                                \
726                                 ARRAY_SIZE(gpio_switch_##_name##_supply), \
727                 .consumer_supplies = gpio_switch_##_name##_supply,      \
728                 .constraints = {                                        \
729                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
730                                              REGULATOR_MODE_STANDBY),   \
731                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
732                                            REGULATOR_CHANGE_STATUS |    \
733                                            REGULATOR_CHANGE_VOLTAGE),   \
734                         .always_on = _always_on,                        \
735                         .boot_on = _boot_on,                            \
736                 },                                                      \
737                 .enable_rail = _enable,                                 \
738                 .disable_rail = _disable,                               \
739         };                                                              \
740         static struct gpio_switch_regulator_subdev_data                 \
741                                 *gpio_pdata_##_var##_list[] = { \
742                 &gpio_pdata_##_var,                                     \
743         };                                                              \
744         static struct gpio_switch_regulator_platform_data gs_##_var##_pdata = \
745         {                                                               \
746                 .num_subdevs = 1,                                       \
747                 .subdevs = gpio_pdata_##_var##_list,                    \
748         };                                                              \
749         static struct platform_device gswitch_reg_##_var##_dev = {      \
750                 .name = "gpio-switch-regulator",                        \
751                 .id   = _id,                                            \
752                 .dev  = {                                               \
753                      .platform_data = &gs_##_var##_pdata,               \
754                 },                                                      \
755         }
756
757 /* Macro for defining fixed regulator sub device data */
758 #define FIXED_SUPPLY(_name) "fixed_reg_"#_name
759 #define FIXED_REG(_id, _var, _name, _in_supply, _always_on, _boot_on,   \
760                  _gpio_nr, _active_high, _boot_state, _millivolts)      \
761         static struct regulator_init_data ri_data_##_var =              \
762         {                                                               \
763                 .supply_regulator = _in_supply,                         \
764                 .num_consumer_supplies =                                \
765                         ARRAY_SIZE(fixed_reg_##_name##_supply),         \
766                 .consumer_supplies = fixed_reg_##_name##_supply,        \
767                 .constraints = {                                        \
768                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
769                                         REGULATOR_MODE_STANDBY),        \
770                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
771                                         REGULATOR_CHANGE_STATUS |       \
772                                         REGULATOR_CHANGE_VOLTAGE),      \
773                         .always_on = _always_on,                        \
774                         .boot_on = _boot_on,                            \
775                 },                                                      \
776         };                                                              \
777         static struct fixed_voltage_config fixed_reg_##_var##_pdata =   \
778         {                                                               \
779                 .supply_name = FIXED_SUPPLY(_name),                     \
780                 .microvolts = _millivolts * 1000,                       \
781                 .gpio = _gpio_nr,                                       \
782                 .enable_high = _active_high,                            \
783                 .enabled_at_boot = _boot_state,                         \
784                 .init_data = &ri_data_##_var,                           \
785         };                                                              \
786         static struct platform_device fixed_reg_##_var##_dev = {        \
787                 .name   = "reg-fixed-voltage",                          \
788                 .id     = _id,                                          \
789                 .dev    = {                                             \
790                         .platform_data = &fixed_reg_##_var##_pdata,     \
791                 },                                                      \
792         }
793
794 /* common to most of boards*/
795 FIXED_REG(0, en_5v_cp,          en_5v_cp,       NULL,                           1,      0,      TPS6591X_GPIO_0,        true,   1, 5000);
796 FIXED_REG(1, en_5v0,            en_5v0,         NULL,                           0,      0,      TPS6591X_GPIO_2,        true,   0, 5000);
797 FIXED_REG(2, en_ddr,            en_ddr,         NULL,                           1,      0,      TPS6591X_GPIO_6,        true,   1, 1500);
798 FIXED_REG(3, en_3v3_sys,        en_3v3_sys,     NULL,                           0,      0,      TPS6591X_GPIO_7,        true,   1, 3300);
799 FIXED_REG(4, en_vdd_bl,         en_vdd_bl,      NULL,                           0,      0,      TEGRA_GPIO_PK3,         true,   1, 5000);
800 FIXED_REG(5, en_3v3_modem,      en_3v3_modem,   NULL,                           1,      0,      TEGRA_GPIO_PD6,         true,   1, 3300);
801 FIXED_REG(6, en_vdd_pnl1,       en_vdd_pnl1,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PL4,         true,   1, 3300);
802 FIXED_REG(7, cam3_ldo_en,       cam3_ldo_en,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PS0,         true,   0, 3300);
803 FIXED_REG(8, en_vdd_com,        en_vdd_com,     FIXED_SUPPLY(en_3v3_sys),       1,      0,      TEGRA_GPIO_PD0,         true,   1, 3300);
804 FIXED_REG(9, en_3v3_fuse,       en_3v3_fuse,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PL6,         true,   0, 3300);
805 FIXED_REG(10, en_3v3_emmc,      en_3v3_emmc,    FIXED_SUPPLY(en_3v3_sys),       1,      0,      TEGRA_GPIO_PD1,         true,   1, 3300);
806 FIXED_REG(11, en_vdd_sdmmc1,    en_vdd_sdmmc1,  FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PD7,         true,   1, 3300);
807 FIXED_REG(12, en_3v3_pex_hvdd,  en_3v3_pex_hvdd, FIXED_SUPPLY(en_3v3_sys),      0,      0,      TEGRA_GPIO_PL7,         true,   0, 3300);
808 FIXED_REG(13, en_1v8_cam,       en_1v8_cam,     tps6591x_rails(VIO),            0,      0,      TEGRA_GPIO_PBB4,        true,   0, 1800);
809
810 /* Specific to E1187/E1186/E1256 */
811 FIXED_REG(14, dis_5v_switch_e118x,      dis_5v_switch,  FIXED_SUPPLY(en_5v0),   0,      0,      TEGRA_GPIO_PX2,         false,  0, 5000);
812
813 /* E1291-A04/A05 specific */
814 FIXED_REG(1, en_5v0_a04,        en_5v0,         NULL,                           0,      0,      TPS6591X_GPIO_8,        true,   0, 5000);
815 FIXED_REG(2, en_ddr_a04,        en_ddr,         NULL,                           1,      0,      TPS6591X_GPIO_7,        true,   1, 1500);
816 FIXED_REG(3, en_3v3_sys_a04,    en_3v3_sys,     NULL,                           0,      0,      TPS6591X_GPIO_6,        true,   1, 3300);
817
818 /* Specific to pm269 */
819 FIXED_REG(4, en_vdd_bl_pm269,           en_vdd_bl,              NULL,                           0,      0,      TEGRA_GPIO_PH3, true,   1, 5000);
820 #ifndef CONFIG_TEGRA_CARDHU_DSI
821 FIXED_REG(6, en_vdd_pnl1_pm269,         en_vdd_pnl1,            FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PW1, true,   1, 3300);
822 #endif
823 FIXED_REG(9, en_3v3_fuse_pm269,         en_3v3_fuse,            FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PC1, true,   0, 3300);
824 FIXED_REG(12, en_3v3_pex_hvdd_pm269,    en_3v3_pex_hvdd,        FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PC6, true,   0, 3300);
825
826 /* E1198/E1291 specific*/
827 FIXED_REG(18, cam1_ldo_en,      cam1_ldo_en,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PR6,         true,   0, 2800);
828 FIXED_REG(19, cam2_ldo_en,      cam2_ldo_en,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PR7,         true,   0, 2800);
829
830 /* E1291 A03 specific */
831 FIXED_REG(20, en_vdd_bl1_a03,   en_vdd_bl,      NULL,                           0,      0,      TEGRA_GPIO_PDD2,        true,   1, 5000);
832 FIXED_REG(21, en_vdd_bl2_a03,   en_vdd_bl2,     NULL,                           0,      0,      TEGRA_GPIO_PDD0,        true,   1, 5000);
833 FIXED_REG(22, en_vbrtr,         en_vbrtr,       FIXED_SUPPLY(en_3v3_sys),       0,      0,      PMU_TCA6416_GPIO_PORT12,true,   0, 3300);
834
835 /* PM313 display board specific */
836 FIXED_REG(4, en_vdd_bl_pm313,   en_vdd_bl,      NULL,                           0,      0,      TEGRA_GPIO_PK3,         true,  1, 5000);
837 FIXED_REG(6, en_vdd_pnl1_pm313, en_vdd_pnl1,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PH3,         true,  1, 3300);
838
839
840 /****************** Open collector Load switches *******/
841 /*Specific to pm269*/
842 GREG_INIT(17, en_vddio_vid_oc_pm269,    en_vddio_vid_oc,        "master_5v_switch", 0,      0,      TEGRA_GPIO_PP2,     false,  0,      TEGRA_PINGROUP_DAP3_DOUT,
843         enable_load_switch_rail, disable_load_switch_rail);
844
845 /* Specific to pm311 */
846 GREG_INIT(15, en_usb1_vbus_oc_pm311,    en_usb1_vbus_oc,        "master_5v_switch", 0,      0,      TEGRA_GPIO_PCC7,            false,  0,      TEGRA_PINGROUP_GMI_RST_N,
847                 enable_load_switch_rail, disable_load_switch_rail);
848 GREG_INIT(16, en_usb3_vbus_oc_pm311,    en_usb3_vbus_oc,        "master_5v_switch", 0,      0,      TEGRA_GPIO_PCC6,            false,  0,      TEGRA_PINGROUP_GMI_AD15,
849                 enable_load_switch_rail, disable_load_switch_rail);
850
851 /* Specific to E1187/E1186/E1256 */
852 GREG_INIT(15, en_usb1_vbus_oc_e118x,    en_usb1_vbus_oc,        "master_5v_switch", 0,      0,      TEGRA_GPIO_PI4,             false,  0,      TEGRA_PINGROUP_GMI_RST_N,
853                 enable_load_switch_rail, disable_load_switch_rail);
854 GREG_INIT(16, en_usb3_vbus_oc_e118x,    en_usb3_vbus_oc,        "master_5v_switch", 0,      0,      TEGRA_GPIO_PH7,             false,  0,      TEGRA_PINGROUP_GMI_AD15,
855                 enable_load_switch_rail, disable_load_switch_rail);
856 GREG_INIT(17, en_vddio_vid_oc_e118x,    en_vddio_vid_oc,        "master_5v_switch", 0,      0,      TEGRA_GPIO_PT0,             false,  0,      TEGRA_PINGROUP_VI_PCLK,
857                 enable_load_switch_rail, disable_load_switch_rail);
858
859 /* E1198/E1291 specific  fab < A03 */
860 GREG_INIT(15, en_usb1_vbus_oc,          en_usb1_vbus_oc,        "vdd_5v0_sys", 0,      0,      TEGRA_GPIO_PI4,          false,  0,      TEGRA_PINGROUP_GMI_RST_N,
861                 enable_load_switch_rail, disable_load_switch_rail);
862 GREG_INIT(16, en_usb3_vbus_oc,          en_usb3_vbus_oc,        "vdd_5v0_sys", 0,      0,      TEGRA_GPIO_PH7,          false,  0,      TEGRA_PINGROUP_GMI_AD15,
863                 enable_load_switch_rail, disable_load_switch_rail);
864
865 /* E1198/E1291 specific  fab >= A03 */
866 GREG_INIT(15, en_usb1_vbus_oc_a03,      en_usb1_vbus_oc,        "vdd_5v0_sys", 0,      0,      TEGRA_GPIO_PDD6,         false,  0,      TEGRA_PINGROUP_PEX_L1_CLKREQ_N,
867                 enable_load_switch_rail, disable_load_switch_rail);
868 GREG_INIT(16, en_usb3_vbus_oc_a03,      en_usb3_vbus_oc,        "vdd_5v0_sys", 0,      0,      TEGRA_GPIO_PDD4,         false,  0,      TEGRA_PINGROUP_PEX_L1_PRSNT_N,
869                 enable_load_switch_rail, disable_load_switch_rail);
870
871 /* E1198/E1291 specific */
872 GREG_INIT(17, en_vddio_vid_oc,          en_vddio_vid_oc,        "vdd_5v0_sys", 0,      0,      TEGRA_GPIO_PT0,          false,  0,      TEGRA_PINGROUP_VI_PCLK,
873                 enable_load_switch_rail, disable_load_switch_rail);
874
875 /*
876  * Creating the fixed/gpio-switch regulator device tables for different boards
877  */
878 #define ADD_FIXED_REG(_name)    (&fixed_reg_##_name##_dev)
879 #define ADD_GPIO_REG(_name)     (&gswitch_reg_##_name##_dev)
880
881 #define COMMON_FIXED_REG                        \
882         ADD_FIXED_REG(en_5v_cp),                \
883         ADD_FIXED_REG(en_5v0),                  \
884         ADD_FIXED_REG(en_ddr),                  \
885         ADD_FIXED_REG(en_3v3_sys),              \
886         ADD_FIXED_REG(en_3v3_modem),            \
887         ADD_FIXED_REG(en_vdd_pnl1),             \
888         ADD_FIXED_REG(cam3_ldo_en),             \
889         ADD_FIXED_REG(en_vdd_com),              \
890         ADD_FIXED_REG(en_3v3_fuse),             \
891         ADD_FIXED_REG(en_3v3_emmc),             \
892         ADD_FIXED_REG(en_vdd_sdmmc1),           \
893         ADD_FIXED_REG(en_3v3_pex_hvdd),         \
894         ADD_FIXED_REG(en_1v8_cam),
895
896 #define COMMON_FIXED_REG_E1291_A04              \
897         ADD_FIXED_REG(en_5v_cp),                \
898         ADD_FIXED_REG(en_5v0_a04),              \
899         ADD_FIXED_REG(en_ddr_a04),              \
900         ADD_FIXED_REG(en_3v3_sys_a04),          \
901         ADD_FIXED_REG(en_3v3_modem),            \
902         ADD_FIXED_REG(en_vdd_pnl1),             \
903         ADD_FIXED_REG(cam3_ldo_en),             \
904         ADD_FIXED_REG(en_vdd_com),              \
905         ADD_FIXED_REG(en_3v3_fuse),             \
906         ADD_FIXED_REG(en_3v3_emmc),             \
907         ADD_FIXED_REG(en_vdd_sdmmc1),           \
908         ADD_FIXED_REG(en_3v3_pex_hvdd),         \
909         ADD_FIXED_REG(en_1v8_cam),
910
911 #define PM269_FIXED_REG                         \
912         ADD_FIXED_REG(en_5v_cp),                \
913         ADD_FIXED_REG(en_5v0),                  \
914         ADD_FIXED_REG(en_ddr),                  \
915         ADD_FIXED_REG(en_3v3_sys),              \
916         ADD_FIXED_REG(en_3v3_modem),            \
917         ADD_FIXED_REG(cam1_ldo_en),             \
918         ADD_FIXED_REG(cam2_ldo_en),             \
919         ADD_FIXED_REG(cam3_ldo_en),             \
920         ADD_FIXED_REG(en_vdd_com),              \
921         ADD_FIXED_REG(en_3v3_fuse_pm269),       \
922         ADD_FIXED_REG(en_3v3_emmc),             \
923         ADD_FIXED_REG(en_3v3_pex_hvdd_pm269),   \
924         ADD_FIXED_REG(en_1v8_cam),              \
925         ADD_FIXED_REG(dis_5v_switch_e118x),     \
926         ADD_GPIO_REG(en_usb1_vbus_oc_e118x),    \
927         ADD_GPIO_REG(en_usb3_vbus_oc_e118x),    \
928         ADD_GPIO_REG(en_vddio_vid_oc_pm269),
929
930 #define PM311_FIXED_REG                         \
931         ADD_FIXED_REG(en_5v_cp),                \
932         ADD_FIXED_REG(en_5v0),                  \
933         ADD_FIXED_REG(en_ddr),                  \
934         ADD_FIXED_REG(en_3v3_sys),              \
935         ADD_FIXED_REG(en_3v3_modem),            \
936         ADD_FIXED_REG(cam1_ldo_en),             \
937         ADD_FIXED_REG(cam2_ldo_en),             \
938         ADD_FIXED_REG(cam3_ldo_en),             \
939         ADD_FIXED_REG(en_vdd_com),              \
940         ADD_FIXED_REG(en_3v3_fuse_pm269),       \
941         ADD_FIXED_REG(en_3v3_emmc),             \
942         ADD_FIXED_REG(en_3v3_pex_hvdd_pm269),   \
943         ADD_FIXED_REG(en_1v8_cam),              \
944         ADD_FIXED_REG(dis_5v_switch_e118x),     \
945         ADD_GPIO_REG(en_usb1_vbus_oc_pm311),    \
946         ADD_GPIO_REG(en_usb3_vbus_oc_pm311),    \
947         ADD_GPIO_REG(en_vddio_vid_oc_pm269),
948
949
950 #ifndef CONFIG_TEGRA_CARDHU_DSI
951 #define E1247_DISPLAY_FIXED_REG                 \
952         ADD_FIXED_REG(en_vdd_bl_pm269),         \
953         ADD_FIXED_REG(en_vdd_pnl1_pm269),
954 #else
955 #define E1247_DISPLAY_FIXED_REG                 \
956         ADD_FIXED_REG(en_vdd_bl_pm269),
957 #endif
958
959 #define PM313_DISPLAY_FIXED_REG                 \
960         ADD_FIXED_REG(en_vdd_bl_pm313),         \
961         ADD_FIXED_REG(en_vdd_pnl1_pm313),
962
963 #define E118x_FIXED_REG                         \
964         ADD_FIXED_REG(en_5v_cp),                \
965         ADD_FIXED_REG(en_5v0),                  \
966         ADD_FIXED_REG(en_ddr),                  \
967         ADD_FIXED_REG(en_3v3_sys),              \
968         ADD_FIXED_REG(en_3v3_modem),            \
969         ADD_FIXED_REG(cam3_ldo_en),             \
970         ADD_FIXED_REG(en_vdd_com),              \
971         ADD_FIXED_REG(en_3v3_fuse),             \
972         ADD_FIXED_REG(en_3v3_emmc),             \
973         ADD_FIXED_REG(en_vdd_sdmmc1),           \
974         ADD_FIXED_REG(en_3v3_pex_hvdd),         \
975         ADD_FIXED_REG(en_1v8_cam),              \
976         ADD_FIXED_REG(dis_5v_switch_e118x),     \
977         ADD_FIXED_REG(en_vbrtr),                \
978         ADD_GPIO_REG(en_usb1_vbus_oc_e118x),    \
979         ADD_GPIO_REG(en_usb3_vbus_oc_e118x),    \
980         ADD_GPIO_REG(en_vddio_vid_oc_e118x),
981
982 #define E1198_FIXED_REG                         \
983         ADD_FIXED_REG(cam1_ldo_en),             \
984         ADD_FIXED_REG(cam2_ldo_en),             \
985         ADD_GPIO_REG(en_vddio_vid_oc),
986
987 #define E1291_1198_A00_FIXED_REG                \
988         ADD_FIXED_REG(en_vdd_bl),               \
989         ADD_GPIO_REG(en_usb1_vbus_oc),          \
990         ADD_GPIO_REG(en_usb3_vbus_oc),
991
992 #define E1291_A03_FIXED_REG                     \
993         ADD_FIXED_REG(en_vdd_bl1_a03),          \
994         ADD_FIXED_REG(en_vdd_bl2_a03),          \
995         ADD_GPIO_REG(en_usb1_vbus_oc_a03),      \
996         ADD_GPIO_REG(en_usb3_vbus_oc_a03),
997
998 /* Fixed regulator devices for E1186/E1187/E1256 */
999 static struct platform_device *fixed_reg_devs_e118x[] = {
1000         E118x_FIXED_REG
1001         E1247_DISPLAY_FIXED_REG
1002 };
1003
1004 /* Fixed regulator devices for E1186/E1187/E1256 */
1005 static struct platform_device *fixed_reg_devs_e118x_pm313[] = {
1006         E118x_FIXED_REG
1007         PM313_DISPLAY_FIXED_REG
1008 };
1009
1010 /* Fixed regulator devices for E1198 and E1291 */
1011 static struct platform_device *fixed_reg_devs_e1198_base[] = {
1012         COMMON_FIXED_REG
1013         E1291_1198_A00_FIXED_REG
1014         E1198_FIXED_REG
1015 };
1016
1017 static struct platform_device *fixed_reg_devs_e1198_a02[] = {
1018         ADD_FIXED_REG(en_5v_cp),
1019         ADD_FIXED_REG(en_5v0),
1020         ADD_FIXED_REG(en_ddr_a04),
1021         ADD_FIXED_REG(en_3v3_sys_a04),
1022         ADD_FIXED_REG(en_3v3_modem),
1023         ADD_FIXED_REG(en_vdd_pnl1),
1024         ADD_FIXED_REG(cam3_ldo_en),
1025         ADD_FIXED_REG(en_vdd_com),
1026         ADD_FIXED_REG(en_3v3_fuse),
1027         ADD_FIXED_REG(en_3v3_emmc),
1028         ADD_FIXED_REG(en_vdd_sdmmc1),
1029         ADD_FIXED_REG(en_3v3_pex_hvdd),
1030         ADD_FIXED_REG(en_1v8_cam),
1031         ADD_FIXED_REG(en_vdd_bl1_a03),
1032         ADD_FIXED_REG(en_vdd_bl2_a03),
1033         ADD_FIXED_REG(cam1_ldo_en),
1034         ADD_FIXED_REG(cam2_ldo_en),
1035         ADD_GPIO_REG(en_usb1_vbus_oc_a03),
1036         ADD_GPIO_REG(en_usb3_vbus_oc_a03),
1037         ADD_GPIO_REG(en_vddio_vid_oc),
1038 };
1039
1040 /* Fixed regulator devices for PM269 */
1041 static struct platform_device *fixed_reg_devs_pm269[] = {
1042         PM269_FIXED_REG
1043         E1247_DISPLAY_FIXED_REG
1044 };
1045
1046 /* Fixed regulator devices for PM269 */
1047 static struct platform_device *fixed_reg_devs_pm269_pm313[] = {
1048         PM269_FIXED_REG
1049         PM313_DISPLAY_FIXED_REG
1050 };
1051
1052 /* Fixed regulator devices for PM311 */
1053 static struct platform_device *fixed_reg_devs_pm311[] = {
1054         PM311_FIXED_REG
1055         E1247_DISPLAY_FIXED_REG
1056 };
1057
1058 /* Fixed regulator devices for PM11 */
1059 static struct platform_device *fixed_reg_devs_pm311_pm313[] = {
1060         PM311_FIXED_REG
1061         PM313_DISPLAY_FIXED_REG
1062 };
1063
1064 /* Fixed regulator devices for E1291 A03 */
1065 static struct platform_device *fixed_reg_devs_e1291_a03[] = {
1066         COMMON_FIXED_REG
1067         E1291_A03_FIXED_REG
1068         E1198_FIXED_REG
1069 };
1070
1071 /* Fixed regulator devices for E1291 A04/A05 */
1072 static struct platform_device *fixed_reg_devs_e1291_a04[] = {
1073         COMMON_FIXED_REG_E1291_A04
1074         E1291_A03_FIXED_REG
1075         E1198_FIXED_REG
1076 };
1077
1078 int __init cardhu_fixed_regulator_init(void)
1079 {
1080         int i;
1081         struct board_info board_info;
1082         struct board_info pmu_board_info;
1083         struct board_info display_board_info;
1084         struct platform_device **fixed_reg_devs;
1085         int    nfixreg_devs;
1086
1087         if (!machine_is_cardhu())
1088                 return 0;
1089
1090         tegra_get_board_info(&board_info);
1091         tegra_get_pmu_board_info(&pmu_board_info);
1092         tegra_get_display_board_info(&display_board_info);
1093
1094         if (pmu_board_info.board_id == BOARD_PMU_PM298)
1095                 return cardhu_pm298_gpio_switch_regulator_init();
1096
1097         if (pmu_board_info.board_id == BOARD_PMU_PM299)
1098                 return cardhu_pm299_gpio_switch_regulator_init();
1099
1100         switch (board_info.board_id) {
1101         case BOARD_E1198:
1102                 if (board_info.fab <= BOARD_FAB_A01) {
1103                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1198_base);
1104                         fixed_reg_devs = fixed_reg_devs_e1198_base;
1105                 } else {
1106                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1198_a02);
1107                         fixed_reg_devs = fixed_reg_devs_e1198_a02;
1108                 }
1109                 break;
1110
1111         case BOARD_E1291:
1112                 if (board_info.fab == BOARD_FAB_A03) {
1113                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1291_a03);
1114                         fixed_reg_devs = fixed_reg_devs_e1291_a03;
1115                 } else if ((board_info.fab == BOARD_FAB_A04) ||
1116                                 (board_info.fab == BOARD_FAB_A05)) {
1117                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1291_a04);
1118                         fixed_reg_devs = fixed_reg_devs_e1291_a04;
1119                 } else {
1120                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1198_base);
1121                         fixed_reg_devs = fixed_reg_devs_e1198_base;
1122                 }
1123                 break;
1124
1125         case BOARD_PM311:
1126         case BOARD_PM305:
1127                 nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm311);
1128                 fixed_reg_devs = fixed_reg_devs_pm311;
1129                 if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
1130                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm311_pm313);
1131                         fixed_reg_devs = fixed_reg_devs_pm311_pm313;
1132                 }
1133                 break;
1134
1135         case BOARD_PM269:
1136         case BOARD_E1257:
1137                 nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm269);
1138                 fixed_reg_devs = fixed_reg_devs_pm269;
1139                 if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
1140                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm269_pm313);
1141                         fixed_reg_devs = fixed_reg_devs_pm269_pm313;
1142                 } else {
1143                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm269);
1144                         fixed_reg_devs = fixed_reg_devs_pm269;
1145                 }
1146                 break;
1147
1148         default:
1149                 if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
1150                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e118x_pm313);
1151                         fixed_reg_devs = fixed_reg_devs_e118x_pm313;
1152                 } else {
1153                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e118x);
1154                         fixed_reg_devs = fixed_reg_devs_e118x;
1155                 }
1156                 break;
1157         }
1158
1159         for (i = 0; i < nfixreg_devs; ++i) {
1160                 int gpio_nr;
1161                 if (!strncmp(fixed_reg_devs[i]->name, "gpio", 4)) {
1162                         struct gpio_switch_regulator_platform_data *gs_pdata =
1163                                 fixed_reg_devs[i]->dev.platform_data;
1164                         gpio_nr = gs_pdata->subdevs[0]->gpio_nr;
1165                 } else {
1166                         struct fixed_voltage_config *fixed_reg_pdata =
1167                                 fixed_reg_devs[i]->dev.platform_data;
1168                         gpio_nr = fixed_reg_pdata->gpio;
1169                 }
1170
1171                 if (gpio_nr < TEGRA_NR_GPIOS)
1172                         tegra_gpio_enable(gpio_nr);
1173         }
1174         return platform_add_devices(fixed_reg_devs, nfixreg_devs);
1175 }
1176 subsys_initcall_sync(cardhu_fixed_regulator_init);
1177
1178 static void cardhu_board_suspend(int lp_state, enum suspend_stage stg)
1179 {
1180         if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_SUSPEND_BEFORE_CPU))
1181                 tegra_console_uart_suspend();
1182 }
1183
1184 static void cardhu_board_resume(int lp_state, enum resume_stage stg)
1185 {
1186         if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_RESUME_AFTER_CPU))
1187                 tegra_console_uart_resume();
1188 }
1189
1190 static struct tegra_suspend_platform_data cardhu_suspend_data = {
1191         .cpu_timer      = 2000,
1192         .cpu_off_timer  = 200,
1193         .suspend_mode   = TEGRA_SUSPEND_LP0,
1194         .core_timer     = 0x7e7e,
1195         .core_off_timer = 0,
1196         .corereq_high   = true,
1197         .sysclkreq_high = true,
1198         .cpu_lp2_min_residency = 2000,
1199         .board_suspend = cardhu_board_suspend,
1200         .board_resume = cardhu_board_resume,
1201 };
1202
1203 int __init cardhu_suspend_init(void)
1204 {
1205         struct board_info board_info;
1206         struct board_info pmu_board_info;
1207
1208         tegra_get_board_info(&board_info);
1209         tegra_get_pmu_board_info(&pmu_board_info);
1210
1211         /* For PMU Fab A03, A04 and A05 make core_pwr_req to high */
1212         if ((pmu_board_info.fab == BOARD_FAB_A03) ||
1213                 (pmu_board_info.fab == BOARD_FAB_A04) ||
1214                  (pmu_board_info.fab == BOARD_FAB_A05))
1215                 cardhu_suspend_data.corereq_high = true;
1216
1217         /* CORE_PWR_REQ to be high for all processor/pmu board whose sku bit 0
1218          * is set. This is require to enable the dc-dc converter tps62361x */
1219         if ((board_info.sku & SKU_DCDC_TPS62361_SUPPORT) || (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT))
1220                 cardhu_suspend_data.corereq_high = true;
1221
1222         switch (board_info.board_id) {
1223         case BOARD_E1291:
1224                 /* CORE_PWR_REQ to be high for E1291-A03 */
1225                 if (board_info.fab == BOARD_FAB_A03)
1226                         cardhu_suspend_data.corereq_high = true;
1227                 break;
1228         case BOARD_E1198:
1229         case BOARD_PM269:
1230         case BOARD_PM305:
1231         case BOARD_PM311:
1232                 break;
1233         case BOARD_E1187:
1234         case BOARD_E1186:
1235         case BOARD_E1256:
1236         case BOARD_E1257:
1237                 cardhu_suspend_data.cpu_timer = 5000;
1238                 cardhu_suspend_data.cpu_off_timer = 5000;
1239                 break;
1240         default:
1241                 break;
1242         }
1243
1244         tegra_init_suspend(&cardhu_suspend_data);
1245         return 0;
1246 }
1247
1248 static struct tegra_tsensor_pmu_data  tpdata = {
1249         .poweroff_reg_addr = 0x3F,
1250         .poweroff_reg_data = 0x80,
1251         .reset_tegra = 1,
1252         .controller_type = 0,
1253         .i2c_controller_id = 4,
1254         .pinmux = 0,
1255         .pmu_16bit_ops = 0,
1256         .pmu_i2c_addr = 0x2D,
1257 };
1258
1259 #ifdef CONFIG_TEGRA_EDP_LIMITS
1260
1261 int __init cardhu_edp_init(void)
1262 {
1263         unsigned int regulator_mA;
1264
1265         regulator_mA = get_maximum_cpu_current_supported();
1266         if (!regulator_mA) {
1267                 regulator_mA = 6000; /* regular T30/s */
1268         }
1269         pr_info("%s: CPU regulator %d mA\n", __func__, regulator_mA);
1270
1271         tegra_init_cpu_edp_limits(regulator_mA);
1272         return 0;
1273 }
1274 #endif
1275
1276 static char *cardhu_battery[] = {
1277         "bq27510-0",
1278 };
1279
1280 static struct gpio_charger_platform_data cardhu_charger_pdata = {
1281         .name = "ac",
1282         .type = POWER_SUPPLY_TYPE_MAINS,
1283         .gpio = AC_PRESENT_GPIO,
1284         .gpio_active_low = 0,
1285         .supplied_to = cardhu_battery,
1286         .num_supplicants = ARRAY_SIZE(cardhu_battery),
1287 };
1288
1289 static struct platform_device cardhu_charger_device = {
1290         .name = "gpio-charger",
1291         .dev = {
1292                 .platform_data = &cardhu_charger_pdata,
1293         },
1294 };
1295
1296 static int __init cardhu_charger_late_init(void)
1297 {
1298         if (!machine_is_cardhu())
1299                 return 0;
1300
1301         platform_device_register(&cardhu_charger_device);
1302         return 0;
1303 }
1304
1305 late_initcall(cardhu_charger_late_init);