arm: tegra: cardhu: add support for PM315
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu-power.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu-power.c
3  *
4  * Copyright (C) 2011-2012, NVIDIA Corporation. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
18  * 02111-1307, USA
19  */
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/regulator/machine.h>
25 #include <linux/mfd/tps6591x.h>
26 #include <linux/mfd/max77663-core.h>
27 #include <linux/gpio.h>
28 #include <linux/io.h>
29 #include <linux/regulator/fixed.h>
30 #include <linux/regulator/tps6591x-regulator.h>
31 #include <linux/regulator/tps62360.h>
32 #include <linux/power/gpio-charger.h>
33
34 #include <asm/mach-types.h>
35
36 #include <mach/iomap.h>
37 #include <mach/irqs.h>
38 #include <mach/pinmux.h>
39 #include <mach/edp.h>
40 #include <mach/gpio-tegra.h>
41 #include <mach/pinmux-tegra30.h>
42
43 #include "gpio-names.h"
44 #include "board.h"
45 #include "board-cardhu.h"
46 #include "pm.h"
47 #include "wakeups-t3.h"
48 #include "pm-irq.h"
49
50 #define PMC_CTRL                0x0
51 #define PMC_CTRL_INTR_LOW       (1 << 17)
52
53 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_0[] = {
54         REGULATOR_SUPPLY("vdd_core", NULL),
55         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
56 };
57
58 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_1[] = {
59         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
60 };
61
62 static struct regulator_consumer_supply tps6591x_vdd2_supply_0[] = {
63         REGULATOR_SUPPLY("vdd_gen1v5", NULL),
64         REGULATOR_SUPPLY("vcore_lcd", NULL),
65         REGULATOR_SUPPLY("track_ldo1", NULL),
66         REGULATOR_SUPPLY("external_ldo_1v2", NULL),
67         REGULATOR_SUPPLY("vcore_cam1", NULL),
68         REGULATOR_SUPPLY("vcore_cam2", NULL),
69 };
70
71 static struct regulator_consumer_supply tps6591x_vddctrl_supply_0[] = {
72         REGULATOR_SUPPLY("vdd_cpu_pmu", NULL),
73         REGULATOR_SUPPLY("vdd_cpu", NULL),
74         REGULATOR_SUPPLY("vdd_sys", NULL),
75 };
76
77 static struct regulator_consumer_supply tps6591x_vio_supply_0[] = {
78         REGULATOR_SUPPLY("vdd_gen1v8", NULL),
79         REGULATOR_SUPPLY("avdd_hdmi_pll", NULL),
80         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-udc.0"),
81         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.0"),
82         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.1"),
83         REGULATOR_SUPPLY("avdd_usb_pll", "tegra-ehci.2"),
84         REGULATOR_SUPPLY("avdd_osc", NULL),
85         REGULATOR_SUPPLY("vddio_sys", NULL),
86         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
87         REGULATOR_SUPPLY("pwrdet_sdmmc4", NULL),
88         REGULATOR_SUPPLY("vdd1v8_satelite", NULL),
89         REGULATOR_SUPPLY("vddio_uart", NULL),
90         REGULATOR_SUPPLY("pwrdet_uart", NULL),
91         REGULATOR_SUPPLY("vddio_audio", NULL),
92         REGULATOR_SUPPLY("pwrdet_audio", NULL),
93         REGULATOR_SUPPLY("vddio_bb", NULL),
94         REGULATOR_SUPPLY("pwrdet_bb", NULL),
95         REGULATOR_SUPPLY("vddio_lcd_pmu", NULL),
96         REGULATOR_SUPPLY("pwrdet_lcd", NULL),
97         REGULATOR_SUPPLY("vddio_cam", NULL),
98         REGULATOR_SUPPLY("pwrdet_cam", NULL),
99         REGULATOR_SUPPLY("vddio_vi", NULL),
100         REGULATOR_SUPPLY("pwrdet_vi", NULL),
101         REGULATOR_SUPPLY("ldo6", NULL),
102         REGULATOR_SUPPLY("ldo7", NULL),
103         REGULATOR_SUPPLY("ldo8", NULL),
104         REGULATOR_SUPPLY("vcore_audio", NULL),
105         REGULATOR_SUPPLY("avcore_audio", NULL),
106         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
107         REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
108         REGULATOR_SUPPLY("vcore1_lpddr2", NULL),
109         REGULATOR_SUPPLY("vcom_1v8", NULL),
110         REGULATOR_SUPPLY("pmuio_1v8", NULL),
111         REGULATOR_SUPPLY("avdd_ic_usb", NULL),
112         REGULATOR_SUPPLY("vlogic", "2-0068"),
113 };
114
115 static struct regulator_consumer_supply tps6591x_ldo1_supply_0[] = {
116         REGULATOR_SUPPLY("avdd_pexb", NULL),
117         REGULATOR_SUPPLY("vdd_pexb", NULL),
118         REGULATOR_SUPPLY("avdd_pex_pll", NULL),
119         REGULATOR_SUPPLY("avdd_pexa", NULL),
120         REGULATOR_SUPPLY("vdd_pexa", NULL),
121 };
122
123 static struct regulator_consumer_supply tps6591x_ldo2_supply_0[] = {
124         REGULATOR_SUPPLY("avdd_sata", NULL),
125         REGULATOR_SUPPLY("vdd_sata", NULL),
126         REGULATOR_SUPPLY("avdd_sata_pll", NULL),
127         REGULATOR_SUPPLY("avdd_plle", NULL),
128 };
129
130 static struct regulator_consumer_supply tps6591x_ldo3_supply_e118x[] = {
131         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
132         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
133 };
134
135 static struct regulator_consumer_supply tps6591x_ldo3_supply_e1198[] = {
136         REGULATOR_SUPPLY("unused_rail_ldo3", NULL),
137 };
138
139 static struct regulator_consumer_supply tps6591x_ldo4_supply_0[] = {
140         REGULATOR_SUPPLY("vdd_rtc", NULL),
141 };
142
143 static struct regulator_consumer_supply tps6591x_ldo5_supply_e118x[] = {
144         REGULATOR_SUPPLY("avdd_vdac", NULL),
145 };
146
147 static struct regulator_consumer_supply tps6591x_ldo5_supply_e1198[] = {
148         REGULATOR_SUPPLY("avdd_vdac", NULL),
149         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
150         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
151 };
152
153 static struct regulator_consumer_supply tps6591x_ldo6_supply_0[] = {
154         REGULATOR_SUPPLY("avdd_dsi_csi", NULL),
155         REGULATOR_SUPPLY("pwrdet_mipi", NULL),
156 };
157 static struct regulator_consumer_supply tps6591x_ldo7_supply_0[] = {
158         REGULATOR_SUPPLY("avdd_plla_p_c_s", NULL),
159         REGULATOR_SUPPLY("avdd_pllm", NULL),
160         REGULATOR_SUPPLY("avdd_pllu_d", NULL),
161         REGULATOR_SUPPLY("avdd_pllu_d2", NULL),
162         REGULATOR_SUPPLY("avdd_pllx", NULL),
163 };
164
165 static struct regulator_consumer_supply tps6591x_ldo8_supply_0[] = {
166         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
167 };
168
169 #define TPS_PDATA_INIT(_name, _sname, _minmv, _maxmv, _supply_reg, _always_on, \
170         _boot_on, _apply_uv, _init_uV, _init_enable, _init_apply, _ectrl, _flags) \
171         static struct tps6591x_regulator_platform_data pdata_##_name##_##_sname = \
172         {                                                               \
173                 .regulator = {                                          \
174                         .constraints = {                                \
175                                 .min_uV = (_minmv)*1000,                \
176                                 .max_uV = (_maxmv)*1000,                \
177                                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
178                                                      REGULATOR_MODE_STANDBY), \
179                                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
180                                                    REGULATOR_CHANGE_STATUS |  \
181                                                    REGULATOR_CHANGE_VOLTAGE), \
182                                 .always_on = _always_on,                \
183                                 .boot_on = _boot_on,                    \
184                                 .apply_uV = _apply_uv,                  \
185                         },                                              \
186                         .num_consumer_supplies =                        \
187                                 ARRAY_SIZE(tps6591x_##_name##_supply_##_sname), \
188                         .consumer_supplies = tps6591x_##_name##_supply_##_sname,        \
189                         .supply_regulator = _supply_reg,                \
190                 },                                                      \
191                 .init_uV =  _init_uV * 1000,                            \
192                 .init_enable = _init_enable,                            \
193                 .init_apply = _init_apply,                              \
194                 .ectrl = _ectrl,                                        \
195                 .flags = _flags,                                        \
196         }
197
198 TPS_PDATA_INIT(vdd1, skubit0_0, 600,  1500, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF, 0);
199 TPS_PDATA_INIT(vdd1, skubit0_1, 600,  1500, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF, 0);
200 TPS_PDATA_INIT(vdd2, 0,         600,  1500, 0, 0, 1, 0, -1, 0, 0, 0, 0);
201 TPS_PDATA_INIT(vddctrl, 0,      600,  1400, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_EN1, 0);
202 TPS_PDATA_INIT(vio,  0,         1500, 3300, 0, 1, 1, 0, -1, 0, 0, 0, 0);
203
204 TPS_PDATA_INIT(ldo1, 0,         1000, 3300, tps6591x_rails(VDD_2), 0, 0, 0, -1, 0, 1, 0, 0);
205 TPS_PDATA_INIT(ldo2, 0,         1050, 1050, tps6591x_rails(VDD_2), 0, 0, 1, -1, 0, 1, 0, 0);
206
207 TPS_PDATA_INIT(ldo3, e118x,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
208 TPS_PDATA_INIT(ldo3, e1198,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
209 TPS_PDATA_INIT(ldo4, 0,         1000, 3300, 0, 1, 0, 0, -1, 0, 0, 0, 0);
210 TPS_PDATA_INIT(ldo5, e118x,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
211 TPS_PDATA_INIT(ldo5, e1198,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
212
213 TPS_PDATA_INIT(ldo6, 0,         1200, 1200, tps6591x_rails(VIO), 0, 0, 1, -1, 0, 0, 0, 0);
214 TPS_PDATA_INIT(ldo7, 0,         1200, 1200, tps6591x_rails(VIO), 1, 1, 1, -1, 0, 0, EXT_CTRL_SLEEP_OFF, LDO_LOW_POWER_ON_SUSPEND);
215 TPS_PDATA_INIT(ldo8, 0,         1000, 3300, tps6591x_rails(VIO), 1, 0, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF, LDO_LOW_POWER_ON_SUSPEND);
216
217 #if defined(CONFIG_RTC_DRV_TPS6591x)
218 static struct tps6591x_rtc_platform_data rtc_data = {
219         .irq = TEGRA_NR_IRQS + TPS6591X_INT_RTC_ALARM,
220         .time = {
221                 .tm_year = 2000,
222                 .tm_mon = 0,
223                 .tm_mday = 1,
224                 .tm_hour = 0,
225                 .tm_min = 0,
226                 .tm_sec = 0,
227         },
228 };
229
230 #define TPS_RTC_REG()                                   \
231         {                                               \
232                 .id     = 0,                            \
233                 .name   = "rtc_tps6591x",               \
234                 .platform_data = &rtc_data,             \
235         }
236 #endif
237
238 #define TPS_REG(_id, _name, _sname)                             \
239         {                                                       \
240                 .id     = TPS6591X_ID_##_id,                    \
241                 .name   = "tps6591x-regulator",                 \
242                 .platform_data  = &pdata_##_name##_##_sname,    \
243         }
244
245 #define TPS6591X_DEV_COMMON_E118X               \
246         TPS_REG(VDD_2, vdd2, 0),                \
247         TPS_REG(VDDCTRL, vddctrl, 0),           \
248         TPS_REG(LDO_1, ldo1, 0),                \
249         TPS_REG(LDO_2, ldo2, 0),                \
250         TPS_REG(LDO_3, ldo3, e118x),            \
251         TPS_REG(LDO_4, ldo4, 0),                \
252         TPS_REG(LDO_5, ldo5, e118x),            \
253         TPS_REG(LDO_6, ldo6, 0),                \
254         TPS_REG(LDO_7, ldo7, 0),                \
255         TPS_REG(LDO_8, ldo8, 0)
256
257 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_0[] = {
258         TPS_REG(VIO, vio, 0),
259         TPS_REG(VDD_1, vdd1, skubit0_0),
260         TPS6591X_DEV_COMMON_E118X,
261 #if defined(CONFIG_RTC_DRV_TPS6591x)
262         TPS_RTC_REG(),
263 #endif
264 };
265
266 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_1[] = {
267         TPS_REG(VIO, vio, 0),
268         TPS_REG(VDD_1, vdd1, skubit0_1),
269         TPS6591X_DEV_COMMON_E118X,
270 #if defined(CONFIG_RTC_DRV_TPS6591x)
271         TPS_RTC_REG(),
272 #endif
273 };
274
275 #define TPS6591X_DEV_COMMON_CARDHU              \
276         TPS_REG(VDD_2, vdd2, 0),                \
277         TPS_REG(VDDCTRL, vddctrl, 0),           \
278         TPS_REG(LDO_1, ldo1, 0),                \
279         TPS_REG(LDO_2, ldo2, 0),                \
280         TPS_REG(LDO_3, ldo3, e1198),            \
281         TPS_REG(LDO_4, ldo4, 0),                \
282         TPS_REG(LDO_5, ldo5, e1198),            \
283         TPS_REG(LDO_6, ldo6, 0),                \
284         TPS_REG(LDO_7, ldo7, 0),                \
285         TPS_REG(LDO_8, ldo8, 0)
286
287 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_0[] = {
288         TPS_REG(VIO, vio, 0),
289         TPS_REG(VDD_1, vdd1, skubit0_0),
290         TPS6591X_DEV_COMMON_CARDHU,
291 #if defined(CONFIG_RTC_DRV_TPS6591x)
292         TPS_RTC_REG(),
293 #endif
294 };
295
296 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_1[] = {
297         TPS_REG(VIO, vio, 0),
298         TPS_REG(VDD_1, vdd1, skubit0_1),
299         TPS6591X_DEV_COMMON_CARDHU,
300 #if defined(CONFIG_RTC_DRV_TPS6591x)
301         TPS_RTC_REG(),
302 #endif
303 };
304
305 #define TPS_GPIO_INIT_PDATA(gpio_nr, _init_apply, _sleep_en, _pulldn_en, _output_en, _output_val)       \
306         [gpio_nr] = {                                   \
307                         .sleep_en       = _sleep_en,    \
308                         .pulldn_en      = _pulldn_en,   \
309                         .output_mode_en = _output_en,   \
310                         .output_val     = _output_val,  \
311                         .init_apply     = _init_apply,  \
312                      }
313 static struct tps6591x_gpio_init_data tps_gpio_pdata_e1291_a04[] =  {
314         TPS_GPIO_INIT_PDATA(0, 0, 0, 0, 0, 0),
315         TPS_GPIO_INIT_PDATA(1, 0, 0, 0, 0, 0),
316         TPS_GPIO_INIT_PDATA(2, 1, 1, 0, 1, 1),
317         TPS_GPIO_INIT_PDATA(3, 0, 0, 0, 0, 0),
318         TPS_GPIO_INIT_PDATA(4, 0, 0, 0, 0, 0),
319         TPS_GPIO_INIT_PDATA(5, 0, 0, 0, 0, 0),
320         TPS_GPIO_INIT_PDATA(6, 0, 0, 0, 0, 0),
321         TPS_GPIO_INIT_PDATA(7, 0, 0, 0, 0, 0),
322         TPS_GPIO_INIT_PDATA(8, 0, 0, 0, 0, 0),
323 };
324
325 static struct tps6591x_sleep_keepon_data tps_slp_keepon = {
326         .clkout32k_keepon = 1,
327 };
328
329 #define TPS_PUP_INIT_DATA(_pup_num, _pin_id, _pup_val)          \
330         [_pup_num]      =       {                               \
331                                         .pin_id = _pin_id,      \
332                                         .pup_val = _pup_val,    \
333                                 }
334
335 struct tps6591x_pup_init_data tps_pup_vals[] = {
336         TPS_PUP_INIT_DATA(0, TPS6591X_PUP_NRESPWRON2P, TPS6591X_PUP_DEFAULT),
337         TPS_PUP_INIT_DATA(1, TPS6591X_PUP_HDRSTP, TPS6591X_PUP_DEFAULT),
338         TPS_PUP_INIT_DATA(2, TPS6591X_PUP_PWRHOLDP, TPS6591X_PUP_DEFAULT),
339         TPS_PUP_INIT_DATA(3, TPS6591X_PUP_SLEEPP, TPS6591X_PUP_DIS),
340         TPS_PUP_INIT_DATA(4, TPS6591X_PUP_PWRONP, TPS6591X_PUP_DEFAULT),
341         TPS_PUP_INIT_DATA(5, TPS6591X_PUP_I2CSRP, TPS6591X_PUP_DEFAULT),
342         TPS_PUP_INIT_DATA(6, TPS6591X_PUP_I2CCTLP, TPS6591X_PUP_DEFAULT),
343 };
344
345 static struct tps6591x_platform_data tps_platform = {
346         .irq_base       = TPS6591X_IRQ_BASE,
347         .gpio_base      = TPS6591X_GPIO_BASE,
348         .dev_slp_en     = true,
349         .slp_keepon     = &tps_slp_keepon,
350         .use_power_off  = true,
351         .pup_data       = tps_pup_vals,
352         .num_pins       = ARRAY_SIZE(tps_pup_vals),
353 };
354
355 static struct i2c_board_info __initdata cardhu_regulators[] = {
356         {
357                 I2C_BOARD_INFO("tps6591x", 0x2D),
358                 .irq            = INT_EXTERNAL_PMU,
359                 .platform_data  = &tps_platform,
360         },
361 };
362
363 /* TPS62361B DC-DC converter */
364 static struct regulator_consumer_supply tps62361_dcdc_supply[] = {
365         REGULATOR_SUPPLY("vdd_core", NULL),
366 };
367
368 static struct tps62360_regulator_platform_data tps62361_pdata = {
369         .reg_init_data = {                                      \
370                 .constraints = {                                \
371                         .min_uV = 500000,                       \
372                         .max_uV = 1770000,                      \
373                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
374                                              REGULATOR_MODE_STANDBY), \
375                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
376                                            REGULATOR_CHANGE_STATUS |  \
377                                            REGULATOR_CHANGE_VOLTAGE), \
378                         .always_on = 1,                         \
379                         .boot_on =  1,                          \
380                         .apply_uV = 0,                          \
381                 },                                              \
382                 .num_consumer_supplies = ARRAY_SIZE(tps62361_dcdc_supply), \
383                 .consumer_supplies = tps62361_dcdc_supply,      \
384                 },                                              \
385         .en_discharge = true,                                   \
386         .vsel0_gpio = -1,                                       \
387         .vsel1_gpio = -1,                                       \
388         .vsel0_def_state = 1,                                   \
389         .vsel1_def_state = 1,                                   \
390 };
391
392 static struct i2c_board_info __initdata tps62361_boardinfo[] = {
393         {
394                 I2C_BOARD_INFO("tps62361", 0x60),
395                 .platform_data  = &tps62361_pdata,
396         },
397 };
398
399 int __init cardhu_regulator_init(void)
400 {
401         struct board_info board_info;
402         struct board_info pmu_board_info;
403         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
404         u32 pmc_ctrl;
405         bool ext_core_regulator = false;
406
407         /* configure the power management controller to trigger PMU
408          * interrupts when low */
409
410         pmc_ctrl = readl(pmc + PMC_CTRL);
411         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
412
413         tegra_get_board_info(&board_info);
414         tegra_get_pmu_board_info(&pmu_board_info);
415
416         if (pmu_board_info.board_id == BOARD_PMU_PM298)
417                 return cardhu_pm298_regulator_init();
418
419         if (pmu_board_info.board_id == BOARD_PMU_PM299)
420                 return cardhu_pm299_regulator_init();
421
422         /* The regulator details have complete constraints */
423         regulator_has_full_constraints();
424
425         /* PMU-E1208, the ldo2 should be set to 1200mV */
426         if (pmu_board_info.board_id == BOARD_E1208) {
427                 pdata_ldo2_0.regulator.constraints.min_uV = 1200000;
428                 pdata_ldo2_0.regulator.constraints.max_uV = 1200000;
429         }
430
431         /*
432          * E1198 will have different core regulator decoding.
433          * A01/A02: Based on sku bit 0.
434          * A03: Based on bit 2 and bit 0
435          *       2,0: 00 no core regulator,
436          *            01:TPS62365
437          *            10:TPS62366
438          *            11:TPS623850
439          */
440         if (board_info.board_id == BOARD_E1198) {
441                 int vsels;
442                 switch(board_info.fab) {
443                 case BOARD_FAB_A00:
444                 case BOARD_FAB_A01:
445                 case BOARD_FAB_A02:
446                         if (board_info.sku & SKU_DCDC_TPS62361_SUPPORT)
447                                 ext_core_regulator = true;
448                         break;
449
450                 case BOARD_FAB_A03:
451                         vsels = ((board_info.sku >> 1) & 0x2) | (board_info.sku & 1);
452                         switch(vsels) {
453                         case 1:
454                                 ext_core_regulator = true;
455                                 tps62361_pdata.vsel0_def_state = 1;
456                                 tps62361_pdata.vsel1_def_state = 1;
457                                 break;
458                         case 2:
459                                 ext_core_regulator = true;
460                                 tps62361_pdata.vsel0_def_state = 0;
461                                 tps62361_pdata.vsel1_def_state = 0;
462                                 break;
463                         case 3:
464                                 ext_core_regulator = true;
465                                 tps62361_pdata.vsel0_def_state = 1;
466                                 tps62361_pdata.vsel1_def_state = 0;
467                                 break;
468                         }
469                         break;
470                 }
471
472                 pr_info("BoardId:SKU:Fab 0x%04x:0x%04x:0x%02x\n",
473                         board_info.board_id, board_info.sku , board_info.fab);
474                 pr_info("Core regulator %s\n",
475                         (ext_core_regulator)? "true": "false");
476                 pr_info("VSEL 1:0 %d%d\n",
477                         tps62361_pdata.vsel1_def_state,
478                         tps62361_pdata.vsel0_def_state);
479         }
480
481         if (((board_info.board_id == BOARD_E1291) ||
482              (board_info.board_id == BOARD_PM315)) &&
483                 (board_info.sku & SKU_DCDC_TPS62361_SUPPORT))
484                 ext_core_regulator = true;
485
486         if ((board_info.board_id == BOARD_E1198) ||
487                 (board_info.board_id == BOARD_E1291) ||
488                 (board_info.board_id == BOARD_PM315)) {
489                 if (ext_core_regulator) {
490                         tps_platform.num_subdevs =
491                                         ARRAY_SIZE(tps_devs_e1198_skubit0_1);
492                         tps_platform.subdevs = tps_devs_e1198_skubit0_1;
493                 } else {
494                         tps_platform.num_subdevs =
495                                         ARRAY_SIZE(tps_devs_e1198_skubit0_0);
496                         tps_platform.subdevs = tps_devs_e1198_skubit0_0;
497                 }
498         } else {
499                 if (board_info.board_id == BOARD_PM269)
500                         pdata_ldo3_e118x.slew_rate_uV_per_us = 250;
501
502                 if (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT) {
503                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_1);
504                         tps_platform.subdevs = tps_devs_e118x_skubit0_1;
505                         ext_core_regulator = true;
506                 } else {
507                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_0);
508                         tps_platform.subdevs = tps_devs_e118x_skubit0_0;
509                 }
510         }
511
512         /* E1291-A04/A05: Enable DEV_SLP and enable sleep on GPIO2 */
513         if (((board_info.board_id == BOARD_E1291)  ||
514              (board_info.board_id == BOARD_PM315)) &&
515                         ((board_info.fab == BOARD_FAB_A04) ||
516                          (board_info.fab == BOARD_FAB_A05) ||
517                          (board_info.fab == BOARD_FAB_A07))) {
518                 tps_platform.dev_slp_en = true;
519                 tps_platform.gpio_init_data = tps_gpio_pdata_e1291_a04;
520                 tps_platform.num_gpioinit_data =
521                                         ARRAY_SIZE(tps_gpio_pdata_e1291_a04);
522         }
523
524         i2c_register_board_info(4, cardhu_regulators, 1);
525
526         /* Register the external core regulator if it is require */
527         if (ext_core_regulator) {
528                 pr_info("Registering the core regulator\n");
529                 i2c_register_board_info(4, tps62361_boardinfo, 1);
530         }
531         return 0;
532 }
533
534
535 /**************** GPIO based fixed regulator *****************/
536 /* EN_5V_CP from PMU GP0 */
537 static struct regulator_consumer_supply fixed_reg_en_5v_cp_supply[] = {
538         REGULATOR_SUPPLY("vdd_5v0_sby", NULL),
539         REGULATOR_SUPPLY("vdd_hall", NULL),
540         REGULATOR_SUPPLY("vterm_ddr", NULL),
541         REGULATOR_SUPPLY("v2ref_ddr", NULL),
542 };
543
544 /* EN_5V0 From PMU GP2 */
545 static struct regulator_consumer_supply fixed_reg_en_5v0_supply[] = {
546         REGULATOR_SUPPLY("vdd_5v0_sys", NULL),
547 };
548
549 /* EN_DDR From PMU GP6 */
550 static struct regulator_consumer_supply fixed_reg_en_ddr_supply[] = {
551         REGULATOR_SUPPLY("mem_vddio_ddr", NULL),
552         REGULATOR_SUPPLY("t30_vddio_ddr", NULL),
553 };
554
555 /* EN_3V3_SYS From PMU GP7 */
556 static struct regulator_consumer_supply fixed_reg_en_3v3_sys_supply[] = {
557         REGULATOR_SUPPLY("vdd_lvds", NULL),
558         REGULATOR_SUPPLY("vdd_pnl", NULL),
559         REGULATOR_SUPPLY("vcom_3v3", NULL),
560         REGULATOR_SUPPLY("vdd_3v3", NULL),
561         REGULATOR_SUPPLY("vcore_mmc", NULL),
562         REGULATOR_SUPPLY("vddio_pex_ctl", NULL),
563         REGULATOR_SUPPLY("pwrdet_pex_ctl", NULL),
564         REGULATOR_SUPPLY("hvdd_pex_pmu", NULL),
565         REGULATOR_SUPPLY("avdd_hdmi", NULL),
566         REGULATOR_SUPPLY("avdd_usb", "tegra-udc.0"),
567         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.0"),
568         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.1"),
569         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.2"),
570         REGULATOR_SUPPLY("vdd_ddr_rx", NULL),
571         REGULATOR_SUPPLY("vcore_nand", NULL),
572         REGULATOR_SUPPLY("hvdd_sata", NULL),
573         REGULATOR_SUPPLY("vddio_gmi_pmu", NULL),
574         REGULATOR_SUPPLY("pwrdet_nand", NULL),
575         REGULATOR_SUPPLY("avdd_cam1", NULL),
576         REGULATOR_SUPPLY("vdd_af", NULL),
577         REGULATOR_SUPPLY("avdd_cam2", NULL),
578         REGULATOR_SUPPLY("vdd_acc", NULL),
579         REGULATOR_SUPPLY("vdd_phtl", NULL),
580         REGULATOR_SUPPLY("vddio_tp", NULL),
581         REGULATOR_SUPPLY("vdd_led", NULL),
582         REGULATOR_SUPPLY("vddio_cec", NULL),
583         REGULATOR_SUPPLY("vdd_cmps", NULL),
584         REGULATOR_SUPPLY("vdd_temp", NULL),
585         REGULATOR_SUPPLY("vpp_kfuse", NULL),
586         REGULATOR_SUPPLY("vddio_ts", NULL),
587         REGULATOR_SUPPLY("vdd_ir_led", NULL),
588         REGULATOR_SUPPLY("vddio_1wire", NULL),
589         REGULATOR_SUPPLY("avddio_audio", NULL),
590         REGULATOR_SUPPLY("vdd_ec", NULL),
591         REGULATOR_SUPPLY("vcom_pa", NULL),
592         REGULATOR_SUPPLY("vdd_3v3_devices", NULL),
593         REGULATOR_SUPPLY("vdd_3v3_dock", NULL),
594         REGULATOR_SUPPLY("vdd_3v3_edid", NULL),
595         REGULATOR_SUPPLY("vdd_3v3_hdmi_cec", NULL),
596         REGULATOR_SUPPLY("vdd_3v3_gmi", NULL),
597         REGULATOR_SUPPLY("vdd_spk_amp", "tegra-snd-wm8903.0"),
598         REGULATOR_SUPPLY("vdd_3v3_sensor", NULL),
599         REGULATOR_SUPPLY("vdd_3v3_cam", NULL),
600         REGULATOR_SUPPLY("vdd_3v3_als", NULL),
601         REGULATOR_SUPPLY("debug_cons", NULL),
602         REGULATOR_SUPPLY("vdd", "4-004c"),
603         REGULATOR_SUPPLY("vdd", "2-0068"),
604 };
605
606 /* DIS_5V_SWITCH from AP SPI2_SCK X02 */
607 static struct regulator_consumer_supply fixed_reg_dis_5v_switch_supply[] = {
608         REGULATOR_SUPPLY("master_5v_switch", NULL),
609 };
610
611 /* EN_VDD_BL */
612 static struct regulator_consumer_supply fixed_reg_en_vdd_bl_supply[] = {
613         REGULATOR_SUPPLY("vdd_backlight", NULL),
614         REGULATOR_SUPPLY("vdd_backlight1", NULL),
615 };
616
617 /* EN_VDD_BL2 (E1291-A03) from AP PEX_L0_PRSNT_N DD.00 */
618 static struct regulator_consumer_supply fixed_reg_en_vdd_bl2_supply[] = {
619         REGULATOR_SUPPLY("vdd_backlight2", NULL),
620 };
621
622 /* EN_3V3_MODEM from AP GPIO VI_VSYNCH D06*/
623 static struct regulator_consumer_supply fixed_reg_en_3v3_modem_supply[] = {
624         REGULATOR_SUPPLY("vdd_3v3_mini_card", NULL),
625         REGULATOR_SUPPLY("vdd_mini_card", NULL),
626 };
627
628 /* EN_VDD_PNL1 from AP GPIO VI_D6 L04*/
629 static struct regulator_consumer_supply fixed_reg_en_vdd_pnl1_supply[] = {
630         REGULATOR_SUPPLY("vdd_lcd_panel", NULL),
631 };
632
633 /* CAM1_LDO_EN from AP GPIO KB_ROW6 R06*/
634 static struct regulator_consumer_supply fixed_reg_cam1_ldo_en_supply[] = {
635         REGULATOR_SUPPLY("vdd_2v8_cam1", NULL),
636         REGULATOR_SUPPLY("avdd", "6-0072"),
637         REGULATOR_SUPPLY("vdd", "6-000e"),
638 };
639
640 /* CAM2_LDO_EN from AP GPIO KB_ROW7 R07*/
641 static struct regulator_consumer_supply fixed_reg_cam2_ldo_en_supply[] = {
642         REGULATOR_SUPPLY("vdd_2v8_cam2", NULL),
643         REGULATOR_SUPPLY("avdd", "7-0072"),
644         REGULATOR_SUPPLY("vdd", "7-000e"),
645 };
646
647 /* CAM3_LDO_EN from AP GPIO KB_ROW8 S00*/
648 static struct regulator_consumer_supply fixed_reg_cam3_ldo_en_supply[] = {
649         REGULATOR_SUPPLY("vdd_cam3", NULL),
650 };
651
652 /* EN_VDD_COM from AP GPIO SDMMC3_DAT5 D00*/
653 static struct regulator_consumer_supply fixed_reg_en_vdd_com_supply[] = {
654         REGULATOR_SUPPLY("vdd_com_bd", NULL),
655 };
656
657 /* EN_VDD_SDMMC1 from AP GPIO VI_HSYNC D07*/
658 static struct regulator_consumer_supply fixed_reg_en_vdd_sdmmc1_supply[] = {
659         REGULATOR_SUPPLY("vddio_sd_slot", "sdhci-tegra.0"),
660 };
661
662 /* EN_3V3_EMMC from AP GPIO SDMMC3_DAT4 D01*/
663 static struct regulator_consumer_supply fixed_reg_en_3v3_emmc_supply[] = {
664         REGULATOR_SUPPLY("vdd_emmc_core", NULL),
665 };
666
667 /* EN_3V3_PEX_HVDD from AP GPIO VI_D09 L07*/
668 static struct regulator_consumer_supply fixed_reg_en_3v3_pex_hvdd_supply[] = {
669         REGULATOR_SUPPLY("hvdd_pex", NULL),
670 };
671
672 /* EN_3v3_FUSE from AP GPIO VI_D08 L06*/
673 static struct regulator_consumer_supply fixed_reg_en_3v3_fuse_supply[] = {
674         REGULATOR_SUPPLY("vpp_fuse", NULL),
675 };
676
677 /* EN_1V8_CAM from AP GPIO GPIO_PBB4 PBB04*/
678 static struct regulator_consumer_supply fixed_reg_en_1v8_cam_supply[] = {
679         REGULATOR_SUPPLY("vdd_1v8_cam1", NULL),
680         REGULATOR_SUPPLY("vdd_1v8_cam2", NULL),
681         REGULATOR_SUPPLY("vdd_1v8_cam3", NULL),
682         REGULATOR_SUPPLY("dvdd", "6-0072"),
683         REGULATOR_SUPPLY("dvdd", "7-0072"),
684         REGULATOR_SUPPLY("vdd_i2c", "6-000e"),
685         REGULATOR_SUPPLY("vdd_i2c", "7-000e"),
686         REGULATOR_SUPPLY("vdd_i2c", "2-0033"),
687 };
688
689 /* Enable realtek Codec for PM315 */
690 static struct regulator_consumer_supply fixed_reg_cdc_en_supply[] = {
691         REGULATOR_SUPPLY("cdc_en", NULL),
692 };
693
694
695
696 static struct regulator_consumer_supply fixed_reg_en_vbrtr_supply[] = {
697         REGULATOR_SUPPLY("vdd_vbrtr", NULL),
698 };
699
700 /* EN_USB1_VBUS_OC*/
701 static struct regulator_consumer_supply fixed_reg_en_usb1_vbus_oc_supply[] = {
702         REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.0"),
703 };
704
705 /*EN_USB3_VBUS_OC*/
706 static struct regulator_consumer_supply fixed_reg_en_usb3_vbus_oc_supply[] = {
707         REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.2"),
708 };
709
710 /* EN_VDDIO_VID_OC from AP GPIO VI_PCLK T00*/
711 static struct regulator_consumer_supply fixed_reg_en_vddio_vid_oc_supply[] = {
712         REGULATOR_SUPPLY("vdd_hdmi_con", NULL),
713 };
714
715 /* Macro for defining fixed regulator sub device data */
716 #define FIXED_SUPPLY(_name) "fixed_reg_"#_name
717 #define FIXED_REG_OD(_id, _var, _name, _in_supply, _always_on,          \
718                 _boot_on, _gpio_nr, _active_high, _boot_state,          \
719                 _millivolts, _od_state)                                 \
720         static struct regulator_init_data ri_data_##_var =              \
721         {                                                               \
722                 .supply_regulator = _in_supply,                         \
723                 .num_consumer_supplies =                                \
724                         ARRAY_SIZE(fixed_reg_##_name##_supply),         \
725                 .consumer_supplies = fixed_reg_##_name##_supply,        \
726                 .constraints = {                                        \
727                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
728                                         REGULATOR_MODE_STANDBY),        \
729                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
730                                         REGULATOR_CHANGE_STATUS |       \
731                                         REGULATOR_CHANGE_VOLTAGE),      \
732                         .always_on = _always_on,                        \
733                         .boot_on = _boot_on,                            \
734                 },                                                      \
735         };                                                              \
736         static struct fixed_voltage_config fixed_reg_##_var##_pdata =   \
737         {                                                               \
738                 .supply_name = FIXED_SUPPLY(_name),                     \
739                 .microvolts = _millivolts * 1000,                       \
740                 .gpio = _gpio_nr,                                       \
741                 .enable_high = _active_high,                            \
742                 .enabled_at_boot = _boot_state,                         \
743                 .init_data = &ri_data_##_var,                           \
744                 .gpio_is_open_drain = _od_state,                        \
745         };                                                              \
746         static struct platform_device fixed_reg_##_var##_dev = {        \
747                 .name   = "reg-fixed-voltage",                          \
748                 .id     = _id,                                          \
749                 .dev    = {                                             \
750                         .platform_data = &fixed_reg_##_var##_pdata,     \
751                 },                                                      \
752         }
753
754 #define FIXED_REG(_id, _var, _name, _in_supply, _always_on, _boot_on,   \
755                  _gpio_nr, _active_high, _boot_state, _millivolts)      \
756         FIXED_REG_OD(_id, _var, _name, _in_supply, _always_on, _boot_on,  \
757                 _gpio_nr, _active_high, _boot_state, _millivolts, false)
758
759
760 /* common to most of boards*/
761 FIXED_REG(0, en_5v_cp,          en_5v_cp,       NULL,                           1,      0,      TPS6591X_GPIO_0,        true,   1, 5000);
762 FIXED_REG(1, en_5v0,            en_5v0,         NULL,                           0,      0,      TPS6591X_GPIO_2,        true,   0, 5000);
763 FIXED_REG(2, en_ddr,            en_ddr,         NULL,                           1,      0,      TPS6591X_GPIO_6,        true,   1, 1500);
764 FIXED_REG(3, en_3v3_sys,        en_3v3_sys,     NULL,                           0,      0,      TPS6591X_GPIO_7,        true,   1, 3300);
765 FIXED_REG(4, en_vdd_bl,         en_vdd_bl,      NULL,                           0,      0,      TEGRA_GPIO_PK3,         true,   1, 5000);
766 FIXED_REG(5, en_3v3_modem,      en_3v3_modem,   NULL,                           1,      0,      TEGRA_GPIO_PD6,         true,   1, 3300);
767 FIXED_REG(6, en_vdd_pnl1,       en_vdd_pnl1,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PL4,         true,   1, 3300);
768 FIXED_REG(7, cam3_ldo_en,       cam3_ldo_en,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PS0,         true,   0, 3300);
769 FIXED_REG(8, en_vdd_com,        en_vdd_com,     FIXED_SUPPLY(en_3v3_sys),       1,      0,      TEGRA_GPIO_PD0,         true,   1, 3300);
770 FIXED_REG(9, en_3v3_fuse,       en_3v3_fuse,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PL6,         true,   0, 3300);
771 FIXED_REG(10, en_3v3_emmc,      en_3v3_emmc,    FIXED_SUPPLY(en_3v3_sys),       1,      0,      TEGRA_GPIO_PD1,         true,   1, 3300);
772 FIXED_REG(11, en_vdd_sdmmc1,    en_vdd_sdmmc1,  FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PD7,         true,   1, 3300);
773 FIXED_REG(12, en_3v3_pex_hvdd,  en_3v3_pex_hvdd, FIXED_SUPPLY(en_3v3_sys),      0,      0,      TEGRA_GPIO_PL7,         true,   0, 3300);
774 FIXED_REG(13, en_1v8_cam,       en_1v8_cam,     tps6591x_rails(VIO),            0,      0,      TEGRA_GPIO_PBB4,        true,   0, 1800);
775
776 /* Specific to E1187/E1186/E1256 */
777 FIXED_REG(14, dis_5v_switch_e118x,      dis_5v_switch,  FIXED_SUPPLY(en_5v0),   0,      0,      TEGRA_GPIO_PX2,         false,  0, 5000);
778
779 /* E1291-A04/A05 specific */
780 FIXED_REG(1, en_5v0_a04,        en_5v0,         NULL,                           0,      0,      TPS6591X_GPIO_8,        true,   0, 5000);
781 FIXED_REG(2, en_ddr_a04,        en_ddr,         NULL,                           1,      0,      TPS6591X_GPIO_7,        true,   1, 1500);
782 FIXED_REG(3, en_3v3_sys_a04,    en_3v3_sys,     NULL,                           0,      0,      TPS6591X_GPIO_6,        true,   1, 3300);
783
784 /* PM315 Rev C realtek alc5640 codec */
785 FIXED_REG(23, en_cdc,           cdc_en,         FIXED_SUPPLY(en_3v3_sys),       0,      1,      TEGRA_GPIO_PX2,         true,   0, 1200);
786
787
788 /* Specific to pm269 */
789 FIXED_REG(4, en_vdd_bl_pm269,           en_vdd_bl,              NULL,                           0,      0,      TEGRA_GPIO_PH3, true,   1, 5000);
790 FIXED_REG(6, en_vdd_pnl1_pm269,         en_vdd_pnl1,            FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PW1, true,   1, 3300);
791 FIXED_REG(9, en_3v3_fuse_pm269,         en_3v3_fuse,            FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PC1, true,   0, 3300);
792 FIXED_REG(12, en_3v3_pex_hvdd_pm269,    en_3v3_pex_hvdd,        FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PC6, true,   0, 3300);
793
794 /* E1198/E1291 specific*/
795 FIXED_REG(18, cam1_ldo_en,      cam1_ldo_en,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PR6,         true,   0, 2800);
796 FIXED_REG(19, cam2_ldo_en,      cam2_ldo_en,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PR7,         true,   0, 2800);
797
798 /* E1291 A03 specific */
799 FIXED_REG(20, en_vdd_bl1_a03,   en_vdd_bl,      NULL,                           0,      0,      TEGRA_GPIO_PDD2,        true,   1, 5000);
800 FIXED_REG(21, en_vdd_bl2_a03,   en_vdd_bl2,     NULL,                           0,      0,      TEGRA_GPIO_PDD0,        true,   1, 5000);
801 FIXED_REG(22, en_vbrtr,         en_vbrtr,       FIXED_SUPPLY(en_3v3_sys),       0,      0,      PMU_TCA6416_GPIO_PORT12,true,   0, 3300);
802
803 /* PM313 display board specific */
804 FIXED_REG(4, en_vdd_bl_pm313,   en_vdd_bl,      NULL,                           0,      0,      TEGRA_GPIO_PK3,         true,  1, 5000);
805 FIXED_REG(6, en_vdd_pnl1_pm313, en_vdd_pnl1,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PH3,         true,  1, 3300);
806
807
808 /****************** Open collector Load switches *******/
809 /*Specific to pm269*/
810 FIXED_REG_OD(17, en_vddio_vid_oc_pm269, en_vddio_vid_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PP2,         true,   0, 5000, true);
811
812 /* Specific to pm311 */
813 FIXED_REG_OD(15, en_usb1_vbus_oc_pm311, en_usb1_vbus_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PCC7,        true,   0, 5000, true);
814 FIXED_REG_OD(16, en_usb3_vbus_oc_pm311, en_usb3_vbus_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PCC6,        true,   0, 5000, true);
815
816
817 /* Specific to E1187/E1186/E1256 */
818 FIXED_REG_OD(15, en_usb1_vbus_oc_e118x, en_usb1_vbus_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PI4,         true,   0, 5000, true);
819 FIXED_REG_OD(16, en_usb3_vbus_oc_e118x, en_usb3_vbus_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PH7,         true,   0, 5000, true);
820 FIXED_REG_OD(17, en_vddio_vid_oc_e118x, en_vddio_vid_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PT0,         true,   0, 5000, true);
821
822
823 /* E1198/E1291 specific  fab < A03 */
824 FIXED_REG_OD(15, en_usb1_vbus_oc,       en_usb1_vbus_oc,        FIXED_SUPPLY(en_5v0),           0,      0,      TEGRA_GPIO_PI4,         true,   0, 5000, true);
825 FIXED_REG_OD(16, en_usb3_vbus_oc,       en_usb3_vbus_oc,        FIXED_SUPPLY(en_5v0),           0,      0,      TEGRA_GPIO_PH7,         true,   0, 5000, true);
826
827 /* E1198/E1291 specific  fab >= A03 */
828 FIXED_REG_OD(15, en_usb1_vbus_oc_a03,   en_usb1_vbus_oc,        FIXED_SUPPLY(en_5v0),           0,      0,      TEGRA_GPIO_PDD6,        true,   0, 5000, true);
829 FIXED_REG_OD(16, en_usb3_vbus_oc_a03,   en_usb3_vbus_oc,        FIXED_SUPPLY(en_5v0),           0,      0,      TEGRA_GPIO_PDD4,        true,   0, 5000, true);
830
831 /* E1198/E1291 specific */
832 FIXED_REG_OD(17, en_vddio_vid_oc,       en_vddio_vid_oc,        FIXED_SUPPLY(en_5v0),           0,      0,      TEGRA_GPIO_PT0,         true,   0, 5000, true);
833
834 /*
835  * Creating the fixed/gpio-switch regulator device tables for different boards
836  */
837 #define ADD_FIXED_REG(_name)    (&fixed_reg_##_name##_dev)
838
839 #define COMMON_FIXED_REG                        \
840         ADD_FIXED_REG(en_5v_cp),                \
841         ADD_FIXED_REG(en_5v0),                  \
842         ADD_FIXED_REG(en_ddr),                  \
843         ADD_FIXED_REG(en_3v3_sys),              \
844         ADD_FIXED_REG(en_3v3_modem),            \
845         ADD_FIXED_REG(en_vdd_pnl1),             \
846         ADD_FIXED_REG(cam3_ldo_en),             \
847         ADD_FIXED_REG(en_vdd_com),              \
848         ADD_FIXED_REG(en_3v3_fuse),             \
849         ADD_FIXED_REG(en_3v3_emmc),             \
850         ADD_FIXED_REG(en_vdd_sdmmc1),           \
851         ADD_FIXED_REG(en_3v3_pex_hvdd),         \
852         ADD_FIXED_REG(en_1v8_cam),
853
854 #define COMMON_FIXED_REG_E1291_A04              \
855         ADD_FIXED_REG(en_5v_cp),                \
856         ADD_FIXED_REG(en_5v0_a04),              \
857         ADD_FIXED_REG(en_ddr_a04),              \
858         ADD_FIXED_REG(en_3v3_sys_a04),          \
859         ADD_FIXED_REG(en_3v3_modem),            \
860         ADD_FIXED_REG(en_vdd_pnl1),             \
861         ADD_FIXED_REG(cam3_ldo_en),             \
862         ADD_FIXED_REG(en_vdd_com),              \
863         ADD_FIXED_REG(en_3v3_fuse),             \
864         ADD_FIXED_REG(en_3v3_emmc),             \
865         ADD_FIXED_REG(en_vdd_sdmmc1),           \
866         ADD_FIXED_REG(en_3v3_pex_hvdd),         \
867         ADD_FIXED_REG(en_1v8_cam),
868
869 #define PM269_FIXED_REG                         \
870         ADD_FIXED_REG(en_5v_cp),                \
871         ADD_FIXED_REG(en_5v0),                  \
872         ADD_FIXED_REG(en_ddr),                  \
873         ADD_FIXED_REG(en_3v3_sys),              \
874         ADD_FIXED_REG(en_3v3_modem),            \
875         ADD_FIXED_REG(cam1_ldo_en),             \
876         ADD_FIXED_REG(cam2_ldo_en),             \
877         ADD_FIXED_REG(cam3_ldo_en),             \
878         ADD_FIXED_REG(en_vdd_com),              \
879         ADD_FIXED_REG(en_3v3_fuse_pm269),       \
880         ADD_FIXED_REG(en_3v3_emmc),             \
881         ADD_FIXED_REG(en_3v3_pex_hvdd_pm269),   \
882         ADD_FIXED_REG(en_1v8_cam),              \
883         ADD_FIXED_REG(dis_5v_switch_e118x),     \
884         ADD_FIXED_REG(en_vbrtr),                \
885         ADD_FIXED_REG(en_usb1_vbus_oc_e118x),   \
886         ADD_FIXED_REG(en_usb3_vbus_oc_e118x),   \
887         ADD_FIXED_REG(en_vddio_vid_oc_pm269),
888
889 #define PM311_FIXED_REG                         \
890         ADD_FIXED_REG(en_5v_cp),                \
891         ADD_FIXED_REG(en_5v0),                  \
892         ADD_FIXED_REG(en_ddr),                  \
893         ADD_FIXED_REG(en_3v3_sys),              \
894         ADD_FIXED_REG(en_3v3_modem),            \
895         ADD_FIXED_REG(cam1_ldo_en),             \
896         ADD_FIXED_REG(cam2_ldo_en),             \
897         ADD_FIXED_REG(cam3_ldo_en),             \
898         ADD_FIXED_REG(en_vdd_com),              \
899         ADD_FIXED_REG(en_3v3_fuse_pm269),       \
900         ADD_FIXED_REG(en_3v3_emmc),             \
901         ADD_FIXED_REG(en_3v3_pex_hvdd_pm269),   \
902         ADD_FIXED_REG(en_1v8_cam),              \
903         ADD_FIXED_REG(dis_5v_switch_e118x),     \
904         ADD_FIXED_REG(en_usb1_vbus_oc_pm311),   \
905         ADD_FIXED_REG(en_usb3_vbus_oc_pm311),   \
906         ADD_FIXED_REG(en_vddio_vid_oc_pm269),
907
908
909 #define E1247_DISPLAY_FIXED_REG                 \
910         ADD_FIXED_REG(en_vdd_bl_pm269),         \
911         ADD_FIXED_REG(en_vdd_pnl1_pm269),
912
913 #define E1247_DSI_DISPLAY_FIXED_REG             \
914         ADD_FIXED_REG(en_vdd_bl_pm269),
915
916 #define PM313_DISPLAY_FIXED_REG                 \
917         ADD_FIXED_REG(en_vdd_bl_pm313),         \
918         ADD_FIXED_REG(en_vdd_pnl1_pm313),
919
920 #define E118x_FIXED_REG                         \
921         ADD_FIXED_REG(en_5v_cp),                \
922         ADD_FIXED_REG(en_5v0),                  \
923         ADD_FIXED_REG(en_ddr),                  \
924         ADD_FIXED_REG(en_3v3_sys),              \
925         ADD_FIXED_REG(en_3v3_modem),            \
926         ADD_FIXED_REG(cam3_ldo_en),             \
927         ADD_FIXED_REG(en_vdd_com),              \
928         ADD_FIXED_REG(en_3v3_fuse),             \
929         ADD_FIXED_REG(en_3v3_emmc),             \
930         ADD_FIXED_REG(en_vdd_sdmmc1),           \
931         ADD_FIXED_REG(en_3v3_pex_hvdd),         \
932         ADD_FIXED_REG(en_1v8_cam),              \
933         ADD_FIXED_REG(dis_5v_switch_e118x),     \
934         ADD_FIXED_REG(en_vbrtr),                \
935         ADD_FIXED_REG(en_usb1_vbus_oc_e118x),   \
936         ADD_FIXED_REG(en_usb3_vbus_oc_e118x),   \
937         ADD_FIXED_REG(en_vddio_vid_oc_e118x),
938
939 #define E1198_FIXED_REG                         \
940         ADD_FIXED_REG(cam1_ldo_en),             \
941         ADD_FIXED_REG(cam2_ldo_en),             \
942         ADD_FIXED_REG(en_vddio_vid_oc),
943
944 #define E1291_1198_A00_FIXED_REG                \
945         ADD_FIXED_REG(en_vdd_bl),               \
946         ADD_FIXED_REG(en_usb1_vbus_oc),         \
947         ADD_FIXED_REG(en_usb3_vbus_oc),
948
949 #define E1291_A03_FIXED_REG                     \
950         ADD_FIXED_REG(en_vdd_bl1_a03),          \
951         ADD_FIXED_REG(en_vdd_bl2_a03),          \
952         ADD_FIXED_REG(en_usb1_vbus_oc_a03),     \
953         ADD_FIXED_REG(en_usb3_vbus_oc_a03),
954
955 /* Fixed regulator devices for E1186/E1187/E1256 */
956 static struct platform_device *fixed_reg_devs_e118x[] = {
957         E118x_FIXED_REG
958         E1247_DISPLAY_FIXED_REG
959 };
960
961 static struct platform_device *fixed_reg_devs_e118x_dsi[] = {
962         E118x_FIXED_REG
963         E1247_DSI_DISPLAY_FIXED_REG
964 };
965
966 /* Fixed regulator devices for E1186/E1187/E1256 */
967 static struct platform_device *fixed_reg_devs_e118x_pm313[] = {
968         E118x_FIXED_REG
969         PM313_DISPLAY_FIXED_REG
970 };
971
972 /* Fixed regulator devices for E1198 and E1291 */
973 static struct platform_device *fixed_reg_devs_e1198_base[] = {
974         COMMON_FIXED_REG
975         E1291_1198_A00_FIXED_REG
976         E1198_FIXED_REG
977 };
978
979 static struct platform_device *fixed_reg_devs_e1198_a02[] = {
980         ADD_FIXED_REG(en_5v_cp),
981         ADD_FIXED_REG(en_5v0),
982         ADD_FIXED_REG(en_ddr_a04),
983         ADD_FIXED_REG(en_3v3_sys_a04),
984         ADD_FIXED_REG(en_3v3_modem),
985         ADD_FIXED_REG(en_vdd_pnl1),
986         ADD_FIXED_REG(cam3_ldo_en),
987         ADD_FIXED_REG(en_vdd_com),
988         ADD_FIXED_REG(en_3v3_fuse),
989         ADD_FIXED_REG(en_3v3_emmc),
990         ADD_FIXED_REG(en_vdd_sdmmc1),
991         ADD_FIXED_REG(en_3v3_pex_hvdd),
992         ADD_FIXED_REG(en_1v8_cam),
993         ADD_FIXED_REG(en_vdd_bl1_a03),
994         ADD_FIXED_REG(en_vdd_bl2_a03),
995         ADD_FIXED_REG(cam1_ldo_en),
996         ADD_FIXED_REG(cam2_ldo_en),
997         ADD_FIXED_REG(en_usb1_vbus_oc_a03),
998         ADD_FIXED_REG(en_usb3_vbus_oc_a03),
999         ADD_FIXED_REG(en_vddio_vid_oc),
1000 };
1001
1002 #define PM315_FIXED_REG                         \
1003         ADD_FIXED_REG(en_cdc),
1004
1005
1006
1007 /* Fixed regulator devices for PM269 */
1008 static struct platform_device *fixed_reg_devs_pm269[] = {
1009         PM269_FIXED_REG
1010         E1247_DISPLAY_FIXED_REG
1011 };
1012
1013 static struct platform_device *fixed_reg_devs_pm269_dsi[] = {
1014         PM269_FIXED_REG
1015         E1247_DSI_DISPLAY_FIXED_REG
1016 };
1017
1018 /* Fixed regulator devices for PM269 */
1019 static struct platform_device *fixed_reg_devs_pm269_pm313[] = {
1020         PM269_FIXED_REG
1021         PM313_DISPLAY_FIXED_REG
1022 };
1023
1024 /* Fixed regulator devices for PM311 */
1025 static struct platform_device *fixed_reg_devs_pm311[] = {
1026         PM311_FIXED_REG
1027         E1247_DISPLAY_FIXED_REG
1028 };
1029
1030 static struct platform_device *fixed_reg_devs_pm311_dsi[] = {
1031         PM311_FIXED_REG
1032         E1247_DSI_DISPLAY_FIXED_REG
1033 };
1034
1035 /* Fixed regulator devices for PM11 */
1036 static struct platform_device *fixed_reg_devs_pm311_pm313[] = {
1037         PM311_FIXED_REG
1038         PM313_DISPLAY_FIXED_REG
1039 };
1040
1041 /* Fixed regulator devices for E1291 A03 */
1042 static struct platform_device *fixed_reg_devs_e1291_a03[] = {
1043         COMMON_FIXED_REG
1044         E1291_A03_FIXED_REG
1045         E1198_FIXED_REG
1046 };
1047
1048 /* Fixed regulator devices for E1291 A04/A05 */
1049 static struct platform_device *fixed_reg_devs_e1291_a04[] = {
1050         COMMON_FIXED_REG_E1291_A04
1051         E1291_A03_FIXED_REG
1052         E1198_FIXED_REG
1053 };
1054
1055 /* Fixed regulator devices for PM315 */
1056 static struct platform_device *fixed_reg_devs_pm315[] = {
1057         COMMON_FIXED_REG_E1291_A04
1058         E1291_A03_FIXED_REG
1059         E1198_FIXED_REG
1060         PM315_FIXED_REG
1061 };
1062
1063
1064 static bool is_display_board_dsi(u16 display_board_id)
1065 {
1066         return ((display_board_id == BOARD_DISPLAY_E1213) ||
1067                 (display_board_id == BOARD_DISPLAY_E1253) ||
1068                 (display_board_id == BOARD_DISPLAY_E1506));
1069 }
1070
1071 int __init cardhu_fixed_regulator_init(void)
1072 {
1073         struct board_info board_info;
1074         struct board_info pmu_board_info;
1075         struct board_info display_board_info;
1076         struct platform_device **fixed_reg_devs;
1077         int    nfixreg_devs;
1078
1079         if (!machine_is_cardhu())
1080                 return 0;
1081
1082         tegra_get_board_info(&board_info);
1083         tegra_get_pmu_board_info(&pmu_board_info);
1084         tegra_get_display_board_info(&display_board_info);
1085
1086         if (pmu_board_info.board_id == BOARD_PMU_PM298)
1087                 return cardhu_pm298_gpio_switch_regulator_init();
1088
1089         if (pmu_board_info.board_id == BOARD_PMU_PM299)
1090                 return cardhu_pm299_gpio_switch_regulator_init();
1091
1092         switch (board_info.board_id) {
1093         case BOARD_E1198:
1094                 if (board_info.fab <= BOARD_FAB_A01) {
1095                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1198_base);
1096                         fixed_reg_devs = fixed_reg_devs_e1198_base;
1097                 } else {
1098                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1198_a02);
1099                         fixed_reg_devs = fixed_reg_devs_e1198_a02;
1100                 }
1101                 break;
1102
1103         case BOARD_E1291:
1104                 if (board_info.fab == BOARD_FAB_A03) {
1105                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1291_a03);
1106                         fixed_reg_devs = fixed_reg_devs_e1291_a03;
1107                 } else if ((board_info.fab == BOARD_FAB_A04) ||
1108                                 (board_info.fab == BOARD_FAB_A05) ||
1109                                 (board_info.fab == BOARD_FAB_A07)) {
1110                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1291_a04);
1111                         fixed_reg_devs = fixed_reg_devs_e1291_a04;
1112                 } else {
1113                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1198_base);
1114                         fixed_reg_devs = fixed_reg_devs_e1198_base;
1115                 }
1116                 break;
1117         case BOARD_PM315:
1118                 nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm315);
1119                 fixed_reg_devs = fixed_reg_devs_pm315;
1120                 break;
1121         case BOARD_PM311:
1122         case BOARD_PM305:
1123                 nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm311);
1124                 fixed_reg_devs = fixed_reg_devs_pm311;
1125                 if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
1126                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm311_pm313);
1127                         fixed_reg_devs = fixed_reg_devs_pm311_pm313;
1128                 } else if (is_display_board_dsi(display_board_info.board_id)) {
1129                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm311_dsi);
1130                         fixed_reg_devs = fixed_reg_devs_pm311_dsi;
1131                 }
1132                 break;
1133
1134         case BOARD_PM269:
1135         case BOARD_E1257:
1136                 nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm269);
1137                 fixed_reg_devs = fixed_reg_devs_pm269;
1138                 if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
1139                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm269_pm313);
1140                         fixed_reg_devs = fixed_reg_devs_pm269_pm313;
1141                 } else if (is_display_board_dsi(display_board_info.board_id)) {
1142                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm269_dsi);
1143                         fixed_reg_devs = fixed_reg_devs_pm269_dsi;
1144                 } else {
1145                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm269);
1146                         fixed_reg_devs = fixed_reg_devs_pm269;
1147                 }
1148                 break;
1149
1150         default:
1151                 if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
1152                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e118x_pm313);
1153                         fixed_reg_devs = fixed_reg_devs_e118x_pm313;
1154                 } else if (is_display_board_dsi(display_board_info.board_id)) {
1155                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e118x_dsi);
1156                         fixed_reg_devs = fixed_reg_devs_e118x_dsi;
1157                 } else {
1158                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e118x);
1159                         fixed_reg_devs = fixed_reg_devs_e118x;
1160                 }
1161                 break;
1162         }
1163
1164         return platform_add_devices(fixed_reg_devs, nfixreg_devs);
1165 }
1166 subsys_initcall_sync(cardhu_fixed_regulator_init);
1167
1168 static void cardhu_board_suspend(int lp_state, enum suspend_stage stg)
1169 {
1170         if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_SUSPEND_BEFORE_CPU))
1171                 tegra_console_uart_suspend();
1172 }
1173
1174 static void cardhu_board_resume(int lp_state, enum resume_stage stg)
1175 {
1176         if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_RESUME_AFTER_CPU))
1177                 tegra_console_uart_resume();
1178 }
1179
1180 static struct tegra_suspend_platform_data cardhu_suspend_data = {
1181         .cpu_timer      = 2000,
1182         .cpu_off_timer  = 200,
1183         .suspend_mode   = TEGRA_SUSPEND_LP0,
1184         .core_timer     = 0x7e7e,
1185         .core_off_timer = 0,
1186         .corereq_high   = true,
1187         .sysclkreq_high = true,
1188         .cpu_lp2_min_residency = 2000,
1189         .board_suspend = cardhu_board_suspend,
1190         .board_resume = cardhu_board_resume,
1191 #ifdef CONFIG_TEGRA_LP1_950
1192         .lp1_lowvolt_support = false,
1193         .i2c_base_addr = 0,
1194         .pmuslave_addr = 0,
1195         .core_reg_addr = 0,
1196         .lp1_core_volt_low = 0,
1197         .lp1_core_volt_high = 0,
1198 #endif
1199 };
1200
1201 int __init cardhu_suspend_init(void)
1202 {
1203         struct board_info board_info;
1204         struct board_info pmu_board_info;
1205         struct board_info display_board_info;
1206
1207         tegra_get_board_info(&board_info);
1208         tegra_get_pmu_board_info(&pmu_board_info);
1209         tegra_get_display_board_info(&display_board_info);
1210
1211         /* For PMU Fab A03, A04 and A05 make core_pwr_req to high */
1212         if ((pmu_board_info.fab == BOARD_FAB_A03) ||
1213                 (pmu_board_info.fab == BOARD_FAB_A04) ||
1214                  (pmu_board_info.fab == BOARD_FAB_A05))
1215                 cardhu_suspend_data.corereq_high = true;
1216
1217         /* CORE_PWR_REQ to be high for all processor/pmu board whose sku bit 0
1218          * is set. This is require to enable the dc-dc converter tps62361x */
1219         if ((board_info.sku & SKU_DCDC_TPS62361_SUPPORT) || (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT))
1220                 cardhu_suspend_data.corereq_high = true;
1221
1222         switch (board_info.board_id) {
1223         case BOARD_E1291:
1224                 /* CORE_PWR_REQ to be high for E1291-A03 */
1225                 if (board_info.fab == BOARD_FAB_A03)
1226                         cardhu_suspend_data.corereq_high = true;
1227                 if (board_info.fab < BOARD_FAB_A03)
1228                         /* post E1291-A02 revisions VBUS wake supported */
1229                         tegra_disable_wake_source(TEGRA_WAKE_USB1_VBUS);
1230                 break;
1231         case BOARD_E1198:
1232                 if (board_info.fab < BOARD_FAB_A02)
1233                         /* post E1198-A01 revisions VBUS wake supported */
1234                         tegra_disable_wake_source(TEGRA_WAKE_USB1_VBUS);
1235                 break;
1236         case BOARD_PM269:
1237 #ifdef CONFIG_TEGRA_LP1_950
1238                 /* AP37 board supports the LP1_950mV feature */
1239                 if (is_display_board_dsi(display_board_info.board_id)) {
1240                         cardhu_suspend_data.lp1_lowvolt_support = true;
1241                         cardhu_suspend_data.i2c_base_addr = TEGRA_I2C5_BASE;
1242                         cardhu_suspend_data.pmuslave_addr = 0xC0;
1243                         cardhu_suspend_data.core_reg_addr = 0x03;
1244                         cardhu_suspend_data.lp1_core_volt_low = 0x2D;
1245                         cardhu_suspend_data.lp1_core_volt_high = 0x50;
1246                 }
1247 #endif
1248         case BOARD_PM305:
1249         case BOARD_PM311:
1250                 break;
1251         case BOARD_E1256:
1252         case BOARD_E1257:
1253                 cardhu_suspend_data.cpu_timer = 5000;
1254                 cardhu_suspend_data.cpu_off_timer = 5000;
1255                 break;
1256         case BOARD_E1187:
1257         case BOARD_E1186:
1258                 /* VBUS repeated wakeup seen on older E1186 boards */
1259                 tegra_disable_wake_source(TEGRA_WAKE_USB1_VBUS);
1260                 cardhu_suspend_data.cpu_timer = 5000;
1261                 cardhu_suspend_data.cpu_off_timer = 5000;
1262                 break;
1263         default:
1264                 break;
1265         }
1266
1267         tegra_init_suspend(&cardhu_suspend_data);
1268         return 0;
1269 }
1270
1271 #ifdef CONFIG_TEGRA_EDP_LIMITS
1272
1273 int __init cardhu_edp_init(void)
1274 {
1275         unsigned int regulator_mA;
1276
1277         regulator_mA = get_maximum_cpu_current_supported();
1278         if (!regulator_mA) {
1279                 regulator_mA = 6000; /* regular T30/s */
1280         }
1281         pr_info("%s: CPU regulator %d mA\n", __func__, regulator_mA);
1282
1283         tegra_init_cpu_edp_limits(regulator_mA);
1284         return 0;
1285 }
1286 #endif
1287
1288 static char *cardhu_battery[] = {
1289         "bq27510-0",
1290 };
1291
1292 static struct gpio_charger_platform_data cardhu_charger_pdata = {
1293         .name = "ac",
1294         .type = POWER_SUPPLY_TYPE_MAINS,
1295         .gpio = AC_PRESENT_GPIO,
1296         .gpio_active_low = 0,
1297         .supplied_to = cardhu_battery,
1298         .num_supplicants = ARRAY_SIZE(cardhu_battery),
1299 };
1300
1301 static struct platform_device cardhu_charger_device = {
1302         .name = "gpio-charger",
1303         .dev = {
1304                 .platform_data = &cardhu_charger_pdata,
1305         },
1306 };
1307
1308 static int __init cardhu_charger_late_init(void)
1309 {
1310         if (!machine_is_cardhu())
1311                 return 0;
1312
1313         platform_device_register(&cardhu_charger_device);
1314         return 0;
1315 }
1316
1317 late_initcall(cardhu_charger_late_init);