8e0922506105515cb8e9968b69bc7755f95c7e77
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu-power.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu-power.c
3  *
4  * Copyright (C) 2011 NVIDIA, Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
18  * 02111-1307, USA
19  */
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/regulator/machine.h>
25 #include <linux/mfd/tps6591x.h>
26 #include <linux/gpio.h>
27 #include <linux/io.h>
28 #include <linux/regulator/gpio-switch-regulator.h>
29 #include <linux/regulator/tps6591x-regulator.h>
30 #include <linux/regulator/tps6236x-regulator.h>
31
32 #include <mach/iomap.h>
33 #include <mach/irqs.h>
34 #include <mach/pinmux.h>
35 #include <mach/edp.h>
36
37 #include "gpio-names.h"
38 #include "board.h"
39 #include "board-cardhu.h"
40 #include "pm.h"
41 #include "wakeups-t3.h"
42
43 #define PMC_CTRL                0x0
44 #define PMC_CTRL_INTR_LOW       (1 << 17)
45
46 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_0[] = {
47         REGULATOR_SUPPLY("vdd_core", NULL),
48         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
49 };
50
51 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_1[] = {
52         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
53 };
54
55 static struct regulator_consumer_supply tps6591x_vdd2_supply[] = {
56         REGULATOR_SUPPLY("vdd_gen1v5", NULL),
57         REGULATOR_SUPPLY("vcore_lcd", NULL),
58         REGULATOR_SUPPLY("track_ldo1", NULL),
59         REGULATOR_SUPPLY("external_ldo_1v2", NULL),
60         REGULATOR_SUPPLY("vcore_cam1", NULL),
61         REGULATOR_SUPPLY("vcore_cam2", NULL),
62 };
63
64 static struct regulator_consumer_supply tps6591x_vddctrl_supply[] = {
65         REGULATOR_SUPPLY("vdd_cpu_pmu", NULL),
66         REGULATOR_SUPPLY("vdd_cpu", NULL),
67         REGULATOR_SUPPLY("vdd_sys", NULL),
68 };
69
70 static struct regulator_consumer_supply tps6591x_vio_supply[] = {
71         REGULATOR_SUPPLY("vdd_gen1v8", NULL),
72         REGULATOR_SUPPLY("avdd_hdmi_pll", NULL),
73         REGULATOR_SUPPLY("avdd_usb_pll", NULL),
74         REGULATOR_SUPPLY("avdd_osc", NULL),
75         REGULATOR_SUPPLY("vddio_sys", NULL),
76         REGULATOR_SUPPLY("vddio_sdmmc4", NULL),
77         REGULATOR_SUPPLY("vdd1v8_satelite", NULL),
78         REGULATOR_SUPPLY("vddio_uart", NULL),
79         REGULATOR_SUPPLY("vddio_audio", NULL),
80         REGULATOR_SUPPLY("vddio_bb", NULL),
81         REGULATOR_SUPPLY("vddio_lcd_pmu", NULL),
82         REGULATOR_SUPPLY("vddio_cam", NULL),
83         REGULATOR_SUPPLY("vddio_vi", NULL),
84         REGULATOR_SUPPLY("ldo6", NULL),
85         REGULATOR_SUPPLY("ldo7", NULL),
86         REGULATOR_SUPPLY("ldo8", NULL),
87         REGULATOR_SUPPLY("vcore_audio", NULL),
88         REGULATOR_SUPPLY("avcore_audio", NULL),
89         REGULATOR_SUPPLY("vddio_sdmmc3", NULL),
90         REGULATOR_SUPPLY("vcore1_lpddr2", NULL),
91         REGULATOR_SUPPLY("vcom_1v8", NULL),
92         REGULATOR_SUPPLY("pmuio_1v8", NULL),
93         REGULATOR_SUPPLY("avdd_ic_usb", NULL),
94 };
95
96 static struct regulator_consumer_supply tps6591x_ldo1_supply[] = {
97         REGULATOR_SUPPLY("avdd_pexb", NULL),
98         REGULATOR_SUPPLY("vdd_pexb", NULL),
99         REGULATOR_SUPPLY("avdd_pex_pll", NULL),
100         REGULATOR_SUPPLY("avdd_pexa", NULL),
101         REGULATOR_SUPPLY("vdd_pexa", NULL),
102 };
103
104 static struct regulator_consumer_supply tps6591x_ldo2_supply[] = {
105         REGULATOR_SUPPLY("avdd_sata", NULL),
106         REGULATOR_SUPPLY("vdd_sata", NULL),
107         REGULATOR_SUPPLY("avdd_sata_pll", NULL),
108         REGULATOR_SUPPLY("avdd_plle", NULL),
109 };
110
111 static struct regulator_consumer_supply tps6591x_ldo3_supply_e118x[] = {
112         REGULATOR_SUPPLY("vddio_sdmmc1", NULL),
113 };
114
115 static struct regulator_consumer_supply tps6591x_ldo3_supply_e1198[] = {
116         REGULATOR_SUPPLY("unused_rail_ldo3", NULL),
117 };
118
119 static struct regulator_consumer_supply tps6591x_ldo4_supply[] = {
120         REGULATOR_SUPPLY("vdd_rtc", NULL),
121 };
122
123 static struct regulator_consumer_supply tps6591x_ldo5_supply_e118x[] = {
124         REGULATOR_SUPPLY("avdd_vdac", NULL),
125 };
126
127 static struct regulator_consumer_supply tps6591x_ldo5_supply_e1198[] = {
128         REGULATOR_SUPPLY("avdd_vdac", NULL),
129         REGULATOR_SUPPLY("vddio_sdmmc1", NULL),
130 };
131
132 static struct regulator_consumer_supply tps6591x_ldo6_supply[] = {
133         REGULATOR_SUPPLY("avdd_dsi_csi", NULL),
134 };
135 static struct regulator_consumer_supply tps6591x_ldo7_supply[] = {
136         REGULATOR_SUPPLY("avdd_plla_p_c_s", NULL),
137         REGULATOR_SUPPLY("avdd_pllm", NULL),
138         REGULATOR_SUPPLY("avdd_pllu_d", NULL),
139         REGULATOR_SUPPLY("avdd_pllu_d2", NULL),
140         REGULATOR_SUPPLY("avdd_pllx", NULL),
141 };
142
143 static struct regulator_consumer_supply tps6591x_ldo8_supply[] = {
144         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
145 };
146
147 #define TPS_PDATA_INIT_SUPPLY(_id, _minmv, _maxmv, _supply_reg, _always_on, \
148         _boot_on, _apply_uv, _init_uV, _init_enable, _init_apply, _ectrl) \
149         static struct tps6591x_regulator_platform_data pdata_##_id =    \
150         {                                                               \
151                 .regulator = {                                          \
152                         .constraints = {                                \
153                                 .min_uV = (_minmv)*1000,                \
154                                 .max_uV = (_maxmv)*1000,                \
155                                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
156                                                      REGULATOR_MODE_STANDBY), \
157                                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
158                                                    REGULATOR_CHANGE_STATUS |  \
159                                                    REGULATOR_CHANGE_VOLTAGE), \
160                                 .always_on = _always_on,                \
161                                 .boot_on = _boot_on,                    \
162                                 .apply_uV = _apply_uv,                  \
163                         },                                              \
164                         .num_consumer_supplies =                        \
165                                 ARRAY_SIZE(tps6591x_##_id##_supply),    \
166                         .consumer_supplies = tps6591x_##_id##_supply,   \
167                         .supply_regulator = tps6591x_rails(_supply_reg), \
168                 },                                                      \
169                 .init_uV =  _init_uV * 1000,                            \
170                 .init_enable = _init_enable,                            \
171                 .init_apply = _init_apply,                              \
172                 .ectrl = _ectrl                                         \
173         }
174
175 #define TPS_PDATA_INIT(_id, _minmv, _maxmv, _supply_reg, _always_on,    \
176         _boot_on, _apply_uv, _init_uV, _init_enable, _init_apply, _ectrl) \
177         static struct tps6591x_regulator_platform_data pdata_##_id =    \
178         {                                                               \
179                 .regulator = {                                          \
180                         .constraints = {                                \
181                                 .min_uV = (_minmv)*1000,                \
182                                 .max_uV = (_maxmv)*1000,                \
183                                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
184                                                      REGULATOR_MODE_STANDBY), \
185                                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
186                                                    REGULATOR_CHANGE_STATUS |  \
187                                                    REGULATOR_CHANGE_VOLTAGE), \
188                                 .always_on = _always_on,                \
189                                 .boot_on = _boot_on,                    \
190                                 .apply_uV = _apply_uv,                  \
191                         },                                              \
192                         .num_consumer_supplies =                        \
193                                 ARRAY_SIZE(tps6591x_##_id##_supply),    \
194                         .consumer_supplies = tps6591x_##_id##_supply,   \
195                 },                                                      \
196                 .init_uV =  _init_uV * 1000,                            \
197                 .init_enable = _init_enable,                            \
198                 .init_apply = _init_apply,                              \
199                 .ectrl = _ectrl                                         \
200         }
201
202 #define TPS_PDATA_INIT_BOARD(_id, _board, _minmv, _maxmv, _supply_reg, _always_on,      \
203         _boot_on, _apply_uv, _init_uV, _init_enable, _init_apply, _ectrl) \
204         static struct tps6591x_regulator_platform_data pdata_##_id##_##_board = \
205         {                                                               \
206                 .regulator = {                                          \
207                         .constraints = {                                \
208                                 .min_uV = (_minmv)*1000,                \
209                                 .max_uV = (_maxmv)*1000,                \
210                                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
211                                                      REGULATOR_MODE_STANDBY), \
212                                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
213                                                    REGULATOR_CHANGE_STATUS |  \
214                                                    REGULATOR_CHANGE_VOLTAGE), \
215                                 .always_on = _always_on,                \
216                                 .boot_on = _boot_on,                    \
217                                 .apply_uV = _apply_uv,                  \
218                         },                                              \
219                         .num_consumer_supplies =                        \
220                                 ARRAY_SIZE(tps6591x_##_id##_supply##_##_board),  \
221                         .consumer_supplies = tps6591x_##_id##_supply##_##_board, \
222                 },                                                      \
223                 .init_uV =  _init_uV * 1000,                            \
224                 .init_enable = _init_enable,                            \
225                 .init_apply = _init_apply,                              \
226                 .ectrl = _ectrl                                         \
227         }
228
229 TPS_PDATA_INIT_BOARD(vdd1, skubit0_0, 600, 1500, 0, 1, 1, 0, -1, 0, 0, 0);
230 TPS_PDATA_INIT_BOARD(vdd1, skubit0_1, 600, 1500, 0, 1, 1, 0, -1, 0, 0, 0);
231 TPS_PDATA_INIT(vdd2,    600, 1500, 0, 1, 1, 0, -1, 0, 0, 0);
232 TPS_PDATA_INIT(vddctrl, 600, 1400, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_EN1);
233 TPS_PDATA_INIT(vio,    1500, 3300, 0, 1, 1, 0, -1, 0, 0, 0);
234
235 TPS_PDATA_INIT_SUPPLY(ldo1, 1000, 3300, VDD_2, 0, 0, 0, -1, 0, 1, 0);
236 TPS_PDATA_INIT_SUPPLY(ldo2, 1000, 3300, VDD_2, 0, 0, 0, -1, 0, 1, 0);
237
238 TPS_PDATA_INIT_BOARD(ldo3, e118x, 1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0);
239 TPS_PDATA_INIT_BOARD(ldo3, e1198, 1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0);
240 TPS_PDATA_INIT(ldo4, 1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0);
241 TPS_PDATA_INIT_BOARD(ldo5, e118x, 1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0);
242 TPS_PDATA_INIT_BOARD(ldo5, e1198, 1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0);
243
244 TPS_PDATA_INIT_SUPPLY(ldo6, 1000, 3300, VIO, 0, 0, 0, -1, 0, 0, 0);
245 TPS_PDATA_INIT_SUPPLY(ldo7, 1000, 3300, VIO, 0, 0, 0, -1, 0, 0, 0);
246 TPS_PDATA_INIT_SUPPLY(ldo8, 1000, 3300, VIO, 0, 0, 0, -1, 0, 0, 0);
247
248 #if defined(CONFIG_RTC_DRV_TPS6591x)
249 static struct tps6591x_rtc_platform_data rtc_data = {
250         .irq = TEGRA_NR_IRQS + TPS6591X_INT_RTC_ALARM,
251         .time = {
252                 .tm_year = 2000,
253                 .tm_mon = 0,
254                 .tm_mday = 1,
255                 .tm_hour = 0,
256                 .tm_min = 0,
257                 .tm_sec = 0,
258         },
259 };
260
261 #define TPS_RTC_REG()                           \
262         {                                               \
263                 .id     = 0,            \
264                 .name   = "rtc_tps6591x",       \
265                 .platform_data = &rtc_data,     \
266         }
267 #endif
268
269 #define TPS_REG(_id, _data)                             \
270         {                                               \
271                 .id     = TPS6591X_ID_##_id,            \
272                 .name   = "tps6591x-regulator",         \
273                 .platform_data  = &pdata_##_data,       \
274         }
275
276 #define TPS6591X_DEV_COMMON_E118X \
277         TPS_REG(VDD_2, vdd2),           \
278         TPS_REG(VDDCTRL, vddctrl),      \
279         TPS_REG(LDO_1, ldo1),           \
280         TPS_REG(LDO_2, ldo2),           \
281         TPS_REG(LDO_3, ldo3_e118x),     \
282         TPS_REG(LDO_4, ldo4),           \
283         TPS_REG(LDO_5, ldo5_e118x),     \
284         TPS_REG(LDO_6, ldo6),           \
285         TPS_REG(LDO_7, ldo7),           \
286         TPS_REG(LDO_8, ldo8)
287
288 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_0[] = {
289         TPS_REG(VIO, vio),
290         TPS_REG(VDD_1, vdd1_skubit0_0),
291         TPS6591X_DEV_COMMON_E118X,
292 #if defined(CONFIG_RTC_DRV_TPS6591x)
293         TPS_RTC_REG(),
294 #endif
295 };
296
297 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_1[] = {
298         TPS_REG(VIO, vio),
299         TPS_REG(VDD_1, vdd1_skubit0_1),
300         TPS6591X_DEV_COMMON_E118X,
301 #if defined(CONFIG_RTC_DRV_TPS6591x)
302         TPS_RTC_REG(),
303 #endif
304 };
305
306 #define TPS6591X_DEV_COMMON_CARDHU      \
307         TPS_REG(VDD_2, vdd2),           \
308         TPS_REG(VDDCTRL, vddctrl),      \
309         TPS_REG(LDO_1, ldo1),           \
310         TPS_REG(LDO_2, ldo2),           \
311         TPS_REG(LDO_3, ldo3_e1198),     \
312         TPS_REG(LDO_4, ldo4),           \
313         TPS_REG(LDO_5, ldo5_e1198),     \
314         TPS_REG(LDO_6, ldo6),           \
315         TPS_REG(LDO_7, ldo7),           \
316         TPS_REG(LDO_8, ldo8)
317
318 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_0[] = {
319         TPS_REG(VIO, vio),
320         TPS_REG(VDD_1, vdd1_skubit0_0),
321         TPS6591X_DEV_COMMON_CARDHU,
322 #if defined(CONFIG_RTC_DRV_TPS6591x)
323         TPS_RTC_REG(),
324 #endif
325 };
326
327 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_1[] = {
328         TPS_REG(VIO, vio),
329         TPS_REG(VDD_1, vdd1_skubit0_1),
330         TPS6591X_DEV_COMMON_CARDHU,
331 #if defined(CONFIG_RTC_DRV_TPS6591x)
332         TPS_RTC_REG(),
333 #endif
334 };
335
336 #define TPS_GPIO_INIT_PDATA(gpio_nr, _init_apply, _sleep_en, _pulldn_en, _output_en, _output_val)       \
337         [gpio_nr] = {                                   \
338                         .sleep_en       = _sleep_en,    \
339                         .pulldn_en      = _pulldn_en,   \
340                         .output_mode_en = _output_en,   \
341                         .output_val     = _output_val,  \
342                         .init_apply     = _init_apply,  \
343                      }
344 static struct tps6591x_gpio_init_data tps_gpio_pdata_e1291_a04[] =  {
345         TPS_GPIO_INIT_PDATA(0, 0, 0, 0, 0, 0),
346         TPS_GPIO_INIT_PDATA(1, 0, 0, 0, 0, 0),
347         TPS_GPIO_INIT_PDATA(2, 1, 1, 0, 1, 1),
348         TPS_GPIO_INIT_PDATA(3, 0, 0, 0, 0, 0),
349         TPS_GPIO_INIT_PDATA(4, 0, 0, 0, 0, 0),
350         TPS_GPIO_INIT_PDATA(5, 0, 0, 0, 0, 0),
351         TPS_GPIO_INIT_PDATA(6, 0, 0, 0, 0, 0),
352         TPS_GPIO_INIT_PDATA(7, 0, 0, 0, 0, 0),
353         TPS_GPIO_INIT_PDATA(8, 0, 0, 0, 0, 0),
354 };
355
356 static struct tps6591x_platform_data tps_platform = {
357         .irq_base       = TPS6591X_IRQ_BASE,
358         .gpio_base      = TPS6591X_GPIO_BASE,
359 };
360
361 static struct i2c_board_info __initdata cardhu_regulators[] = {
362         {
363                 I2C_BOARD_INFO("tps6591x", 0x2D),
364                 .irq            = INT_EXTERNAL_PMU,
365                 .platform_data  = &tps_platform,
366         },
367 };
368
369 /* TPS62361B DC-DC converter */
370 static struct regulator_consumer_supply tps6236x_dcdc_supply[] = {
371         REGULATOR_SUPPLY("vdd_core", NULL),
372 };
373
374 static struct tps6236x_regulator_platform_data tps6236x_pdata = {
375         .reg_init_data = {                                      \
376                 .constraints = {                                \
377                         .min_uV = 500000,                       \
378                         .max_uV = 1770000,                      \
379                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
380                                              REGULATOR_MODE_STANDBY), \
381                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
382                                            REGULATOR_CHANGE_STATUS |  \
383                                            REGULATOR_CHANGE_VOLTAGE), \
384                         .always_on = 1,                         \
385                         .boot_on =  1,                          \
386                         .apply_uV = 0,                          \
387                 },                                              \
388                 .num_consumer_supplies = ARRAY_SIZE(tps6236x_dcdc_supply), \
389                 .consumer_supplies = tps6236x_dcdc_supply,              \
390                 },                                                      \
391         .internal_pd_enable = 0,                                        \
392         .vsel = 3,                                                      \
393         .init_uV = -1,                                                  \
394         .init_apply = 0,                                                \
395 };
396
397 static struct i2c_board_info __initdata tps6236x_boardinfo[] = {
398         {
399                 I2C_BOARD_INFO("tps62361B", 0x60),
400                 .platform_data  = &tps6236x_pdata,
401         },
402 };
403
404 int __init cardhu_regulator_init(void)
405 {
406         struct board_info board_info;
407         struct board_info pmu_board_info;
408         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
409         u32 pmc_ctrl;
410
411         /* configure the power management controller to trigger PMU
412          * interrupts when low */
413
414         pmc_ctrl = readl(pmc + PMC_CTRL);
415         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
416
417         tegra_get_board_info(&board_info);
418         tegra_get_pmu_board_info(&pmu_board_info);
419
420         if ((board_info.board_id == BOARD_E1198) ||
421                 (board_info.board_id == BOARD_E1291)) {
422                 if ((board_info.sku & 1) == 1) {
423                         tps_platform.num_subdevs =
424                                         ARRAY_SIZE(tps_devs_e1198_skubit0_1);
425                         tps_platform.subdevs = tps_devs_e1198_skubit0_1;
426                 } else {
427                         tps_platform.num_subdevs =
428                                         ARRAY_SIZE(tps_devs_e1198_skubit0_0);
429                         tps_platform.subdevs = tps_devs_e1198_skubit0_0;
430                 }
431         } else {
432                 if ((pmu_board_info.sku & 1) == 1) {
433                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_1);
434                         tps_platform.subdevs = tps_devs_e118x_skubit0_1;
435                 } else {
436                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_0);
437                         tps_platform.subdevs = tps_devs_e118x_skubit0_0;
438                 }
439         }
440
441         /* E1291-A04: Enable DEV_SLP and enable sleep on GPIO2 */
442         if ((board_info.board_id == BOARD_E1291) && (board_info.fab == 0x4)) {
443                 tps_platform.dev_slp_en = true;
444                 tps_platform.gpio_init_data = tps_gpio_pdata_e1291_a04;
445                 tps_platform.num_gpioinit_data =
446                                         ARRAY_SIZE(tps_gpio_pdata_e1291_a04);
447         }
448
449         i2c_register_board_info(4, cardhu_regulators, 1);
450
451         /* Resgister the TPS6236x for all boards whose sku bit 0 is set. */
452         if (((board_info.sku & 1) == 1) || ((pmu_board_info.sku & 1) == 1)) {
453                 pr_info("Registering the device TPS62361B\n");
454                 i2c_register_board_info(4, tps6236x_boardinfo, 1);
455         }
456         return 0;
457 }
458
459 /* EN_5V_CP from PMU GP0 */
460 static struct regulator_consumer_supply gpio_switch_en_5v_cp_supply[] = {
461         REGULATOR_SUPPLY("vdd_5v0_sby", NULL),
462         REGULATOR_SUPPLY("vdd_hall", NULL),
463         REGULATOR_SUPPLY("vterm_ddr", NULL),
464         REGULATOR_SUPPLY("v2ref_ddr", NULL),
465 };
466 static int gpio_switch_en_5v_cp_voltages[] = { 5000};
467
468 /* EN_5V0 From PMU GP2 */
469 static struct regulator_consumer_supply gpio_switch_en_5v0_supply[] = {
470         REGULATOR_SUPPLY("vdd_5v0_sys", NULL),
471 };
472 static int gpio_switch_en_5v0_voltages[] = { 5000};
473
474 /* EN_DDR From PMU GP6 */
475 static struct regulator_consumer_supply gpio_switch_en_ddr_supply[] = {
476         REGULATOR_SUPPLY("mem_vddio_ddr", NULL),
477         REGULATOR_SUPPLY("t30_vddio_ddr", NULL),
478 };
479 static int gpio_switch_en_ddr_voltages[] = { 1500};
480
481 /* EN_3V3_SYS From PMU GP7 */
482 static struct regulator_consumer_supply gpio_switch_en_3v3_sys_supply[] = {
483         REGULATOR_SUPPLY("vdd_lvds", NULL),
484         REGULATOR_SUPPLY("vdd_pnl", NULL),
485         REGULATOR_SUPPLY("vcom_3v3", NULL),
486         REGULATOR_SUPPLY("vdd_3v3", NULL),
487         REGULATOR_SUPPLY("vcore_mmc", NULL),
488         REGULATOR_SUPPLY("vddio_pex_ctl", NULL),
489         REGULATOR_SUPPLY("hvdd_pex", NULL),
490         REGULATOR_SUPPLY("avdd_hdmi", NULL),
491         REGULATOR_SUPPLY("vpp_fuse", NULL),
492         REGULATOR_SUPPLY("avdd_usb", NULL),
493         REGULATOR_SUPPLY("vdd_ddr_rx", NULL),
494         REGULATOR_SUPPLY("vcore_nand", NULL),
495         REGULATOR_SUPPLY("hvdd_sata", NULL),
496         REGULATOR_SUPPLY("vddio_gmi_pmu", NULL),
497         REGULATOR_SUPPLY("avdd_cam1", NULL),
498         REGULATOR_SUPPLY("vdd_af", NULL),
499         REGULATOR_SUPPLY("avdd_cam2", NULL),
500         REGULATOR_SUPPLY("vdd_acc", NULL),
501         REGULATOR_SUPPLY("vdd_phtl", NULL),
502         REGULATOR_SUPPLY("vddio_tp", NULL),
503         REGULATOR_SUPPLY("vdd_led", NULL),
504         REGULATOR_SUPPLY("vddio_cec", NULL),
505         REGULATOR_SUPPLY("vdd_cmps", NULL),
506         REGULATOR_SUPPLY("vdd_temp", NULL),
507         REGULATOR_SUPPLY("vpp_kfuse", NULL),
508         REGULATOR_SUPPLY("vddio_ts", NULL),
509         REGULATOR_SUPPLY("vdd_ir_led", NULL),
510         REGULATOR_SUPPLY("vddio_1wire", NULL),
511         REGULATOR_SUPPLY("avddio_audio", NULL),
512         REGULATOR_SUPPLY("vdd_ec", NULL),
513         REGULATOR_SUPPLY("vcom_pa", NULL),
514         REGULATOR_SUPPLY("vdd_3v3_devices", NULL),
515         REGULATOR_SUPPLY("vdd_3v3_dock", NULL),
516         REGULATOR_SUPPLY("vdd_3v3_edid", NULL),
517         REGULATOR_SUPPLY("vdd_3v3_hdmi_cec", NULL),
518         REGULATOR_SUPPLY("vdd_3v3_gmi", NULL),
519         REGULATOR_SUPPLY("vdd_3v3_spk_amp", NULL),
520         REGULATOR_SUPPLY("vdd_3v3_sensor", NULL),
521         REGULATOR_SUPPLY("vdd_3v3_cam", NULL),
522         REGULATOR_SUPPLY("vdd_3v3_als", NULL),
523         REGULATOR_SUPPLY("debug_cons", NULL),
524 };
525 static int gpio_switch_en_3v3_sys_voltages[] = { 3300};
526
527 /* DIS_5V_SWITCH from AP SPI2_SCK X02 */
528 static struct regulator_consumer_supply gpio_switch_dis_5v_switch_supply[] = {
529         REGULATOR_SUPPLY("master_5v_switch", NULL),
530 };
531 static int gpio_switch_dis_5v_switch_voltages[] = { 5000};
532
533 /* EN_VDD_BL */
534 static struct regulator_consumer_supply gpio_switch_en_vdd_bl_supply[] = {
535         REGULATOR_SUPPLY("vdd_backlight", NULL),
536         REGULATOR_SUPPLY("vdd_backlight1", NULL),
537 };
538 static int gpio_switch_en_vdd_bl_voltages[] = { 5000};
539
540 /* EN_VDD_BL2 (E1291-A03) from AP PEX_L0_PRSNT_N DD.00 */
541 static struct regulator_consumer_supply gpio_switch_en_vdd_bl2_supply[] = {
542         REGULATOR_SUPPLY("vdd_backlight2", NULL),
543 };
544 static int gpio_switch_en_vdd_bl2_voltages[] = { 5000};
545
546 /* EN_3V3_MODEM from AP GPIO VI_VSYNCH D06*/
547 static struct regulator_consumer_supply gpio_switch_en_3v3_modem_supply[] = {
548         REGULATOR_SUPPLY("vdd_3v3_mini_card", NULL),
549         REGULATOR_SUPPLY("vdd_mini_card", NULL),
550 };
551 static int gpio_switch_en_3v3_modem_voltages[] = { 3300};
552
553 /* EN_USB1_VBUS_OC*/
554 static struct regulator_consumer_supply gpio_switch_en_usb1_vbus_oc_supply[] = {
555         REGULATOR_SUPPLY("vdd_vbus_micro_usb", NULL),
556 };
557 static int gpio_switch_en_usb1_vbus_oc_voltages[] = { 5000};
558
559 /*EN_USB3_VBUS_OC*/
560 static struct regulator_consumer_supply gpio_switch_en_usb3_vbus_oc_supply[] = {
561         REGULATOR_SUPPLY("vdd_vbus_typea_usb", NULL),
562 };
563 static int gpio_switch_en_usb3_vbus_oc_voltages[] = { 5000};
564
565 /* EN_VDDIO_VID_OC from AP GPIO VI_PCLK T00*/
566 static struct regulator_consumer_supply gpio_switch_en_vddio_vid_oc_supply[] = {
567         REGULATOR_SUPPLY("vdd_hdmi_con", NULL),
568 };
569 static int gpio_switch_en_vddio_vid_oc_voltages[] = { 5000};
570
571 /* EN_VDD_PNL1 from AP GPIO VI_D6 L04*/
572 static struct regulator_consumer_supply gpio_switch_en_vdd_pnl1_supply[] = {
573         REGULATOR_SUPPLY("vdd_lcd_panel", NULL),
574 };
575 static int gpio_switch_en_vdd_pnl1_voltages[] = { 3300};
576
577 /* CAM1_LDO_EN from AP GPIO KB_ROW6 R06*/
578 static struct regulator_consumer_supply gpio_switch_cam1_ldo_en_supply[] = {
579         REGULATOR_SUPPLY("vdd_2v8_cam1", NULL),
580         REGULATOR_SUPPLY("vdd_2v8_cam1_af", NULL),
581 };
582 static int gpio_switch_cam1_ldo_en_voltages[] = { 2800};
583
584 /* CAM2_LDO_EN from AP GPIO KB_ROW7 R07*/
585 static struct regulator_consumer_supply gpio_switch_cam2_ldo_en_supply[] = {
586         REGULATOR_SUPPLY("vdd_2v8_cam2", NULL),
587         REGULATOR_SUPPLY("vdd_2v8_cam2_af", NULL),
588 };
589 static int gpio_switch_cam2_ldo_en_voltages[] = { 2800};
590
591 /* CAM3_LDO_EN from AP GPIO KB_ROW8 S00*/
592 static struct regulator_consumer_supply gpio_switch_cam3_ldo_en_supply[] = {
593         REGULATOR_SUPPLY("vdd_cam3", NULL),
594 };
595 static int gpio_switch_cam3_ldo_en_voltages[] = { 3300};
596
597 /* EN_VDD_COM from AP GPIO SDMMC3_DAT5 D00*/
598 static struct regulator_consumer_supply gpio_switch_en_vdd_com_supply[] = {
599         REGULATOR_SUPPLY("vdd_com_bd", NULL),
600 };
601 static int gpio_switch_en_vdd_com_voltages[] = { 3300};
602
603 /* EN_VDD_SDMMC1 from AP GPIO VI_HSYNC D07*/
604 static struct regulator_consumer_supply gpio_switch_en_vdd_sdmmc1_supply[] = {
605         REGULATOR_SUPPLY("vddio_sd_slot", NULL),
606 };
607 static int gpio_switch_en_vdd_sdmmc1_voltages[] = { 3300};
608
609 /* EN_3V3_EMMC from AP GPIO SDMMC3_DAT4 D01*/
610 static struct regulator_consumer_supply gpio_switch_en_3v3_emmc_supply[] = {
611         REGULATOR_SUPPLY("vdd_emmc_core", NULL),
612 };
613 static int gpio_switch_en_3v3_emmc_voltages[] = { 3300};
614
615 /* EN_3V3_PEX_HVDD from AP GPIO VI_D09 L07*/
616 static struct regulator_consumer_supply gpio_switch_en_3v3_pex_hvdd_supply[] = {
617         REGULATOR_SUPPLY("hvdd_pex_3v3", NULL),
618 };
619 static int gpio_switch_en_3v3_pex_hvdd_voltages[] = { 3300};
620
621 /* EN_3v3_FUSE from AP GPIO VI_D08 L06*/
622 static struct regulator_consumer_supply gpio_switch_en_3v3_fuse_supply[] = {
623         REGULATOR_SUPPLY("vpp_fuse_pg", NULL),
624 };
625 static int gpio_switch_en_3v3_fuse_voltages[] = { 3300};
626
627 /* EN_1V8_CAM from AP GPIO GPIO_PBB4 PBB04*/
628 static struct regulator_consumer_supply gpio_switch_en_1v8_cam_supply[] = {
629         REGULATOR_SUPPLY("vdd_1v8_cam1", NULL),
630         REGULATOR_SUPPLY("vdd_1v8_cam2", NULL),
631         REGULATOR_SUPPLY("vdd_1v8_cam3", NULL),
632 };
633 static int gpio_switch_en_1v8_cam_voltages[] = { 1800};
634
635 static struct regulator_consumer_supply gpio_switch_en_vbrtr_supply[] = {
636         REGULATOR_SUPPLY("vdd_vbrtr", NULL),
637 };
638 static int gpio_switch_en_vbrtr_voltages[] = { 3300};
639
640 static int enable_load_switch_rail(
641                 struct gpio_switch_regulator_subdev_data *psubdev_data)
642 {
643         int ret;
644
645         if (psubdev_data->pin_group <= 0)
646                 return -EINVAL;
647
648         /* Tristate and make pin as input*/
649         ret = tegra_pinmux_set_tristate(psubdev_data->pin_group,
650                                                 TEGRA_TRI_TRISTATE);
651         if (ret < 0)
652                 return ret;
653         return gpio_direction_input(psubdev_data->gpio_nr);
654 }
655
656 static int disable_load_switch_rail(
657                 struct gpio_switch_regulator_subdev_data *psubdev_data)
658 {
659         int ret;
660
661         if (psubdev_data->pin_group <= 0)
662                 return -EINVAL;
663
664         /* Un-tristate and driver low */
665         ret = tegra_pinmux_set_tristate(psubdev_data->pin_group,
666                                                 TEGRA_TRI_NORMAL);
667         if (ret < 0)
668                 return ret;
669         return gpio_direction_output(psubdev_data->gpio_nr, 0);
670 }
671
672
673 /* Macro for defining gpio switch regulator sub device data */
674 #define GREG_INIT(_id, _var, _name, _input_supply, _gpio_nr, _active_low, \
675                         _init_state, _pg, _enable, _disable)            \
676         static struct gpio_switch_regulator_subdev_data gpio_pdata_##_var =  \
677         {                                                               \
678                 .regulator_name = "gpio-switch-"#_name,                 \
679                 .input_supply   = _input_supply,                        \
680                 .id             = _id,                                  \
681                 .gpio_nr        = _gpio_nr,                             \
682                 .pin_group      = _pg,                                  \
683                 .active_low     = _active_low,                          \
684                 .init_state     = _init_state,                          \
685                 .voltages       = gpio_switch_##_name##_voltages,       \
686                 .n_voltages     = ARRAY_SIZE(gpio_switch_##_name##_voltages), \
687                 .num_consumer_supplies =                                \
688                                 ARRAY_SIZE(gpio_switch_##_name##_supply), \
689                 .consumer_supplies = gpio_switch_##_name##_supply,      \
690                 .constraints = {                                        \
691                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
692                                              REGULATOR_MODE_STANDBY),   \
693                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
694                                            REGULATOR_CHANGE_STATUS |    \
695                                            REGULATOR_CHANGE_VOLTAGE),   \
696                 },                                                      \
697                 .enable_rail = _enable,                                 \
698                 .disable_rail = _disable,                               \
699         }
700
701 /* common to most of boards*/
702 GREG_INIT(0, en_5v_cp,          en_5v_cp,       NULL,                   TPS6591X_GPIO_GP0,      false,  1,      0,      0,      0);
703 GREG_INIT(1, en_5v0,            en_5v0,         NULL,                   TPS6591X_GPIO_GP2,      false,  0,      0,      0,      0);
704 GREG_INIT(2, en_ddr,            en_ddr,         NULL,                   TPS6591X_GPIO_GP6,      false,  0,      0,      0,      0);
705 GREG_INIT(3, en_3v3_sys,        en_3v3_sys,     NULL,                   TPS6591X_GPIO_GP7,      false,  0,      0,      0,      0);
706
707
708 GREG_INIT(4, en_vdd_bl,         en_vdd_bl,      NULL,                   TEGRA_GPIO_PK3,         false,  1,      0,      0,      0);
709 GREG_INIT(5, en_3v3_modem,      en_3v3_modem,   NULL,                   TEGRA_GPIO_PD6,         false,  1,      0,      0,      0);
710 GREG_INIT(6, en_vdd_pnl1,       en_vdd_pnl1,    "vdd_3v3_devices",      TEGRA_GPIO_PL4,         false,  1,      0,      0,      0);
711 GREG_INIT(7, cam3_ldo_en,       cam3_ldo_en,    "vdd_3v3_devices",      TEGRA_GPIO_PS0,         false,  0,      0,      0,      0);
712 GREG_INIT(8, en_vdd_com,        en_vdd_com,     "vdd_3v3_devices",      TEGRA_GPIO_PD0,         false,  1,      0,      0,      0);
713 GREG_INIT(9, en_3v3_fuse,       en_3v3_fuse,    "vdd_3v3_devices",      TEGRA_GPIO_PL6,         false,  0,      0,      0,      0);
714 GREG_INIT(10, en_3v3_emmc,      en_3v3_emmc,    "vdd_3v3_devices",      TEGRA_GPIO_PD1,         false,  1,      0,      0,      0);
715 GREG_INIT(11, en_vdd_sdmmc1,    en_vdd_sdmmc1,  "vdd_3v3_devices",      TEGRA_GPIO_PD7,         false,  1,      0,      0,      0);
716 GREG_INIT(12, en_3v3_pex_hvdd,  en_3v3_pex_hvdd, "vdd_3v3_devices",     TEGRA_GPIO_PL7,         false,  0,      0,      0,      0);
717 GREG_INIT(13, en_1v8_cam,       en_1v8_cam,     "vdd_gen1v8",           TEGRA_GPIO_PBB4,        false,  0,      0,      0,      0);
718
719 /* E1291-A04 specific */
720 GREG_INIT(1, en_5v0_a04,        en_5v0,         NULL,                   TPS6591X_GPIO_GP8,      false,  0,      0,      0,      0);
721 GREG_INIT(2, en_ddr_a04,        en_ddr,         NULL,                   TPS6591X_GPIO_GP7,      false,  0,      0,      0,      0);
722 GREG_INIT(3, en_3v3_sys_a04,    en_3v3_sys,     NULL,                   TPS6591X_GPIO_GP6,      false,  0,      0,      0,      0);
723
724
725 /*Specific to pm269*/
726 GREG_INIT(4, en_vdd_bl_p269,            en_vdd_bl,              NULL,
727         TEGRA_GPIO_PH3, false,  1,      0,      0,      0);
728 GREG_INIT(6, en_vdd_pnl1_pm269,         en_vdd_pnl1,            "vdd_3v3_devices",
729         TEGRA_GPIO_PW1, false,  1,      0,      0,      0);
730 GREG_INIT(9, en_3v3_fuse_pm269,         en_3v3_fuse,            "vdd_3v3_devices",
731         TEGRA_GPIO_PC1, false,  0,      0,      0,      0);
732 GREG_INIT(11, en_vdd_sdmmc1_pm269,      en_vdd_sdmmc1,          "vdd_3v3_devices",
733         TEGRA_GPIO_PP1, false,  1,      0,      0,      0);
734 GREG_INIT(12, en_3v3_pex_hvdd_pm269,    en_3v3_pex_hvdd,        "vdd_3v3_devices",
735         TEGRA_GPIO_PC6, false,  0,      0,      0,      0);
736 GREG_INIT(17, en_vddio_vid_oc_pm269,    en_vddio_vid_oc,        "master_5v_switch",
737         TEGRA_GPIO_PP2, false,  0,      TEGRA_PINGROUP_VI_PCLK,
738         enable_load_switch_rail, disable_load_switch_rail);
739
740 /* Specific to E1187/E1186 */
741 GREG_INIT(14, dis_5v_switch_e118x,      dis_5v_switch,          "vdd_5v0_sys",
742                 TEGRA_GPIO_PX2,         true,   0,      0,      0,      0);
743 GREG_INIT(15, en_usb1_vbus_oc_e118x,    en_usb1_vbus_oc,        "master_5v_switch",
744                 TEGRA_GPIO_PI4,         false,  0,      TEGRA_PINGROUP_GMI_RST_N,
745                 enable_load_switch_rail, disable_load_switch_rail);
746 GREG_INIT(16, en_usb3_vbus_oc_e118x,    en_usb3_vbus_oc,        "master_5v_switch",
747                 TEGRA_GPIO_PH7,         false,  0,      TEGRA_PINGROUP_GMI_AD15,
748                 enable_load_switch_rail, disable_load_switch_rail);
749 GREG_INIT(17, en_vddio_vid_oc_e118x,    en_vddio_vid_oc,        "master_5v_switch",
750                 TEGRA_GPIO_PT0,         false,  0,      TEGRA_PINGROUP_VI_PCLK,
751                 enable_load_switch_rail, disable_load_switch_rail);
752
753 /* E1198/E1291 specific  fab < A03 */
754 GREG_INIT(15, en_usb1_vbus_oc,          en_usb1_vbus_oc,        "vdd_5v0_sys",
755                 TEGRA_GPIO_PI4,         false,  0,      TEGRA_PINGROUP_GMI_RST_N,
756                 enable_load_switch_rail, disable_load_switch_rail);
757 GREG_INIT(16, en_usb3_vbus_oc,          en_usb3_vbus_oc,        "vdd_5v0_sys",
758                 TEGRA_GPIO_PH7,         false,  0,      TEGRA_PINGROUP_GMI_AD15,
759                 enable_load_switch_rail, disable_load_switch_rail);
760
761 /* E1198/E1291 specific  fab >= A03 */
762 GREG_INIT(15, en_usb1_vbus_oc_a03,              en_usb1_vbus_oc,        "vdd_5v0_sys",
763                 TEGRA_GPIO_PDD6,                false,  0,      TEGRA_PINGROUP_PEX_L1_CLKREQ_N,
764                 enable_load_switch_rail, disable_load_switch_rail);
765 GREG_INIT(16, en_usb3_vbus_oc_a03,              en_usb3_vbus_oc,        "vdd_5v0_sys",
766                 TEGRA_GPIO_PDD4,                false,  0,      TEGRA_PINGROUP_PEX_L1_PRSNT_N,
767                 enable_load_switch_rail, disable_load_switch_rail);
768
769 /* E1198/E1291 specific */
770 GREG_INIT(17, en_vddio_vid_oc,          en_vddio_vid_oc,        "vdd_5v0_sys",
771                 TEGRA_GPIO_PT0,         false,  0,      TEGRA_PINGROUP_VI_PCLK,
772                 enable_load_switch_rail, disable_load_switch_rail);
773
774 /* E1198/E1291 specific*/
775 GREG_INIT(18, cam1_ldo_en,      cam1_ldo_en,            "vdd_3v3_cam",  TEGRA_GPIO_PR6,         false,  0,      0,      0,      0);
776 GREG_INIT(19, cam2_ldo_en,      cam2_ldo_en,            "vdd_3v3_cam",  TEGRA_GPIO_PR7,         false,  0,      0,      0,      0);
777
778 /* E1291 A03 specific */
779 GREG_INIT(20, en_vdd_bl1_a03,   en_vdd_bl,      NULL,           TEGRA_GPIO_PDD2,        false,  1,      0,      0,      0);
780 GREG_INIT(21, en_vdd_bl2_a03,   en_vdd_bl2,     NULL,           TEGRA_GPIO_PDD0,        false,  1,      0,      0,      0);
781
782 GREG_INIT(22, en_vbrtr, en_vbrtr, "vdd_3v3_devices",    PMU_TCA6416_GPIO_PORT12,                false,  0,      0,      0,      0);
783
784 #define ADD_GPIO_REG(_name) &gpio_pdata_##_name
785
786 #define COMMON_GPIO_REG \
787         ADD_GPIO_REG(en_5v_cp),                 \
788         ADD_GPIO_REG(en_5v0),                   \
789         ADD_GPIO_REG(en_ddr),                   \
790         ADD_GPIO_REG(en_3v3_sys),               \
791         ADD_GPIO_REG(en_3v3_modem),             \
792         ADD_GPIO_REG(en_vdd_pnl1),              \
793         ADD_GPIO_REG(cam3_ldo_en),              \
794         ADD_GPIO_REG(en_vdd_com),               \
795         ADD_GPIO_REG(en_3v3_fuse),              \
796         ADD_GPIO_REG(en_3v3_emmc),              \
797         ADD_GPIO_REG(en_vdd_sdmmc1),            \
798         ADD_GPIO_REG(en_3v3_pex_hvdd),          \
799         ADD_GPIO_REG(en_1v8_cam),
800
801 #define COMMON_GPIO_REG_E1291_A04 \
802         ADD_GPIO_REG(en_5v_cp),                 \
803         ADD_GPIO_REG(en_5v0_a04),               \
804         ADD_GPIO_REG(en_ddr_a04),               \
805         ADD_GPIO_REG(en_3v3_sys_a04),           \
806         ADD_GPIO_REG(en_3v3_modem),             \
807         ADD_GPIO_REG(en_vdd_pnl1),              \
808         ADD_GPIO_REG(cam3_ldo_en),              \
809         ADD_GPIO_REG(en_vdd_com),               \
810         ADD_GPIO_REG(en_3v3_fuse),              \
811         ADD_GPIO_REG(en_3v3_emmc),              \
812         ADD_GPIO_REG(en_vdd_sdmmc1),            \
813         ADD_GPIO_REG(en_3v3_pex_hvdd),          \
814         ADD_GPIO_REG(en_1v8_cam),
815
816 #define PM269_GPIO_REG \
817         ADD_GPIO_REG(en_5v_cp),                 \
818         ADD_GPIO_REG(en_5v0),                   \
819         ADD_GPIO_REG(en_ddr),                   \
820         ADD_GPIO_REG(en_vdd_bl),                \
821         ADD_GPIO_REG(en_3v3_sys),               \
822         ADD_GPIO_REG(en_3v3_modem),             \
823         ADD_GPIO_REG(en_vdd_pnl1),              \
824         ADD_GPIO_REG(cam3_ldo_en),              \
825         ADD_GPIO_REG(en_vdd_com),               \
826         ADD_GPIO_REG(en_3v3_fuse_pm269),        \
827         ADD_GPIO_REG(en_3v3_emmc),              \
828         ADD_GPIO_REG(en_vdd_sdmmc1_pm269),      \
829         ADD_GPIO_REG(en_3v3_pex_hvdd_pm269),    \
830         ADD_GPIO_REG(en_1v8_cam),               \
831         ADD_GPIO_REG(dis_5v_switch_e118x),      \
832         ADD_GPIO_REG(en_usb1_vbus_oc_e118x),    \
833         ADD_GPIO_REG(en_usb3_vbus_oc_e118x),    \
834         ADD_GPIO_REG(en_vddio_vid_oc_pm269),
835
836 #define E118x_GPIO_REG  \
837         ADD_GPIO_REG(en_vdd_bl),                \
838         ADD_GPIO_REG(dis_5v_switch_e118x),      \
839         ADD_GPIO_REG(en_usb1_vbus_oc_e118x),    \
840         ADD_GPIO_REG(en_usb3_vbus_oc_e118x),    \
841         ADD_GPIO_REG(en_vddio_vid_oc_e118x), \
842         ADD_GPIO_REG(en_vbrtr),
843
844 #define E1198_GPIO_REG  \
845         ADD_GPIO_REG(en_vddio_vid_oc),          \
846         ADD_GPIO_REG(cam1_ldo_en),              \
847         ADD_GPIO_REG(cam2_ldo_en),
848
849 #define E1291_1198_A00_GPIO_REG \
850         ADD_GPIO_REG(en_usb1_vbus_oc),          \
851         ADD_GPIO_REG(en_usb3_vbus_oc),          \
852         ADD_GPIO_REG(en_vdd_bl),
853
854 #define E1291_A03_GPIO_REG      \
855         ADD_GPIO_REG(en_usb1_vbus_oc_a03),              \
856         ADD_GPIO_REG(en_usb3_vbus_oc_a03),              \
857         ADD_GPIO_REG(en_vdd_bl1_a03), \
858         ADD_GPIO_REG(en_vdd_bl2_a03),
859
860 /* Gpio switch regulator platform data  for E1186/E1187*/
861
862 /* Gpio switch regulator platform data  for E1186/E1187*/
863 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e118x[] = {
864         COMMON_GPIO_REG
865         E118x_GPIO_REG
866 };
867
868 /* Gpio switch regulator platform data for E1198 and E1291*/
869 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1198[] = {
870         COMMON_GPIO_REG
871         E1291_1198_A00_GPIO_REG
872         E1198_GPIO_REG
873 };
874
875 /* Gpio switch regulator platform data for PM269*/
876 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_pm269[] = {
877         PM269_GPIO_REG
878 };
879
880 /* Gpio switch regulator platform data for E1291 A03*/
881 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1291_a03[] = {
882         COMMON_GPIO_REG
883         E1291_A03_GPIO_REG
884         E1198_GPIO_REG
885 };
886
887 /* Gpio switch regulator platform data for E1291 A04*/
888 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1291_a04[] = {
889         COMMON_GPIO_REG_E1291_A04
890         E1291_A03_GPIO_REG
891         E1198_GPIO_REG
892 };
893
894
895 static struct gpio_switch_regulator_platform_data  gswitch_pdata;
896 static struct platform_device gswitch_regulator_pdata = {
897         .name = "gpio-switch-regulator",
898         .id   = -1,
899         .dev  = {
900              .platform_data = &gswitch_pdata,
901         },
902 };
903
904 int __init cardhu_gpio_switch_regulator_init(void)
905 {
906         int i;
907         struct board_info board_info;
908         tegra_get_board_info(&board_info);
909         switch (board_info.board_id) {
910         case BOARD_E1198:
911                 gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e1198);
912                 gswitch_pdata.subdevs = gswitch_subdevs_e1198;
913                 break;
914         case BOARD_E1291:
915                 if (board_info.fab == 0x3) {
916                         gswitch_pdata.num_subdevs =
917                                         ARRAY_SIZE(gswitch_subdevs_e1291_a03);
918                         gswitch_pdata.subdevs = gswitch_subdevs_e1291_a03;
919                 } else if (board_info.fab == 0x4) {
920                         gswitch_pdata.num_subdevs =
921                                         ARRAY_SIZE(gswitch_subdevs_e1291_a04);
922                         gswitch_pdata.subdevs = gswitch_subdevs_e1291_a04;
923                 } else {
924                         gswitch_pdata.num_subdevs =
925                                         ARRAY_SIZE(gswitch_subdevs_e1198);
926                         gswitch_pdata.subdevs = gswitch_subdevs_e1198;
927                 }
928                 break;
929         case BOARD_PM269:
930                 gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_pm269);
931                 gswitch_pdata.subdevs = gswitch_subdevs_pm269;
932                 break;
933         default:
934                 gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e118x);
935                 gswitch_pdata.subdevs = gswitch_subdevs_e118x;
936                 break;
937         }
938
939         for (i = 0; i < gswitch_pdata.num_subdevs; ++i) {
940                 struct gpio_switch_regulator_subdev_data *gswitch_data = gswitch_pdata.subdevs[i];
941                 if (gswitch_data->gpio_nr <= TEGRA_NR_GPIOS)
942                         tegra_gpio_enable(gswitch_data->gpio_nr);
943         }
944
945         return platform_device_register(&gswitch_regulator_pdata);
946 }
947
948 static struct tegra_suspend_platform_data cardhu_suspend_data = {
949         .cpu_timer      = 2000,
950         .cpu_off_timer  = 200,
951         .suspend_mode   = TEGRA_SUSPEND_LP2,
952         .core_timer     = 0x7e7e,
953         .core_off_timer = 0,
954         .corereq_high   = false,
955         .sysclkreq_high = true,
956         .cpu_lp2_min_residency = 2000,
957 };
958
959 int __init cardhu_suspend_init(void)
960 {
961         struct board_info board_info;
962         struct board_info pmu_board_info;
963
964         tegra_get_board_info(&board_info);
965         tegra_get_pmu_board_info(&pmu_board_info);
966
967         /* For PMU Fab A03 and A04 make core_pwr_req to high */
968         if ((pmu_board_info.fab == 0x3) || (pmu_board_info.fab == 0x4))
969                 cardhu_suspend_data.corereq_high = true;
970
971         /* CORE_PWR_REQ to be high for all processor/pmu board whose sku bit 0
972          * is set. This is require to enable the dc-dc converter tps62361x */
973         if (((board_info.sku & 1) == 1) || ((pmu_board_info.sku & 1) == 1))
974                 cardhu_suspend_data.corereq_high = true;
975
976         switch (board_info.board_id) {
977         case BOARD_E1291:
978                 /* CORE_PWR_REQ to be high for E1291-A03 */
979                 if (board_info.fab == 0x3)
980                         cardhu_suspend_data.corereq_high = true;
981                 break;
982         case BOARD_E1198:
983                 break;
984         case BOARD_PM269:
985         case BOARD_E1187:
986         case BOARD_E1186:
987                 cardhu_suspend_data.cpu_timer = 5000;
988                 cardhu_suspend_data.cpu_off_timer = 5000;
989                 break;
990         default:
991                 break;
992         }
993
994         tegra_init_suspend(&cardhu_suspend_data);
995         return 0;
996 }
997
998 static void cardhu_power_off(void)
999 {
1000         int ret;
1001         pr_err("cardhu: Powering off the device\n");
1002         ret = tps6591x_power_off();
1003         if (ret)
1004                 pr_err("cardhu: failed to power off\n");
1005
1006         while(1);
1007 }
1008
1009 int __init cardhu_power_off_init(void)
1010 {
1011         pm_power_off = cardhu_power_off;
1012         return 0;
1013 }
1014
1015 #ifdef CONFIG_TEGRA_EDP_LIMITS
1016 /*
1017  * placeholder for now. needs to be changed with characterized data.
1018  * step size cannot be less than 4C
1019  */
1020 static struct tegra_edp_limits cardhu_edp_limits[] = {
1021 /* Temperature   1 CPU    2 CPUs   3 CPUs   4 CPUs */
1022         {60,    {1400000, 1300000, 1300000, 1300000}},
1023         {70,    {1400000, 1300000, 1300000, 1260000}},
1024         {80,    {1400000, 1300000, 1300000, 1200000}},
1025         {90,    {1400000, 1300000, 1300000, 1100000}},
1026 };
1027
1028 void cardhu_thermal_zones_info(struct tegra_edp_limits **z, int *sz)
1029 {
1030         *z = cardhu_edp_limits;
1031         *sz = ARRAY_SIZE(cardhu_edp_limits);
1032 }
1033
1034 int __init cardhu_edp_init(void)
1035 {
1036         tegra_init_cpu_edp_limits(cardhu_edp_limits, ARRAY_SIZE(cardhu_edp_limits));
1037         return 0;
1038 }
1039 #endif