arm: tegra: cardhu: enable PMU features for lp0
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu-power.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu-power.c
3  *
4  * Copyright (C) 2011 NVIDIA, Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
18  * 02111-1307, USA
19  */
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/regulator/machine.h>
25 #include <linux/mfd/tps6591x.h>
26 #include <linux/gpio.h>
27 #include <linux/io.h>
28 #include <linux/regulator/gpio-switch-regulator.h>
29 #include <linux/regulator/tps6591x-regulator.h>
30 #include <linux/regulator/tps6236x-regulator.h>
31
32 #include <mach/iomap.h>
33 #include <mach/irqs.h>
34 #include <mach/pinmux.h>
35 #include <mach/edp.h>
36
37 #include "gpio-names.h"
38 #include "board.h"
39 #include "board-cardhu.h"
40 #include "pm.h"
41 #include "wakeups-t3.h"
42
43 #define PMC_CTRL                0x0
44 #define PMC_CTRL_INTR_LOW       (1 << 17)
45
46 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_0[] = {
47         REGULATOR_SUPPLY("vdd_core", NULL),
48         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
49 };
50
51 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_1[] = {
52         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
53 };
54
55 static struct regulator_consumer_supply tps6591x_vdd2_supply[] = {
56         REGULATOR_SUPPLY("vdd_gen1v5", NULL),
57         REGULATOR_SUPPLY("vcore_lcd", NULL),
58         REGULATOR_SUPPLY("track_ldo1", NULL),
59         REGULATOR_SUPPLY("external_ldo_1v2", NULL),
60         REGULATOR_SUPPLY("vcore_cam1", NULL),
61         REGULATOR_SUPPLY("vcore_cam2", NULL),
62 };
63
64 static struct regulator_consumer_supply tps6591x_vddctrl_supply[] = {
65         REGULATOR_SUPPLY("vdd_cpu_pmu", NULL),
66         REGULATOR_SUPPLY("vdd_cpu", NULL),
67         REGULATOR_SUPPLY("vdd_sys", NULL),
68 };
69
70 static struct regulator_consumer_supply tps6591x_vio_supply[] = {
71         REGULATOR_SUPPLY("vdd_gen1v8", NULL),
72         REGULATOR_SUPPLY("avdd_hdmi_pll", NULL),
73         REGULATOR_SUPPLY("avdd_usb_pll", NULL),
74         REGULATOR_SUPPLY("avdd_osc", NULL),
75         REGULATOR_SUPPLY("vddio_sys", NULL),
76         REGULATOR_SUPPLY("vddio_sdmmc4", NULL),
77         REGULATOR_SUPPLY("vdd1v8_satelite", NULL),
78         REGULATOR_SUPPLY("vddio_uart", NULL),
79         REGULATOR_SUPPLY("vddio_audio", NULL),
80         REGULATOR_SUPPLY("vddio_bb", NULL),
81         REGULATOR_SUPPLY("vddio_lcd_pmu", NULL),
82         REGULATOR_SUPPLY("vddio_cam", NULL),
83         REGULATOR_SUPPLY("vddio_vi", NULL),
84         REGULATOR_SUPPLY("ldo6", NULL),
85         REGULATOR_SUPPLY("ldo7", NULL),
86         REGULATOR_SUPPLY("ldo8", NULL),
87         REGULATOR_SUPPLY("vcore_audio", NULL),
88         REGULATOR_SUPPLY("avcore_audio", NULL),
89         REGULATOR_SUPPLY("vddio_sdmmc3", NULL),
90         REGULATOR_SUPPLY("vcore1_lpddr2", NULL),
91         REGULATOR_SUPPLY("vcom_1v8", NULL),
92         REGULATOR_SUPPLY("pmuio_1v8", NULL),
93         REGULATOR_SUPPLY("avdd_ic_usb", NULL),
94 };
95
96 static struct regulator_consumer_supply tps6591x_ldo1_supply[] = {
97         REGULATOR_SUPPLY("avdd_pexb", NULL),
98         REGULATOR_SUPPLY("vdd_pexb", NULL),
99         REGULATOR_SUPPLY("avdd_pex_pll", NULL),
100         REGULATOR_SUPPLY("avdd_pexa", NULL),
101         REGULATOR_SUPPLY("vdd_pexa", NULL),
102 };
103
104 static struct regulator_consumer_supply tps6591x_ldo2_supply[] = {
105         REGULATOR_SUPPLY("avdd_sata", NULL),
106         REGULATOR_SUPPLY("vdd_sata", NULL),
107         REGULATOR_SUPPLY("avdd_sata_pll", NULL),
108         REGULATOR_SUPPLY("avdd_plle", NULL),
109 };
110
111 static struct regulator_consumer_supply tps6591x_ldo3_supply_e118x[] = {
112         REGULATOR_SUPPLY("vddio_sdmmc1", NULL),
113 };
114
115 static struct regulator_consumer_supply tps6591x_ldo3_supply_e1198[] = {
116         REGULATOR_SUPPLY("unused_rail_ldo3", NULL),
117 };
118
119 static struct regulator_consumer_supply tps6591x_ldo4_supply[] = {
120         REGULATOR_SUPPLY("vdd_rtc", NULL),
121 };
122
123 static struct regulator_consumer_supply tps6591x_ldo5_supply_e118x[] = {
124         REGULATOR_SUPPLY("avdd_vdac", NULL),
125 };
126
127 static struct regulator_consumer_supply tps6591x_ldo5_supply_e1198[] = {
128         REGULATOR_SUPPLY("avdd_vdac", NULL),
129         REGULATOR_SUPPLY("vddio_sdmmc1", NULL),
130 };
131
132 static struct regulator_consumer_supply tps6591x_ldo6_supply[] = {
133         REGULATOR_SUPPLY("avdd_dsi_csi", NULL),
134 };
135 static struct regulator_consumer_supply tps6591x_ldo7_supply[] = {
136         REGULATOR_SUPPLY("avdd_plla_p_c_s", NULL),
137         REGULATOR_SUPPLY("avdd_pllm", NULL),
138         REGULATOR_SUPPLY("avdd_pllu_d", NULL),
139         REGULATOR_SUPPLY("avdd_pllu_d2", NULL),
140         REGULATOR_SUPPLY("avdd_pllx", NULL),
141 };
142
143 static struct regulator_consumer_supply tps6591x_ldo8_supply[] = {
144         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
145 };
146
147 #define TPS_PDATA_INIT_SUPPLY(_id, _minmv, _maxmv, _supply_reg, _always_on, \
148         _boot_on, _apply_uv, _init_uV, _init_enable, _init_apply, _ectrl) \
149         static struct tps6591x_regulator_platform_data pdata_##_id =    \
150         {                                                               \
151                 .regulator = {                                          \
152                         .constraints = {                                \
153                                 .min_uV = (_minmv)*1000,                \
154                                 .max_uV = (_maxmv)*1000,                \
155                                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
156                                                      REGULATOR_MODE_STANDBY), \
157                                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
158                                                    REGULATOR_CHANGE_STATUS |  \
159                                                    REGULATOR_CHANGE_VOLTAGE), \
160                                 .always_on = _always_on,                \
161                                 .boot_on = _boot_on,                    \
162                                 .apply_uV = _apply_uv,                  \
163                         },                                              \
164                         .num_consumer_supplies =                        \
165                                 ARRAY_SIZE(tps6591x_##_id##_supply),    \
166                         .consumer_supplies = tps6591x_##_id##_supply,   \
167                         .supply_regulator = tps6591x_rails(_supply_reg), \
168                 },                                                      \
169                 .init_uV =  _init_uV * 1000,                            \
170                 .init_enable = _init_enable,                            \
171                 .init_apply = _init_apply,                              \
172                 .ectrl = _ectrl                                         \
173         }
174
175 #define TPS_PDATA_INIT(_id, _minmv, _maxmv, _supply_reg, _always_on,    \
176         _boot_on, _apply_uv, _init_uV, _init_enable, _init_apply, _ectrl) \
177         static struct tps6591x_regulator_platform_data pdata_##_id =    \
178         {                                                               \
179                 .regulator = {                                          \
180                         .constraints = {                                \
181                                 .min_uV = (_minmv)*1000,                \
182                                 .max_uV = (_maxmv)*1000,                \
183                                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
184                                                      REGULATOR_MODE_STANDBY), \
185                                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
186                                                    REGULATOR_CHANGE_STATUS |  \
187                                                    REGULATOR_CHANGE_VOLTAGE), \
188                                 .always_on = _always_on,                \
189                                 .boot_on = _boot_on,                    \
190                                 .apply_uV = _apply_uv,                  \
191                         },                                              \
192                         .num_consumer_supplies =                        \
193                                 ARRAY_SIZE(tps6591x_##_id##_supply),    \
194                         .consumer_supplies = tps6591x_##_id##_supply,   \
195                 },                                                      \
196                 .init_uV =  _init_uV * 1000,                            \
197                 .init_enable = _init_enable,                            \
198                 .init_apply = _init_apply,                              \
199                 .ectrl = _ectrl                                         \
200         }
201
202 #define TPS_PDATA_INIT_BOARD(_id, _board, _minmv, _maxmv, _supply_reg, _always_on,      \
203         _boot_on, _apply_uv, _init_uV, _init_enable, _init_apply, _ectrl) \
204         static struct tps6591x_regulator_platform_data pdata_##_id##_##_board = \
205         {                                                               \
206                 .regulator = {                                          \
207                         .constraints = {                                \
208                                 .min_uV = (_minmv)*1000,                \
209                                 .max_uV = (_maxmv)*1000,                \
210                                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
211                                                      REGULATOR_MODE_STANDBY), \
212                                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
213                                                    REGULATOR_CHANGE_STATUS |  \
214                                                    REGULATOR_CHANGE_VOLTAGE), \
215                                 .always_on = _always_on,                \
216                                 .boot_on = _boot_on,                    \
217                                 .apply_uV = _apply_uv,                  \
218                         },                                              \
219                         .num_consumer_supplies =                        \
220                                 ARRAY_SIZE(tps6591x_##_id##_supply##_##_board),  \
221                         .consumer_supplies = tps6591x_##_id##_supply##_##_board, \
222                 },                                                      \
223                 .init_uV =  _init_uV * 1000,                            \
224                 .init_enable = _init_enable,                            \
225                 .init_apply = _init_apply,                              \
226                 .ectrl = _ectrl                                         \
227         }
228
229 TPS_PDATA_INIT_BOARD(vdd1, skubit0_0, 600, 1500, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF);
230 TPS_PDATA_INIT_BOARD(vdd1, skubit0_1, 600, 1500, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF);
231 TPS_PDATA_INIT(vdd2,    600, 1500, 0, 1, 1, 0, -1, 0, 0, 0);
232 TPS_PDATA_INIT(vddctrl, 600, 1400, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_EN1);
233 TPS_PDATA_INIT(vio,    1500, 3300, 0, 1, 1, 0, -1, 0, 0, 0);
234
235 TPS_PDATA_INIT_SUPPLY(ldo1, 1000, 3300, VDD_2, 0, 0, 0, -1, 0, 1, 0);
236 TPS_PDATA_INIT_SUPPLY(ldo2, 1000, 3300, VDD_2, 0, 0, 0, -1, 0, 1, 0);
237
238 TPS_PDATA_INIT_BOARD(ldo3, e118x, 1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0);
239 TPS_PDATA_INIT_BOARD(ldo3, e1198, 1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0);
240 TPS_PDATA_INIT(ldo4, 1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0);
241 TPS_PDATA_INIT_BOARD(ldo5, e118x, 1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0);
242 TPS_PDATA_INIT_BOARD(ldo5, e1198, 1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0);
243
244 TPS_PDATA_INIT_SUPPLY(ldo6, 1000, 3300, VIO, 0, 0, 0, -1, 0, 0, 0);
245 TPS_PDATA_INIT_SUPPLY(ldo7, 1000, 3300, VIO, 0, 0, 0, -1, 0, 0, 0);
246 TPS_PDATA_INIT_SUPPLY(ldo8, 1000, 3300, VIO, 0, 0, 0, -1, 0, 0, 0);
247
248 #if defined(CONFIG_RTC_DRV_TPS6591x)
249 static struct tps6591x_rtc_platform_data rtc_data = {
250         .irq = TEGRA_NR_IRQS + TPS6591X_INT_RTC_ALARM,
251         .time = {
252                 .tm_year = 2000,
253                 .tm_mon = 0,
254                 .tm_mday = 1,
255                 .tm_hour = 0,
256                 .tm_min = 0,
257                 .tm_sec = 0,
258         },
259 };
260
261 #define TPS_RTC_REG()                           \
262         {                                               \
263                 .id     = 0,            \
264                 .name   = "rtc_tps6591x",       \
265                 .platform_data = &rtc_data,     \
266         }
267 #endif
268
269 #define TPS_REG(_id, _data)                             \
270         {                                               \
271                 .id     = TPS6591X_ID_##_id,            \
272                 .name   = "tps6591x-regulator",         \
273                 .platform_data  = &pdata_##_data,       \
274         }
275
276 #define TPS6591X_DEV_COMMON_E118X \
277         TPS_REG(VDD_2, vdd2),           \
278         TPS_REG(VDDCTRL, vddctrl),      \
279         TPS_REG(LDO_1, ldo1),           \
280         TPS_REG(LDO_2, ldo2),           \
281         TPS_REG(LDO_3, ldo3_e118x),     \
282         TPS_REG(LDO_4, ldo4),           \
283         TPS_REG(LDO_5, ldo5_e118x),     \
284         TPS_REG(LDO_6, ldo6),           \
285         TPS_REG(LDO_7, ldo7),           \
286         TPS_REG(LDO_8, ldo8)
287
288 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_0[] = {
289         TPS_REG(VIO, vio),
290         TPS_REG(VDD_1, vdd1_skubit0_0),
291         TPS6591X_DEV_COMMON_E118X,
292 #if defined(CONFIG_RTC_DRV_TPS6591x)
293         TPS_RTC_REG(),
294 #endif
295 };
296
297 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_1[] = {
298         TPS_REG(VIO, vio),
299         TPS_REG(VDD_1, vdd1_skubit0_1),
300         TPS6591X_DEV_COMMON_E118X,
301 #if defined(CONFIG_RTC_DRV_TPS6591x)
302         TPS_RTC_REG(),
303 #endif
304 };
305
306 #define TPS6591X_DEV_COMMON_CARDHU      \
307         TPS_REG(VDD_2, vdd2),           \
308         TPS_REG(VDDCTRL, vddctrl),      \
309         TPS_REG(LDO_1, ldo1),           \
310         TPS_REG(LDO_2, ldo2),           \
311         TPS_REG(LDO_3, ldo3_e1198),     \
312         TPS_REG(LDO_4, ldo4),           \
313         TPS_REG(LDO_5, ldo5_e1198),     \
314         TPS_REG(LDO_6, ldo6),           \
315         TPS_REG(LDO_7, ldo7),           \
316         TPS_REG(LDO_8, ldo8)
317
318 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_0[] = {
319         TPS_REG(VIO, vio),
320         TPS_REG(VDD_1, vdd1_skubit0_0),
321         TPS6591X_DEV_COMMON_CARDHU,
322 #if defined(CONFIG_RTC_DRV_TPS6591x)
323         TPS_RTC_REG(),
324 #endif
325 };
326
327 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_1[] = {
328         TPS_REG(VIO, vio),
329         TPS_REG(VDD_1, vdd1_skubit0_1),
330         TPS6591X_DEV_COMMON_CARDHU,
331 #if defined(CONFIG_RTC_DRV_TPS6591x)
332         TPS_RTC_REG(),
333 #endif
334 };
335
336 #define TPS_GPIO_INIT_PDATA(gpio_nr, _init_apply, _sleep_en, _pulldn_en, _output_en, _output_val)       \
337         [gpio_nr] = {                                   \
338                         .sleep_en       = _sleep_en,    \
339                         .pulldn_en      = _pulldn_en,   \
340                         .output_mode_en = _output_en,   \
341                         .output_val     = _output_val,  \
342                         .init_apply     = _init_apply,  \
343                      }
344 static struct tps6591x_gpio_init_data tps_gpio_pdata_e1291_a04[] =  {
345         TPS_GPIO_INIT_PDATA(0, 0, 0, 0, 0, 0),
346         TPS_GPIO_INIT_PDATA(1, 0, 0, 0, 0, 0),
347         TPS_GPIO_INIT_PDATA(2, 1, 1, 0, 1, 1),
348         TPS_GPIO_INIT_PDATA(3, 0, 0, 0, 0, 0),
349         TPS_GPIO_INIT_PDATA(4, 0, 0, 0, 0, 0),
350         TPS_GPIO_INIT_PDATA(5, 0, 0, 0, 0, 0),
351         TPS_GPIO_INIT_PDATA(6, 0, 0, 0, 0, 0),
352         TPS_GPIO_INIT_PDATA(7, 0, 0, 0, 0, 0),
353         TPS_GPIO_INIT_PDATA(8, 0, 0, 0, 0, 0),
354 };
355
356 static struct tps6591x_sleep_keepon_data tps_slp_keepon = {
357         .clkout32k_keepon = 1,
358 };
359
360 static struct tps6591x_platform_data tps_platform = {
361         .irq_base       = TPS6591X_IRQ_BASE,
362         .gpio_base      = TPS6591X_GPIO_BASE,
363         .dev_slp_en     = true,
364         .slp_keepon     = &tps_slp_keepon,
365 };
366
367 static struct i2c_board_info __initdata cardhu_regulators[] = {
368         {
369                 I2C_BOARD_INFO("tps6591x", 0x2D),
370                 .irq            = INT_EXTERNAL_PMU,
371                 .platform_data  = &tps_platform,
372         },
373 };
374
375 /* TPS62361B DC-DC converter */
376 static struct regulator_consumer_supply tps6236x_dcdc_supply[] = {
377         REGULATOR_SUPPLY("vdd_core", NULL),
378 };
379
380 static struct tps6236x_regulator_platform_data tps6236x_pdata = {
381         .reg_init_data = {                                      \
382                 .constraints = {                                \
383                         .min_uV = 500000,                       \
384                         .max_uV = 1770000,                      \
385                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
386                                              REGULATOR_MODE_STANDBY), \
387                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
388                                            REGULATOR_CHANGE_STATUS |  \
389                                            REGULATOR_CHANGE_VOLTAGE), \
390                         .always_on = 1,                         \
391                         .boot_on =  1,                          \
392                         .apply_uV = 0,                          \
393                 },                                              \
394                 .num_consumer_supplies = ARRAY_SIZE(tps6236x_dcdc_supply), \
395                 .consumer_supplies = tps6236x_dcdc_supply,              \
396                 },                                                      \
397         .internal_pd_enable = 0,                                        \
398         .vsel = 3,                                                      \
399         .init_uV = -1,                                                  \
400         .init_apply = 0,                                                \
401 };
402
403 static struct i2c_board_info __initdata tps6236x_boardinfo[] = {
404         {
405                 I2C_BOARD_INFO("tps62361B", 0x60),
406                 .platform_data  = &tps6236x_pdata,
407         },
408 };
409
410 int __init cardhu_regulator_init(void)
411 {
412         struct board_info board_info;
413         struct board_info pmu_board_info;
414         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
415         u32 pmc_ctrl;
416
417         /* configure the power management controller to trigger PMU
418          * interrupts when low */
419
420         pmc_ctrl = readl(pmc + PMC_CTRL);
421         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
422
423         tegra_get_board_info(&board_info);
424         tegra_get_pmu_board_info(&pmu_board_info);
425
426         if ((board_info.board_id == BOARD_E1198) ||
427                 (board_info.board_id == BOARD_E1291)) {
428                 if ((board_info.sku & 1) == 1) {
429                         tps_platform.num_subdevs =
430                                         ARRAY_SIZE(tps_devs_e1198_skubit0_1);
431                         tps_platform.subdevs = tps_devs_e1198_skubit0_1;
432                 } else {
433                         tps_platform.num_subdevs =
434                                         ARRAY_SIZE(tps_devs_e1198_skubit0_0);
435                         tps_platform.subdevs = tps_devs_e1198_skubit0_0;
436                 }
437         } else {
438                 if ((pmu_board_info.sku & 1) == 1) {
439                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_1);
440                         tps_platform.subdevs = tps_devs_e118x_skubit0_1;
441                 } else {
442                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_0);
443                         tps_platform.subdevs = tps_devs_e118x_skubit0_0;
444                 }
445         }
446
447         /* E1291-A04: Enable DEV_SLP and enable sleep on GPIO2 */
448         if ((board_info.board_id == BOARD_E1291) && (board_info.fab == 0x4)) {
449                 tps_platform.dev_slp_en = true;
450                 tps_platform.gpio_init_data = tps_gpio_pdata_e1291_a04;
451                 tps_platform.num_gpioinit_data =
452                                         ARRAY_SIZE(tps_gpio_pdata_e1291_a04);
453         }
454
455         i2c_register_board_info(4, cardhu_regulators, 1);
456
457         /* Resgister the TPS6236x for all boards whose sku bit 0 is set. */
458         if (((board_info.sku & 1) == 1) || ((pmu_board_info.sku & 1) == 1)) {
459                 pr_info("Registering the device TPS62361B\n");
460                 i2c_register_board_info(4, tps6236x_boardinfo, 1);
461         }
462         return 0;
463 }
464
465 /* EN_5V_CP from PMU GP0 */
466 static struct regulator_consumer_supply gpio_switch_en_5v_cp_supply[] = {
467         REGULATOR_SUPPLY("vdd_5v0_sby", NULL),
468         REGULATOR_SUPPLY("vdd_hall", NULL),
469         REGULATOR_SUPPLY("vterm_ddr", NULL),
470         REGULATOR_SUPPLY("v2ref_ddr", NULL),
471 };
472 static int gpio_switch_en_5v_cp_voltages[] = { 5000};
473
474 /* EN_5V0 From PMU GP2 */
475 static struct regulator_consumer_supply gpio_switch_en_5v0_supply[] = {
476         REGULATOR_SUPPLY("vdd_5v0_sys", NULL),
477 };
478 static int gpio_switch_en_5v0_voltages[] = { 5000};
479
480 /* EN_DDR From PMU GP6 */
481 static struct regulator_consumer_supply gpio_switch_en_ddr_supply[] = {
482         REGULATOR_SUPPLY("mem_vddio_ddr", NULL),
483         REGULATOR_SUPPLY("t30_vddio_ddr", NULL),
484 };
485 static int gpio_switch_en_ddr_voltages[] = { 1500};
486
487 /* EN_3V3_SYS From PMU GP7 */
488 static struct regulator_consumer_supply gpio_switch_en_3v3_sys_supply[] = {
489         REGULATOR_SUPPLY("vdd_lvds", NULL),
490         REGULATOR_SUPPLY("vdd_pnl", NULL),
491         REGULATOR_SUPPLY("vcom_3v3", NULL),
492         REGULATOR_SUPPLY("vdd_3v3", NULL),
493         REGULATOR_SUPPLY("vcore_mmc", NULL),
494         REGULATOR_SUPPLY("vddio_pex_ctl", NULL),
495         REGULATOR_SUPPLY("hvdd_pex", NULL),
496         REGULATOR_SUPPLY("avdd_hdmi", NULL),
497         REGULATOR_SUPPLY("vpp_fuse", NULL),
498         REGULATOR_SUPPLY("avdd_usb", NULL),
499         REGULATOR_SUPPLY("vdd_ddr_rx", NULL),
500         REGULATOR_SUPPLY("vcore_nand", NULL),
501         REGULATOR_SUPPLY("hvdd_sata", NULL),
502         REGULATOR_SUPPLY("vddio_gmi_pmu", NULL),
503         REGULATOR_SUPPLY("avdd_cam1", NULL),
504         REGULATOR_SUPPLY("vdd_af", NULL),
505         REGULATOR_SUPPLY("avdd_cam2", NULL),
506         REGULATOR_SUPPLY("vdd_acc", NULL),
507         REGULATOR_SUPPLY("vdd_phtl", NULL),
508         REGULATOR_SUPPLY("vddio_tp", NULL),
509         REGULATOR_SUPPLY("vdd_led", NULL),
510         REGULATOR_SUPPLY("vddio_cec", NULL),
511         REGULATOR_SUPPLY("vdd_cmps", NULL),
512         REGULATOR_SUPPLY("vdd_temp", NULL),
513         REGULATOR_SUPPLY("vpp_kfuse", NULL),
514         REGULATOR_SUPPLY("vddio_ts", NULL),
515         REGULATOR_SUPPLY("vdd_ir_led", NULL),
516         REGULATOR_SUPPLY("vddio_1wire", NULL),
517         REGULATOR_SUPPLY("avddio_audio", NULL),
518         REGULATOR_SUPPLY("vdd_ec", NULL),
519         REGULATOR_SUPPLY("vcom_pa", NULL),
520         REGULATOR_SUPPLY("vdd_3v3_devices", NULL),
521         REGULATOR_SUPPLY("vdd_3v3_dock", NULL),
522         REGULATOR_SUPPLY("vdd_3v3_edid", NULL),
523         REGULATOR_SUPPLY("vdd_3v3_hdmi_cec", NULL),
524         REGULATOR_SUPPLY("vdd_3v3_gmi", NULL),
525         REGULATOR_SUPPLY("vdd_3v3_spk_amp", NULL),
526         REGULATOR_SUPPLY("vdd_3v3_sensor", NULL),
527         REGULATOR_SUPPLY("vdd_3v3_cam", NULL),
528         REGULATOR_SUPPLY("vdd_3v3_als", NULL),
529         REGULATOR_SUPPLY("debug_cons", NULL),
530 };
531 static int gpio_switch_en_3v3_sys_voltages[] = { 3300};
532
533 /* DIS_5V_SWITCH from AP SPI2_SCK X02 */
534 static struct regulator_consumer_supply gpio_switch_dis_5v_switch_supply[] = {
535         REGULATOR_SUPPLY("master_5v_switch", NULL),
536 };
537 static int gpio_switch_dis_5v_switch_voltages[] = { 5000};
538
539 /* EN_VDD_BL */
540 static struct regulator_consumer_supply gpio_switch_en_vdd_bl_supply[] = {
541         REGULATOR_SUPPLY("vdd_backlight", NULL),
542         REGULATOR_SUPPLY("vdd_backlight1", NULL),
543 };
544 static int gpio_switch_en_vdd_bl_voltages[] = { 5000};
545
546 /* EN_VDD_BL2 (E1291-A03) from AP PEX_L0_PRSNT_N DD.00 */
547 static struct regulator_consumer_supply gpio_switch_en_vdd_bl2_supply[] = {
548         REGULATOR_SUPPLY("vdd_backlight2", NULL),
549 };
550 static int gpio_switch_en_vdd_bl2_voltages[] = { 5000};
551
552 /* EN_3V3_MODEM from AP GPIO VI_VSYNCH D06*/
553 static struct regulator_consumer_supply gpio_switch_en_3v3_modem_supply[] = {
554         REGULATOR_SUPPLY("vdd_3v3_mini_card", NULL),
555         REGULATOR_SUPPLY("vdd_mini_card", NULL),
556 };
557 static int gpio_switch_en_3v3_modem_voltages[] = { 3300};
558
559 /* EN_USB1_VBUS_OC*/
560 static struct regulator_consumer_supply gpio_switch_en_usb1_vbus_oc_supply[] = {
561         REGULATOR_SUPPLY("vdd_vbus_micro_usb", NULL),
562 };
563 static int gpio_switch_en_usb1_vbus_oc_voltages[] = { 5000};
564
565 /*EN_USB3_VBUS_OC*/
566 static struct regulator_consumer_supply gpio_switch_en_usb3_vbus_oc_supply[] = {
567         REGULATOR_SUPPLY("vdd_vbus_typea_usb", NULL),
568 };
569 static int gpio_switch_en_usb3_vbus_oc_voltages[] = { 5000};
570
571 /* EN_VDDIO_VID_OC from AP GPIO VI_PCLK T00*/
572 static struct regulator_consumer_supply gpio_switch_en_vddio_vid_oc_supply[] = {
573         REGULATOR_SUPPLY("vdd_hdmi_con", NULL),
574 };
575 static int gpio_switch_en_vddio_vid_oc_voltages[] = { 5000};
576
577 /* EN_VDD_PNL1 from AP GPIO VI_D6 L04*/
578 static struct regulator_consumer_supply gpio_switch_en_vdd_pnl1_supply[] = {
579         REGULATOR_SUPPLY("vdd_lcd_panel", NULL),
580 };
581 static int gpio_switch_en_vdd_pnl1_voltages[] = { 3300};
582
583 /* CAM1_LDO_EN from AP GPIO KB_ROW6 R06*/
584 static struct regulator_consumer_supply gpio_switch_cam1_ldo_en_supply[] = {
585         REGULATOR_SUPPLY("vdd_2v8_cam1", NULL),
586         REGULATOR_SUPPLY("vdd_2v8_cam1_af", NULL),
587 };
588 static int gpio_switch_cam1_ldo_en_voltages[] = { 2800};
589
590 /* CAM2_LDO_EN from AP GPIO KB_ROW7 R07*/
591 static struct regulator_consumer_supply gpio_switch_cam2_ldo_en_supply[] = {
592         REGULATOR_SUPPLY("vdd_2v8_cam2", NULL),
593         REGULATOR_SUPPLY("vdd_2v8_cam2_af", NULL),
594 };
595 static int gpio_switch_cam2_ldo_en_voltages[] = { 2800};
596
597 /* CAM3_LDO_EN from AP GPIO KB_ROW8 S00*/
598 static struct regulator_consumer_supply gpio_switch_cam3_ldo_en_supply[] = {
599         REGULATOR_SUPPLY("vdd_cam3", NULL),
600 };
601 static int gpio_switch_cam3_ldo_en_voltages[] = { 3300};
602
603 /* EN_VDD_COM from AP GPIO SDMMC3_DAT5 D00*/
604 static struct regulator_consumer_supply gpio_switch_en_vdd_com_supply[] = {
605         REGULATOR_SUPPLY("vdd_com_bd", NULL),
606 };
607 static int gpio_switch_en_vdd_com_voltages[] = { 3300};
608
609 /* EN_VDD_SDMMC1 from AP GPIO VI_HSYNC D07*/
610 static struct regulator_consumer_supply gpio_switch_en_vdd_sdmmc1_supply[] = {
611         REGULATOR_SUPPLY("vddio_sd_slot", NULL),
612 };
613 static int gpio_switch_en_vdd_sdmmc1_voltages[] = { 3300};
614
615 /* EN_3V3_EMMC from AP GPIO SDMMC3_DAT4 D01*/
616 static struct regulator_consumer_supply gpio_switch_en_3v3_emmc_supply[] = {
617         REGULATOR_SUPPLY("vdd_emmc_core", NULL),
618 };
619 static int gpio_switch_en_3v3_emmc_voltages[] = { 3300};
620
621 /* EN_3V3_PEX_HVDD from AP GPIO VI_D09 L07*/
622 static struct regulator_consumer_supply gpio_switch_en_3v3_pex_hvdd_supply[] = {
623         REGULATOR_SUPPLY("hvdd_pex_3v3", NULL),
624 };
625 static int gpio_switch_en_3v3_pex_hvdd_voltages[] = { 3300};
626
627 /* EN_3v3_FUSE from AP GPIO VI_D08 L06*/
628 static struct regulator_consumer_supply gpio_switch_en_3v3_fuse_supply[] = {
629         REGULATOR_SUPPLY("vpp_fuse_pg", NULL),
630 };
631 static int gpio_switch_en_3v3_fuse_voltages[] = { 3300};
632
633 /* EN_1V8_CAM from AP GPIO GPIO_PBB4 PBB04*/
634 static struct regulator_consumer_supply gpio_switch_en_1v8_cam_supply[] = {
635         REGULATOR_SUPPLY("vdd_1v8_cam1", NULL),
636         REGULATOR_SUPPLY("vdd_1v8_cam2", NULL),
637         REGULATOR_SUPPLY("vdd_1v8_cam3", NULL),
638 };
639 static int gpio_switch_en_1v8_cam_voltages[] = { 1800};
640
641 static struct regulator_consumer_supply gpio_switch_en_vbrtr_supply[] = {
642         REGULATOR_SUPPLY("vdd_vbrtr", NULL),
643 };
644 static int gpio_switch_en_vbrtr_voltages[] = { 3300};
645
646 static int enable_load_switch_rail(
647                 struct gpio_switch_regulator_subdev_data *psubdev_data)
648 {
649         int ret;
650
651         if (psubdev_data->pin_group <= 0)
652                 return -EINVAL;
653
654         /* Tristate and make pin as input*/
655         ret = tegra_pinmux_set_tristate(psubdev_data->pin_group,
656                                                 TEGRA_TRI_TRISTATE);
657         if (ret < 0)
658                 return ret;
659         return gpio_direction_input(psubdev_data->gpio_nr);
660 }
661
662 static int disable_load_switch_rail(
663                 struct gpio_switch_regulator_subdev_data *psubdev_data)
664 {
665         int ret;
666
667         if (psubdev_data->pin_group <= 0)
668                 return -EINVAL;
669
670         /* Un-tristate and driver low */
671         ret = tegra_pinmux_set_tristate(psubdev_data->pin_group,
672                                                 TEGRA_TRI_NORMAL);
673         if (ret < 0)
674                 return ret;
675         return gpio_direction_output(psubdev_data->gpio_nr, 0);
676 }
677
678
679 /* Macro for defining gpio switch regulator sub device data */
680 #define GREG_INIT(_id, _var, _name, _input_supply, _gpio_nr, _active_low, \
681                         _init_state, _pg, _enable, _disable)            \
682         static struct gpio_switch_regulator_subdev_data gpio_pdata_##_var =  \
683         {                                                               \
684                 .regulator_name = "gpio-switch-"#_name,                 \
685                 .input_supply   = _input_supply,                        \
686                 .id             = _id,                                  \
687                 .gpio_nr        = _gpio_nr,                             \
688                 .pin_group      = _pg,                                  \
689                 .active_low     = _active_low,                          \
690                 .init_state     = _init_state,                          \
691                 .voltages       = gpio_switch_##_name##_voltages,       \
692                 .n_voltages     = ARRAY_SIZE(gpio_switch_##_name##_voltages), \
693                 .num_consumer_supplies =                                \
694                                 ARRAY_SIZE(gpio_switch_##_name##_supply), \
695                 .consumer_supplies = gpio_switch_##_name##_supply,      \
696                 .constraints = {                                        \
697                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
698                                              REGULATOR_MODE_STANDBY),   \
699                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
700                                            REGULATOR_CHANGE_STATUS |    \
701                                            REGULATOR_CHANGE_VOLTAGE),   \
702                 },                                                      \
703                 .enable_rail = _enable,                                 \
704                 .disable_rail = _disable,                               \
705         }
706
707 /* common to most of boards*/
708 GREG_INIT(0, en_5v_cp,          en_5v_cp,       NULL,                   TPS6591X_GPIO_GP0,      false,  1,      0,      0,      0);
709 GREG_INIT(1, en_5v0,            en_5v0,         NULL,                   TPS6591X_GPIO_GP2,      false,  0,      0,      0,      0);
710 GREG_INIT(2, en_ddr,            en_ddr,         NULL,                   TPS6591X_GPIO_GP6,      false,  0,      0,      0,      0);
711 GREG_INIT(3, en_3v3_sys,        en_3v3_sys,     NULL,                   TPS6591X_GPIO_GP7,      false,  0,      0,      0,      0);
712 GREG_INIT(4, en_vdd_bl,         en_vdd_bl,      NULL,                   TEGRA_GPIO_PK3,         false,  1,      0,      0,      0);
713 GREG_INIT(5, en_3v3_modem,      en_3v3_modem,   NULL,                   TEGRA_GPIO_PD6,         false,  1,      0,      0,      0);
714 GREG_INIT(6, en_vdd_pnl1,       en_vdd_pnl1,    "vdd_3v3_devices",      TEGRA_GPIO_PL4,         false,  1,      0,      0,      0);
715 GREG_INIT(7, cam3_ldo_en,       cam3_ldo_en,    "vdd_3v3_devices",      TEGRA_GPIO_PS0,         false,  0,      0,      0,      0);
716 GREG_INIT(8, en_vdd_com,        en_vdd_com,     "vdd_3v3_devices",      TEGRA_GPIO_PD0,         false,  1,      0,      0,      0);
717 GREG_INIT(9, en_3v3_fuse,       en_3v3_fuse,    "vdd_3v3_devices",      TEGRA_GPIO_PL6,         false,  0,      0,      0,      0);
718 GREG_INIT(10, en_3v3_emmc,      en_3v3_emmc,    "vdd_3v3_devices",      TEGRA_GPIO_PD1,         false,  1,      0,      0,      0);
719 GREG_INIT(11, en_vdd_sdmmc1,    en_vdd_sdmmc1,  "vdd_3v3_devices",      TEGRA_GPIO_PD7,         false,  1,      0,      0,      0);
720 GREG_INIT(12, en_3v3_pex_hvdd,  en_3v3_pex_hvdd, "vdd_3v3_devices",     TEGRA_GPIO_PL7,         false,  0,      0,      0,      0);
721 GREG_INIT(13, en_1v8_cam,       en_1v8_cam,     "vdd_gen1v8",           TEGRA_GPIO_PBB4,        false,  0,      0,      0,      0);
722
723 /* E1291-A04 specific */
724 GREG_INIT(1, en_5v0_a04,        en_5v0,         NULL,                   TPS6591X_GPIO_GP8,      false,  0,      0,      0,      0);
725 GREG_INIT(2, en_ddr_a04,        en_ddr,         NULL,                   TPS6591X_GPIO_GP7,      false,  0,      0,      0,      0);
726 GREG_INIT(3, en_3v3_sys_a04,    en_3v3_sys,     NULL,                   TPS6591X_GPIO_GP6,      false,  0,      0,      0,      0);
727
728
729 /*Specific to pm269*/
730 GREG_INIT(4, en_vdd_bl_p269,            en_vdd_bl,              NULL,
731         TEGRA_GPIO_PH3, false,  1,      0,      0,      0);
732 GREG_INIT(6, en_vdd_pnl1_pm269,         en_vdd_pnl1,            "vdd_3v3_devices",
733         TEGRA_GPIO_PW1, false,  1,      0,      0,      0);
734 GREG_INIT(9, en_3v3_fuse_pm269,         en_3v3_fuse,            "vdd_3v3_devices",
735         TEGRA_GPIO_PC1, false,  0,      0,      0,      0);
736 GREG_INIT(11, en_vdd_sdmmc1_pm269,      en_vdd_sdmmc1,          "vdd_3v3_devices",
737         TEGRA_GPIO_PP1, false,  1,      0,      0,      0);
738 GREG_INIT(12, en_3v3_pex_hvdd_pm269,    en_3v3_pex_hvdd,        "vdd_3v3_devices",
739         TEGRA_GPIO_PC6, false,  0,      0,      0,      0);
740 GREG_INIT(17, en_vddio_vid_oc_pm269,    en_vddio_vid_oc,        "master_5v_switch",
741         TEGRA_GPIO_PP2, false,  0,      TEGRA_PINGROUP_VI_PCLK,
742         enable_load_switch_rail, disable_load_switch_rail);
743
744 /* Specific to E1187/E1186 */
745 GREG_INIT(14, dis_5v_switch_e118x,      dis_5v_switch,          "vdd_5v0_sys",
746                 TEGRA_GPIO_PX2,         true,   0,      0,      0,      0);
747 GREG_INIT(15, en_usb1_vbus_oc_e118x,    en_usb1_vbus_oc,        "master_5v_switch",
748                 TEGRA_GPIO_PI4,         false,  0,      TEGRA_PINGROUP_GMI_RST_N,
749                 enable_load_switch_rail, disable_load_switch_rail);
750 GREG_INIT(16, en_usb3_vbus_oc_e118x,    en_usb3_vbus_oc,        "master_5v_switch",
751                 TEGRA_GPIO_PH7,         false,  0,      TEGRA_PINGROUP_GMI_AD15,
752                 enable_load_switch_rail, disable_load_switch_rail);
753 GREG_INIT(17, en_vddio_vid_oc_e118x,    en_vddio_vid_oc,        "master_5v_switch",
754                 TEGRA_GPIO_PT0,         false,  0,      TEGRA_PINGROUP_VI_PCLK,
755                 enable_load_switch_rail, disable_load_switch_rail);
756
757 /* E1198/E1291 specific  fab < A03 */
758 GREG_INIT(15, en_usb1_vbus_oc,          en_usb1_vbus_oc,        "vdd_5v0_sys",
759                 TEGRA_GPIO_PI4,         false,  0,      TEGRA_PINGROUP_GMI_RST_N,
760                 enable_load_switch_rail, disable_load_switch_rail);
761 GREG_INIT(16, en_usb3_vbus_oc,          en_usb3_vbus_oc,        "vdd_5v0_sys",
762                 TEGRA_GPIO_PH7,         false,  0,      TEGRA_PINGROUP_GMI_AD15,
763                 enable_load_switch_rail, disable_load_switch_rail);
764
765 /* E1198/E1291 specific  fab >= A03 */
766 GREG_INIT(15, en_usb1_vbus_oc_a03,      en_usb1_vbus_oc,        "vdd_5v0_sys",
767                 TEGRA_GPIO_PDD6,                false,  0,      TEGRA_PINGROUP_PEX_L1_CLKREQ_N,
768                 enable_load_switch_rail, disable_load_switch_rail);
769 GREG_INIT(16, en_usb3_vbus_oc_a03,              en_usb3_vbus_oc,        "vdd_5v0_sys",
770                 TEGRA_GPIO_PDD4,                false,  0,      TEGRA_PINGROUP_PEX_L1_PRSNT_N,
771                 enable_load_switch_rail, disable_load_switch_rail);
772
773 /* E1198/E1291 specific */
774 GREG_INIT(17, en_vddio_vid_oc,          en_vddio_vid_oc,        "vdd_5v0_sys",
775                 TEGRA_GPIO_PT0,         false,  0,      TEGRA_PINGROUP_VI_PCLK,
776                 enable_load_switch_rail, disable_load_switch_rail);
777
778 /* E1198/E1291 specific*/
779 GREG_INIT(18, cam1_ldo_en,      cam1_ldo_en,    "vdd_3v3_cam",  TEGRA_GPIO_PR6,         false,  0,      0,      0,      0);
780 GREG_INIT(19, cam2_ldo_en,      cam2_ldo_en,    "vdd_3v3_cam",  TEGRA_GPIO_PR7,         false,  0,      0,      0,      0);
781
782 /* E1291 A03 specific */
783 GREG_INIT(20, en_vdd_bl1_a03,   en_vdd_bl,      NULL,           TEGRA_GPIO_PDD2,        false,  1,      0,      0,      0);
784 GREG_INIT(21, en_vdd_bl2_a03,   en_vdd_bl2,     NULL,           TEGRA_GPIO_PDD0,        false,  1,      0,      0,      0);
785
786 GREG_INIT(22, en_vbrtr,         en_vbrtr,       "vdd_3v3_devices",      PMU_TCA6416_GPIO_PORT12,        false,  0,      0,      0,      0);
787
788 #define ADD_GPIO_REG(_name) &gpio_pdata_##_name
789
790 #define COMMON_GPIO_REG \
791         ADD_GPIO_REG(en_5v_cp),                 \
792         ADD_GPIO_REG(en_5v0),                   \
793         ADD_GPIO_REG(en_ddr),                   \
794         ADD_GPIO_REG(en_3v3_sys),               \
795         ADD_GPIO_REG(en_3v3_modem),             \
796         ADD_GPIO_REG(en_vdd_pnl1),              \
797         ADD_GPIO_REG(cam3_ldo_en),              \
798         ADD_GPIO_REG(en_vdd_com),               \
799         ADD_GPIO_REG(en_3v3_fuse),              \
800         ADD_GPIO_REG(en_3v3_emmc),              \
801         ADD_GPIO_REG(en_vdd_sdmmc1),            \
802         ADD_GPIO_REG(en_3v3_pex_hvdd),          \
803         ADD_GPIO_REG(en_1v8_cam),
804
805 #define COMMON_GPIO_REG_E1291_A04 \
806         ADD_GPIO_REG(en_5v_cp),                 \
807         ADD_GPIO_REG(en_5v0_a04),               \
808         ADD_GPIO_REG(en_ddr_a04),               \
809         ADD_GPIO_REG(en_3v3_sys_a04),           \
810         ADD_GPIO_REG(en_3v3_modem),             \
811         ADD_GPIO_REG(en_vdd_pnl1),              \
812         ADD_GPIO_REG(cam3_ldo_en),              \
813         ADD_GPIO_REG(en_vdd_com),               \
814         ADD_GPIO_REG(en_3v3_fuse),              \
815         ADD_GPIO_REG(en_3v3_emmc),              \
816         ADD_GPIO_REG(en_vdd_sdmmc1),            \
817         ADD_GPIO_REG(en_3v3_pex_hvdd),          \
818         ADD_GPIO_REG(en_1v8_cam),
819
820 #define PM269_GPIO_REG \
821         ADD_GPIO_REG(en_5v_cp),                 \
822         ADD_GPIO_REG(en_5v0),                   \
823         ADD_GPIO_REG(en_ddr),                   \
824         ADD_GPIO_REG(en_vdd_bl),                \
825         ADD_GPIO_REG(en_3v3_sys),               \
826         ADD_GPIO_REG(en_3v3_modem),             \
827         ADD_GPIO_REG(en_vdd_pnl1),              \
828         ADD_GPIO_REG(cam3_ldo_en),              \
829         ADD_GPIO_REG(en_vdd_com),               \
830         ADD_GPIO_REG(en_3v3_fuse_pm269),        \
831         ADD_GPIO_REG(en_3v3_emmc),              \
832         ADD_GPIO_REG(en_vdd_sdmmc1_pm269),      \
833         ADD_GPIO_REG(en_3v3_pex_hvdd_pm269),    \
834         ADD_GPIO_REG(en_1v8_cam),               \
835         ADD_GPIO_REG(dis_5v_switch_e118x),      \
836         ADD_GPIO_REG(en_usb1_vbus_oc_e118x),    \
837         ADD_GPIO_REG(en_usb3_vbus_oc_e118x),    \
838         ADD_GPIO_REG(en_vddio_vid_oc_pm269),
839
840 #define E118x_GPIO_REG  \
841         ADD_GPIO_REG(en_vdd_bl),                \
842         ADD_GPIO_REG(dis_5v_switch_e118x),      \
843         ADD_GPIO_REG(en_usb1_vbus_oc_e118x),    \
844         ADD_GPIO_REG(en_usb3_vbus_oc_e118x),    \
845         ADD_GPIO_REG(en_vddio_vid_oc_e118x), \
846         ADD_GPIO_REG(en_vbrtr),
847
848 #define E1198_GPIO_REG  \
849         ADD_GPIO_REG(en_vddio_vid_oc),          \
850         ADD_GPIO_REG(cam1_ldo_en),              \
851         ADD_GPIO_REG(cam2_ldo_en),
852
853 #define E1291_1198_A00_GPIO_REG \
854         ADD_GPIO_REG(en_usb1_vbus_oc),          \
855         ADD_GPIO_REG(en_usb3_vbus_oc),          \
856         ADD_GPIO_REG(en_vdd_bl),
857
858 #define E1291_A03_GPIO_REG      \
859         ADD_GPIO_REG(en_usb1_vbus_oc_a03),              \
860         ADD_GPIO_REG(en_usb3_vbus_oc_a03),              \
861         ADD_GPIO_REG(en_vdd_bl1_a03), \
862         ADD_GPIO_REG(en_vdd_bl2_a03),
863
864 /* Gpio switch regulator platform data  for E1186/E1187*/
865
866 /* Gpio switch regulator platform data  for E1186/E1187*/
867 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e118x[] = {
868         COMMON_GPIO_REG
869         E118x_GPIO_REG
870 };
871
872 /* Gpio switch regulator platform data for E1198 and E1291*/
873 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1198[] = {
874         COMMON_GPIO_REG
875         E1291_1198_A00_GPIO_REG
876         E1198_GPIO_REG
877 };
878
879 /* Gpio switch regulator platform data for PM269*/
880 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_pm269[] = {
881         PM269_GPIO_REG
882 };
883
884 /* Gpio switch regulator platform data for E1291 A03*/
885 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1291_a03[] = {
886         COMMON_GPIO_REG
887         E1291_A03_GPIO_REG
888         E1198_GPIO_REG
889 };
890
891 /* Gpio switch regulator platform data for E1291 A04*/
892 static struct gpio_switch_regulator_subdev_data *gswitch_subdevs_e1291_a04[] = {
893         COMMON_GPIO_REG_E1291_A04
894         E1291_A03_GPIO_REG
895         E1198_GPIO_REG
896 };
897
898
899 static struct gpio_switch_regulator_platform_data  gswitch_pdata;
900 static struct platform_device gswitch_regulator_pdata = {
901         .name = "gpio-switch-regulator",
902         .id   = -1,
903         .dev  = {
904              .platform_data = &gswitch_pdata,
905         },
906 };
907
908 int __init cardhu_gpio_switch_regulator_init(void)
909 {
910         int i;
911         struct board_info board_info;
912         tegra_get_board_info(&board_info);
913         switch (board_info.board_id) {
914         case BOARD_E1198:
915                 gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e1198);
916                 gswitch_pdata.subdevs = gswitch_subdevs_e1198;
917                 break;
918         case BOARD_E1291:
919                 if (board_info.fab == 0x3) {
920                         gswitch_pdata.num_subdevs =
921                                         ARRAY_SIZE(gswitch_subdevs_e1291_a03);
922                         gswitch_pdata.subdevs = gswitch_subdevs_e1291_a03;
923                 } else if (board_info.fab == 0x4) {
924                         gswitch_pdata.num_subdevs =
925                                         ARRAY_SIZE(gswitch_subdevs_e1291_a04);
926                         gswitch_pdata.subdevs = gswitch_subdevs_e1291_a04;
927                 } else {
928                         gswitch_pdata.num_subdevs =
929                                         ARRAY_SIZE(gswitch_subdevs_e1198);
930                         gswitch_pdata.subdevs = gswitch_subdevs_e1198;
931                 }
932                 break;
933         case BOARD_PM269:
934                 gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_pm269);
935                 gswitch_pdata.subdevs = gswitch_subdevs_pm269;
936                 break;
937         default:
938                 gswitch_pdata.num_subdevs = ARRAY_SIZE(gswitch_subdevs_e118x);
939                 gswitch_pdata.subdevs = gswitch_subdevs_e118x;
940                 break;
941         }
942
943         for (i = 0; i < gswitch_pdata.num_subdevs; ++i) {
944                 struct gpio_switch_regulator_subdev_data *gswitch_data = gswitch_pdata.subdevs[i];
945                 if (gswitch_data->gpio_nr <= TEGRA_NR_GPIOS)
946                         tegra_gpio_enable(gswitch_data->gpio_nr);
947         }
948
949         return platform_device_register(&gswitch_regulator_pdata);
950 }
951
952 static struct tegra_suspend_platform_data cardhu_suspend_data = {
953         .cpu_timer      = 2000,
954         .cpu_off_timer  = 200,
955         .suspend_mode   = TEGRA_SUSPEND_LP2,
956         .core_timer     = 0x7e7e,
957         .core_off_timer = 0,
958         .corereq_high   = true,
959         .sysclkreq_high = true,
960         .cpu_lp2_min_residency = 2000,
961 };
962
963 int __init cardhu_suspend_init(void)
964 {
965         struct board_info board_info;
966         struct board_info pmu_board_info;
967
968         tegra_get_board_info(&board_info);
969         tegra_get_pmu_board_info(&pmu_board_info);
970
971         /* For PMU Fab A03 and A04 make core_pwr_req to high */
972         if ((pmu_board_info.fab == 0x3) || (pmu_board_info.fab == 0x4))
973                 cardhu_suspend_data.corereq_high = true;
974
975         /* CORE_PWR_REQ to be high for all processor/pmu board whose sku bit 0
976          * is set. This is require to enable the dc-dc converter tps62361x */
977         if (((board_info.sku & 1) == 1) || ((pmu_board_info.sku & 1) == 1))
978                 cardhu_suspend_data.corereq_high = true;
979
980         switch (board_info.board_id) {
981         case BOARD_E1291:
982                 /* CORE_PWR_REQ to be high for E1291-A03 */
983                 if (board_info.fab == 0x3)
984                         cardhu_suspend_data.corereq_high = true;
985                 break;
986         case BOARD_E1198:
987                 break;
988         case BOARD_PM269:
989         case BOARD_E1187:
990         case BOARD_E1186:
991                 cardhu_suspend_data.cpu_timer = 5000;
992                 cardhu_suspend_data.cpu_off_timer = 5000;
993                 break;
994         default:
995                 break;
996         }
997
998         tegra_init_suspend(&cardhu_suspend_data);
999         return 0;
1000 }
1001
1002 static void cardhu_power_off(void)
1003 {
1004         int ret;
1005         pr_err("cardhu: Powering off the device\n");
1006         ret = tps6591x_power_off();
1007         if (ret)
1008                 pr_err("cardhu: failed to power off\n");
1009
1010         while (1);
1011 }
1012
1013 int __init cardhu_power_off_init(void)
1014 {
1015         pm_power_off = cardhu_power_off;
1016         return 0;
1017 }
1018
1019 #ifdef CONFIG_TEGRA_EDP_LIMITS
1020 /*
1021  * placeholder for now. needs to be changed with characterized data.
1022  * step size cannot be less than 4C
1023  */
1024 static struct tegra_edp_limits cardhu_edp_limits[] = {
1025 /* Temperature   1 CPU    2 CPUs   3 CPUs   4 CPUs */
1026         {60,    {1400000, 1300000, 1300000, 1300000} },
1027         {70,    {1400000, 1300000, 1300000, 1260000} },
1028         {80,    {1400000, 1300000, 1300000, 1200000} },
1029         {90,    {1400000, 1300000, 1300000, 1100000} },
1030 };
1031
1032 void cardhu_thermal_zones_info(struct tegra_edp_limits **z, int *sz)
1033 {
1034         *z = cardhu_edp_limits;
1035         *sz = ARRAY_SIZE(cardhu_edp_limits);
1036 }
1037
1038 int __init cardhu_edp_init(void)
1039 {
1040         tegra_init_cpu_edp_limits(cardhu_edp_limits, ARRAY_SIZE(cardhu_edp_limits));
1041         return 0;
1042 }
1043 #endif