ARM: tegra: cardhu: Remove tegra_gpio_enb/disable
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu-power.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu-power.c
3  *
4  * Copyright (C) 2011 NVIDIA, Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
18  * 02111-1307, USA
19  */
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/regulator/machine.h>
25 #include <linux/mfd/tps6591x.h>
26 #include <linux/mfd/max77663-core.h>
27 #include <linux/gpio.h>
28 #include <linux/io.h>
29 #include <linux/regulator/fixed.h>
30 #include <linux/regulator/tps6591x-regulator.h>
31 #include <linux/regulator/tps62360.h>
32 #include <linux/power/gpio-charger.h>
33
34 #include <asm/mach-types.h>
35
36 #include <mach/iomap.h>
37 #include <mach/irqs.h>
38 #include <mach/pinmux.h>
39 #include <mach/edp.h>
40
41 #include "gpio-names.h"
42 #include "board.h"
43 #include "board-cardhu.h"
44 #include "pm.h"
45 #include "wakeups-t3.h"
46 #include "tegra3_tsensor.h"
47
48 #define PMC_CTRL                0x0
49 #define PMC_CTRL_INTR_LOW       (1 << 17)
50
51 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_0[] = {
52         REGULATOR_SUPPLY("vdd_core", NULL),
53         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
54 };
55
56 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_1[] = {
57         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
58 };
59
60 static struct regulator_consumer_supply tps6591x_vdd2_supply_0[] = {
61         REGULATOR_SUPPLY("vdd_gen1v5", NULL),
62         REGULATOR_SUPPLY("vcore_lcd", NULL),
63         REGULATOR_SUPPLY("track_ldo1", NULL),
64         REGULATOR_SUPPLY("external_ldo_1v2", NULL),
65         REGULATOR_SUPPLY("vcore_cam1", NULL),
66         REGULATOR_SUPPLY("vcore_cam2", NULL),
67 };
68
69 static struct regulator_consumer_supply tps6591x_vddctrl_supply_0[] = {
70         REGULATOR_SUPPLY("vdd_cpu_pmu", NULL),
71         REGULATOR_SUPPLY("vdd_cpu", NULL),
72         REGULATOR_SUPPLY("vdd_sys", NULL),
73 };
74
75 static struct regulator_consumer_supply tps6591x_vio_supply_0[] = {
76         REGULATOR_SUPPLY("vdd_gen1v8", NULL),
77         REGULATOR_SUPPLY("avdd_hdmi_pll", NULL),
78         REGULATOR_SUPPLY("avdd_usb_pll", NULL),
79         REGULATOR_SUPPLY("avdd_osc", NULL),
80         REGULATOR_SUPPLY("vddio_sys", NULL),
81         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
82         REGULATOR_SUPPLY("pwrdet_sdmmc4", NULL),
83         REGULATOR_SUPPLY("vdd1v8_satelite", NULL),
84         REGULATOR_SUPPLY("vddio_uart", NULL),
85         REGULATOR_SUPPLY("pwrdet_uart", NULL),
86         REGULATOR_SUPPLY("vddio_audio", NULL),
87         REGULATOR_SUPPLY("pwrdet_audio", NULL),
88         REGULATOR_SUPPLY("vddio_bb", NULL),
89         REGULATOR_SUPPLY("pwrdet_bb", NULL),
90         REGULATOR_SUPPLY("vddio_lcd_pmu", NULL),
91         REGULATOR_SUPPLY("pwrdet_lcd", NULL),
92         REGULATOR_SUPPLY("vddio_cam", NULL),
93         REGULATOR_SUPPLY("pwrdet_cam", NULL),
94         REGULATOR_SUPPLY("vddio_vi", NULL),
95         REGULATOR_SUPPLY("pwrdet_vi", NULL),
96         REGULATOR_SUPPLY("ldo6", NULL),
97         REGULATOR_SUPPLY("ldo7", NULL),
98         REGULATOR_SUPPLY("ldo8", NULL),
99         REGULATOR_SUPPLY("vcore_audio", NULL),
100         REGULATOR_SUPPLY("avcore_audio", NULL),
101         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
102         REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
103         REGULATOR_SUPPLY("vcore1_lpddr2", NULL),
104         REGULATOR_SUPPLY("vcom_1v8", NULL),
105         REGULATOR_SUPPLY("pmuio_1v8", NULL),
106         REGULATOR_SUPPLY("avdd_ic_usb", NULL),
107 };
108
109 static struct regulator_consumer_supply tps6591x_ldo1_supply_0[] = {
110         REGULATOR_SUPPLY("avdd_pexb", NULL),
111         REGULATOR_SUPPLY("vdd_pexb", NULL),
112         REGULATOR_SUPPLY("avdd_pex_pll", NULL),
113         REGULATOR_SUPPLY("avdd_pexa", NULL),
114         REGULATOR_SUPPLY("vdd_pexa", NULL),
115 };
116
117 static struct regulator_consumer_supply tps6591x_ldo2_supply_0[] = {
118         REGULATOR_SUPPLY("avdd_sata", NULL),
119         REGULATOR_SUPPLY("vdd_sata", NULL),
120         REGULATOR_SUPPLY("avdd_sata_pll", NULL),
121         REGULATOR_SUPPLY("avdd_plle", NULL),
122 };
123
124 static struct regulator_consumer_supply tps6591x_ldo3_supply_e118x[] = {
125         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
126         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
127 };
128
129 static struct regulator_consumer_supply tps6591x_ldo3_supply_e1198[] = {
130         REGULATOR_SUPPLY("unused_rail_ldo3", NULL),
131 };
132
133 static struct regulator_consumer_supply tps6591x_ldo4_supply_0[] = {
134         REGULATOR_SUPPLY("vdd_rtc", NULL),
135 };
136
137 static struct regulator_consumer_supply tps6591x_ldo5_supply_e118x[] = {
138         REGULATOR_SUPPLY("avdd_vdac", NULL),
139 };
140
141 static struct regulator_consumer_supply tps6591x_ldo5_supply_e1198[] = {
142         REGULATOR_SUPPLY("avdd_vdac", NULL),
143         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
144         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
145 };
146
147 static struct regulator_consumer_supply tps6591x_ldo6_supply_0[] = {
148         REGULATOR_SUPPLY("avdd_dsi_csi", NULL),
149         REGULATOR_SUPPLY("pwrdet_mipi", NULL),
150 };
151 static struct regulator_consumer_supply tps6591x_ldo7_supply_0[] = {
152         REGULATOR_SUPPLY("avdd_plla_p_c_s", NULL),
153         REGULATOR_SUPPLY("avdd_pllm", NULL),
154         REGULATOR_SUPPLY("avdd_pllu_d", NULL),
155         REGULATOR_SUPPLY("avdd_pllu_d2", NULL),
156         REGULATOR_SUPPLY("avdd_pllx", NULL),
157 };
158
159 static struct regulator_consumer_supply tps6591x_ldo8_supply_0[] = {
160         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
161 };
162
163 #define TPS_PDATA_INIT(_name, _sname, _minmv, _maxmv, _supply_reg, _always_on, \
164         _boot_on, _apply_uv, _init_uV, _init_enable, _init_apply, _ectrl, _flags) \
165         static struct tps6591x_regulator_platform_data pdata_##_name##_##_sname = \
166         {                                                               \
167                 .regulator = {                                          \
168                         .constraints = {                                \
169                                 .min_uV = (_minmv)*1000,                \
170                                 .max_uV = (_maxmv)*1000,                \
171                                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
172                                                      REGULATOR_MODE_STANDBY), \
173                                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
174                                                    REGULATOR_CHANGE_STATUS |  \
175                                                    REGULATOR_CHANGE_VOLTAGE), \
176                                 .always_on = _always_on,                \
177                                 .boot_on = _boot_on,                    \
178                                 .apply_uV = _apply_uv,                  \
179                         },                                              \
180                         .num_consumer_supplies =                        \
181                                 ARRAY_SIZE(tps6591x_##_name##_supply_##_sname), \
182                         .consumer_supplies = tps6591x_##_name##_supply_##_sname,        \
183                         .supply_regulator = _supply_reg,                \
184                 },                                                      \
185                 .init_uV =  _init_uV * 1000,                            \
186                 .init_enable = _init_enable,                            \
187                 .init_apply = _init_apply,                              \
188                 .ectrl = _ectrl,                                        \
189                 .flags = _flags,                                        \
190         }
191
192 TPS_PDATA_INIT(vdd1, skubit0_0, 600,  1500, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF, 0);
193 TPS_PDATA_INIT(vdd1, skubit0_1, 600,  1500, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF, 0);
194 TPS_PDATA_INIT(vdd2, 0,         600,  1500, 0, 0, 1, 0, -1, 0, 0, 0, 0);
195 TPS_PDATA_INIT(vddctrl, 0,      600,  1400, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_EN1, 0);
196 TPS_PDATA_INIT(vio,  0,         1500, 3300, 0, 1, 1, 0, -1, 0, 0, 0, 0);
197
198 TPS_PDATA_INIT(ldo1, 0,         1000, 3300, tps6591x_rails(VDD_2), 0, 0, 0, -1, 0, 1, 0, 0);
199 TPS_PDATA_INIT(ldo2, 0,         1050, 1050, tps6591x_rails(VDD_2), 0, 0, 1, -1, 0, 1, 0, 0);
200
201 TPS_PDATA_INIT(ldo3, e118x,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
202 TPS_PDATA_INIT(ldo3, e1198,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
203 TPS_PDATA_INIT(ldo4, 0,         1000, 3300, 0, 1, 0, 0, -1, 0, 0, 0, 0);
204 TPS_PDATA_INIT(ldo5, e118x,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
205 TPS_PDATA_INIT(ldo5, e1198,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
206
207 TPS_PDATA_INIT(ldo6, 0,         1200, 1200, tps6591x_rails(VIO), 0, 0, 1, -1, 0, 0, 0, 0);
208 TPS_PDATA_INIT(ldo7, 0,         1200, 1200, tps6591x_rails(VIO), 1, 1, 1, -1, 0, 0, EXT_CTRL_SLEEP_OFF, LDO_LOW_POWER_ON_SUSPEND);
209 TPS_PDATA_INIT(ldo8, 0,         1000, 3300, tps6591x_rails(VIO), 1, 0, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF, LDO_LOW_POWER_ON_SUSPEND);
210
211 #if defined(CONFIG_RTC_DRV_TPS6591x)
212 static struct tps6591x_rtc_platform_data rtc_data = {
213         .irq = TEGRA_NR_IRQS + TPS6591X_INT_RTC_ALARM,
214         .time = {
215                 .tm_year = 2000,
216                 .tm_mon = 0,
217                 .tm_mday = 1,
218                 .tm_hour = 0,
219                 .tm_min = 0,
220                 .tm_sec = 0,
221         },
222 };
223
224 #define TPS_RTC_REG()                                   \
225         {                                               \
226                 .id     = 0,                            \
227                 .name   = "rtc_tps6591x",               \
228                 .platform_data = &rtc_data,             \
229         }
230 #endif
231
232 #define TPS_REG(_id, _name, _sname)                             \
233         {                                                       \
234                 .id     = TPS6591X_ID_##_id,                    \
235                 .name   = "tps6591x-regulator",                 \
236                 .platform_data  = &pdata_##_name##_##_sname,    \
237         }
238
239 #define TPS6591X_DEV_COMMON_E118X               \
240         TPS_REG(VDD_2, vdd2, 0),                \
241         TPS_REG(VDDCTRL, vddctrl, 0),           \
242         TPS_REG(LDO_1, ldo1, 0),                \
243         TPS_REG(LDO_2, ldo2, 0),                \
244         TPS_REG(LDO_3, ldo3, e118x),            \
245         TPS_REG(LDO_4, ldo4, 0),                \
246         TPS_REG(LDO_5, ldo5, e118x),            \
247         TPS_REG(LDO_6, ldo6, 0),                \
248         TPS_REG(LDO_7, ldo7, 0),                \
249         TPS_REG(LDO_8, ldo8, 0)
250
251 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_0[] = {
252         TPS_REG(VIO, vio, 0),
253         TPS_REG(VDD_1, vdd1, skubit0_0),
254         TPS6591X_DEV_COMMON_E118X,
255 #if defined(CONFIG_RTC_DRV_TPS6591x)
256         TPS_RTC_REG(),
257 #endif
258 };
259
260 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_1[] = {
261         TPS_REG(VIO, vio, 0),
262         TPS_REG(VDD_1, vdd1, skubit0_1),
263         TPS6591X_DEV_COMMON_E118X,
264 #if defined(CONFIG_RTC_DRV_TPS6591x)
265         TPS_RTC_REG(),
266 #endif
267 };
268
269 #define TPS6591X_DEV_COMMON_CARDHU              \
270         TPS_REG(VDD_2, vdd2, 0),                \
271         TPS_REG(VDDCTRL, vddctrl, 0),           \
272         TPS_REG(LDO_1, ldo1, 0),                \
273         TPS_REG(LDO_2, ldo2, 0),                \
274         TPS_REG(LDO_3, ldo3, e1198),            \
275         TPS_REG(LDO_4, ldo4, 0),                \
276         TPS_REG(LDO_5, ldo5, e1198),            \
277         TPS_REG(LDO_6, ldo6, 0),                \
278         TPS_REG(LDO_7, ldo7, 0),                \
279         TPS_REG(LDO_8, ldo8, 0)
280
281 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_0[] = {
282         TPS_REG(VIO, vio, 0),
283         TPS_REG(VDD_1, vdd1, skubit0_0),
284         TPS6591X_DEV_COMMON_CARDHU,
285 #if defined(CONFIG_RTC_DRV_TPS6591x)
286         TPS_RTC_REG(),
287 #endif
288 };
289
290 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_1[] = {
291         TPS_REG(VIO, vio, 0),
292         TPS_REG(VDD_1, vdd1, skubit0_1),
293         TPS6591X_DEV_COMMON_CARDHU,
294 #if defined(CONFIG_RTC_DRV_TPS6591x)
295         TPS_RTC_REG(),
296 #endif
297 };
298
299 #define TPS_GPIO_INIT_PDATA(gpio_nr, _init_apply, _sleep_en, _pulldn_en, _output_en, _output_val)       \
300         [gpio_nr] = {                                   \
301                         .sleep_en       = _sleep_en,    \
302                         .pulldn_en      = _pulldn_en,   \
303                         .output_mode_en = _output_en,   \
304                         .output_val     = _output_val,  \
305                         .init_apply     = _init_apply,  \
306                      }
307 static struct tps6591x_gpio_init_data tps_gpio_pdata_e1291_a04[] =  {
308         TPS_GPIO_INIT_PDATA(0, 0, 0, 0, 0, 0),
309         TPS_GPIO_INIT_PDATA(1, 0, 0, 0, 0, 0),
310         TPS_GPIO_INIT_PDATA(2, 1, 1, 0, 1, 1),
311         TPS_GPIO_INIT_PDATA(3, 0, 0, 0, 0, 0),
312         TPS_GPIO_INIT_PDATA(4, 0, 0, 0, 0, 0),
313         TPS_GPIO_INIT_PDATA(5, 0, 0, 0, 0, 0),
314         TPS_GPIO_INIT_PDATA(6, 0, 0, 0, 0, 0),
315         TPS_GPIO_INIT_PDATA(7, 0, 0, 0, 0, 0),
316         TPS_GPIO_INIT_PDATA(8, 0, 0, 0, 0, 0),
317 };
318
319 static struct tps6591x_sleep_keepon_data tps_slp_keepon = {
320         .clkout32k_keepon = 1,
321 };
322
323 static struct tps6591x_platform_data tps_platform = {
324         .irq_base       = TPS6591X_IRQ_BASE,
325         .gpio_base      = TPS6591X_GPIO_BASE,
326         .dev_slp_en     = true,
327         .slp_keepon     = &tps_slp_keepon,
328         .use_power_off  = true,
329 };
330
331 static struct i2c_board_info __initdata cardhu_regulators[] = {
332         {
333                 I2C_BOARD_INFO("tps6591x", 0x2D),
334                 .irq            = INT_EXTERNAL_PMU,
335                 .platform_data  = &tps_platform,
336         },
337 };
338
339 /* TPS62361B DC-DC converter */
340 static struct regulator_consumer_supply tps62361_dcdc_supply[] = {
341         REGULATOR_SUPPLY("vdd_core", NULL),
342 };
343
344 static struct tps62360_regulator_platform_data tps62361_pdata = {
345         .reg_init_data = {                                      \
346                 .constraints = {                                \
347                         .min_uV = 500000,                       \
348                         .max_uV = 1770000,                      \
349                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
350                                              REGULATOR_MODE_STANDBY), \
351                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
352                                            REGULATOR_CHANGE_STATUS |  \
353                                            REGULATOR_CHANGE_VOLTAGE), \
354                         .always_on = 1,                         \
355                         .boot_on =  1,                          \
356                         .apply_uV = 0,                          \
357                 },                                              \
358                 .num_consumer_supplies = ARRAY_SIZE(tps62361_dcdc_supply), \
359                 .consumer_supplies = tps62361_dcdc_supply,      \
360                 },                                              \
361         .en_discharge = true,                                   \
362         .vsel0_gpio = -1,                                       \
363         .vsel1_gpio = -1,                                       \
364         .vsel0_def_state = 1,                                   \
365         .vsel1_def_state = 1,                                   \
366 };
367
368 static struct i2c_board_info __initdata tps62361_boardinfo[] = {
369         {
370                 I2C_BOARD_INFO("tps62361", 0x60),
371                 .platform_data  = &tps62361_pdata,
372         },
373 };
374
375 int __init cardhu_regulator_init(void)
376 {
377         struct board_info board_info;
378         struct board_info pmu_board_info;
379         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
380         u32 pmc_ctrl;
381         bool ext_core_regulator = false;
382
383         /* configure the power management controller to trigger PMU
384          * interrupts when low */
385
386         pmc_ctrl = readl(pmc + PMC_CTRL);
387         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
388
389         tegra_get_board_info(&board_info);
390         tegra_get_pmu_board_info(&pmu_board_info);
391
392         if (pmu_board_info.board_id == BOARD_PMU_PM298)
393                 return cardhu_pm298_regulator_init();
394
395         if (pmu_board_info.board_id == BOARD_PMU_PM299)
396                 return cardhu_pm299_regulator_init();
397
398         /* The regulator details have complete constraints */
399         regulator_has_full_constraints();
400
401         /* PMU-E1208, the ldo2 should be set to 1200mV */
402         if (pmu_board_info.board_id == BOARD_E1208) {
403                 pdata_ldo2_0.regulator.constraints.min_uV = 1200000;
404                 pdata_ldo2_0.regulator.constraints.max_uV = 1200000;
405         }
406
407         /*
408          * E1198 will have different core regulator decoding.
409          * A01/A02: Based on sku bit 0.
410          * A03: Based on bit 2 and bit 0
411          *       2,0: 00 no core regulator,
412          *            01:TPS62365
413          *            10:TPS62366
414          *            11:TPS623850
415          */
416         if (board_info.board_id == BOARD_E1198) {
417                 int vsels;
418                 switch(board_info.fab) {
419                 case BOARD_FAB_A00:
420                 case BOARD_FAB_A01:
421                 case BOARD_FAB_A02:
422                         if (board_info.sku & SKU_DCDC_TPS62361_SUPPORT)
423                                 ext_core_regulator = true;
424                         break;
425
426                 case BOARD_FAB_A03:
427                         vsels = ((board_info.sku >> 1) & 0x2) | (board_info.sku & 1);
428                         switch(vsels) {
429                         case 1:
430                                 ext_core_regulator = true;
431                                 tps62361_pdata.vsel0_def_state = 1;
432                                 tps62361_pdata.vsel1_def_state = 1;
433                                 break;
434                         case 2:
435                                 ext_core_regulator = true;
436                                 tps62361_pdata.vsel0_def_state = 0;
437                                 tps62361_pdata.vsel1_def_state = 0;
438                                 break;
439                         case 3:
440                                 ext_core_regulator = true;
441                                 tps62361_pdata.vsel0_def_state = 1;
442                                 tps62361_pdata.vsel1_def_state = 0;
443                                 break;
444                         }
445                         break;
446                 }
447
448                 pr_info("BoardId:SKU:Fab 0x%04x:0x%04x:0x%02x\n",
449                         board_info.board_id, board_info.sku , board_info.fab);
450                 pr_info("Core regulator %s\n",
451                         (ext_core_regulator)? "true": "false");
452                 pr_info("VSEL 1:0 %d%d\n",
453                         tps62361_pdata.vsel1_def_state,
454                         tps62361_pdata.vsel0_def_state);
455         }
456
457         if ((board_info.board_id == BOARD_E1291) &&
458                 (board_info.sku & SKU_DCDC_TPS62361_SUPPORT))
459                 ext_core_regulator = true;
460
461         if ((board_info.board_id == BOARD_E1198) ||
462                 (board_info.board_id == BOARD_E1291)) {
463                 if (ext_core_regulator) {
464                         tps_platform.num_subdevs =
465                                         ARRAY_SIZE(tps_devs_e1198_skubit0_1);
466                         tps_platform.subdevs = tps_devs_e1198_skubit0_1;
467                 } else {
468                         tps_platform.num_subdevs =
469                                         ARRAY_SIZE(tps_devs_e1198_skubit0_0);
470                         tps_platform.subdevs = tps_devs_e1198_skubit0_0;
471                 }
472         } else {
473                 if (board_info.board_id == BOARD_PM269)
474                         pdata_ldo3_e118x.slew_rate_uV_per_us = 250;
475
476                 if (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT) {
477                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_1);
478                         tps_platform.subdevs = tps_devs_e118x_skubit0_1;
479                         ext_core_regulator = true;
480                 } else {
481                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_0);
482                         tps_platform.subdevs = tps_devs_e118x_skubit0_0;
483                 }
484         }
485
486         /* E1291-A04/A05: Enable DEV_SLP and enable sleep on GPIO2 */
487         if ((board_info.board_id == BOARD_E1291) &&
488                         ((board_info.fab == BOARD_FAB_A04) ||
489                          (board_info.fab == BOARD_FAB_A05) ||
490                          (board_info.fab == BOARD_FAB_A07))) {
491                 tps_platform.dev_slp_en = true;
492                 tps_platform.gpio_init_data = tps_gpio_pdata_e1291_a04;
493                 tps_platform.num_gpioinit_data =
494                                         ARRAY_SIZE(tps_gpio_pdata_e1291_a04);
495         }
496
497         i2c_register_board_info(4, cardhu_regulators, 1);
498
499         /* Register the external core regulator if it is require */
500         if (ext_core_regulator) {
501                 pr_info("Registering the core regulator\n");
502                 i2c_register_board_info(4, tps62361_boardinfo, 1);
503         }
504         return 0;
505 }
506
507
508 /**************** GPIO based fixed regulator *****************/
509 /* EN_5V_CP from PMU GP0 */
510 static struct regulator_consumer_supply fixed_reg_en_5v_cp_supply[] = {
511         REGULATOR_SUPPLY("vdd_5v0_sby", NULL),
512         REGULATOR_SUPPLY("vdd_hall", NULL),
513         REGULATOR_SUPPLY("vterm_ddr", NULL),
514         REGULATOR_SUPPLY("v2ref_ddr", NULL),
515 };
516
517 /* EN_5V0 From PMU GP2 */
518 static struct regulator_consumer_supply fixed_reg_en_5v0_supply[] = {
519         REGULATOR_SUPPLY("vdd_5v0_sys", NULL),
520 };
521
522 /* EN_DDR From PMU GP6 */
523 static struct regulator_consumer_supply fixed_reg_en_ddr_supply[] = {
524         REGULATOR_SUPPLY("mem_vddio_ddr", NULL),
525         REGULATOR_SUPPLY("t30_vddio_ddr", NULL),
526 };
527
528 /* EN_3V3_SYS From PMU GP7 */
529 static struct regulator_consumer_supply fixed_reg_en_3v3_sys_supply[] = {
530         REGULATOR_SUPPLY("vdd_lvds", NULL),
531         REGULATOR_SUPPLY("vdd_pnl", NULL),
532         REGULATOR_SUPPLY("vcom_3v3", NULL),
533         REGULATOR_SUPPLY("vdd_3v3", NULL),
534         REGULATOR_SUPPLY("vcore_mmc", NULL),
535         REGULATOR_SUPPLY("vddio_pex_ctl", NULL),
536         REGULATOR_SUPPLY("pwrdet_pex_ctl", NULL),
537         REGULATOR_SUPPLY("hvdd_pex_pmu", NULL),
538         REGULATOR_SUPPLY("avdd_hdmi", NULL),
539         REGULATOR_SUPPLY("vpp_fuse", NULL),
540         REGULATOR_SUPPLY("avdd_usb", NULL),
541         REGULATOR_SUPPLY("vdd_ddr_rx", NULL),
542         REGULATOR_SUPPLY("vcore_nand", NULL),
543         REGULATOR_SUPPLY("hvdd_sata", NULL),
544         REGULATOR_SUPPLY("vddio_gmi_pmu", NULL),
545         REGULATOR_SUPPLY("pwrdet_nand", NULL),
546         REGULATOR_SUPPLY("avdd_cam1", NULL),
547         REGULATOR_SUPPLY("vdd_af", NULL),
548         REGULATOR_SUPPLY("avdd_cam2", NULL),
549         REGULATOR_SUPPLY("vdd_acc", NULL),
550         REGULATOR_SUPPLY("vdd_phtl", NULL),
551         REGULATOR_SUPPLY("vddio_tp", NULL),
552         REGULATOR_SUPPLY("vdd_led", NULL),
553         REGULATOR_SUPPLY("vddio_cec", NULL),
554         REGULATOR_SUPPLY("vdd_cmps", NULL),
555         REGULATOR_SUPPLY("vdd_temp", NULL),
556         REGULATOR_SUPPLY("vpp_kfuse", NULL),
557         REGULATOR_SUPPLY("vddio_ts", NULL),
558         REGULATOR_SUPPLY("vdd_ir_led", NULL),
559         REGULATOR_SUPPLY("vddio_1wire", NULL),
560         REGULATOR_SUPPLY("avddio_audio", NULL),
561         REGULATOR_SUPPLY("vdd_ec", NULL),
562         REGULATOR_SUPPLY("vcom_pa", NULL),
563         REGULATOR_SUPPLY("vdd_3v3_devices", NULL),
564         REGULATOR_SUPPLY("vdd_3v3_dock", NULL),
565         REGULATOR_SUPPLY("vdd_3v3_edid", NULL),
566         REGULATOR_SUPPLY("vdd_3v3_hdmi_cec", NULL),
567         REGULATOR_SUPPLY("vdd_3v3_gmi", NULL),
568         REGULATOR_SUPPLY("vdd_spk_amp", "tegra-snd-wm8903.0"),
569         REGULATOR_SUPPLY("vdd_3v3_sensor", NULL),
570         REGULATOR_SUPPLY("vdd_3v3_cam", NULL),
571         REGULATOR_SUPPLY("vdd_3v3_als", NULL),
572         REGULATOR_SUPPLY("debug_cons", NULL),
573         REGULATOR_SUPPLY("vdd", "4-004c"),
574 };
575
576 /* DIS_5V_SWITCH from AP SPI2_SCK X02 */
577 static struct regulator_consumer_supply fixed_reg_dis_5v_switch_supply[] = {
578         REGULATOR_SUPPLY("master_5v_switch", NULL),
579 };
580
581 /* EN_VDD_BL */
582 static struct regulator_consumer_supply fixed_reg_en_vdd_bl_supply[] = {
583         REGULATOR_SUPPLY("vdd_backlight", NULL),
584         REGULATOR_SUPPLY("vdd_backlight1", NULL),
585 };
586
587 /* EN_VDD_BL2 (E1291-A03) from AP PEX_L0_PRSNT_N DD.00 */
588 static struct regulator_consumer_supply fixed_reg_en_vdd_bl2_supply[] = {
589         REGULATOR_SUPPLY("vdd_backlight2", NULL),
590 };
591
592 /* EN_3V3_MODEM from AP GPIO VI_VSYNCH D06*/
593 static struct regulator_consumer_supply fixed_reg_en_3v3_modem_supply[] = {
594         REGULATOR_SUPPLY("vdd_3v3_mini_card", NULL),
595         REGULATOR_SUPPLY("vdd_mini_card", NULL),
596 };
597
598 /* EN_VDD_PNL1 from AP GPIO VI_D6 L04*/
599 static struct regulator_consumer_supply fixed_reg_en_vdd_pnl1_supply[] = {
600         REGULATOR_SUPPLY("vdd_lcd_panel", NULL),
601 };
602
603 /* CAM1_LDO_EN from AP GPIO KB_ROW6 R06*/
604 static struct regulator_consumer_supply fixed_reg_cam1_ldo_en_supply[] = {
605         REGULATOR_SUPPLY("vdd_2v8_cam1", NULL),
606         REGULATOR_SUPPLY("avdd", "6-0072"),
607 };
608
609 /* CAM2_LDO_EN from AP GPIO KB_ROW7 R07*/
610 static struct regulator_consumer_supply fixed_reg_cam2_ldo_en_supply[] = {
611         REGULATOR_SUPPLY("vdd_2v8_cam2", NULL),
612         REGULATOR_SUPPLY("avdd", "7-0072"),
613 };
614
615 /* CAM3_LDO_EN from AP GPIO KB_ROW8 S00*/
616 static struct regulator_consumer_supply fixed_reg_cam3_ldo_en_supply[] = {
617         REGULATOR_SUPPLY("vdd_cam3", NULL),
618 };
619
620 /* EN_VDD_COM from AP GPIO SDMMC3_DAT5 D00*/
621 static struct regulator_consumer_supply fixed_reg_en_vdd_com_supply[] = {
622         REGULATOR_SUPPLY("vdd_com_bd", NULL),
623 };
624
625 /* EN_VDD_SDMMC1 from AP GPIO VI_HSYNC D07*/
626 static struct regulator_consumer_supply fixed_reg_en_vdd_sdmmc1_supply[] = {
627         REGULATOR_SUPPLY("vddio_sd_slot", "sdhci-tegra.0"),
628 };
629
630 /* EN_3V3_EMMC from AP GPIO SDMMC3_DAT4 D01*/
631 static struct regulator_consumer_supply fixed_reg_en_3v3_emmc_supply[] = {
632         REGULATOR_SUPPLY("vdd_emmc_core", NULL),
633 };
634
635 /* EN_3V3_PEX_HVDD from AP GPIO VI_D09 L07*/
636 static struct regulator_consumer_supply fixed_reg_en_3v3_pex_hvdd_supply[] = {
637         REGULATOR_SUPPLY("hvdd_pex", NULL),
638 };
639
640 /* EN_3v3_FUSE from AP GPIO VI_D08 L06*/
641 static struct regulator_consumer_supply fixed_reg_en_3v3_fuse_supply[] = {
642         REGULATOR_SUPPLY("vdd_fuse", NULL),
643 };
644
645 /* EN_1V8_CAM from AP GPIO GPIO_PBB4 PBB04*/
646 static struct regulator_consumer_supply fixed_reg_en_1v8_cam_supply[] = {
647         REGULATOR_SUPPLY("vdd_1v8_cam1", NULL),
648         REGULATOR_SUPPLY("vdd_1v8_cam2", NULL),
649         REGULATOR_SUPPLY("vdd_1v8_cam3", NULL),
650         REGULATOR_SUPPLY("dvdd", "6-0072"),
651         REGULATOR_SUPPLY("dvdd", "7-0072"),
652         REGULATOR_SUPPLY("vdd_i2c", "2-0033"),
653 };
654
655 static struct regulator_consumer_supply fixed_reg_en_vbrtr_supply[] = {
656         REGULATOR_SUPPLY("vdd_vbrtr", NULL),
657 };
658
659 /* EN_USB1_VBUS_OC*/
660 static struct regulator_consumer_supply fixed_reg_en_usb1_vbus_oc_supply[] = {
661         REGULATOR_SUPPLY("vdd_vbus_micro_usb", NULL),
662 };
663
664 /*EN_USB3_VBUS_OC*/
665 static struct regulator_consumer_supply fixed_reg_en_usb3_vbus_oc_supply[] = {
666         REGULATOR_SUPPLY("vdd_vbus_typea_usb", NULL),
667 };
668
669 /* EN_VDDIO_VID_OC from AP GPIO VI_PCLK T00*/
670 static struct regulator_consumer_supply fixed_reg_en_vddio_vid_oc_supply[] = {
671         REGULATOR_SUPPLY("vdd_hdmi_con", NULL),
672 };
673
674 /* Macro for defining fixed regulator sub device data */
675 #define FIXED_SUPPLY(_name) "fixed_reg_"#_name
676 #define FIXED_REG_OD(_id, _var, _name, _in_supply, _always_on,          \
677                 _boot_on, _gpio_nr, _active_high, _boot_state,          \
678                 _millivolts, _od_state)                                 \
679         static struct regulator_init_data ri_data_##_var =              \
680         {                                                               \
681                 .supply_regulator = _in_supply,                         \
682                 .num_consumer_supplies =                                \
683                         ARRAY_SIZE(fixed_reg_##_name##_supply),         \
684                 .consumer_supplies = fixed_reg_##_name##_supply,        \
685                 .constraints = {                                        \
686                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
687                                         REGULATOR_MODE_STANDBY),        \
688                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
689                                         REGULATOR_CHANGE_STATUS |       \
690                                         REGULATOR_CHANGE_VOLTAGE),      \
691                         .always_on = _always_on,                        \
692                         .boot_on = _boot_on,                            \
693                 },                                                      \
694         };                                                              \
695         static struct fixed_voltage_config fixed_reg_##_var##_pdata =   \
696         {                                                               \
697                 .supply_name = FIXED_SUPPLY(_name),                     \
698                 .microvolts = _millivolts * 1000,                       \
699                 .gpio = _gpio_nr,                                       \
700                 .enable_high = _active_high,                            \
701                 .enabled_at_boot = _boot_state,                         \
702                 .init_data = &ri_data_##_var,                           \
703                 .gpio_is_open_drain = _od_state,                        \
704         };                                                              \
705         static struct platform_device fixed_reg_##_var##_dev = {        \
706                 .name   = "reg-fixed-voltage",                          \
707                 .id     = _id,                                          \
708                 .dev    = {                                             \
709                         .platform_data = &fixed_reg_##_var##_pdata,     \
710                 },                                                      \
711         }
712
713 #define FIXED_REG(_id, _var, _name, _in_supply, _always_on, _boot_on,   \
714                  _gpio_nr, _active_high, _boot_state, _millivolts)      \
715         FIXED_REG_OD(_id, _var, _name, _in_supply, _always_on, _boot_on,  \
716                 _gpio_nr, _active_high, _boot_state, _millivolts, false)
717
718
719 /* common to most of boards*/
720 FIXED_REG(0, en_5v_cp,          en_5v_cp,       NULL,                           1,      0,      TPS6591X_GPIO_0,        true,   1, 5000);
721 FIXED_REG(1, en_5v0,            en_5v0,         NULL,                           0,      0,      TPS6591X_GPIO_2,        true,   0, 5000);
722 FIXED_REG(2, en_ddr,            en_ddr,         NULL,                           1,      0,      TPS6591X_GPIO_6,        true,   1, 1500);
723 FIXED_REG(3, en_3v3_sys,        en_3v3_sys,     NULL,                           0,      0,      TPS6591X_GPIO_7,        true,   1, 3300);
724 FIXED_REG(4, en_vdd_bl,         en_vdd_bl,      NULL,                           0,      0,      TEGRA_GPIO_PK3,         true,   1, 5000);
725 FIXED_REG(5, en_3v3_modem,      en_3v3_modem,   NULL,                           1,      0,      TEGRA_GPIO_PD6,         true,   1, 3300);
726 FIXED_REG(6, en_vdd_pnl1,       en_vdd_pnl1,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PL4,         true,   1, 3300);
727 FIXED_REG(7, cam3_ldo_en,       cam3_ldo_en,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PS0,         true,   0, 3300);
728 FIXED_REG(8, en_vdd_com,        en_vdd_com,     FIXED_SUPPLY(en_3v3_sys),       1,      0,      TEGRA_GPIO_PD0,         true,   1, 3300);
729 FIXED_REG(9, en_3v3_fuse,       en_3v3_fuse,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PL6,         true,   0, 3300);
730 FIXED_REG(10, en_3v3_emmc,      en_3v3_emmc,    FIXED_SUPPLY(en_3v3_sys),       1,      0,      TEGRA_GPIO_PD1,         true,   1, 3300);
731 FIXED_REG(11, en_vdd_sdmmc1,    en_vdd_sdmmc1,  FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PD7,         true,   1, 3300);
732 FIXED_REG(12, en_3v3_pex_hvdd,  en_3v3_pex_hvdd, FIXED_SUPPLY(en_3v3_sys),      0,      0,      TEGRA_GPIO_PL7,         true,   0, 3300);
733 FIXED_REG(13, en_1v8_cam,       en_1v8_cam,     tps6591x_rails(VIO),            0,      0,      TEGRA_GPIO_PBB4,        true,   0, 1800);
734
735 /* Specific to E1187/E1186/E1256 */
736 FIXED_REG(14, dis_5v_switch_e118x,      dis_5v_switch,  FIXED_SUPPLY(en_5v0),   0,      0,      TEGRA_GPIO_PX2,         false,  0, 5000);
737
738 /* E1291-A04/A05 specific */
739 FIXED_REG(1, en_5v0_a04,        en_5v0,         NULL,                           0,      0,      TPS6591X_GPIO_8,        true,   0, 5000);
740 FIXED_REG(2, en_ddr_a04,        en_ddr,         NULL,                           1,      0,      TPS6591X_GPIO_7,        true,   1, 1500);
741 FIXED_REG(3, en_3v3_sys_a04,    en_3v3_sys,     NULL,                           0,      0,      TPS6591X_GPIO_6,        true,   1, 3300);
742
743 /* Specific to pm269 */
744 FIXED_REG(4, en_vdd_bl_pm269,           en_vdd_bl,              NULL,                           0,      0,      TEGRA_GPIO_PH3, true,   1, 5000);
745 #ifndef CONFIG_TEGRA_CARDHU_DSI
746 FIXED_REG(6, en_vdd_pnl1_pm269,         en_vdd_pnl1,            FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PW1, true,   1, 3300);
747 #endif
748 FIXED_REG(9, en_3v3_fuse_pm269,         en_3v3_fuse,            FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PC1, true,   0, 3300);
749 FIXED_REG(12, en_3v3_pex_hvdd_pm269,    en_3v3_pex_hvdd,        FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PC6, true,   0, 3300);
750
751 /* E1198/E1291 specific*/
752 FIXED_REG(18, cam1_ldo_en,      cam1_ldo_en,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PR6,         true,   0, 2800);
753 FIXED_REG(19, cam2_ldo_en,      cam2_ldo_en,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PR7,         true,   0, 2800);
754
755 /* E1291 A03 specific */
756 FIXED_REG(20, en_vdd_bl1_a03,   en_vdd_bl,      NULL,                           0,      0,      TEGRA_GPIO_PDD2,        true,   1, 5000);
757 FIXED_REG(21, en_vdd_bl2_a03,   en_vdd_bl2,     NULL,                           0,      0,      TEGRA_GPIO_PDD0,        true,   1, 5000);
758 FIXED_REG(22, en_vbrtr,         en_vbrtr,       FIXED_SUPPLY(en_3v3_sys),       0,      0,      PMU_TCA6416_GPIO_PORT12,true,   0, 3300);
759
760 /* PM313 display board specific */
761 FIXED_REG(4, en_vdd_bl_pm313,   en_vdd_bl,      NULL,                           0,      0,      TEGRA_GPIO_PK3,         true,  1, 5000);
762 FIXED_REG(6, en_vdd_pnl1_pm313, en_vdd_pnl1,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PH3,         true,  1, 3300);
763
764
765 /****************** Open collector Load switches *******/
766 /*Specific to pm269*/
767 FIXED_REG_OD(17, en_vddio_vid_oc_pm269, en_vddio_vid_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PP2,         true,   0, 5000, true);
768
769 /* Specific to pm311 */
770 FIXED_REG_OD(15, en_usb1_vbus_oc_pm311, en_usb1_vbus_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PCC7,        true,   0, 5000, true);
771 FIXED_REG_OD(16, en_usb3_vbus_oc_pm311, en_usb3_vbus_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PCC6,        true,   0, 5000, true);
772
773
774 /* Specific to E1187/E1186/E1256 */
775 FIXED_REG_OD(15, en_usb1_vbus_oc_e118x, en_usb1_vbus_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PI4,         true,   0, 5000, true);
776 FIXED_REG_OD(16, en_usb3_vbus_oc_e118x, en_usb3_vbus_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PH7,         true,   0, 5000, true);
777 FIXED_REG_OD(17, en_vddio_vid_oc_e118x, en_vddio_vid_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PT0,         true,   0, 5000, true);
778
779
780 /* E1198/E1291 specific  fab < A03 */
781 FIXED_REG_OD(15, en_usb1_vbus_oc,       en_usb1_vbus_oc,        FIXED_SUPPLY(en_5v0),           0,      0,      TEGRA_GPIO_PI4,         true,   0, 5000, true);
782 FIXED_REG_OD(16, en_usb3_vbus_oc,       en_usb3_vbus_oc,        FIXED_SUPPLY(en_5v0),           0,      0,      TEGRA_GPIO_PH7,         true,   0, 5000, true);
783
784 /* E1198/E1291 specific  fab >= A03 */
785 FIXED_REG_OD(15, en_usb1_vbus_oc_a03,   en_usb1_vbus_oc,        FIXED_SUPPLY(en_5v0),           0,      0,      TEGRA_GPIO_PDD6,        true,   0, 5000, true);
786 FIXED_REG_OD(16, en_usb3_vbus_oc_a03,   en_usb3_vbus_oc,        FIXED_SUPPLY(en_5v0),           0,      0,      TEGRA_GPIO_PDD4,        true,   0, 5000, true);
787
788 /* E1198/E1291 specific */
789 FIXED_REG_OD(17, en_vddio_vid_oc,       en_vddio_vid_oc,        FIXED_SUPPLY(en_5v0),           0,      0,      TEGRA_GPIO_PT0,         true,   0, 5000, true);
790
791 /*
792  * Creating the fixed/gpio-switch regulator device tables for different boards
793  */
794 #define ADD_FIXED_REG(_name)    (&fixed_reg_##_name##_dev)
795
796 #define COMMON_FIXED_REG                        \
797         ADD_FIXED_REG(en_5v_cp),                \
798         ADD_FIXED_REG(en_5v0),                  \
799         ADD_FIXED_REG(en_ddr),                  \
800         ADD_FIXED_REG(en_3v3_sys),              \
801         ADD_FIXED_REG(en_3v3_modem),            \
802         ADD_FIXED_REG(en_vdd_pnl1),             \
803         ADD_FIXED_REG(cam3_ldo_en),             \
804         ADD_FIXED_REG(en_vdd_com),              \
805         ADD_FIXED_REG(en_3v3_fuse),             \
806         ADD_FIXED_REG(en_3v3_emmc),             \
807         ADD_FIXED_REG(en_vdd_sdmmc1),           \
808         ADD_FIXED_REG(en_3v3_pex_hvdd),         \
809         ADD_FIXED_REG(en_1v8_cam),
810
811 #define COMMON_FIXED_REG_E1291_A04              \
812         ADD_FIXED_REG(en_5v_cp),                \
813         ADD_FIXED_REG(en_5v0_a04),              \
814         ADD_FIXED_REG(en_ddr_a04),              \
815         ADD_FIXED_REG(en_3v3_sys_a04),          \
816         ADD_FIXED_REG(en_3v3_modem),            \
817         ADD_FIXED_REG(en_vdd_pnl1),             \
818         ADD_FIXED_REG(cam3_ldo_en),             \
819         ADD_FIXED_REG(en_vdd_com),              \
820         ADD_FIXED_REG(en_3v3_fuse),             \
821         ADD_FIXED_REG(en_3v3_emmc),             \
822         ADD_FIXED_REG(en_vdd_sdmmc1),           \
823         ADD_FIXED_REG(en_3v3_pex_hvdd),         \
824         ADD_FIXED_REG(en_1v8_cam),
825
826 #define PM269_FIXED_REG                         \
827         ADD_FIXED_REG(en_5v_cp),                \
828         ADD_FIXED_REG(en_5v0),                  \
829         ADD_FIXED_REG(en_ddr),                  \
830         ADD_FIXED_REG(en_3v3_sys),              \
831         ADD_FIXED_REG(en_3v3_modem),            \
832         ADD_FIXED_REG(cam1_ldo_en),             \
833         ADD_FIXED_REG(cam2_ldo_en),             \
834         ADD_FIXED_REG(cam3_ldo_en),             \
835         ADD_FIXED_REG(en_vdd_com),              \
836         ADD_FIXED_REG(en_3v3_fuse_pm269),       \
837         ADD_FIXED_REG(en_3v3_emmc),             \
838         ADD_FIXED_REG(en_3v3_pex_hvdd_pm269),   \
839         ADD_FIXED_REG(en_1v8_cam),              \
840         ADD_FIXED_REG(dis_5v_switch_e118x),     \
841         ADD_FIXED_REG(en_usb1_vbus_oc_e118x),   \
842         ADD_FIXED_REG(en_usb3_vbus_oc_e118x),   \
843         ADD_FIXED_REG(en_vddio_vid_oc_pm269),
844
845 #define PM311_FIXED_REG                         \
846         ADD_FIXED_REG(en_5v_cp),                \
847         ADD_FIXED_REG(en_5v0),                  \
848         ADD_FIXED_REG(en_ddr),                  \
849         ADD_FIXED_REG(en_3v3_sys),              \
850         ADD_FIXED_REG(en_3v3_modem),            \
851         ADD_FIXED_REG(cam1_ldo_en),             \
852         ADD_FIXED_REG(cam2_ldo_en),             \
853         ADD_FIXED_REG(cam3_ldo_en),             \
854         ADD_FIXED_REG(en_vdd_com),              \
855         ADD_FIXED_REG(en_3v3_fuse_pm269),       \
856         ADD_FIXED_REG(en_3v3_emmc),             \
857         ADD_FIXED_REG(en_3v3_pex_hvdd_pm269),   \
858         ADD_FIXED_REG(en_1v8_cam),              \
859         ADD_FIXED_REG(dis_5v_switch_e118x),     \
860         ADD_FIXED_REG(en_usb1_vbus_oc_pm311),   \
861         ADD_FIXED_REG(en_usb3_vbus_oc_pm311),   \
862         ADD_FIXED_REG(en_vddio_vid_oc_pm269),
863
864
865 #ifndef CONFIG_TEGRA_CARDHU_DSI
866 #define E1247_DISPLAY_FIXED_REG                 \
867         ADD_FIXED_REG(en_vdd_bl_pm269),         \
868         ADD_FIXED_REG(en_vdd_pnl1_pm269),
869 #else
870 #define E1247_DISPLAY_FIXED_REG                 \
871         ADD_FIXED_REG(en_vdd_bl_pm269),
872 #endif
873
874 #define PM313_DISPLAY_FIXED_REG                 \
875         ADD_FIXED_REG(en_vdd_bl_pm313),         \
876         ADD_FIXED_REG(en_vdd_pnl1_pm313),
877
878 #define E118x_FIXED_REG                         \
879         ADD_FIXED_REG(en_5v_cp),                \
880         ADD_FIXED_REG(en_5v0),                  \
881         ADD_FIXED_REG(en_ddr),                  \
882         ADD_FIXED_REG(en_3v3_sys),              \
883         ADD_FIXED_REG(en_3v3_modem),            \
884         ADD_FIXED_REG(cam3_ldo_en),             \
885         ADD_FIXED_REG(en_vdd_com),              \
886         ADD_FIXED_REG(en_3v3_fuse),             \
887         ADD_FIXED_REG(en_3v3_emmc),             \
888         ADD_FIXED_REG(en_vdd_sdmmc1),           \
889         ADD_FIXED_REG(en_3v3_pex_hvdd),         \
890         ADD_FIXED_REG(en_1v8_cam),              \
891         ADD_FIXED_REG(dis_5v_switch_e118x),     \
892         ADD_FIXED_REG(en_vbrtr),                \
893         ADD_FIXED_REG(en_usb1_vbus_oc_e118x),   \
894         ADD_FIXED_REG(en_usb3_vbus_oc_e118x),   \
895         ADD_FIXED_REG(en_vddio_vid_oc_e118x),
896
897 #define E1198_FIXED_REG                         \
898         ADD_FIXED_REG(cam1_ldo_en),             \
899         ADD_FIXED_REG(cam2_ldo_en),             \
900         ADD_FIXED_REG(en_vddio_vid_oc),
901
902 #define E1291_1198_A00_FIXED_REG                \
903         ADD_FIXED_REG(en_vdd_bl),               \
904         ADD_FIXED_REG(en_usb1_vbus_oc),         \
905         ADD_FIXED_REG(en_usb3_vbus_oc),
906
907 #define E1291_A03_FIXED_REG                     \
908         ADD_FIXED_REG(en_vdd_bl1_a03),          \
909         ADD_FIXED_REG(en_vdd_bl2_a03),          \
910         ADD_FIXED_REG(en_usb1_vbus_oc_a03),     \
911         ADD_FIXED_REG(en_usb3_vbus_oc_a03),
912
913 /* Fixed regulator devices for E1186/E1187/E1256 */
914 static struct platform_device *fixed_reg_devs_e118x[] = {
915         E118x_FIXED_REG
916         E1247_DISPLAY_FIXED_REG
917 };
918
919 /* Fixed regulator devices for E1186/E1187/E1256 */
920 static struct platform_device *fixed_reg_devs_e118x_pm313[] = {
921         E118x_FIXED_REG
922         PM313_DISPLAY_FIXED_REG
923 };
924
925 /* Fixed regulator devices for E1198 and E1291 */
926 static struct platform_device *fixed_reg_devs_e1198_base[] = {
927         COMMON_FIXED_REG
928         E1291_1198_A00_FIXED_REG
929         E1198_FIXED_REG
930 };
931
932 static struct platform_device *fixed_reg_devs_e1198_a02[] = {
933         ADD_FIXED_REG(en_5v_cp),
934         ADD_FIXED_REG(en_5v0),
935         ADD_FIXED_REG(en_ddr_a04),
936         ADD_FIXED_REG(en_3v3_sys_a04),
937         ADD_FIXED_REG(en_3v3_modem),
938         ADD_FIXED_REG(en_vdd_pnl1),
939         ADD_FIXED_REG(cam3_ldo_en),
940         ADD_FIXED_REG(en_vdd_com),
941         ADD_FIXED_REG(en_3v3_fuse),
942         ADD_FIXED_REG(en_3v3_emmc),
943         ADD_FIXED_REG(en_vdd_sdmmc1),
944         ADD_FIXED_REG(en_3v3_pex_hvdd),
945         ADD_FIXED_REG(en_1v8_cam),
946         ADD_FIXED_REG(en_vdd_bl1_a03),
947         ADD_FIXED_REG(en_vdd_bl2_a03),
948         ADD_FIXED_REG(cam1_ldo_en),
949         ADD_FIXED_REG(cam2_ldo_en),
950         ADD_FIXED_REG(en_usb1_vbus_oc_a03),
951         ADD_FIXED_REG(en_usb3_vbus_oc_a03),
952         ADD_FIXED_REG(en_vddio_vid_oc),
953 };
954
955 /* Fixed regulator devices for PM269 */
956 static struct platform_device *fixed_reg_devs_pm269[] = {
957         PM269_FIXED_REG
958         E1247_DISPLAY_FIXED_REG
959 };
960
961 /* Fixed regulator devices for PM269 */
962 static struct platform_device *fixed_reg_devs_pm269_pm313[] = {
963         PM269_FIXED_REG
964         PM313_DISPLAY_FIXED_REG
965 };
966
967 /* Fixed regulator devices for PM311 */
968 static struct platform_device *fixed_reg_devs_pm311[] = {
969         PM311_FIXED_REG
970         E1247_DISPLAY_FIXED_REG
971 };
972
973 /* Fixed regulator devices for PM11 */
974 static struct platform_device *fixed_reg_devs_pm311_pm313[] = {
975         PM311_FIXED_REG
976         PM313_DISPLAY_FIXED_REG
977 };
978
979 /* Fixed regulator devices for E1291 A03 */
980 static struct platform_device *fixed_reg_devs_e1291_a03[] = {
981         COMMON_FIXED_REG
982         E1291_A03_FIXED_REG
983         E1198_FIXED_REG
984 };
985
986 /* Fixed regulator devices for E1291 A04/A05 */
987 static struct platform_device *fixed_reg_devs_e1291_a04[] = {
988         COMMON_FIXED_REG_E1291_A04
989         E1291_A03_FIXED_REG
990         E1198_FIXED_REG
991 };
992
993 int __init cardhu_fixed_regulator_init(void)
994 {
995         int i;
996         struct board_info board_info;
997         struct board_info pmu_board_info;
998         struct board_info display_board_info;
999         struct platform_device **fixed_reg_devs;
1000         int    nfixreg_devs;
1001
1002         if (!machine_is_cardhu())
1003                 return 0;
1004
1005         tegra_get_board_info(&board_info);
1006         tegra_get_pmu_board_info(&pmu_board_info);
1007         tegra_get_display_board_info(&display_board_info);
1008
1009         if (pmu_board_info.board_id == BOARD_PMU_PM298)
1010                 return cardhu_pm298_gpio_switch_regulator_init();
1011
1012         if (pmu_board_info.board_id == BOARD_PMU_PM299)
1013                 return cardhu_pm299_gpio_switch_regulator_init();
1014
1015         switch (board_info.board_id) {
1016         case BOARD_E1198:
1017                 if (board_info.fab <= BOARD_FAB_A01) {
1018                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1198_base);
1019                         fixed_reg_devs = fixed_reg_devs_e1198_base;
1020                 } else {
1021                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1198_a02);
1022                         fixed_reg_devs = fixed_reg_devs_e1198_a02;
1023                 }
1024                 break;
1025
1026         case BOARD_E1291:
1027                 if (board_info.fab == BOARD_FAB_A03) {
1028                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1291_a03);
1029                         fixed_reg_devs = fixed_reg_devs_e1291_a03;
1030                 } else if ((board_info.fab == BOARD_FAB_A04) ||
1031                                 (board_info.fab == BOARD_FAB_A05) ||
1032                                 (board_info.fab == BOARD_FAB_A07)) {
1033                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1291_a04);
1034                         fixed_reg_devs = fixed_reg_devs_e1291_a04;
1035                 } else {
1036                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1198_base);
1037                         fixed_reg_devs = fixed_reg_devs_e1198_base;
1038                 }
1039                 break;
1040
1041         case BOARD_PM311:
1042         case BOARD_PM305:
1043                 nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm311);
1044                 fixed_reg_devs = fixed_reg_devs_pm311;
1045                 if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
1046                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm311_pm313);
1047                         fixed_reg_devs = fixed_reg_devs_pm311_pm313;
1048                 }
1049                 break;
1050
1051         case BOARD_PM269:
1052         case BOARD_E1257:
1053                 nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm269);
1054                 fixed_reg_devs = fixed_reg_devs_pm269;
1055                 if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
1056                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm269_pm313);
1057                         fixed_reg_devs = fixed_reg_devs_pm269_pm313;
1058                 } else {
1059                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm269);
1060                         fixed_reg_devs = fixed_reg_devs_pm269;
1061                 }
1062                 break;
1063
1064         default:
1065                 if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
1066                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e118x_pm313);
1067                         fixed_reg_devs = fixed_reg_devs_e118x_pm313;
1068                 } else {
1069                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e118x);
1070                         fixed_reg_devs = fixed_reg_devs_e118x;
1071                 }
1072                 break;
1073         }
1074
1075         return platform_add_devices(fixed_reg_devs, nfixreg_devs);
1076 }
1077 subsys_initcall_sync(cardhu_fixed_regulator_init);
1078
1079 static void cardhu_board_suspend(int lp_state, enum suspend_stage stg)
1080 {
1081         if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_SUSPEND_BEFORE_CPU))
1082                 tegra_console_uart_suspend();
1083 }
1084
1085 static void cardhu_board_resume(int lp_state, enum resume_stage stg)
1086 {
1087         if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_RESUME_AFTER_CPU))
1088                 tegra_console_uart_resume();
1089 }
1090
1091 static struct tegra_suspend_platform_data cardhu_suspend_data = {
1092         .cpu_timer      = 2000,
1093         .cpu_off_timer  = 200,
1094         .suspend_mode   = TEGRA_SUSPEND_LP0,
1095         .core_timer     = 0x7e7e,
1096         .core_off_timer = 0,
1097         .corereq_high   = true,
1098         .sysclkreq_high = true,
1099         .cpu_lp2_min_residency = 2000,
1100         .board_suspend = cardhu_board_suspend,
1101         .board_resume = cardhu_board_resume,
1102 };
1103
1104 int __init cardhu_suspend_init(void)
1105 {
1106         struct board_info board_info;
1107         struct board_info pmu_board_info;
1108
1109         tegra_get_board_info(&board_info);
1110         tegra_get_pmu_board_info(&pmu_board_info);
1111
1112         /* For PMU Fab A03, A04 and A05 make core_pwr_req to high */
1113         if ((pmu_board_info.fab == BOARD_FAB_A03) ||
1114                 (pmu_board_info.fab == BOARD_FAB_A04) ||
1115                  (pmu_board_info.fab == BOARD_FAB_A05))
1116                 cardhu_suspend_data.corereq_high = true;
1117
1118         /* CORE_PWR_REQ to be high for all processor/pmu board whose sku bit 0
1119          * is set. This is require to enable the dc-dc converter tps62361x */
1120         if ((board_info.sku & SKU_DCDC_TPS62361_SUPPORT) || (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT))
1121                 cardhu_suspend_data.corereq_high = true;
1122
1123         switch (board_info.board_id) {
1124         case BOARD_E1291:
1125                 /* CORE_PWR_REQ to be high for E1291-A03 */
1126                 if (board_info.fab == BOARD_FAB_A03)
1127                         cardhu_suspend_data.corereq_high = true;
1128                 break;
1129         case BOARD_E1198:
1130         case BOARD_PM269:
1131         case BOARD_PM305:
1132         case BOARD_PM311:
1133                 break;
1134         case BOARD_E1187:
1135         case BOARD_E1186:
1136         case BOARD_E1256:
1137         case BOARD_E1257:
1138                 cardhu_suspend_data.cpu_timer = 5000;
1139                 cardhu_suspend_data.cpu_off_timer = 5000;
1140                 break;
1141         default:
1142                 break;
1143         }
1144
1145         tegra_init_suspend(&cardhu_suspend_data);
1146         return 0;
1147 }
1148
1149 #ifdef CONFIG_TEGRA_EDP_LIMITS
1150
1151 int __init cardhu_edp_init(void)
1152 {
1153         unsigned int regulator_mA;
1154
1155         regulator_mA = get_maximum_cpu_current_supported();
1156         if (!regulator_mA) {
1157                 regulator_mA = 6000; /* regular T30/s */
1158         }
1159         pr_info("%s: CPU regulator %d mA\n", __func__, regulator_mA);
1160
1161         tegra_init_cpu_edp_limits(regulator_mA);
1162         return 0;
1163 }
1164 #endif
1165
1166 static char *cardhu_battery[] = {
1167         "bq27510-0",
1168 };
1169
1170 static struct gpio_charger_platform_data cardhu_charger_pdata = {
1171         .name = "ac",
1172         .type = POWER_SUPPLY_TYPE_MAINS,
1173         .gpio = AC_PRESENT_GPIO,
1174         .gpio_active_low = 0,
1175         .supplied_to = cardhu_battery,
1176         .num_supplicants = ARRAY_SIZE(cardhu_battery),
1177 };
1178
1179 static struct platform_device cardhu_charger_device = {
1180         .name = "gpio-charger",
1181         .dev = {
1182                 .platform_data = &cardhu_charger_pdata,
1183         },
1184 };
1185
1186 static int __init cardhu_charger_late_init(void)
1187 {
1188         if (!machine_is_cardhu())
1189                 return 0;
1190
1191         platform_device_register(&cardhu_charger_device);
1192         return 0;
1193 }
1194
1195 late_initcall(cardhu_charger_late_init);