47888944a749588c6349f3a914819eb192702939
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu-power.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu-power.c
3  *
4  * Copyright (C) 2011-2012, NVIDIA Corporation. All rights reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
18  * 02111-1307, USA
19  */
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/regulator/machine.h>
25 #include <linux/mfd/tps6591x.h>
26 #include <linux/mfd/max77663-core.h>
27 #include <linux/gpio.h>
28 #include <linux/io.h>
29 #include <linux/regulator/fixed.h>
30 #include <linux/regulator/tps6591x-regulator.h>
31 #include <linux/regulator/tps62360.h>
32 #include <linux/power/gpio-charger.h>
33
34 #include <asm/mach-types.h>
35
36 #include <mach/iomap.h>
37 #include <mach/irqs.h>
38 #include <mach/pinmux.h>
39 #include <mach/edp.h>
40 #include <mach/gpio-tegra.h>
41 #include <mach/pinmux-tegra30.h>
42
43 #include "gpio-names.h"
44 #include "board.h"
45 #include "board-cardhu.h"
46 #include "pm.h"
47 #include "wakeups-t3.h"
48 #include "pm-irq.h"
49
50 #define PMC_CTRL                0x0
51 #define PMC_CTRL_INTR_LOW       (1 << 17)
52
53 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_0[] = {
54         REGULATOR_SUPPLY("vdd_core", NULL),
55         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
56 };
57
58 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_1[] = {
59         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
60 };
61
62 static struct regulator_consumer_supply tps6591x_vdd2_supply_0[] = {
63         REGULATOR_SUPPLY("vdd_gen1v5", NULL),
64         REGULATOR_SUPPLY("vcore_lcd", NULL),
65         REGULATOR_SUPPLY("track_ldo1", NULL),
66         REGULATOR_SUPPLY("external_ldo_1v2", NULL),
67         REGULATOR_SUPPLY("vcore_cam1", NULL),
68         REGULATOR_SUPPLY("vcore_cam2", NULL),
69 };
70
71 static struct regulator_consumer_supply tps6591x_vddctrl_supply_0[] = {
72         REGULATOR_SUPPLY("vdd_cpu_pmu", NULL),
73         REGULATOR_SUPPLY("vdd_cpu", NULL),
74         REGULATOR_SUPPLY("vdd_sys", NULL),
75 };
76
77 static struct regulator_consumer_supply tps6591x_vio_supply_0[] = {
78         REGULATOR_SUPPLY("vdd_gen1v8", NULL),
79         REGULATOR_SUPPLY("avdd_hdmi_pll", NULL),
80         REGULATOR_SUPPLY("avdd_usb_pll", NULL),
81         REGULATOR_SUPPLY("avdd_osc", NULL),
82         REGULATOR_SUPPLY("vddio_sys", NULL),
83         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
84         REGULATOR_SUPPLY("pwrdet_sdmmc4", NULL),
85         REGULATOR_SUPPLY("vdd1v8_satelite", NULL),
86         REGULATOR_SUPPLY("vddio_uart", NULL),
87         REGULATOR_SUPPLY("pwrdet_uart", NULL),
88         REGULATOR_SUPPLY("vddio_audio", NULL),
89         REGULATOR_SUPPLY("pwrdet_audio", NULL),
90         REGULATOR_SUPPLY("vddio_bb", NULL),
91         REGULATOR_SUPPLY("pwrdet_bb", NULL),
92         REGULATOR_SUPPLY("vddio_lcd_pmu", NULL),
93         REGULATOR_SUPPLY("pwrdet_lcd", NULL),
94         REGULATOR_SUPPLY("vddio_cam", NULL),
95         REGULATOR_SUPPLY("pwrdet_cam", NULL),
96         REGULATOR_SUPPLY("vddio_vi", NULL),
97         REGULATOR_SUPPLY("pwrdet_vi", NULL),
98         REGULATOR_SUPPLY("ldo6", NULL),
99         REGULATOR_SUPPLY("ldo7", NULL),
100         REGULATOR_SUPPLY("ldo8", NULL),
101         REGULATOR_SUPPLY("vcore_audio", NULL),
102         REGULATOR_SUPPLY("avcore_audio", NULL),
103         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
104         REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
105         REGULATOR_SUPPLY("vcore1_lpddr2", NULL),
106         REGULATOR_SUPPLY("vcom_1v8", NULL),
107         REGULATOR_SUPPLY("pmuio_1v8", NULL),
108         REGULATOR_SUPPLY("avdd_ic_usb", NULL),
109 };
110
111 static struct regulator_consumer_supply tps6591x_ldo1_supply_0[] = {
112         REGULATOR_SUPPLY("avdd_pexb", NULL),
113         REGULATOR_SUPPLY("vdd_pexb", NULL),
114         REGULATOR_SUPPLY("avdd_pex_pll", NULL),
115         REGULATOR_SUPPLY("avdd_pexa", NULL),
116         REGULATOR_SUPPLY("vdd_pexa", NULL),
117 };
118
119 static struct regulator_consumer_supply tps6591x_ldo2_supply_0[] = {
120         REGULATOR_SUPPLY("avdd_sata", NULL),
121         REGULATOR_SUPPLY("vdd_sata", NULL),
122         REGULATOR_SUPPLY("avdd_sata_pll", NULL),
123         REGULATOR_SUPPLY("avdd_plle", NULL),
124 };
125
126 static struct regulator_consumer_supply tps6591x_ldo3_supply_e118x[] = {
127         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
128         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
129 };
130
131 static struct regulator_consumer_supply tps6591x_ldo3_supply_e1198[] = {
132         REGULATOR_SUPPLY("unused_rail_ldo3", NULL),
133 };
134
135 static struct regulator_consumer_supply tps6591x_ldo4_supply_0[] = {
136         REGULATOR_SUPPLY("vdd_rtc", NULL),
137 };
138
139 static struct regulator_consumer_supply tps6591x_ldo5_supply_e118x[] = {
140         REGULATOR_SUPPLY("avdd_vdac", NULL),
141 };
142
143 static struct regulator_consumer_supply tps6591x_ldo5_supply_e1198[] = {
144         REGULATOR_SUPPLY("avdd_vdac", NULL),
145         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
146         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
147 };
148
149 static struct regulator_consumer_supply tps6591x_ldo6_supply_0[] = {
150         REGULATOR_SUPPLY("avdd_dsi_csi", NULL),
151         REGULATOR_SUPPLY("pwrdet_mipi", NULL),
152 };
153 static struct regulator_consumer_supply tps6591x_ldo7_supply_0[] = {
154         REGULATOR_SUPPLY("avdd_plla_p_c_s", NULL),
155         REGULATOR_SUPPLY("avdd_pllm", NULL),
156         REGULATOR_SUPPLY("avdd_pllu_d", NULL),
157         REGULATOR_SUPPLY("avdd_pllu_d2", NULL),
158         REGULATOR_SUPPLY("avdd_pllx", NULL),
159 };
160
161 static struct regulator_consumer_supply tps6591x_ldo8_supply_0[] = {
162         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
163 };
164
165 #define TPS_PDATA_INIT(_name, _sname, _minmv, _maxmv, _supply_reg, _always_on, \
166         _boot_on, _apply_uv, _init_uV, _init_enable, _init_apply, _ectrl, _flags) \
167         static struct tps6591x_regulator_platform_data pdata_##_name##_##_sname = \
168         {                                                               \
169                 .regulator = {                                          \
170                         .constraints = {                                \
171                                 .min_uV = (_minmv)*1000,                \
172                                 .max_uV = (_maxmv)*1000,                \
173                                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
174                                                      REGULATOR_MODE_STANDBY), \
175                                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
176                                                    REGULATOR_CHANGE_STATUS |  \
177                                                    REGULATOR_CHANGE_VOLTAGE), \
178                                 .always_on = _always_on,                \
179                                 .boot_on = _boot_on,                    \
180                                 .apply_uV = _apply_uv,                  \
181                         },                                              \
182                         .num_consumer_supplies =                        \
183                                 ARRAY_SIZE(tps6591x_##_name##_supply_##_sname), \
184                         .consumer_supplies = tps6591x_##_name##_supply_##_sname,        \
185                         .supply_regulator = _supply_reg,                \
186                 },                                                      \
187                 .init_uV =  _init_uV * 1000,                            \
188                 .init_enable = _init_enable,                            \
189                 .init_apply = _init_apply,                              \
190                 .ectrl = _ectrl,                                        \
191                 .flags = _flags,                                        \
192         }
193
194 TPS_PDATA_INIT(vdd1, skubit0_0, 600,  1500, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF, 0);
195 TPS_PDATA_INIT(vdd1, skubit0_1, 600,  1500, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF, 0);
196 TPS_PDATA_INIT(vdd2, 0,         600,  1500, 0, 0, 1, 0, -1, 0, 0, 0, 0);
197 TPS_PDATA_INIT(vddctrl, 0,      600,  1400, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_EN1, 0);
198 TPS_PDATA_INIT(vio,  0,         1500, 3300, 0, 1, 1, 0, -1, 0, 0, 0, 0);
199
200 TPS_PDATA_INIT(ldo1, 0,         1000, 3300, tps6591x_rails(VDD_2), 0, 0, 0, -1, 0, 1, 0, 0);
201 TPS_PDATA_INIT(ldo2, 0,         1050, 1050, tps6591x_rails(VDD_2), 0, 0, 1, -1, 0, 1, 0, 0);
202
203 TPS_PDATA_INIT(ldo3, e118x,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
204 TPS_PDATA_INIT(ldo3, e1198,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
205 TPS_PDATA_INIT(ldo4, 0,         1000, 3300, 0, 1, 0, 0, -1, 0, 0, 0, 0);
206 TPS_PDATA_INIT(ldo5, e118x,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
207 TPS_PDATA_INIT(ldo5, e1198,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
208
209 TPS_PDATA_INIT(ldo6, 0,         1200, 1200, tps6591x_rails(VIO), 0, 0, 1, -1, 0, 0, 0, 0);
210 TPS_PDATA_INIT(ldo7, 0,         1200, 1200, tps6591x_rails(VIO), 1, 1, 1, -1, 0, 0, EXT_CTRL_SLEEP_OFF, LDO_LOW_POWER_ON_SUSPEND);
211 TPS_PDATA_INIT(ldo8, 0,         1000, 3300, tps6591x_rails(VIO), 1, 0, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF, LDO_LOW_POWER_ON_SUSPEND);
212
213 #if defined(CONFIG_RTC_DRV_TPS6591x)
214 static struct tps6591x_rtc_platform_data rtc_data = {
215         .irq = TEGRA_NR_IRQS + TPS6591X_INT_RTC_ALARM,
216         .time = {
217                 .tm_year = 2000,
218                 .tm_mon = 0,
219                 .tm_mday = 1,
220                 .tm_hour = 0,
221                 .tm_min = 0,
222                 .tm_sec = 0,
223         },
224 };
225
226 #define TPS_RTC_REG()                                   \
227         {                                               \
228                 .id     = 0,                            \
229                 .name   = "rtc_tps6591x",               \
230                 .platform_data = &rtc_data,             \
231         }
232 #endif
233
234 #define TPS_REG(_id, _name, _sname)                             \
235         {                                                       \
236                 .id     = TPS6591X_ID_##_id,                    \
237                 .name   = "tps6591x-regulator",                 \
238                 .platform_data  = &pdata_##_name##_##_sname,    \
239         }
240
241 #define TPS6591X_DEV_COMMON_E118X               \
242         TPS_REG(VDD_2, vdd2, 0),                \
243         TPS_REG(VDDCTRL, vddctrl, 0),           \
244         TPS_REG(LDO_1, ldo1, 0),                \
245         TPS_REG(LDO_2, ldo2, 0),                \
246         TPS_REG(LDO_3, ldo3, e118x),            \
247         TPS_REG(LDO_4, ldo4, 0),                \
248         TPS_REG(LDO_5, ldo5, e118x),            \
249         TPS_REG(LDO_6, ldo6, 0),                \
250         TPS_REG(LDO_7, ldo7, 0),                \
251         TPS_REG(LDO_8, ldo8, 0)
252
253 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_0[] = {
254         TPS_REG(VIO, vio, 0),
255         TPS_REG(VDD_1, vdd1, skubit0_0),
256         TPS6591X_DEV_COMMON_E118X,
257 #if defined(CONFIG_RTC_DRV_TPS6591x)
258         TPS_RTC_REG(),
259 #endif
260 };
261
262 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_1[] = {
263         TPS_REG(VIO, vio, 0),
264         TPS_REG(VDD_1, vdd1, skubit0_1),
265         TPS6591X_DEV_COMMON_E118X,
266 #if defined(CONFIG_RTC_DRV_TPS6591x)
267         TPS_RTC_REG(),
268 #endif
269 };
270
271 #define TPS6591X_DEV_COMMON_CARDHU              \
272         TPS_REG(VDD_2, vdd2, 0),                \
273         TPS_REG(VDDCTRL, vddctrl, 0),           \
274         TPS_REG(LDO_1, ldo1, 0),                \
275         TPS_REG(LDO_2, ldo2, 0),                \
276         TPS_REG(LDO_3, ldo3, e1198),            \
277         TPS_REG(LDO_4, ldo4, 0),                \
278         TPS_REG(LDO_5, ldo5, e1198),            \
279         TPS_REG(LDO_6, ldo6, 0),                \
280         TPS_REG(LDO_7, ldo7, 0),                \
281         TPS_REG(LDO_8, ldo8, 0)
282
283 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_0[] = {
284         TPS_REG(VIO, vio, 0),
285         TPS_REG(VDD_1, vdd1, skubit0_0),
286         TPS6591X_DEV_COMMON_CARDHU,
287 #if defined(CONFIG_RTC_DRV_TPS6591x)
288         TPS_RTC_REG(),
289 #endif
290 };
291
292 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_1[] = {
293         TPS_REG(VIO, vio, 0),
294         TPS_REG(VDD_1, vdd1, skubit0_1),
295         TPS6591X_DEV_COMMON_CARDHU,
296 #if defined(CONFIG_RTC_DRV_TPS6591x)
297         TPS_RTC_REG(),
298 #endif
299 };
300
301 #define TPS_GPIO_INIT_PDATA(gpio_nr, _init_apply, _sleep_en, _pulldn_en, _output_en, _output_val)       \
302         [gpio_nr] = {                                   \
303                         .sleep_en       = _sleep_en,    \
304                         .pulldn_en      = _pulldn_en,   \
305                         .output_mode_en = _output_en,   \
306                         .output_val     = _output_val,  \
307                         .init_apply     = _init_apply,  \
308                      }
309 static struct tps6591x_gpio_init_data tps_gpio_pdata_e1291_a04[] =  {
310         TPS_GPIO_INIT_PDATA(0, 0, 0, 0, 0, 0),
311         TPS_GPIO_INIT_PDATA(1, 0, 0, 0, 0, 0),
312         TPS_GPIO_INIT_PDATA(2, 1, 1, 0, 1, 1),
313         TPS_GPIO_INIT_PDATA(3, 0, 0, 0, 0, 0),
314         TPS_GPIO_INIT_PDATA(4, 0, 0, 0, 0, 0),
315         TPS_GPIO_INIT_PDATA(5, 0, 0, 0, 0, 0),
316         TPS_GPIO_INIT_PDATA(6, 0, 0, 0, 0, 0),
317         TPS_GPIO_INIT_PDATA(7, 0, 0, 0, 0, 0),
318         TPS_GPIO_INIT_PDATA(8, 0, 0, 0, 0, 0),
319 };
320
321 static struct tps6591x_sleep_keepon_data tps_slp_keepon = {
322         .clkout32k_keepon = 1,
323 };
324
325 static struct tps6591x_platform_data tps_platform = {
326         .irq_base       = TPS6591X_IRQ_BASE,
327         .gpio_base      = TPS6591X_GPIO_BASE,
328         .dev_slp_en     = true,
329         .slp_keepon     = &tps_slp_keepon,
330         .use_power_off  = true,
331 };
332
333 static struct i2c_board_info __initdata cardhu_regulators[] = {
334         {
335                 I2C_BOARD_INFO("tps6591x", 0x2D),
336                 .irq            = INT_EXTERNAL_PMU,
337                 .platform_data  = &tps_platform,
338         },
339 };
340
341 /* TPS62361B DC-DC converter */
342 static struct regulator_consumer_supply tps62361_dcdc_supply[] = {
343         REGULATOR_SUPPLY("vdd_core", NULL),
344 };
345
346 static struct tps62360_regulator_platform_data tps62361_pdata = {
347         .reg_init_data = {                                      \
348                 .constraints = {                                \
349                         .min_uV = 500000,                       \
350                         .max_uV = 1770000,                      \
351                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
352                                              REGULATOR_MODE_STANDBY), \
353                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
354                                            REGULATOR_CHANGE_STATUS |  \
355                                            REGULATOR_CHANGE_VOLTAGE), \
356                         .always_on = 1,                         \
357                         .boot_on =  1,                          \
358                         .apply_uV = 0,                          \
359                 },                                              \
360                 .num_consumer_supplies = ARRAY_SIZE(tps62361_dcdc_supply), \
361                 .consumer_supplies = tps62361_dcdc_supply,      \
362                 },                                              \
363         .en_discharge = true,                                   \
364         .vsel0_gpio = -1,                                       \
365         .vsel1_gpio = -1,                                       \
366         .vsel0_def_state = 1,                                   \
367         .vsel1_def_state = 1,                                   \
368 };
369
370 static struct i2c_board_info __initdata tps62361_boardinfo[] = {
371         {
372                 I2C_BOARD_INFO("tps62361", 0x60),
373                 .platform_data  = &tps62361_pdata,
374         },
375 };
376
377 int __init cardhu_regulator_init(void)
378 {
379         struct board_info board_info;
380         struct board_info pmu_board_info;
381         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
382         u32 pmc_ctrl;
383         bool ext_core_regulator = false;
384
385         /* configure the power management controller to trigger PMU
386          * interrupts when low */
387
388         pmc_ctrl = readl(pmc + PMC_CTRL);
389         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
390
391         tegra_get_board_info(&board_info);
392         tegra_get_pmu_board_info(&pmu_board_info);
393
394         if (pmu_board_info.board_id == BOARD_PMU_PM298)
395                 return cardhu_pm298_regulator_init();
396
397         if (pmu_board_info.board_id == BOARD_PMU_PM299)
398                 return cardhu_pm299_regulator_init();
399
400         /* The regulator details have complete constraints */
401         regulator_has_full_constraints();
402
403         /* PMU-E1208, the ldo2 should be set to 1200mV */
404         if (pmu_board_info.board_id == BOARD_E1208) {
405                 pdata_ldo2_0.regulator.constraints.min_uV = 1200000;
406                 pdata_ldo2_0.regulator.constraints.max_uV = 1200000;
407         }
408
409         /*
410          * E1198 will have different core regulator decoding.
411          * A01/A02: Based on sku bit 0.
412          * A03: Based on bit 2 and bit 0
413          *       2,0: 00 no core regulator,
414          *            01:TPS62365
415          *            10:TPS62366
416          *            11:TPS623850
417          */
418         if (board_info.board_id == BOARD_E1198) {
419                 int vsels;
420                 switch(board_info.fab) {
421                 case BOARD_FAB_A00:
422                 case BOARD_FAB_A01:
423                 case BOARD_FAB_A02:
424                         if (board_info.sku & SKU_DCDC_TPS62361_SUPPORT)
425                                 ext_core_regulator = true;
426                         break;
427
428                 case BOARD_FAB_A03:
429                         vsels = ((board_info.sku >> 1) & 0x2) | (board_info.sku & 1);
430                         switch(vsels) {
431                         case 1:
432                                 ext_core_regulator = true;
433                                 tps62361_pdata.vsel0_def_state = 1;
434                                 tps62361_pdata.vsel1_def_state = 1;
435                                 break;
436                         case 2:
437                                 ext_core_regulator = true;
438                                 tps62361_pdata.vsel0_def_state = 0;
439                                 tps62361_pdata.vsel1_def_state = 0;
440                                 break;
441                         case 3:
442                                 ext_core_regulator = true;
443                                 tps62361_pdata.vsel0_def_state = 1;
444                                 tps62361_pdata.vsel1_def_state = 0;
445                                 break;
446                         }
447                         break;
448                 }
449
450                 pr_info("BoardId:SKU:Fab 0x%04x:0x%04x:0x%02x\n",
451                         board_info.board_id, board_info.sku , board_info.fab);
452                 pr_info("Core regulator %s\n",
453                         (ext_core_regulator)? "true": "false");
454                 pr_info("VSEL 1:0 %d%d\n",
455                         tps62361_pdata.vsel1_def_state,
456                         tps62361_pdata.vsel0_def_state);
457         }
458
459         if ((board_info.board_id == BOARD_E1291) &&
460                 (board_info.sku & SKU_DCDC_TPS62361_SUPPORT))
461                 ext_core_regulator = true;
462
463         if ((board_info.board_id == BOARD_E1198) ||
464                 (board_info.board_id == BOARD_E1291)) {
465                 if (ext_core_regulator) {
466                         tps_platform.num_subdevs =
467                                         ARRAY_SIZE(tps_devs_e1198_skubit0_1);
468                         tps_platform.subdevs = tps_devs_e1198_skubit0_1;
469                 } else {
470                         tps_platform.num_subdevs =
471                                         ARRAY_SIZE(tps_devs_e1198_skubit0_0);
472                         tps_platform.subdevs = tps_devs_e1198_skubit0_0;
473                 }
474         } else {
475                 if (board_info.board_id == BOARD_PM269)
476                         pdata_ldo3_e118x.slew_rate_uV_per_us = 250;
477
478                 if (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT) {
479                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_1);
480                         tps_platform.subdevs = tps_devs_e118x_skubit0_1;
481                         ext_core_regulator = true;
482                 } else {
483                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_0);
484                         tps_platform.subdevs = tps_devs_e118x_skubit0_0;
485                 }
486         }
487
488         /* E1291-A04/A05: Enable DEV_SLP and enable sleep on GPIO2 */
489         if ((board_info.board_id == BOARD_E1291) &&
490                         ((board_info.fab == BOARD_FAB_A04) ||
491                          (board_info.fab == BOARD_FAB_A05) ||
492                          (board_info.fab == BOARD_FAB_A07))) {
493                 tps_platform.dev_slp_en = true;
494                 tps_platform.gpio_init_data = tps_gpio_pdata_e1291_a04;
495                 tps_platform.num_gpioinit_data =
496                                         ARRAY_SIZE(tps_gpio_pdata_e1291_a04);
497         }
498
499         i2c_register_board_info(4, cardhu_regulators, 1);
500
501         /* Register the external core regulator if it is require */
502         if (ext_core_regulator) {
503                 pr_info("Registering the core regulator\n");
504                 i2c_register_board_info(4, tps62361_boardinfo, 1);
505         }
506         return 0;
507 }
508
509
510 /**************** GPIO based fixed regulator *****************/
511 /* EN_5V_CP from PMU GP0 */
512 static struct regulator_consumer_supply fixed_reg_en_5v_cp_supply[] = {
513         REGULATOR_SUPPLY("vdd_5v0_sby", NULL),
514         REGULATOR_SUPPLY("vdd_hall", NULL),
515         REGULATOR_SUPPLY("vterm_ddr", NULL),
516         REGULATOR_SUPPLY("v2ref_ddr", NULL),
517 };
518
519 /* EN_5V0 From PMU GP2 */
520 static struct regulator_consumer_supply fixed_reg_en_5v0_supply[] = {
521         REGULATOR_SUPPLY("vdd_5v0_sys", NULL),
522 };
523
524 /* EN_DDR From PMU GP6 */
525 static struct regulator_consumer_supply fixed_reg_en_ddr_supply[] = {
526         REGULATOR_SUPPLY("mem_vddio_ddr", NULL),
527         REGULATOR_SUPPLY("t30_vddio_ddr", NULL),
528 };
529
530 /* EN_3V3_SYS From PMU GP7 */
531 static struct regulator_consumer_supply fixed_reg_en_3v3_sys_supply[] = {
532         REGULATOR_SUPPLY("vdd_lvds", NULL),
533         REGULATOR_SUPPLY("vdd_pnl", NULL),
534         REGULATOR_SUPPLY("vcom_3v3", NULL),
535         REGULATOR_SUPPLY("vdd_3v3", NULL),
536         REGULATOR_SUPPLY("vcore_mmc", NULL),
537         REGULATOR_SUPPLY("vddio_pex_ctl", NULL),
538         REGULATOR_SUPPLY("pwrdet_pex_ctl", NULL),
539         REGULATOR_SUPPLY("hvdd_pex_pmu", NULL),
540         REGULATOR_SUPPLY("avdd_hdmi", NULL),
541         REGULATOR_SUPPLY("vpp_fuse", NULL),
542         REGULATOR_SUPPLY("avdd_usb", NULL),
543         REGULATOR_SUPPLY("vdd_ddr_rx", NULL),
544         REGULATOR_SUPPLY("vcore_nand", NULL),
545         REGULATOR_SUPPLY("hvdd_sata", NULL),
546         REGULATOR_SUPPLY("vddio_gmi_pmu", NULL),
547         REGULATOR_SUPPLY("pwrdet_nand", NULL),
548         REGULATOR_SUPPLY("avdd_cam1", NULL),
549         REGULATOR_SUPPLY("vdd_af", NULL),
550         REGULATOR_SUPPLY("avdd_cam2", NULL),
551         REGULATOR_SUPPLY("vdd_acc", NULL),
552         REGULATOR_SUPPLY("vdd_phtl", NULL),
553         REGULATOR_SUPPLY("vddio_tp", NULL),
554         REGULATOR_SUPPLY("vdd_led", NULL),
555         REGULATOR_SUPPLY("vddio_cec", NULL),
556         REGULATOR_SUPPLY("vdd_cmps", NULL),
557         REGULATOR_SUPPLY("vdd_temp", NULL),
558         REGULATOR_SUPPLY("vpp_kfuse", NULL),
559         REGULATOR_SUPPLY("vddio_ts", NULL),
560         REGULATOR_SUPPLY("vdd_ir_led", NULL),
561         REGULATOR_SUPPLY("vddio_1wire", NULL),
562         REGULATOR_SUPPLY("avddio_audio", NULL),
563         REGULATOR_SUPPLY("vdd_ec", NULL),
564         REGULATOR_SUPPLY("vcom_pa", NULL),
565         REGULATOR_SUPPLY("vdd_3v3_devices", NULL),
566         REGULATOR_SUPPLY("vdd_3v3_dock", NULL),
567         REGULATOR_SUPPLY("vdd_3v3_edid", NULL),
568         REGULATOR_SUPPLY("vdd_3v3_hdmi_cec", NULL),
569         REGULATOR_SUPPLY("vdd_3v3_gmi", NULL),
570         REGULATOR_SUPPLY("vdd_spk_amp", "tegra-snd-wm8903.0"),
571         REGULATOR_SUPPLY("vdd_3v3_sensor", NULL),
572         REGULATOR_SUPPLY("vdd_3v3_cam", NULL),
573         REGULATOR_SUPPLY("vdd_3v3_als", NULL),
574         REGULATOR_SUPPLY("debug_cons", NULL),
575         REGULATOR_SUPPLY("vdd", "4-004c"),
576 };
577
578 /* DIS_5V_SWITCH from AP SPI2_SCK X02 */
579 static struct regulator_consumer_supply fixed_reg_dis_5v_switch_supply[] = {
580         REGULATOR_SUPPLY("master_5v_switch", NULL),
581 };
582
583 /* EN_VDD_BL */
584 static struct regulator_consumer_supply fixed_reg_en_vdd_bl_supply[] = {
585         REGULATOR_SUPPLY("vdd_backlight", NULL),
586         REGULATOR_SUPPLY("vdd_backlight1", NULL),
587 };
588
589 /* EN_VDD_BL2 (E1291-A03) from AP PEX_L0_PRSNT_N DD.00 */
590 static struct regulator_consumer_supply fixed_reg_en_vdd_bl2_supply[] = {
591         REGULATOR_SUPPLY("vdd_backlight2", NULL),
592 };
593
594 /* EN_3V3_MODEM from AP GPIO VI_VSYNCH D06*/
595 static struct regulator_consumer_supply fixed_reg_en_3v3_modem_supply[] = {
596         REGULATOR_SUPPLY("vdd_3v3_mini_card", NULL),
597         REGULATOR_SUPPLY("vdd_mini_card", NULL),
598 };
599
600 /* EN_VDD_PNL1 from AP GPIO VI_D6 L04*/
601 static struct regulator_consumer_supply fixed_reg_en_vdd_pnl1_supply[] = {
602         REGULATOR_SUPPLY("vdd_lcd_panel", NULL),
603 };
604
605 /* CAM1_LDO_EN from AP GPIO KB_ROW6 R06*/
606 static struct regulator_consumer_supply fixed_reg_cam1_ldo_en_supply[] = {
607         REGULATOR_SUPPLY("vdd_2v8_cam1", NULL),
608         REGULATOR_SUPPLY("avdd", "6-0072"),
609         REGULATOR_SUPPLY("vdd", "6-000e"),
610 };
611
612 /* CAM2_LDO_EN from AP GPIO KB_ROW7 R07*/
613 static struct regulator_consumer_supply fixed_reg_cam2_ldo_en_supply[] = {
614         REGULATOR_SUPPLY("vdd_2v8_cam2", NULL),
615         REGULATOR_SUPPLY("avdd", "7-0072"),
616         REGULATOR_SUPPLY("vdd", "7-000e"),
617 };
618
619 /* CAM3_LDO_EN from AP GPIO KB_ROW8 S00*/
620 static struct regulator_consumer_supply fixed_reg_cam3_ldo_en_supply[] = {
621         REGULATOR_SUPPLY("vdd_cam3", NULL),
622 };
623
624 /* EN_VDD_COM from AP GPIO SDMMC3_DAT5 D00*/
625 static struct regulator_consumer_supply fixed_reg_en_vdd_com_supply[] = {
626         REGULATOR_SUPPLY("vdd_com_bd", NULL),
627 };
628
629 /* EN_VDD_SDMMC1 from AP GPIO VI_HSYNC D07*/
630 static struct regulator_consumer_supply fixed_reg_en_vdd_sdmmc1_supply[] = {
631         REGULATOR_SUPPLY("vddio_sd_slot", "sdhci-tegra.0"),
632 };
633
634 /* EN_3V3_EMMC from AP GPIO SDMMC3_DAT4 D01*/
635 static struct regulator_consumer_supply fixed_reg_en_3v3_emmc_supply[] = {
636         REGULATOR_SUPPLY("vdd_emmc_core", NULL),
637 };
638
639 /* EN_3V3_PEX_HVDD from AP GPIO VI_D09 L07*/
640 static struct regulator_consumer_supply fixed_reg_en_3v3_pex_hvdd_supply[] = {
641         REGULATOR_SUPPLY("hvdd_pex", NULL),
642 };
643
644 /* EN_3v3_FUSE from AP GPIO VI_D08 L06*/
645 static struct regulator_consumer_supply fixed_reg_en_3v3_fuse_supply[] = {
646         REGULATOR_SUPPLY("vdd_fuse", NULL),
647 };
648
649 /* EN_1V8_CAM from AP GPIO GPIO_PBB4 PBB04*/
650 static struct regulator_consumer_supply fixed_reg_en_1v8_cam_supply[] = {
651         REGULATOR_SUPPLY("vdd_1v8_cam1", NULL),
652         REGULATOR_SUPPLY("vdd_1v8_cam2", NULL),
653         REGULATOR_SUPPLY("vdd_1v8_cam3", NULL),
654         REGULATOR_SUPPLY("dvdd", "6-0072"),
655         REGULATOR_SUPPLY("dvdd", "7-0072"),
656         REGULATOR_SUPPLY("vdd_i2c", "6-000e"),
657         REGULATOR_SUPPLY("vdd_i2c", "7-000e"),
658         REGULATOR_SUPPLY("vdd_i2c", "2-0033"),
659 };
660
661 static struct regulator_consumer_supply fixed_reg_en_vbrtr_supply[] = {
662         REGULATOR_SUPPLY("vdd_vbrtr", NULL),
663 };
664
665 /* EN_USB1_VBUS_OC*/
666 static struct regulator_consumer_supply fixed_reg_en_usb1_vbus_oc_supply[] = {
667         REGULATOR_SUPPLY("vdd_vbus_micro_usb", NULL),
668 };
669
670 /*EN_USB3_VBUS_OC*/
671 static struct regulator_consumer_supply fixed_reg_en_usb3_vbus_oc_supply[] = {
672         REGULATOR_SUPPLY("vdd_vbus_typea_usb", NULL),
673 };
674
675 /* EN_VDDIO_VID_OC from AP GPIO VI_PCLK T00*/
676 static struct regulator_consumer_supply fixed_reg_en_vddio_vid_oc_supply[] = {
677         REGULATOR_SUPPLY("vdd_hdmi_con", NULL),
678 };
679
680 /* Macro for defining fixed regulator sub device data */
681 #define FIXED_SUPPLY(_name) "fixed_reg_"#_name
682 #define FIXED_REG_OD(_id, _var, _name, _in_supply, _always_on,          \
683                 _boot_on, _gpio_nr, _active_high, _boot_state,          \
684                 _millivolts, _od_state)                                 \
685         static struct regulator_init_data ri_data_##_var =              \
686         {                                                               \
687                 .supply_regulator = _in_supply,                         \
688                 .num_consumer_supplies =                                \
689                         ARRAY_SIZE(fixed_reg_##_name##_supply),         \
690                 .consumer_supplies = fixed_reg_##_name##_supply,        \
691                 .constraints = {                                        \
692                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
693                                         REGULATOR_MODE_STANDBY),        \
694                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
695                                         REGULATOR_CHANGE_STATUS |       \
696                                         REGULATOR_CHANGE_VOLTAGE),      \
697                         .always_on = _always_on,                        \
698                         .boot_on = _boot_on,                            \
699                 },                                                      \
700         };                                                              \
701         static struct fixed_voltage_config fixed_reg_##_var##_pdata =   \
702         {                                                               \
703                 .supply_name = FIXED_SUPPLY(_name),                     \
704                 .microvolts = _millivolts * 1000,                       \
705                 .gpio = _gpio_nr,                                       \
706                 .enable_high = _active_high,                            \
707                 .enabled_at_boot = _boot_state,                         \
708                 .init_data = &ri_data_##_var,                           \
709                 .gpio_is_open_drain = _od_state,                        \
710         };                                                              \
711         static struct platform_device fixed_reg_##_var##_dev = {        \
712                 .name   = "reg-fixed-voltage",                          \
713                 .id     = _id,                                          \
714                 .dev    = {                                             \
715                         .platform_data = &fixed_reg_##_var##_pdata,     \
716                 },                                                      \
717         }
718
719 #define FIXED_REG(_id, _var, _name, _in_supply, _always_on, _boot_on,   \
720                  _gpio_nr, _active_high, _boot_state, _millivolts)      \
721         FIXED_REG_OD(_id, _var, _name, _in_supply, _always_on, _boot_on,  \
722                 _gpio_nr, _active_high, _boot_state, _millivolts, false)
723
724
725 /* common to most of boards*/
726 FIXED_REG(0, en_5v_cp,          en_5v_cp,       NULL,                           1,      0,      TPS6591X_GPIO_0,        true,   1, 5000);
727 FIXED_REG(1, en_5v0,            en_5v0,         NULL,                           0,      0,      TPS6591X_GPIO_2,        true,   0, 5000);
728 FIXED_REG(2, en_ddr,            en_ddr,         NULL,                           1,      0,      TPS6591X_GPIO_6,        true,   1, 1500);
729 FIXED_REG(3, en_3v3_sys,        en_3v3_sys,     NULL,                           0,      0,      TPS6591X_GPIO_7,        true,   1, 3300);
730 FIXED_REG(4, en_vdd_bl,         en_vdd_bl,      NULL,                           0,      0,      TEGRA_GPIO_PK3,         true,   1, 5000);
731 FIXED_REG(5, en_3v3_modem,      en_3v3_modem,   NULL,                           1,      0,      TEGRA_GPIO_PD6,         true,   1, 3300);
732 FIXED_REG(6, en_vdd_pnl1,       en_vdd_pnl1,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PL4,         true,   1, 3300);
733 FIXED_REG(7, cam3_ldo_en,       cam3_ldo_en,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PS0,         true,   0, 3300);
734 FIXED_REG(8, en_vdd_com,        en_vdd_com,     FIXED_SUPPLY(en_3v3_sys),       1,      0,      TEGRA_GPIO_PD0,         true,   1, 3300);
735 FIXED_REG(9, en_3v3_fuse,       en_3v3_fuse,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PL6,         true,   0, 3300);
736 FIXED_REG(10, en_3v3_emmc,      en_3v3_emmc,    FIXED_SUPPLY(en_3v3_sys),       1,      0,      TEGRA_GPIO_PD1,         true,   1, 3300);
737 FIXED_REG(11, en_vdd_sdmmc1,    en_vdd_sdmmc1,  FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PD7,         true,   1, 3300);
738 FIXED_REG(12, en_3v3_pex_hvdd,  en_3v3_pex_hvdd, FIXED_SUPPLY(en_3v3_sys),      0,      0,      TEGRA_GPIO_PL7,         true,   0, 3300);
739 FIXED_REG(13, en_1v8_cam,       en_1v8_cam,     tps6591x_rails(VIO),            0,      0,      TEGRA_GPIO_PBB4,        true,   0, 1800);
740
741 /* Specific to E1187/E1186/E1256 */
742 FIXED_REG(14, dis_5v_switch_e118x,      dis_5v_switch,  FIXED_SUPPLY(en_5v0),   0,      0,      TEGRA_GPIO_PX2,         false,  0, 5000);
743
744 /* E1291-A04/A05 specific */
745 FIXED_REG(1, en_5v0_a04,        en_5v0,         NULL,                           0,      0,      TPS6591X_GPIO_8,        true,   0, 5000);
746 FIXED_REG(2, en_ddr_a04,        en_ddr,         NULL,                           1,      0,      TPS6591X_GPIO_7,        true,   1, 1500);
747 FIXED_REG(3, en_3v3_sys_a04,    en_3v3_sys,     NULL,                           0,      0,      TPS6591X_GPIO_6,        true,   1, 3300);
748
749 /* Specific to pm269 */
750 FIXED_REG(4, en_vdd_bl_pm269,           en_vdd_bl,              NULL,                           0,      0,      TEGRA_GPIO_PH3, true,   1, 5000);
751 FIXED_REG(6, en_vdd_pnl1_pm269,         en_vdd_pnl1,            FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PW1, true,   1, 3300);
752 FIXED_REG(9, en_3v3_fuse_pm269,         en_3v3_fuse,            FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PC1, true,   0, 3300);
753 FIXED_REG(12, en_3v3_pex_hvdd_pm269,    en_3v3_pex_hvdd,        FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PC6, true,   0, 3300);
754
755 /* E1198/E1291 specific*/
756 FIXED_REG(18, cam1_ldo_en,      cam1_ldo_en,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PR6,         true,   0, 2800);
757 FIXED_REG(19, cam2_ldo_en,      cam2_ldo_en,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PR7,         true,   0, 2800);
758
759 /* E1291 A03 specific */
760 FIXED_REG(20, en_vdd_bl1_a03,   en_vdd_bl,      NULL,                           0,      0,      TEGRA_GPIO_PDD2,        true,   1, 5000);
761 FIXED_REG(21, en_vdd_bl2_a03,   en_vdd_bl2,     NULL,                           0,      0,      TEGRA_GPIO_PDD0,        true,   1, 5000);
762 FIXED_REG(22, en_vbrtr,         en_vbrtr,       FIXED_SUPPLY(en_3v3_sys),       0,      0,      PMU_TCA6416_GPIO_PORT12,true,   0, 3300);
763
764 /* PM313 display board specific */
765 FIXED_REG(4, en_vdd_bl_pm313,   en_vdd_bl,      NULL,                           0,      0,      TEGRA_GPIO_PK3,         true,  1, 5000);
766 FIXED_REG(6, en_vdd_pnl1_pm313, en_vdd_pnl1,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PH3,         true,  1, 3300);
767
768
769 /****************** Open collector Load switches *******/
770 /*Specific to pm269*/
771 FIXED_REG_OD(17, en_vddio_vid_oc_pm269, en_vddio_vid_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PP2,         true,   0, 5000, true);
772
773 /* Specific to pm311 */
774 FIXED_REG_OD(15, en_usb1_vbus_oc_pm311, en_usb1_vbus_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PCC7,        true,   0, 5000, true);
775 FIXED_REG_OD(16, en_usb3_vbus_oc_pm311, en_usb3_vbus_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PCC6,        true,   0, 5000, true);
776
777
778 /* Specific to E1187/E1186/E1256 */
779 FIXED_REG_OD(15, en_usb1_vbus_oc_e118x, en_usb1_vbus_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PI4,         true,   0, 5000, true);
780 FIXED_REG_OD(16, en_usb3_vbus_oc_e118x, en_usb3_vbus_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PH7,         true,   0, 5000, true);
781 FIXED_REG_OD(17, en_vddio_vid_oc_e118x, en_vddio_vid_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PT0,         true,   0, 5000, true);
782
783
784 /* E1198/E1291 specific  fab < A03 */
785 FIXED_REG_OD(15, en_usb1_vbus_oc,       en_usb1_vbus_oc,        FIXED_SUPPLY(en_5v0),           0,      0,      TEGRA_GPIO_PI4,         true,   0, 5000, true);
786 FIXED_REG_OD(16, en_usb3_vbus_oc,       en_usb3_vbus_oc,        FIXED_SUPPLY(en_5v0),           0,      0,      TEGRA_GPIO_PH7,         true,   0, 5000, true);
787
788 /* E1198/E1291 specific  fab >= A03 */
789 FIXED_REG_OD(15, en_usb1_vbus_oc_a03,   en_usb1_vbus_oc,        FIXED_SUPPLY(en_5v0),           0,      0,      TEGRA_GPIO_PDD6,        true,   0, 5000, true);
790 FIXED_REG_OD(16, en_usb3_vbus_oc_a03,   en_usb3_vbus_oc,        FIXED_SUPPLY(en_5v0),           0,      0,      TEGRA_GPIO_PDD4,        true,   0, 5000, true);
791
792 /* E1198/E1291 specific */
793 FIXED_REG_OD(17, en_vddio_vid_oc,       en_vddio_vid_oc,        FIXED_SUPPLY(en_5v0),           0,      0,      TEGRA_GPIO_PT0,         true,   0, 5000, true);
794
795 /*
796  * Creating the fixed/gpio-switch regulator device tables for different boards
797  */
798 #define ADD_FIXED_REG(_name)    (&fixed_reg_##_name##_dev)
799
800 #define COMMON_FIXED_REG                        \
801         ADD_FIXED_REG(en_5v_cp),                \
802         ADD_FIXED_REG(en_5v0),                  \
803         ADD_FIXED_REG(en_ddr),                  \
804         ADD_FIXED_REG(en_3v3_sys),              \
805         ADD_FIXED_REG(en_3v3_modem),            \
806         ADD_FIXED_REG(en_vdd_pnl1),             \
807         ADD_FIXED_REG(cam3_ldo_en),             \
808         ADD_FIXED_REG(en_vdd_com),              \
809         ADD_FIXED_REG(en_3v3_fuse),             \
810         ADD_FIXED_REG(en_3v3_emmc),             \
811         ADD_FIXED_REG(en_vdd_sdmmc1),           \
812         ADD_FIXED_REG(en_3v3_pex_hvdd),         \
813         ADD_FIXED_REG(en_1v8_cam),
814
815 #define COMMON_FIXED_REG_E1291_A04              \
816         ADD_FIXED_REG(en_5v_cp),                \
817         ADD_FIXED_REG(en_5v0_a04),              \
818         ADD_FIXED_REG(en_ddr_a04),              \
819         ADD_FIXED_REG(en_3v3_sys_a04),          \
820         ADD_FIXED_REG(en_3v3_modem),            \
821         ADD_FIXED_REG(en_vdd_pnl1),             \
822         ADD_FIXED_REG(cam3_ldo_en),             \
823         ADD_FIXED_REG(en_vdd_com),              \
824         ADD_FIXED_REG(en_3v3_fuse),             \
825         ADD_FIXED_REG(en_3v3_emmc),             \
826         ADD_FIXED_REG(en_vdd_sdmmc1),           \
827         ADD_FIXED_REG(en_3v3_pex_hvdd),         \
828         ADD_FIXED_REG(en_1v8_cam),
829
830 #define PM269_FIXED_REG                         \
831         ADD_FIXED_REG(en_5v_cp),                \
832         ADD_FIXED_REG(en_5v0),                  \
833         ADD_FIXED_REG(en_ddr),                  \
834         ADD_FIXED_REG(en_3v3_sys),              \
835         ADD_FIXED_REG(en_3v3_modem),            \
836         ADD_FIXED_REG(cam1_ldo_en),             \
837         ADD_FIXED_REG(cam2_ldo_en),             \
838         ADD_FIXED_REG(cam3_ldo_en),             \
839         ADD_FIXED_REG(en_vdd_com),              \
840         ADD_FIXED_REG(en_3v3_fuse_pm269),       \
841         ADD_FIXED_REG(en_3v3_emmc),             \
842         ADD_FIXED_REG(en_3v3_pex_hvdd_pm269),   \
843         ADD_FIXED_REG(en_1v8_cam),              \
844         ADD_FIXED_REG(dis_5v_switch_e118x),     \
845         ADD_FIXED_REG(en_vbrtr),                \
846         ADD_FIXED_REG(en_usb1_vbus_oc_e118x),   \
847         ADD_FIXED_REG(en_usb3_vbus_oc_e118x),   \
848         ADD_FIXED_REG(en_vddio_vid_oc_pm269),
849
850 #define PM311_FIXED_REG                         \
851         ADD_FIXED_REG(en_5v_cp),                \
852         ADD_FIXED_REG(en_5v0),                  \
853         ADD_FIXED_REG(en_ddr),                  \
854         ADD_FIXED_REG(en_3v3_sys),              \
855         ADD_FIXED_REG(en_3v3_modem),            \
856         ADD_FIXED_REG(cam1_ldo_en),             \
857         ADD_FIXED_REG(cam2_ldo_en),             \
858         ADD_FIXED_REG(cam3_ldo_en),             \
859         ADD_FIXED_REG(en_vdd_com),              \
860         ADD_FIXED_REG(en_3v3_fuse_pm269),       \
861         ADD_FIXED_REG(en_3v3_emmc),             \
862         ADD_FIXED_REG(en_3v3_pex_hvdd_pm269),   \
863         ADD_FIXED_REG(en_1v8_cam),              \
864         ADD_FIXED_REG(dis_5v_switch_e118x),     \
865         ADD_FIXED_REG(en_usb1_vbus_oc_pm311),   \
866         ADD_FIXED_REG(en_usb3_vbus_oc_pm311),   \
867         ADD_FIXED_REG(en_vddio_vid_oc_pm269),
868
869
870 #define E1247_DISPLAY_FIXED_REG                 \
871         ADD_FIXED_REG(en_vdd_bl_pm269),         \
872         ADD_FIXED_REG(en_vdd_pnl1_pm269),
873
874 #define E1247_DSI_DISPLAY_FIXED_REG             \
875         ADD_FIXED_REG(en_vdd_bl_pm269),
876
877 #define PM313_DISPLAY_FIXED_REG                 \
878         ADD_FIXED_REG(en_vdd_bl_pm313),         \
879         ADD_FIXED_REG(en_vdd_pnl1_pm313),
880
881 #define E118x_FIXED_REG                         \
882         ADD_FIXED_REG(en_5v_cp),                \
883         ADD_FIXED_REG(en_5v0),                  \
884         ADD_FIXED_REG(en_ddr),                  \
885         ADD_FIXED_REG(en_3v3_sys),              \
886         ADD_FIXED_REG(en_3v3_modem),            \
887         ADD_FIXED_REG(cam3_ldo_en),             \
888         ADD_FIXED_REG(en_vdd_com),              \
889         ADD_FIXED_REG(en_3v3_fuse),             \
890         ADD_FIXED_REG(en_3v3_emmc),             \
891         ADD_FIXED_REG(en_vdd_sdmmc1),           \
892         ADD_FIXED_REG(en_3v3_pex_hvdd),         \
893         ADD_FIXED_REG(en_1v8_cam),              \
894         ADD_FIXED_REG(dis_5v_switch_e118x),     \
895         ADD_FIXED_REG(en_vbrtr),                \
896         ADD_FIXED_REG(en_usb1_vbus_oc_e118x),   \
897         ADD_FIXED_REG(en_usb3_vbus_oc_e118x),   \
898         ADD_FIXED_REG(en_vddio_vid_oc_e118x),
899
900 #define E1198_FIXED_REG                         \
901         ADD_FIXED_REG(cam1_ldo_en),             \
902         ADD_FIXED_REG(cam2_ldo_en),             \
903         ADD_FIXED_REG(en_vddio_vid_oc),
904
905 #define E1291_1198_A00_FIXED_REG                \
906         ADD_FIXED_REG(en_vdd_bl),               \
907         ADD_FIXED_REG(en_usb1_vbus_oc),         \
908         ADD_FIXED_REG(en_usb3_vbus_oc),
909
910 #define E1291_A03_FIXED_REG                     \
911         ADD_FIXED_REG(en_vdd_bl1_a03),          \
912         ADD_FIXED_REG(en_vdd_bl2_a03),          \
913         ADD_FIXED_REG(en_usb1_vbus_oc_a03),     \
914         ADD_FIXED_REG(en_usb3_vbus_oc_a03),
915
916 /* Fixed regulator devices for E1186/E1187/E1256 */
917 static struct platform_device *fixed_reg_devs_e118x[] = {
918         E118x_FIXED_REG
919         E1247_DISPLAY_FIXED_REG
920 };
921
922 static struct platform_device *fixed_reg_devs_e118x_dsi[] = {
923         E118x_FIXED_REG
924         E1247_DSI_DISPLAY_FIXED_REG
925 };
926
927 /* Fixed regulator devices for E1186/E1187/E1256 */
928 static struct platform_device *fixed_reg_devs_e118x_pm313[] = {
929         E118x_FIXED_REG
930         PM313_DISPLAY_FIXED_REG
931 };
932
933 /* Fixed regulator devices for E1198 and E1291 */
934 static struct platform_device *fixed_reg_devs_e1198_base[] = {
935         COMMON_FIXED_REG
936         E1291_1198_A00_FIXED_REG
937         E1198_FIXED_REG
938 };
939
940 static struct platform_device *fixed_reg_devs_e1198_a02[] = {
941         ADD_FIXED_REG(en_5v_cp),
942         ADD_FIXED_REG(en_5v0),
943         ADD_FIXED_REG(en_ddr_a04),
944         ADD_FIXED_REG(en_3v3_sys_a04),
945         ADD_FIXED_REG(en_3v3_modem),
946         ADD_FIXED_REG(en_vdd_pnl1),
947         ADD_FIXED_REG(cam3_ldo_en),
948         ADD_FIXED_REG(en_vdd_com),
949         ADD_FIXED_REG(en_3v3_fuse),
950         ADD_FIXED_REG(en_3v3_emmc),
951         ADD_FIXED_REG(en_vdd_sdmmc1),
952         ADD_FIXED_REG(en_3v3_pex_hvdd),
953         ADD_FIXED_REG(en_1v8_cam),
954         ADD_FIXED_REG(en_vdd_bl1_a03),
955         ADD_FIXED_REG(en_vdd_bl2_a03),
956         ADD_FIXED_REG(cam1_ldo_en),
957         ADD_FIXED_REG(cam2_ldo_en),
958         ADD_FIXED_REG(en_usb1_vbus_oc_a03),
959         ADD_FIXED_REG(en_usb3_vbus_oc_a03),
960         ADD_FIXED_REG(en_vddio_vid_oc),
961 };
962
963 /* Fixed regulator devices for PM269 */
964 static struct platform_device *fixed_reg_devs_pm269[] = {
965         PM269_FIXED_REG
966         E1247_DISPLAY_FIXED_REG
967 };
968
969 static struct platform_device *fixed_reg_devs_pm269_dsi[] = {
970         PM269_FIXED_REG
971         E1247_DSI_DISPLAY_FIXED_REG
972 };
973
974 /* Fixed regulator devices for PM269 */
975 static struct platform_device *fixed_reg_devs_pm269_pm313[] = {
976         PM269_FIXED_REG
977         PM313_DISPLAY_FIXED_REG
978 };
979
980 /* Fixed regulator devices for PM311 */
981 static struct platform_device *fixed_reg_devs_pm311[] = {
982         PM311_FIXED_REG
983         E1247_DISPLAY_FIXED_REG
984 };
985
986 static struct platform_device *fixed_reg_devs_pm311_dsi[] = {
987         PM311_FIXED_REG
988         E1247_DSI_DISPLAY_FIXED_REG
989 };
990
991 /* Fixed regulator devices for PM11 */
992 static struct platform_device *fixed_reg_devs_pm311_pm313[] = {
993         PM311_FIXED_REG
994         PM313_DISPLAY_FIXED_REG
995 };
996
997 /* Fixed regulator devices for E1291 A03 */
998 static struct platform_device *fixed_reg_devs_e1291_a03[] = {
999         COMMON_FIXED_REG
1000         E1291_A03_FIXED_REG
1001         E1198_FIXED_REG
1002 };
1003
1004 /* Fixed regulator devices for E1291 A04/A05 */
1005 static struct platform_device *fixed_reg_devs_e1291_a04[] = {
1006         COMMON_FIXED_REG_E1291_A04
1007         E1291_A03_FIXED_REG
1008         E1198_FIXED_REG
1009 };
1010
1011 static bool is_display_board_dsi(u16 display_board_id)
1012 {
1013         return ((display_board_id == BOARD_DISPLAY_E1213) ||
1014                 (display_board_id == BOARD_DISPLAY_E1253) ||
1015                 (display_board_id == BOARD_DISPLAY_E1506));
1016 }
1017
1018 int __init cardhu_fixed_regulator_init(void)
1019 {
1020         struct board_info board_info;
1021         struct board_info pmu_board_info;
1022         struct board_info display_board_info;
1023         struct platform_device **fixed_reg_devs;
1024         int    nfixreg_devs;
1025
1026         if (!machine_is_cardhu())
1027                 return 0;
1028
1029         tegra_get_board_info(&board_info);
1030         tegra_get_pmu_board_info(&pmu_board_info);
1031         tegra_get_display_board_info(&display_board_info);
1032
1033         if (pmu_board_info.board_id == BOARD_PMU_PM298)
1034                 return cardhu_pm298_gpio_switch_regulator_init();
1035
1036         if (pmu_board_info.board_id == BOARD_PMU_PM299)
1037                 return cardhu_pm299_gpio_switch_regulator_init();
1038
1039         switch (board_info.board_id) {
1040         case BOARD_E1198:
1041                 if (board_info.fab <= BOARD_FAB_A01) {
1042                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1198_base);
1043                         fixed_reg_devs = fixed_reg_devs_e1198_base;
1044                 } else {
1045                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1198_a02);
1046                         fixed_reg_devs = fixed_reg_devs_e1198_a02;
1047                 }
1048                 break;
1049
1050         case BOARD_E1291:
1051                 if (board_info.fab == BOARD_FAB_A03) {
1052                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1291_a03);
1053                         fixed_reg_devs = fixed_reg_devs_e1291_a03;
1054                 } else if ((board_info.fab == BOARD_FAB_A04) ||
1055                                 (board_info.fab == BOARD_FAB_A05) ||
1056                                 (board_info.fab == BOARD_FAB_A07)) {
1057                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1291_a04);
1058                         fixed_reg_devs = fixed_reg_devs_e1291_a04;
1059                 } else {
1060                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1198_base);
1061                         fixed_reg_devs = fixed_reg_devs_e1198_base;
1062                 }
1063                 break;
1064
1065         case BOARD_PM311:
1066         case BOARD_PM305:
1067                 nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm311);
1068                 fixed_reg_devs = fixed_reg_devs_pm311;
1069                 if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
1070                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm311_pm313);
1071                         fixed_reg_devs = fixed_reg_devs_pm311_pm313;
1072                 } else if (is_display_board_dsi(display_board_info.board_id)) {
1073                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm311_dsi);
1074                         fixed_reg_devs = fixed_reg_devs_pm311_dsi;
1075                 }
1076                 break;
1077
1078         case BOARD_PM269:
1079         case BOARD_E1257:
1080                 nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm269);
1081                 fixed_reg_devs = fixed_reg_devs_pm269;
1082                 if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
1083                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm269_pm313);
1084                         fixed_reg_devs = fixed_reg_devs_pm269_pm313;
1085                 } else if (is_display_board_dsi(display_board_info.board_id)) {
1086                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm269_dsi);
1087                         fixed_reg_devs = fixed_reg_devs_pm269_dsi;
1088                 } else {
1089                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm269);
1090                         fixed_reg_devs = fixed_reg_devs_pm269;
1091                 }
1092                 break;
1093
1094         default:
1095                 if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
1096                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e118x_pm313);
1097                         fixed_reg_devs = fixed_reg_devs_e118x_pm313;
1098                 } else if (is_display_board_dsi(display_board_info.board_id)) {
1099                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e118x_dsi);
1100                         fixed_reg_devs = fixed_reg_devs_e118x_dsi;
1101                 } else {
1102                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e118x);
1103                         fixed_reg_devs = fixed_reg_devs_e118x;
1104                 }
1105                 break;
1106         }
1107
1108         return platform_add_devices(fixed_reg_devs, nfixreg_devs);
1109 }
1110 subsys_initcall_sync(cardhu_fixed_regulator_init);
1111
1112 static void cardhu_board_suspend(int lp_state, enum suspend_stage stg)
1113 {
1114         if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_SUSPEND_BEFORE_CPU))
1115                 tegra_console_uart_suspend();
1116 }
1117
1118 static void cardhu_board_resume(int lp_state, enum resume_stage stg)
1119 {
1120         if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_RESUME_AFTER_CPU))
1121                 tegra_console_uart_resume();
1122 }
1123
1124 static struct tegra_suspend_platform_data cardhu_suspend_data = {
1125         .cpu_timer      = 2000,
1126         .cpu_off_timer  = 200,
1127         .suspend_mode   = TEGRA_SUSPEND_LP0,
1128         .core_timer     = 0x7e7e,
1129         .core_off_timer = 0,
1130         .corereq_high   = true,
1131         .sysclkreq_high = true,
1132         .cpu_lp2_min_residency = 2000,
1133         .board_suspend = cardhu_board_suspend,
1134         .board_resume = cardhu_board_resume,
1135 };
1136
1137 int __init cardhu_suspend_init(void)
1138 {
1139         struct board_info board_info;
1140         struct board_info pmu_board_info;
1141
1142         tegra_get_board_info(&board_info);
1143         tegra_get_pmu_board_info(&pmu_board_info);
1144
1145         /* For PMU Fab A03, A04 and A05 make core_pwr_req to high */
1146         if ((pmu_board_info.fab == BOARD_FAB_A03) ||
1147                 (pmu_board_info.fab == BOARD_FAB_A04) ||
1148                  (pmu_board_info.fab == BOARD_FAB_A05))
1149                 cardhu_suspend_data.corereq_high = true;
1150
1151         /* CORE_PWR_REQ to be high for all processor/pmu board whose sku bit 0
1152          * is set. This is require to enable the dc-dc converter tps62361x */
1153         if ((board_info.sku & SKU_DCDC_TPS62361_SUPPORT) || (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT))
1154                 cardhu_suspend_data.corereq_high = true;
1155
1156         switch (board_info.board_id) {
1157         case BOARD_E1291:
1158                 /* CORE_PWR_REQ to be high for E1291-A03 */
1159                 if (board_info.fab == BOARD_FAB_A03)
1160                         cardhu_suspend_data.corereq_high = true;
1161                 if (board_info.fab < BOARD_FAB_A03)
1162                         /* post E1291-A02 revisions WAKE19/USB1-VBUS wake supported */
1163                         tegra_disable_wake_source(TEGRA_WAKE_USB1_VBUS);
1164                 break;
1165         case BOARD_E1198:
1166                 if (board_info.fab < BOARD_FAB_A02)
1167                         /* post E1198-A01 revisions WAKE19/USB1-VBUS wake supported */
1168                         tegra_disable_wake_source(TEGRA_WAKE_USB1_VBUS);
1169                 break;
1170         case BOARD_PM269:
1171         case BOARD_PM305:
1172         case BOARD_PM311:
1173                 break;
1174         case BOARD_E1187:
1175         case BOARD_E1186:
1176         case BOARD_E1256:
1177         case BOARD_E1257:
1178                 cardhu_suspend_data.cpu_timer = 5000;
1179                 cardhu_suspend_data.cpu_off_timer = 5000;
1180                 break;
1181         default:
1182                 break;
1183         }
1184
1185         tegra_init_suspend(&cardhu_suspend_data);
1186         return 0;
1187 }
1188
1189 #ifdef CONFIG_TEGRA_EDP_LIMITS
1190
1191 int __init cardhu_edp_init(void)
1192 {
1193         unsigned int regulator_mA;
1194
1195         regulator_mA = get_maximum_cpu_current_supported();
1196         if (!regulator_mA) {
1197                 regulator_mA = 6000; /* regular T30/s */
1198         }
1199         pr_info("%s: CPU regulator %d mA\n", __func__, regulator_mA);
1200
1201         tegra_init_cpu_edp_limits(regulator_mA);
1202         return 0;
1203 }
1204 #endif
1205
1206 static char *cardhu_battery[] = {
1207         "bq27510-0",
1208 };
1209
1210 static struct gpio_charger_platform_data cardhu_charger_pdata = {
1211         .name = "ac",
1212         .type = POWER_SUPPLY_TYPE_MAINS,
1213         .gpio = AC_PRESENT_GPIO,
1214         .gpio_active_low = 0,
1215         .supplied_to = cardhu_battery,
1216         .num_supplicants = ARRAY_SIZE(cardhu_battery),
1217 };
1218
1219 static struct platform_device cardhu_charger_device = {
1220         .name = "gpio-charger",
1221         .dev = {
1222                 .platform_data = &cardhu_charger_pdata,
1223         },
1224 };
1225
1226 static int __init cardhu_charger_late_init(void)
1227 {
1228         if (!machine_is_cardhu())
1229                 return 0;
1230
1231         platform_device_register(&cardhu_charger_device);
1232         return 0;
1233 }
1234
1235 late_initcall(cardhu_charger_late_init);