ARM: tegra: cardhu: Add battery regulator
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu-power.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu-power.c
3  *
4  * Copyright (C) 2011-2012, NVIDIA Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
18  * 02111-1307, USA
19  */
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/regulator/machine.h>
25 #include <linux/mfd/tps6591x.h>
26 #include <linux/mfd/max77663-core.h>
27 #include <linux/gpio.h>
28 #include <linux/io.h>
29 #include <linux/regulator/fixed.h>
30 #include <linux/regulator/tps6591x-regulator.h>
31 #include <linux/regulator/tps62360.h>
32 #include <linux/power/gpio-charger.h>
33
34 #include <asm/mach-types.h>
35
36 #include <mach/iomap.h>
37 #include <mach/irqs.h>
38 #include <mach/pinmux.h>
39 #include <mach/edp.h>
40
41 #include "gpio-names.h"
42 #include "board.h"
43 #include "board-cardhu.h"
44 #include "pm.h"
45 #include "tegra3_tsensor.h"
46 #include "wakeups.h"
47 #include "wakeups-t3.h"
48
49 #define PMC_CTRL                0x0
50 #define PMC_CTRL_INTR_LOW       (1 << 17)
51
52 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_0[] = {
53         REGULATOR_SUPPLY("vdd_core", NULL),
54         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
55 };
56
57 static struct regulator_consumer_supply tps6591x_vdd1_supply_skubit0_1[] = {
58         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
59 };
60
61 static struct regulator_consumer_supply tps6591x_vdd2_supply_0[] = {
62         REGULATOR_SUPPLY("vdd_gen1v5", NULL),
63         REGULATOR_SUPPLY("vcore_lcd", NULL),
64         REGULATOR_SUPPLY("track_ldo1", NULL),
65         REGULATOR_SUPPLY("external_ldo_1v2", NULL),
66         REGULATOR_SUPPLY("vcore_cam1", NULL),
67         REGULATOR_SUPPLY("vcore_cam2", NULL),
68 };
69
70 static struct regulator_consumer_supply tps6591x_vddctrl_supply_0[] = {
71         REGULATOR_SUPPLY("vdd_cpu_pmu", NULL),
72         REGULATOR_SUPPLY("vdd_cpu", NULL),
73         REGULATOR_SUPPLY("vdd_sys", NULL),
74 };
75
76 static struct regulator_consumer_supply tps6591x_vio_supply_0[] = {
77         REGULATOR_SUPPLY("vdd_gen1v8", NULL),
78         REGULATOR_SUPPLY("avdd_hdmi_pll", NULL),
79         REGULATOR_SUPPLY("avdd_usb_pll", NULL),
80         REGULATOR_SUPPLY("avdd_osc", NULL),
81         REGULATOR_SUPPLY("vddio_sys", NULL),
82         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
83         REGULATOR_SUPPLY("pwrdet_sdmmc4", NULL),
84         REGULATOR_SUPPLY("vdd1v8_satelite", NULL),
85         REGULATOR_SUPPLY("vddio_uart", NULL),
86         REGULATOR_SUPPLY("pwrdet_uart", NULL),
87         REGULATOR_SUPPLY("vddio_audio", NULL),
88         REGULATOR_SUPPLY("pwrdet_audio", NULL),
89         REGULATOR_SUPPLY("vddio_bb", NULL),
90         REGULATOR_SUPPLY("pwrdet_bb", NULL),
91         REGULATOR_SUPPLY("vddio_lcd_pmu", NULL),
92         REGULATOR_SUPPLY("pwrdet_lcd", NULL),
93         REGULATOR_SUPPLY("vddio_cam", NULL),
94         REGULATOR_SUPPLY("pwrdet_cam", NULL),
95         REGULATOR_SUPPLY("vddio_vi", NULL),
96         REGULATOR_SUPPLY("pwrdet_vi", NULL),
97         REGULATOR_SUPPLY("ldo6", NULL),
98         REGULATOR_SUPPLY("ldo7", NULL),
99         REGULATOR_SUPPLY("ldo8", NULL),
100         REGULATOR_SUPPLY("vcore_audio", NULL),
101         REGULATOR_SUPPLY("avcore_audio", NULL),
102         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
103         REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
104         REGULATOR_SUPPLY("vcore1_lpddr2", NULL),
105         REGULATOR_SUPPLY("vcom_1v8", NULL),
106         REGULATOR_SUPPLY("pmuio_1v8", NULL),
107         REGULATOR_SUPPLY("avdd_ic_usb", NULL),
108 };
109
110 static struct regulator_consumer_supply tps6591x_ldo1_supply_0[] = {
111         REGULATOR_SUPPLY("avdd_pexb", NULL),
112         REGULATOR_SUPPLY("vdd_pexb", NULL),
113         REGULATOR_SUPPLY("avdd_pex_pll", NULL),
114         REGULATOR_SUPPLY("avdd_pexa", NULL),
115         REGULATOR_SUPPLY("vdd_pexa", NULL),
116 };
117
118 static struct regulator_consumer_supply tps6591x_ldo1_supply_pm315[] = {
119         REGULATOR_SUPPLY("avdd_pexb", NULL),
120         REGULATOR_SUPPLY("vdd_pexb", NULL),
121         REGULATOR_SUPPLY("avdd_pex_pll", NULL),
122         REGULATOR_SUPPLY("avdd_pexa", NULL),
123         REGULATOR_SUPPLY("vdd_pexa", NULL),
124         REGULATOR_SUPPLY("avdd_sata", NULL),
125         REGULATOR_SUPPLY("vdd_sata", NULL),
126         REGULATOR_SUPPLY("avdd_sata_pll", NULL),
127         REGULATOR_SUPPLY("avdd_plle", NULL),
128 };
129
130 static struct regulator_consumer_supply tps6591x_ldo2_supply_0[] = {
131         REGULATOR_SUPPLY("avdd_sata", NULL),
132         REGULATOR_SUPPLY("vdd_sata", NULL),
133         REGULATOR_SUPPLY("avdd_sata_pll", NULL),
134         REGULATOR_SUPPLY("avdd_plle", NULL),
135 };
136
137 static struct regulator_consumer_supply tps6591x_ldo3_supply_e118x[] = {
138         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
139         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
140 };
141
142 static struct regulator_consumer_supply tps6591x_ldo3_supply_e1198[] = {
143         REGULATOR_SUPPLY("unused_rail_ldo3", NULL),
144 };
145
146 static struct regulator_consumer_supply tps6591x_ldo4_supply_0[] = {
147         REGULATOR_SUPPLY("vdd_rtc", NULL),
148 };
149
150 static struct regulator_consumer_supply tps6591x_ldo5_supply_e118x[] = {
151         REGULATOR_SUPPLY("avdd_vdac", NULL),
152 };
153
154 static struct regulator_consumer_supply tps6591x_ldo5_supply_e1198[] = {
155         REGULATOR_SUPPLY("avdd_vdac", NULL),
156         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
157         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
158 };
159
160 static struct regulator_consumer_supply tps6591x_ldo6_supply_0[] = {
161         REGULATOR_SUPPLY("avdd_dsi_csi", NULL),
162         REGULATOR_SUPPLY("pwrdet_mipi", NULL),
163 };
164 static struct regulator_consumer_supply tps6591x_ldo7_supply_0[] = {
165         REGULATOR_SUPPLY("avdd_plla_p_c_s", NULL),
166         REGULATOR_SUPPLY("avdd_pllm", NULL),
167         REGULATOR_SUPPLY("avdd_pllu_d", NULL),
168         REGULATOR_SUPPLY("avdd_pllu_d2", NULL),
169         REGULATOR_SUPPLY("avdd_pllx", NULL),
170 };
171
172 static struct regulator_consumer_supply tps6591x_ldo8_supply_0[] = {
173         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
174 };
175
176 #define TPS_PDATA_INIT(_name, _sname, _minmv, _maxmv, _supply_reg, _always_on, \
177         _boot_on, _apply_uv, _init_uV, _init_enable, _init_apply, _ectrl, _flags) \
178         static struct tps6591x_regulator_platform_data pdata_##_name##_##_sname = \
179         {                                                               \
180                 .regulator = {                                          \
181                         .constraints = {                                \
182                                 .min_uV = (_minmv)*1000,                \
183                                 .max_uV = (_maxmv)*1000,                \
184                                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
185                                                      REGULATOR_MODE_STANDBY), \
186                                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
187                                                    REGULATOR_CHANGE_STATUS |  \
188                                                    REGULATOR_CHANGE_VOLTAGE), \
189                                 .always_on = _always_on,                \
190                                 .boot_on = _boot_on,                    \
191                                 .apply_uV = _apply_uv,                  \
192                         },                                              \
193                         .num_consumer_supplies =                        \
194                                 ARRAY_SIZE(tps6591x_##_name##_supply_##_sname), \
195                         .consumer_supplies = tps6591x_##_name##_supply_##_sname,        \
196                         .supply_regulator = _supply_reg,                \
197                 },                                                      \
198                 .init_uV =  _init_uV * 1000,                            \
199                 .init_enable = _init_enable,                            \
200                 .init_apply = _init_apply,                              \
201                 .ectrl = _ectrl,                                        \
202                 .flags = _flags,                                        \
203         }
204
205 TPS_PDATA_INIT(vdd1, skubit0_0, 600,  1500, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF, 0);
206 TPS_PDATA_INIT(vdd1, skubit0_1, 600,  1500, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF, 0);
207 TPS_PDATA_INIT(vdd2, 0,         600,  1500, 0, 0, 1, 0, -1, 0, 0, 0, 0);
208 TPS_PDATA_INIT(vddctrl, 0,      600,  1400, 0, 1, 1, 0, -1, 0, 0, EXT_CTRL_EN1, 0);
209 TPS_PDATA_INIT(vio,  0,         1500, 3300, 0, 1, 1, 0, -1, 0, 0, 0, 0);
210
211 TPS_PDATA_INIT(ldo1, 0,         1000, 3300, tps6591x_rails(VDD_2), 0, 0, 0, -1, 0, 1, 0, 0);
212 TPS_PDATA_INIT(ldo2, 0,         1050, 1050, tps6591x_rails(VDD_2), 0, 0, 1, -1, 0, 1, 0, 0);
213
214 TPS_PDATA_INIT(ldo3, e118x,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
215 TPS_PDATA_INIT(ldo3, e1198,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
216 TPS_PDATA_INIT(ldo4, 0,         1000, 3300, 0, 1, 0, 0, -1, 0, 0, 0, 0);
217 TPS_PDATA_INIT(ldo5, e118x,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
218 TPS_PDATA_INIT(ldo5, e1198,     1000, 3300, 0, 0, 0, 0, -1, 0, 0, 0, 0);
219
220 TPS_PDATA_INIT(ldo6, 0,         1200, 1200, tps6591x_rails(VIO), 0, 0, 1, -1, 0, 0, 0, 0);
221 TPS_PDATA_INIT(ldo7, 0,         1200, 1200, tps6591x_rails(VIO), 1, 1, 1, -1, 0, 0, EXT_CTRL_SLEEP_OFF, LDO_LOW_POWER_ON_SUSPEND);
222 TPS_PDATA_INIT(ldo8, 0,         1000, 3300, tps6591x_rails(VIO), 1, 0, 0, -1, 0, 0, EXT_CTRL_SLEEP_OFF, LDO_LOW_POWER_ON_SUSPEND);
223
224 #if defined(CONFIG_RTC_DRV_TPS6591x)
225 static struct tps6591x_rtc_platform_data rtc_data = {
226         .irq = TEGRA_NR_IRQS + TPS6591X_INT_RTC_ALARM,
227         .time = {
228                 .tm_year = 2000,
229                 .tm_mon = 0,
230                 .tm_mday = 1,
231                 .tm_hour = 0,
232                 .tm_min = 0,
233                 .tm_sec = 0,
234         },
235 };
236
237 #define TPS_RTC_REG()                                   \
238         {                                               \
239                 .id     = 0,                            \
240                 .name   = "rtc_tps6591x",               \
241                 .platform_data = &rtc_data,             \
242         }
243 #endif
244
245 #define TPS_REG(_id, _name, _sname)                             \
246         {                                                       \
247                 .id     = TPS6591X_ID_##_id,                    \
248                 .name   = "tps6591x-regulator",                 \
249                 .platform_data  = &pdata_##_name##_##_sname,    \
250         }
251
252 #define TPS6591X_DEV_COMMON_E118X               \
253         TPS_REG(VDD_2, vdd2, 0),                \
254         TPS_REG(VDDCTRL, vddctrl, 0),           \
255         TPS_REG(LDO_1, ldo1, 0),                \
256         TPS_REG(LDO_2, ldo2, 0),                \
257         TPS_REG(LDO_3, ldo3, e118x),            \
258         TPS_REG(LDO_4, ldo4, 0),                \
259         TPS_REG(LDO_5, ldo5, e118x),            \
260         TPS_REG(LDO_6, ldo6, 0),                \
261         TPS_REG(LDO_7, ldo7, 0),                \
262         TPS_REG(LDO_8, ldo8, 0)
263
264 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_0[] = {
265         TPS_REG(VIO, vio, 0),
266         TPS_REG(VDD_1, vdd1, skubit0_0),
267         TPS6591X_DEV_COMMON_E118X,
268 #if defined(CONFIG_RTC_DRV_TPS6591x)
269         TPS_RTC_REG(),
270 #endif
271 };
272
273 static struct tps6591x_subdev_info tps_devs_e118x_skubit0_1[] = {
274         TPS_REG(VIO, vio, 0),
275         TPS_REG(VDD_1, vdd1, skubit0_1),
276         TPS6591X_DEV_COMMON_E118X,
277 #if defined(CONFIG_RTC_DRV_TPS6591x)
278         TPS_RTC_REG(),
279 #endif
280 };
281
282 #define TPS6591X_DEV_COMMON_CARDHU              \
283         TPS_REG(VDD_2, vdd2, 0),                \
284         TPS_REG(VDDCTRL, vddctrl, 0),           \
285         TPS_REG(LDO_1, ldo1, 0),                \
286         TPS_REG(LDO_2, ldo2, 0),                \
287         TPS_REG(LDO_3, ldo3, e1198),            \
288         TPS_REG(LDO_4, ldo4, 0),                \
289         TPS_REG(LDO_5, ldo5, e1198),            \
290         TPS_REG(LDO_6, ldo6, 0),                \
291         TPS_REG(LDO_7, ldo7, 0),                \
292         TPS_REG(LDO_8, ldo8, 0)
293
294 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_0[] = {
295         TPS_REG(VIO, vio, 0),
296         TPS_REG(VDD_1, vdd1, skubit0_0),
297         TPS6591X_DEV_COMMON_CARDHU,
298 #if defined(CONFIG_RTC_DRV_TPS6591x)
299         TPS_RTC_REG(),
300 #endif
301 };
302
303 static struct tps6591x_subdev_info tps_devs_e1198_skubit0_1[] = {
304         TPS_REG(VIO, vio, 0),
305         TPS_REG(VDD_1, vdd1, skubit0_1),
306         TPS6591X_DEV_COMMON_CARDHU,
307 #if defined(CONFIG_RTC_DRV_TPS6591x)
308         TPS_RTC_REG(),
309 #endif
310 };
311
312 #define TPS_GPIO_INIT_PDATA(gpio_nr, _init_apply, _sleep_en, _pulldn_en, _output_en, _output_val)       \
313         [gpio_nr] = {                                   \
314                         .sleep_en       = _sleep_en,    \
315                         .pulldn_en      = _pulldn_en,   \
316                         .output_mode_en = _output_en,   \
317                         .output_val     = _output_val,  \
318                         .init_apply     = _init_apply,  \
319                      }
320 static struct tps6591x_gpio_init_data tps_gpio_pdata_e1291_a04[] =  {
321         TPS_GPIO_INIT_PDATA(0, 0, 0, 0, 0, 0),
322         TPS_GPIO_INIT_PDATA(1, 0, 0, 0, 0, 0),
323         TPS_GPIO_INIT_PDATA(2, 1, 1, 0, 1, 1),
324         TPS_GPIO_INIT_PDATA(3, 0, 0, 0, 0, 0),
325         TPS_GPIO_INIT_PDATA(4, 0, 0, 0, 0, 0),
326         TPS_GPIO_INIT_PDATA(5, 0, 0, 0, 0, 0),
327         TPS_GPIO_INIT_PDATA(6, 0, 0, 0, 0, 0),
328         TPS_GPIO_INIT_PDATA(7, 0, 0, 0, 0, 0),
329         TPS_GPIO_INIT_PDATA(8, 0, 0, 0, 0, 0),
330 };
331
332 static struct tps6591x_sleep_keepon_data tps_slp_keepon = {
333         .clkout32k_keepon = 1,
334 };
335
336 static struct tps6591x_platform_data tps_platform = {
337         .irq_base       = TPS6591X_IRQ_BASE,
338         .gpio_base      = TPS6591X_GPIO_BASE,
339         .dev_slp_en     = true,
340         .slp_keepon     = &tps_slp_keepon,
341         .use_power_off  = true,
342 };
343
344 static struct i2c_board_info __initdata cardhu_regulators[] = {
345         {
346                 I2C_BOARD_INFO("tps6591x", 0x2D),
347                 .irq            = INT_EXTERNAL_PMU,
348                 .platform_data  = &tps_platform,
349         },
350 };
351
352 /* TPS62361B DC-DC converter */
353 static struct regulator_consumer_supply tps62361_dcdc_supply[] = {
354         REGULATOR_SUPPLY("vdd_core", NULL),
355 };
356
357 static struct tps62360_regulator_platform_data tps62361_pdata = {
358         .reg_init_data = {                                      \
359                 .constraints = {                                \
360                         .min_uV = 500000,                       \
361                         .max_uV = 1770000,                      \
362                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
363                                              REGULATOR_MODE_STANDBY), \
364                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
365                                            REGULATOR_CHANGE_STATUS |  \
366                                            REGULATOR_CHANGE_VOLTAGE), \
367                         .always_on = 1,                         \
368                         .boot_on =  1,                          \
369                         .apply_uV = 0,                          \
370                 },                                              \
371                 .num_consumer_supplies = ARRAY_SIZE(tps62361_dcdc_supply), \
372                 .consumer_supplies = tps62361_dcdc_supply,      \
373                 },                                              \
374         .en_discharge = true,                                   \
375         .vsel0_gpio = -1,                                       \
376         .vsel1_gpio = -1,                                       \
377         .vsel0_def_state = 1,                                   \
378         .vsel1_def_state = 1,                                   \
379 };
380
381 static struct i2c_board_info __initdata tps62361_boardinfo[] = {
382         {
383                 I2C_BOARD_INFO("tps62361", 0x60),
384                 .platform_data  = &tps62361_pdata,
385         },
386 };
387
388 int __init cardhu_regulator_init(void)
389 {
390         struct board_info board_info;
391         struct board_info pmu_board_info;
392         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
393         u32 pmc_ctrl;
394         bool ext_core_regulator = false;
395
396         /* configure the power management controller to trigger PMU
397          * interrupts when low */
398
399         pmc_ctrl = readl(pmc + PMC_CTRL);
400         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
401
402         tegra_get_board_info(&board_info);
403         tegra_get_pmu_board_info(&pmu_board_info);
404
405         if (pmu_board_info.board_id == BOARD_PMU_PM298)
406                 return cardhu_pm298_regulator_init();
407
408         if (pmu_board_info.board_id == BOARD_PMU_PM299)
409                 return cardhu_pm299_regulator_init();
410
411         /* The regulator details have complete constraints */
412         regulator_has_full_constraints();
413
414         /* PMU-E1208, the ldo2 should be set to 1200mV */
415         if (pmu_board_info.board_id == BOARD_E1208) {
416                 pdata_ldo2_0.regulator.constraints.min_uV = 1200000;
417                 pdata_ldo2_0.regulator.constraints.max_uV = 1200000;
418         }
419
420         /*
421          * E1198 will have different core regulator decoding.
422          * A01/A02: Based on sku bit 0.
423          * A03: Based on bit 2 and bit 0
424          *       2,0: 00 no core regulator,
425          *            01:TPS62365
426          *            10:TPS62366
427          *            11:TPS623850
428          */
429         if (board_info.board_id == BOARD_E1198) {
430                 int vsels;
431                 switch(board_info.fab) {
432                 case BOARD_FAB_A00:
433                 case BOARD_FAB_A01:
434                 case BOARD_FAB_A02:
435                         if (board_info.sku & SKU_DCDC_TPS62361_SUPPORT)
436                                 ext_core_regulator = true;
437                         break;
438
439                 case BOARD_FAB_A03:
440                         vsels = ((board_info.sku >> 1) & 0x2) | (board_info.sku & 1);
441                         switch(vsels) {
442                         case 1:
443                                 ext_core_regulator = true;
444                                 tps62361_pdata.vsel0_def_state = 1;
445                                 tps62361_pdata.vsel1_def_state = 1;
446                                 break;
447                         case 2:
448                                 ext_core_regulator = true;
449                                 tps62361_pdata.vsel0_def_state = 0;
450                                 tps62361_pdata.vsel1_def_state = 0;
451                                 break;
452                         case 3:
453                                 ext_core_regulator = true;
454                                 tps62361_pdata.vsel0_def_state = 1;
455                                 tps62361_pdata.vsel1_def_state = 0;
456                                 break;
457                         }
458                         break;
459                 }
460
461                 pr_info("BoardId:SKU:Fab 0x%04x:0x%04x:0x%02x\n",
462                         board_info.board_id, board_info.sku , board_info.fab);
463                 pr_info("Core regulator %s\n",
464                         (ext_core_regulator)? "true": "false");
465                 pr_info("VSEL 1:0 %d%d\n",
466                         tps62361_pdata.vsel1_def_state,
467                         tps62361_pdata.vsel0_def_state);
468         } else if (board_info.board_id == BOARD_PM315) {
469                 /* On PM315, SATA rails are on LDO1 */
470                 pdata_ldo1_0.regulator.num_consumer_supplies =
471                                         ARRAY_SIZE(tps6591x_ldo1_supply_pm315);
472                 pdata_ldo1_0.regulator.consumer_supplies =
473                                         tps6591x_ldo1_supply_pm315;
474                 pdata_ldo2_0.regulator.num_consumer_supplies = 0;
475                 pdata_ldo2_0.regulator.consumer_supplies = NULL;
476         }
477
478         if (((board_info.board_id == BOARD_E1291) ||
479              (board_info.board_id == BOARD_PM315)) &&
480                 (board_info.sku & SKU_DCDC_TPS62361_SUPPORT))
481                 ext_core_regulator = true;
482
483         if ((board_info.board_id == BOARD_E1198) ||
484                 (board_info.board_id == BOARD_E1291) ||
485                 (board_info.board_id == BOARD_PM315)) {
486                 if (ext_core_regulator) {
487                         tps_platform.num_subdevs =
488                                         ARRAY_SIZE(tps_devs_e1198_skubit0_1);
489                         tps_platform.subdevs = tps_devs_e1198_skubit0_1;
490                 } else {
491                         tps_platform.num_subdevs =
492                                         ARRAY_SIZE(tps_devs_e1198_skubit0_0);
493                         tps_platform.subdevs = tps_devs_e1198_skubit0_0;
494                 }
495         } else {
496                 if (board_info.board_id == BOARD_PM269)
497                         pdata_ldo3_e118x.slew_rate_uV_per_us = 250;
498
499                 if (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT) {
500                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_1);
501                         tps_platform.subdevs = tps_devs_e118x_skubit0_1;
502                         ext_core_regulator = true;
503                 } else {
504                         tps_platform.num_subdevs = ARRAY_SIZE(tps_devs_e118x_skubit0_0);
505                         tps_platform.subdevs = tps_devs_e118x_skubit0_0;
506                 }
507         }
508
509         /* E1291-A04/A05: Enable DEV_SLP and enable sleep on GPIO2 */
510         if (((board_info.board_id == BOARD_E1291)  ||
511              (board_info.board_id == BOARD_PM315)) &&
512                         ((board_info.fab == BOARD_FAB_A04) ||
513                          (board_info.fab == BOARD_FAB_A05) ||
514                          (board_info.fab == BOARD_FAB_A07))) {
515                 tps_platform.dev_slp_en = true;
516                 tps_platform.gpio_init_data = tps_gpio_pdata_e1291_a04;
517                 tps_platform.num_gpioinit_data =
518                                         ARRAY_SIZE(tps_gpio_pdata_e1291_a04);
519         }
520
521         i2c_register_board_info(4, cardhu_regulators, 1);
522
523         /* Register the external core regulator if it is require */
524         if (ext_core_regulator) {
525                 pr_info("Registering the core regulator\n");
526                 i2c_register_board_info(4, tps62361_boardinfo, 1);
527         }
528         return 0;
529 }
530
531
532 /**************** GPIO based fixed regulator *****************/
533 /* EN_5V_CP from PMU GP0 */
534 static struct regulator_consumer_supply fixed_reg_en_5v_cp_supply[] = {
535         REGULATOR_SUPPLY("vdd_5v0_sby", NULL),
536         REGULATOR_SUPPLY("vdd_hall", NULL),
537         REGULATOR_SUPPLY("vterm_ddr", NULL),
538         REGULATOR_SUPPLY("v2ref_ddr", NULL),
539 };
540
541 /* EN_5V0 From PMU GP2 */
542 static struct regulator_consumer_supply fixed_reg_en_5v0_supply[] = {
543         REGULATOR_SUPPLY("vdd_5v0_sys", NULL),
544 };
545
546 /* EN_DDR From PMU GP6 */
547 static struct regulator_consumer_supply fixed_reg_en_ddr_supply[] = {
548         REGULATOR_SUPPLY("mem_vddio_ddr", NULL),
549         REGULATOR_SUPPLY("t30_vddio_ddr", NULL),
550 };
551
552 /* EN_3V3_SYS From PMU GP7 */
553 static struct regulator_consumer_supply fixed_reg_en_3v3_sys_supply[] = {
554         REGULATOR_SUPPLY("vdd_lvds", NULL),
555         REGULATOR_SUPPLY("vdd_pnl", NULL),
556         REGULATOR_SUPPLY("vcom_3v3", NULL),
557         REGULATOR_SUPPLY("vdd_3v3", NULL),
558         REGULATOR_SUPPLY("vcore_mmc", NULL),
559         REGULATOR_SUPPLY("vddio_pex_ctl", NULL),
560         REGULATOR_SUPPLY("pwrdet_pex_ctl", NULL),
561         REGULATOR_SUPPLY("hvdd_pex_pmu", NULL),
562         REGULATOR_SUPPLY("avdd_hdmi", NULL),
563         REGULATOR_SUPPLY("vpp_fuse", NULL),
564         REGULATOR_SUPPLY("avdd_usb", "tegra-udc.0"),
565         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.0"),
566         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.1"),
567         REGULATOR_SUPPLY("avdd_usb", "tegra-ehci.2"),
568         REGULATOR_SUPPLY("vdd_ddr_rx", NULL),
569         REGULATOR_SUPPLY("vcore_nand", NULL),
570         REGULATOR_SUPPLY("hvdd_sata", NULL),
571         REGULATOR_SUPPLY("vddio_gmi_pmu", NULL),
572         REGULATOR_SUPPLY("pwrdet_nand", NULL),
573         REGULATOR_SUPPLY("avdd_cam1", NULL),
574         REGULATOR_SUPPLY("vdd_af", NULL),
575         REGULATOR_SUPPLY("avdd_cam2", NULL),
576         REGULATOR_SUPPLY("vdd_acc", NULL),
577         REGULATOR_SUPPLY("vdd_phtl", NULL),
578         REGULATOR_SUPPLY("vddio_tp", NULL),
579         REGULATOR_SUPPLY("vdd_led", NULL),
580         REGULATOR_SUPPLY("vddio_cec", NULL),
581         REGULATOR_SUPPLY("vdd_cmps", NULL),
582         REGULATOR_SUPPLY("vdd_temp", NULL),
583         REGULATOR_SUPPLY("vpp_kfuse", NULL),
584         REGULATOR_SUPPLY("vddio_ts", NULL),
585         REGULATOR_SUPPLY("vdd_ir_led", NULL),
586         REGULATOR_SUPPLY("vddio_1wire", NULL),
587         REGULATOR_SUPPLY("avddio_audio", NULL),
588         REGULATOR_SUPPLY("vdd_ec", NULL),
589         REGULATOR_SUPPLY("vcom_pa", NULL),
590         REGULATOR_SUPPLY("vdd_3v3_devices", NULL),
591         REGULATOR_SUPPLY("vdd_3v3_dock", NULL),
592         REGULATOR_SUPPLY("vdd_3v3_edid", NULL),
593         REGULATOR_SUPPLY("vdd_3v3_hdmi_cec", NULL),
594         REGULATOR_SUPPLY("vdd_3v3_gmi", NULL),
595         REGULATOR_SUPPLY("vdd_spk_amp", "tegra-snd-wm8903.0"),
596         REGULATOR_SUPPLY("vdd_3v3_sensor", NULL),
597         REGULATOR_SUPPLY("vdd_3v3_cam", NULL),
598         REGULATOR_SUPPLY("vdd_3v3_als", NULL),
599         REGULATOR_SUPPLY("debug_cons", NULL),
600         REGULATOR_SUPPLY("vdd", "4-004c"),
601 };
602
603 /* DIS_5V_SWITCH from AP SPI2_SCK X02 */
604 static struct regulator_consumer_supply fixed_reg_dis_5v_switch_supply[] = {
605         REGULATOR_SUPPLY("master_5v_switch", NULL),
606 };
607
608 /* EN_VDD_BL */
609 static struct regulator_consumer_supply fixed_reg_en_vdd_bl_supply[] = {
610         REGULATOR_SUPPLY("vdd_backlight", NULL),
611         REGULATOR_SUPPLY("vdd_backlight1", NULL),
612 };
613
614 /* EN_VDD_BL2 (E1291-A03) from AP PEX_L0_PRSNT_N DD.00 */
615 static struct regulator_consumer_supply fixed_reg_en_vdd_bl2_supply[] = {
616         REGULATOR_SUPPLY("vdd_backlight2", NULL),
617 };
618
619 /* EN_3V3_MODEM from AP GPIO VI_VSYNCH D06*/
620 static struct regulator_consumer_supply fixed_reg_en_3v3_modem_supply[] = {
621         REGULATOR_SUPPLY("vdd_3v3_mini_card", NULL),
622         REGULATOR_SUPPLY("vdd_mini_card", NULL),
623 };
624
625 /* EN_VDD_PNL1 from AP GPIO VI_D6 L04*/
626 static struct regulator_consumer_supply fixed_reg_en_vdd_pnl1_supply[] = {
627         REGULATOR_SUPPLY("vdd_lcd_panel", NULL),
628 };
629
630 /* CAM1_LDO_EN from AP GPIO KB_ROW6 R06*/
631 static struct regulator_consumer_supply fixed_reg_cam1_ldo_en_supply[] = {
632         REGULATOR_SUPPLY("vdd_2v8_cam1", NULL),
633         REGULATOR_SUPPLY("avdd", "6-0072"),
634         REGULATOR_SUPPLY("vdd", "6-000e"),
635 };
636
637 /* CAM2_LDO_EN from AP GPIO KB_ROW7 R07*/
638 static struct regulator_consumer_supply fixed_reg_cam2_ldo_en_supply[] = {
639         REGULATOR_SUPPLY("vdd_2v8_cam2", NULL),
640         REGULATOR_SUPPLY("avdd", "7-0072"),
641         REGULATOR_SUPPLY("vdd", "7-000e"),
642 };
643
644 /* CAM3_LDO_EN from AP GPIO KB_ROW8 S00*/
645 static struct regulator_consumer_supply fixed_reg_cam3_ldo_en_supply[] = {
646         REGULATOR_SUPPLY("vdd_cam3", NULL),
647 };
648
649 /* EN_VDD_COM from AP GPIO SDMMC3_DAT5 D00*/
650 static struct regulator_consumer_supply fixed_reg_en_vdd_com_supply[] = {
651         REGULATOR_SUPPLY("vdd_com_bd", NULL),
652 };
653
654 /* EN_VDD_SDMMC1 from AP GPIO VI_HSYNC D07*/
655 static struct regulator_consumer_supply fixed_reg_en_vdd_sdmmc1_supply[] = {
656         REGULATOR_SUPPLY("vddio_sd_slot", "sdhci-tegra.0"),
657 };
658
659 /* EN_3V3_EMMC from AP GPIO SDMMC3_DAT4 D01*/
660 static struct regulator_consumer_supply fixed_reg_en_3v3_emmc_supply[] = {
661         REGULATOR_SUPPLY("vdd_emmc_core", NULL),
662 };
663
664 /* EN_3V3_PEX_HVDD from AP GPIO VI_D09 L07*/
665 static struct regulator_consumer_supply fixed_reg_en_3v3_pex_hvdd_supply[] = {
666         REGULATOR_SUPPLY("hvdd_pex", NULL),
667 };
668
669 /* EN_3v3_FUSE from AP GPIO VI_D08 L06*/
670 static struct regulator_consumer_supply fixed_reg_en_3v3_fuse_supply[] = {
671         REGULATOR_SUPPLY("vdd_fuse", NULL),
672 };
673
674 /* EN_1V8_CAM from AP GPIO GPIO_PBB4 PBB04*/
675 static struct regulator_consumer_supply fixed_reg_en_1v8_cam_supply[] = {
676         REGULATOR_SUPPLY("vdd_1v8_cam1", NULL),
677         REGULATOR_SUPPLY("vdd_1v8_cam2", NULL),
678         REGULATOR_SUPPLY("vdd_1v8_cam3", NULL),
679         REGULATOR_SUPPLY("dvdd", "6-0072"),
680         REGULATOR_SUPPLY("dvdd", "7-0072"),
681         REGULATOR_SUPPLY("vdd_i2c", "6-000e"),
682         REGULATOR_SUPPLY("vdd_i2c", "7-000e"),
683         REGULATOR_SUPPLY("vdd_i2c", "2-0033"),
684 };
685
686 /* Enable realtek Codec for PM315 */
687 static struct regulator_consumer_supply fixed_reg_cdc_en_supply[] = {
688         REGULATOR_SUPPLY("cdc_en", NULL),
689 };
690
691
692
693 static struct regulator_consumer_supply fixed_reg_en_vbrtr_supply[] = {
694         REGULATOR_SUPPLY("vdd_vbrtr", NULL),
695 };
696
697 /* EN_USB1_VBUS_OC*/
698 static struct regulator_consumer_supply fixed_reg_en_usb1_vbus_oc_supply[] = {
699         REGULATOR_SUPPLY("vdd_vbus_micro_usb", NULL),
700 };
701
702 /*EN_USB3_VBUS_OC*/
703 static struct regulator_consumer_supply fixed_reg_en_usb3_vbus_oc_supply[] = {
704         REGULATOR_SUPPLY("vdd_vbus_typea_usb", NULL),
705 };
706
707 /* EN_VDDIO_VID_OC from AP GPIO VI_PCLK T00*/
708 static struct regulator_consumer_supply fixed_reg_en_vddio_vid_oc_supply[] = {
709         REGULATOR_SUPPLY("vdd_hdmi_con", NULL),
710 };
711
712 /* Battery powered rail*/
713 static struct regulator_consumer_supply fixed_reg_en_battery_supply[] = {
714         REGULATOR_SUPPLY("usb_vbus", "tegra-ehci.1"),
715 };
716
717 /* Macro for defining fixed regulator sub device data */
718 #define FIXED_SUPPLY(_name) "fixed_reg_"#_name
719 #define FIXED_REG_OD(_id, _var, _name, _in_supply, _always_on,          \
720                 _boot_on, _gpio_nr, _active_high, _boot_state,          \
721                 _millivolts, _od_state)                                 \
722         static struct regulator_init_data ri_data_##_var =              \
723         {                                                               \
724                 .supply_regulator = _in_supply,                         \
725                 .num_consumer_supplies =                                \
726                         ARRAY_SIZE(fixed_reg_##_name##_supply),         \
727                 .consumer_supplies = fixed_reg_##_name##_supply,        \
728                 .constraints = {                                        \
729                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
730                                         REGULATOR_MODE_STANDBY),        \
731                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
732                                         REGULATOR_CHANGE_STATUS |       \
733                                         REGULATOR_CHANGE_VOLTAGE),      \
734                         .always_on = _always_on,                        \
735                         .boot_on = _boot_on,                            \
736                 },                                                      \
737         };                                                              \
738         static struct fixed_voltage_config fixed_reg_##_var##_pdata =   \
739         {                                                               \
740                 .supply_name = FIXED_SUPPLY(_name),                     \
741                 .microvolts = _millivolts * 1000,                       \
742                 .gpio = _gpio_nr,                                       \
743                 .enable_high = _active_high,                            \
744                 .enabled_at_boot = _boot_state,                         \
745                 .init_data = &ri_data_##_var,                           \
746                 .gpio_is_open_drain = _od_state,                        \
747         };                                                              \
748         static struct platform_device fixed_reg_##_var##_dev = {        \
749                 .name   = "reg-fixed-voltage",                          \
750                 .id     = _id,                                          \
751                 .dev    = {                                             \
752                         .platform_data = &fixed_reg_##_var##_pdata,     \
753                 },                                                      \
754         }
755
756 #define FIXED_REG(_id, _var, _name, _in_supply, _always_on, _boot_on,   \
757                  _gpio_nr, _active_high, _boot_state, _millivolts)      \
758         FIXED_REG_OD(_id, _var, _name, _in_supply, _always_on, _boot_on,  \
759                 _gpio_nr, _active_high, _boot_state, _millivolts, false)
760
761
762 /* common to most of boards*/
763 FIXED_REG(0, en_5v_cp,          en_5v_cp,       NULL,                           1,      0,      TPS6591X_GPIO_0,        true,   1, 5000);
764 FIXED_REG(1, en_5v0,            en_5v0,         NULL,                           0,      0,      TPS6591X_GPIO_2,        true,   0, 5000);
765 FIXED_REG(2, en_ddr,            en_ddr,         NULL,                           1,      0,      TPS6591X_GPIO_6,        true,   1, 1500);
766 FIXED_REG(3, en_3v3_sys,        en_3v3_sys,     NULL,                           0,      0,      TPS6591X_GPIO_7,        true,   1, 3300);
767 FIXED_REG(4, en_vdd_bl,         en_vdd_bl,      NULL,                           0,      0,      TEGRA_GPIO_PK3,         true,   1, 5000);
768 FIXED_REG(5, en_3v3_modem,      en_3v3_modem,   NULL,                           1,      0,      TEGRA_GPIO_PD6,         true,   1, 3300);
769 FIXED_REG(6, en_vdd_pnl1,       en_vdd_pnl1,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PL4,         true,   1, 3300);
770 FIXED_REG(7, cam3_ldo_en,       cam3_ldo_en,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PS0,         true,   0, 3300);
771 FIXED_REG(8, en_vdd_com,        en_vdd_com,     FIXED_SUPPLY(en_3v3_sys),       1,      0,      TEGRA_GPIO_PD0,         true,   1, 3300);
772 FIXED_REG(9, en_3v3_fuse,       en_3v3_fuse,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PL6,         true,   0, 3300);
773 FIXED_REG(10, en_3v3_emmc,      en_3v3_emmc,    FIXED_SUPPLY(en_3v3_sys),       1,      0,      TEGRA_GPIO_PD1,         true,   1, 3300);
774 FIXED_REG(11, en_vdd_sdmmc1,    en_vdd_sdmmc1,  FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PD7,         true,   1, 3300);
775 FIXED_REG(12, en_3v3_pex_hvdd,  en_3v3_pex_hvdd, FIXED_SUPPLY(en_3v3_sys),      0,      0,      TEGRA_GPIO_PL7,         true,   0, 3300);
776 FIXED_REG(13, en_1v8_cam,       en_1v8_cam,     tps6591x_rails(VIO),            0,      0,      TEGRA_GPIO_PBB4,        true,   0, 1800);
777
778 /* Specific to E1187/E1186/E1256 */
779 FIXED_REG(14, dis_5v_switch_e118x,      dis_5v_switch,  FIXED_SUPPLY(en_5v0),   0,      0,      TEGRA_GPIO_PX2,         false,  0, 5000);
780
781 /* E1291-A04/A05 specific */
782 FIXED_REG(1, en_5v0_a04,        en_5v0,         NULL,                           0,      0,      TPS6591X_GPIO_8,        true,   0, 5000);
783 FIXED_REG(2, en_ddr_a04,        en_ddr,         NULL,                           1,      0,      TPS6591X_GPIO_7,        true,   1, 1500);
784 FIXED_REG(3, en_3v3_sys_a04,    en_3v3_sys,     NULL,                           0,      0,      TPS6591X_GPIO_6,        true,   1, 3300);
785
786 /* PM315 Rev C realtek alc5640 codec */
787 FIXED_REG(23, en_cdc,           cdc_en,         FIXED_SUPPLY(en_3v3_sys),       0,      1,      TEGRA_GPIO_PX2,         true,   0, 1200);
788
789
790 /* Specific to pm269 */
791 FIXED_REG(4, en_vdd_bl_pm269,           en_vdd_bl,              NULL,                           0,      0,      TEGRA_GPIO_PH3, true,   1, 5000);
792 FIXED_REG(6, en_vdd_pnl1_pm269,         en_vdd_pnl1,            FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PW1, true,   1, 3300);
793 FIXED_REG(9, en_3v3_fuse_pm269,         en_3v3_fuse,            FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PC1, true,   0, 3300);
794 FIXED_REG(12, en_3v3_pex_hvdd_pm269,    en_3v3_pex_hvdd,        FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PC6, true,   0, 3300);
795
796 /* E1198/E1291 specific*/
797 FIXED_REG(18, cam1_ldo_en,      cam1_ldo_en,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PR6,         true,   0, 2800);
798 FIXED_REG(19, cam2_ldo_en,      cam2_ldo_en,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PR7,         true,   0, 2800);
799
800 /* E1291 A03 specific */
801 FIXED_REG(20, en_vdd_bl1_a03,   en_vdd_bl,      NULL,                           0,      0,      TEGRA_GPIO_PDD2,        true,   1, 5000);
802 FIXED_REG(21, en_vdd_bl2_a03,   en_vdd_bl2,     NULL,                           0,      0,      TEGRA_GPIO_PDD0,        true,   1, 5000);
803 FIXED_REG(22, en_vbrtr,         en_vbrtr,       FIXED_SUPPLY(en_3v3_sys),       0,      0,      PMU_TCA6416_GPIO_PORT12,true,   0, 3300);
804
805 /* PM313 display board specific */
806 FIXED_REG(4, en_vdd_bl_pm313,   en_vdd_bl,      NULL,                           0,      0,      TEGRA_GPIO_PK3,         true,  1, 5000);
807 FIXED_REG(6, en_vdd_pnl1_pm313, en_vdd_pnl1,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PH3,         true,  1, 3300);
808
809
810 /****************** Open collector Load switches *******/
811 /*Specific to pm269*/
812 FIXED_REG_OD(17, en_vddio_vid_oc_pm269, en_vddio_vid_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PP2,         true,   0, 5000, true);
813
814 /* Specific to pm311 */
815 FIXED_REG_OD(15, en_usb1_vbus_oc_pm311, en_usb1_vbus_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PCC7,        true,   0, 5000, true);
816 FIXED_REG_OD(16, en_usb3_vbus_oc_pm311, en_usb3_vbus_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PCC6,        true,   0, 5000, true);
817
818
819 /* Specific to E1187/E1186/E1256 */
820 FIXED_REG_OD(15, en_usb1_vbus_oc_e118x, en_usb1_vbus_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PI4,         true,   0, 5000, true);
821 FIXED_REG_OD(16, en_usb3_vbus_oc_e118x, en_usb3_vbus_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PH7,         true,   0, 5000, true);
822 FIXED_REG_OD(17, en_vddio_vid_oc_e118x, en_vddio_vid_oc,        FIXED_SUPPLY(dis_5v_switch),    0,      0,      TEGRA_GPIO_PT0,         true,   0, 5000, true);
823
824
825 /* E1198/E1291 specific  fab < A03 */
826 FIXED_REG_OD(15, en_usb1_vbus_oc,       en_usb1_vbus_oc,        FIXED_SUPPLY(en_5v0),           0,      0,      TEGRA_GPIO_PI4,         true,   0, 5000, true);
827 FIXED_REG_OD(16, en_usb3_vbus_oc,       en_usb3_vbus_oc,        FIXED_SUPPLY(en_5v0),           0,      0,      TEGRA_GPIO_PH7,         true,   0, 5000, true);
828
829 /* E1198/E1291 specific  fab >= A03 */
830 FIXED_REG_OD(15, en_usb1_vbus_oc_a03,   en_usb1_vbus_oc,        FIXED_SUPPLY(en_5v0),           0,      0,      TEGRA_GPIO_PDD6,        true,   0, 5000, true);
831 FIXED_REG_OD(16, en_usb3_vbus_oc_a03,   en_usb3_vbus_oc,        FIXED_SUPPLY(en_5v0),           0,      0,      TEGRA_GPIO_PDD4,        true,   0, 5000, true);
832
833 /* E1198/E1291 specific */
834 FIXED_REG_OD(17, en_vddio_vid_oc,       en_vddio_vid_oc,        FIXED_SUPPLY(en_5v0),           0,      0,      TEGRA_GPIO_PT0,         true,   0, 5000, true);
835
836 /* Always ON */
837 FIXED_REG(22, en_battery,       en_battery,     NULL,   1,      1,      -1,     true,   1, 5000);
838 /*
839  * Creating the fixed/gpio-switch regulator device tables for different boards
840  */
841 #define ADD_FIXED_REG(_name)    (&fixed_reg_##_name##_dev)
842
843 #define COMMON_FIXED_REG                        \
844         ADD_FIXED_REG(en_5v_cp),                \
845         ADD_FIXED_REG(en_5v0),                  \
846         ADD_FIXED_REG(en_ddr),                  \
847         ADD_FIXED_REG(en_3v3_sys),              \
848         ADD_FIXED_REG(en_3v3_modem),            \
849         ADD_FIXED_REG(en_vdd_pnl1),             \
850         ADD_FIXED_REG(cam3_ldo_en),             \
851         ADD_FIXED_REG(en_vdd_com),              \
852         ADD_FIXED_REG(en_3v3_fuse),             \
853         ADD_FIXED_REG(en_3v3_emmc),             \
854         ADD_FIXED_REG(en_vdd_sdmmc1),           \
855         ADD_FIXED_REG(en_3v3_pex_hvdd),         \
856         ADD_FIXED_REG(en_1v8_cam),              \
857         ADD_FIXED_REG(en_battery),
858
859 #define COMMON_FIXED_REG_E1291_A04              \
860         ADD_FIXED_REG(en_5v_cp),                \
861         ADD_FIXED_REG(en_5v0_a04),              \
862         ADD_FIXED_REG(en_ddr_a04),              \
863         ADD_FIXED_REG(en_3v3_sys_a04),          \
864         ADD_FIXED_REG(en_3v3_modem),            \
865         ADD_FIXED_REG(en_vdd_pnl1),             \
866         ADD_FIXED_REG(cam3_ldo_en),             \
867         ADD_FIXED_REG(en_vdd_com),              \
868         ADD_FIXED_REG(en_3v3_fuse),             \
869         ADD_FIXED_REG(en_3v3_emmc),             \
870         ADD_FIXED_REG(en_vdd_sdmmc1),           \
871         ADD_FIXED_REG(en_3v3_pex_hvdd),         \
872         ADD_FIXED_REG(en_1v8_cam),              \
873         ADD_FIXED_REG(en_battery),
874
875 #define PM269_FIXED_REG                         \
876         ADD_FIXED_REG(en_5v_cp),                \
877         ADD_FIXED_REG(en_5v0),                  \
878         ADD_FIXED_REG(en_ddr),                  \
879         ADD_FIXED_REG(en_3v3_sys),              \
880         ADD_FIXED_REG(en_3v3_modem),            \
881         ADD_FIXED_REG(cam1_ldo_en),             \
882         ADD_FIXED_REG(cam2_ldo_en),             \
883         ADD_FIXED_REG(cam3_ldo_en),             \
884         ADD_FIXED_REG(en_vdd_com),              \
885         ADD_FIXED_REG(en_3v3_fuse_pm269),       \
886         ADD_FIXED_REG(en_3v3_emmc),             \
887         ADD_FIXED_REG(en_3v3_pex_hvdd_pm269),   \
888         ADD_FIXED_REG(en_1v8_cam),              \
889         ADD_FIXED_REG(dis_5v_switch_e118x),     \
890         ADD_FIXED_REG(en_vbrtr),                \
891         ADD_FIXED_REG(en_usb1_vbus_oc_e118x),   \
892         ADD_FIXED_REG(en_usb3_vbus_oc_e118x),   \
893         ADD_FIXED_REG(en_vddio_vid_oc_pm269),
894
895 #define PM311_FIXED_REG                         \
896         ADD_FIXED_REG(en_5v_cp),                \
897         ADD_FIXED_REG(en_5v0),                  \
898         ADD_FIXED_REG(en_ddr),                  \
899         ADD_FIXED_REG(en_3v3_sys),              \
900         ADD_FIXED_REG(en_3v3_modem),            \
901         ADD_FIXED_REG(cam1_ldo_en),             \
902         ADD_FIXED_REG(cam2_ldo_en),             \
903         ADD_FIXED_REG(cam3_ldo_en),             \
904         ADD_FIXED_REG(en_vdd_com),              \
905         ADD_FIXED_REG(en_3v3_fuse_pm269),       \
906         ADD_FIXED_REG(en_3v3_emmc),             \
907         ADD_FIXED_REG(en_3v3_pex_hvdd_pm269),   \
908         ADD_FIXED_REG(en_1v8_cam),              \
909         ADD_FIXED_REG(dis_5v_switch_e118x),     \
910         ADD_FIXED_REG(en_usb1_vbus_oc_pm311),   \
911         ADD_FIXED_REG(en_usb3_vbus_oc_pm311),   \
912         ADD_FIXED_REG(en_vddio_vid_oc_pm269),
913
914
915 #define E1247_DISPLAY_FIXED_REG                 \
916         ADD_FIXED_REG(en_vdd_bl_pm269),         \
917         ADD_FIXED_REG(en_vdd_pnl1_pm269),
918
919 #define E1247_DSI_DISPLAY_FIXED_REG             \
920         ADD_FIXED_REG(en_vdd_bl_pm269),
921
922 #define PM313_DISPLAY_FIXED_REG                 \
923         ADD_FIXED_REG(en_vdd_bl_pm313),         \
924         ADD_FIXED_REG(en_vdd_pnl1_pm313),
925
926 #define E118x_FIXED_REG                         \
927         ADD_FIXED_REG(en_5v_cp),                \
928         ADD_FIXED_REG(en_5v0),                  \
929         ADD_FIXED_REG(en_ddr),                  \
930         ADD_FIXED_REG(en_3v3_sys),              \
931         ADD_FIXED_REG(en_3v3_modem),            \
932         ADD_FIXED_REG(cam3_ldo_en),             \
933         ADD_FIXED_REG(en_vdd_com),              \
934         ADD_FIXED_REG(en_3v3_fuse),             \
935         ADD_FIXED_REG(en_3v3_emmc),             \
936         ADD_FIXED_REG(en_vdd_sdmmc1),           \
937         ADD_FIXED_REG(en_3v3_pex_hvdd),         \
938         ADD_FIXED_REG(en_1v8_cam),              \
939         ADD_FIXED_REG(dis_5v_switch_e118x),     \
940         ADD_FIXED_REG(en_vbrtr),                \
941         ADD_FIXED_REG(en_usb1_vbus_oc_e118x),   \
942         ADD_FIXED_REG(en_usb3_vbus_oc_e118x),   \
943         ADD_FIXED_REG(en_vddio_vid_oc_e118x),
944
945 #define E1198_FIXED_REG                         \
946         ADD_FIXED_REG(cam1_ldo_en),             \
947         ADD_FIXED_REG(cam2_ldo_en),             \
948         ADD_FIXED_REG(en_vddio_vid_oc),
949
950 #define E1291_1198_A00_FIXED_REG                \
951         ADD_FIXED_REG(en_vdd_bl),               \
952         ADD_FIXED_REG(en_usb1_vbus_oc),         \
953         ADD_FIXED_REG(en_usb3_vbus_oc),
954
955 #define E1291_A03_FIXED_REG                     \
956         ADD_FIXED_REG(en_vdd_bl1_a03),          \
957         ADD_FIXED_REG(en_vdd_bl2_a03),          \
958         ADD_FIXED_REG(en_usb1_vbus_oc_a03),     \
959         ADD_FIXED_REG(en_usb3_vbus_oc_a03),
960
961 /* Fixed regulator devices for E1186/E1187/E1256 */
962 static struct platform_device *fixed_reg_devs_e118x[] = {
963         E118x_FIXED_REG
964         E1247_DISPLAY_FIXED_REG
965 };
966
967 static struct platform_device *fixed_reg_devs_e118x_dsi[] = {
968         E118x_FIXED_REG
969         E1247_DSI_DISPLAY_FIXED_REG
970 };
971
972 /* Fixed regulator devices for E1186/E1187/E1256 */
973 static struct platform_device *fixed_reg_devs_e118x_pm313[] = {
974         E118x_FIXED_REG
975         PM313_DISPLAY_FIXED_REG
976 };
977
978 /* Fixed regulator devices for E1198 and E1291 */
979 static struct platform_device *fixed_reg_devs_e1198_base[] = {
980         COMMON_FIXED_REG
981         E1291_1198_A00_FIXED_REG
982         E1198_FIXED_REG
983 };
984
985 static struct platform_device *fixed_reg_devs_e1198_a02[] = {
986         ADD_FIXED_REG(en_5v_cp),
987         ADD_FIXED_REG(en_5v0),
988         ADD_FIXED_REG(en_ddr_a04),
989         ADD_FIXED_REG(en_3v3_sys_a04),
990         ADD_FIXED_REG(en_3v3_modem),
991         ADD_FIXED_REG(en_vdd_pnl1),
992         ADD_FIXED_REG(cam3_ldo_en),
993         ADD_FIXED_REG(en_vdd_com),
994         ADD_FIXED_REG(en_3v3_fuse),
995         ADD_FIXED_REG(en_3v3_emmc),
996         ADD_FIXED_REG(en_vdd_sdmmc1),
997         ADD_FIXED_REG(en_3v3_pex_hvdd),
998         ADD_FIXED_REG(en_1v8_cam),
999         ADD_FIXED_REG(en_vdd_bl1_a03),
1000         ADD_FIXED_REG(en_vdd_bl2_a03),
1001         ADD_FIXED_REG(cam1_ldo_en),
1002         ADD_FIXED_REG(cam2_ldo_en),
1003         ADD_FIXED_REG(en_usb1_vbus_oc_a03),
1004         ADD_FIXED_REG(en_usb3_vbus_oc_a03),
1005         ADD_FIXED_REG(en_vddio_vid_oc),
1006 };
1007
1008 #define PM315_FIXED_REG                         \
1009         ADD_FIXED_REG(en_cdc),
1010
1011
1012
1013 /* Fixed regulator devices for PM269 */
1014 static struct platform_device *fixed_reg_devs_pm269[] = {
1015         PM269_FIXED_REG
1016         E1247_DISPLAY_FIXED_REG
1017 };
1018
1019 static struct platform_device *fixed_reg_devs_pm269_dsi[] = {
1020         PM269_FIXED_REG
1021         E1247_DSI_DISPLAY_FIXED_REG
1022 };
1023
1024 /* Fixed regulator devices for PM269 */
1025 static struct platform_device *fixed_reg_devs_pm269_pm313[] = {
1026         PM269_FIXED_REG
1027         PM313_DISPLAY_FIXED_REG
1028 };
1029
1030 /* Fixed regulator devices for PM311 */
1031 static struct platform_device *fixed_reg_devs_pm311[] = {
1032         PM311_FIXED_REG
1033         E1247_DISPLAY_FIXED_REG
1034 };
1035
1036 static struct platform_device *fixed_reg_devs_pm311_dsi[] = {
1037         PM311_FIXED_REG
1038         E1247_DSI_DISPLAY_FIXED_REG
1039 };
1040
1041 /* Fixed regulator devices for PM11 */
1042 static struct platform_device *fixed_reg_devs_pm311_pm313[] = {
1043         PM311_FIXED_REG
1044         PM313_DISPLAY_FIXED_REG
1045 };
1046
1047 /* Fixed regulator devices for E1291 A03 */
1048 static struct platform_device *fixed_reg_devs_e1291_a03[] = {
1049         COMMON_FIXED_REG
1050         E1291_A03_FIXED_REG
1051         E1198_FIXED_REG
1052 };
1053
1054 /* Fixed regulator devices for E1291 A04/A05 */
1055 static struct platform_device *fixed_reg_devs_e1291_a04[] = {
1056         COMMON_FIXED_REG_E1291_A04
1057         E1291_A03_FIXED_REG
1058         E1198_FIXED_REG
1059 };
1060
1061 /* Fixed regulator devices for PM315 */
1062 static struct platform_device *fixed_reg_devs_pm315[] = {
1063         COMMON_FIXED_REG_E1291_A04
1064         E1291_A03_FIXED_REG
1065         E1198_FIXED_REG
1066         PM315_FIXED_REG
1067 };
1068
1069
1070 static bool is_display_board_dsi(u16 display_board_id)
1071 {
1072         return ((display_board_id == BOARD_DISPLAY_E1213) ||
1073                 (display_board_id == BOARD_DISPLAY_E1253) ||
1074                 (display_board_id == BOARD_DISPLAY_E1506));
1075 }
1076
1077 int __init cardhu_fixed_regulator_init(void)
1078 {
1079         struct board_info board_info;
1080         struct board_info pmu_board_info;
1081         struct board_info display_board_info;
1082         struct platform_device **fixed_reg_devs;
1083         int    nfixreg_devs;
1084
1085         if (!machine_is_cardhu())
1086                 return 0;
1087
1088         tegra_get_board_info(&board_info);
1089         tegra_get_pmu_board_info(&pmu_board_info);
1090         tegra_get_display_board_info(&display_board_info);
1091
1092         if (pmu_board_info.board_id == BOARD_PMU_PM298)
1093                 return cardhu_pm298_gpio_switch_regulator_init();
1094
1095         if (pmu_board_info.board_id == BOARD_PMU_PM299)
1096                 return cardhu_pm299_gpio_switch_regulator_init();
1097
1098         switch (board_info.board_id) {
1099         case BOARD_E1198:
1100                 if (board_info.fab <= BOARD_FAB_A01) {
1101                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1198_base);
1102                         fixed_reg_devs = fixed_reg_devs_e1198_base;
1103                 } else {
1104                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1198_a02);
1105                         fixed_reg_devs = fixed_reg_devs_e1198_a02;
1106                 }
1107                 break;
1108
1109         case BOARD_E1291:
1110                 if (board_info.fab == BOARD_FAB_A03) {
1111                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1291_a03);
1112                         fixed_reg_devs = fixed_reg_devs_e1291_a03;
1113                 } else if ((board_info.fab == BOARD_FAB_A04) ||
1114                                 (board_info.fab == BOARD_FAB_A05) ||
1115                                 (board_info.fab == BOARD_FAB_A07)) {
1116                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1291_a04);
1117                         fixed_reg_devs = fixed_reg_devs_e1291_a04;
1118                 } else {
1119                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e1198_base);
1120                         fixed_reg_devs = fixed_reg_devs_e1198_base;
1121                 }
1122                 break;
1123         case BOARD_PM315:
1124                 nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm315);
1125                 fixed_reg_devs = fixed_reg_devs_pm315;
1126                 break;
1127         case BOARD_PM311:
1128         case BOARD_PM305:
1129                 nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm311);
1130                 fixed_reg_devs = fixed_reg_devs_pm311;
1131                 if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
1132                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm311_pm313);
1133                         fixed_reg_devs = fixed_reg_devs_pm311_pm313;
1134                 } else if (is_display_board_dsi(display_board_info.board_id)) {
1135                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm311_dsi);
1136                         fixed_reg_devs = fixed_reg_devs_pm311_dsi;
1137                 }
1138                 break;
1139
1140         case BOARD_PM269:
1141         case BOARD_E1257:
1142                 nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm269);
1143                 fixed_reg_devs = fixed_reg_devs_pm269;
1144                 if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
1145                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm269_pm313);
1146                         fixed_reg_devs = fixed_reg_devs_pm269_pm313;
1147                 } else if (is_display_board_dsi(display_board_info.board_id)) {
1148                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm269_dsi);
1149                         fixed_reg_devs = fixed_reg_devs_pm269_dsi;
1150                 } else {
1151                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm269);
1152                         fixed_reg_devs = fixed_reg_devs_pm269;
1153                 }
1154                 break;
1155
1156         default:
1157                 if (display_board_info.board_id == BOARD_DISPLAY_PM313) {
1158                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e118x_pm313);
1159                         fixed_reg_devs = fixed_reg_devs_e118x_pm313;
1160                 } else if (is_display_board_dsi(display_board_info.board_id)) {
1161                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e118x_dsi);
1162                         fixed_reg_devs = fixed_reg_devs_e118x_dsi;
1163                 } else {
1164                         nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e118x);
1165                         fixed_reg_devs = fixed_reg_devs_e118x;
1166                 }
1167                 break;
1168         }
1169
1170         return platform_add_devices(fixed_reg_devs, nfixreg_devs);
1171 }
1172 subsys_initcall_sync(cardhu_fixed_regulator_init);
1173
1174 static void cardhu_board_suspend(int lp_state, enum suspend_stage stg)
1175 {
1176         if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_SUSPEND_BEFORE_CPU))
1177                 tegra_console_uart_suspend();
1178 }
1179
1180 static void cardhu_board_resume(int lp_state, enum resume_stage stg)
1181 {
1182         if ((lp_state == TEGRA_SUSPEND_LP1) && (stg == TEGRA_RESUME_AFTER_CPU))
1183                 tegra_console_uart_resume();
1184 }
1185
1186 static struct tegra_suspend_platform_data cardhu_suspend_data = {
1187         .cpu_timer      = 2000,
1188         .cpu_off_timer  = 200,
1189         .suspend_mode   = TEGRA_SUSPEND_LP0,
1190         .core_timer     = 0x7e7e,
1191         .core_off_timer = 0,
1192         .corereq_high   = true,
1193         .sysclkreq_high = true,
1194         .cpu_lp2_min_residency = 2000,
1195         .board_suspend = cardhu_board_suspend,
1196         .board_resume = cardhu_board_resume,
1197 #ifdef CONFIG_TEGRA_LP1_950
1198         .lp1_lowvolt_support = false,
1199         .i2c_base_addr = 0,
1200         .pmuslave_addr = 0,
1201         .core_reg_addr = 0,
1202         .lp1_core_volt_low = 0,
1203         .lp1_core_volt_high = 0,
1204 #endif
1205 };
1206
1207 int __init cardhu_suspend_init(void)
1208 {
1209         struct board_info board_info;
1210         struct board_info pmu_board_info;
1211         struct board_info display_board_info;
1212
1213         tegra_get_board_info(&board_info);
1214         tegra_get_pmu_board_info(&pmu_board_info);
1215         tegra_get_display_board_info(&display_board_info);
1216
1217         /* For PMU Fab A03, A04 and A05 make core_pwr_req to high */
1218         if ((pmu_board_info.fab == BOARD_FAB_A03) ||
1219                 (pmu_board_info.fab == BOARD_FAB_A04) ||
1220                  (pmu_board_info.fab == BOARD_FAB_A05))
1221                 cardhu_suspend_data.corereq_high = true;
1222
1223         /* CORE_PWR_REQ to be high for all processor/pmu board whose sku bit 0
1224          * is set. This is require to enable the dc-dc converter tps62361x */
1225         if ((board_info.sku & SKU_DCDC_TPS62361_SUPPORT) || (pmu_board_info.sku & SKU_DCDC_TPS62361_SUPPORT))
1226                 cardhu_suspend_data.corereq_high = true;
1227
1228         switch (board_info.board_id) {
1229         case BOARD_E1291:
1230                 /* CORE_PWR_REQ to be high for E1291-A03 */
1231                 if (board_info.fab == BOARD_FAB_A03)
1232                         cardhu_suspend_data.corereq_high = true;
1233                 if (board_info.fab < BOARD_FAB_A03)
1234                         /* post E1291-A02 revisions VBUS wake supported */
1235                         tegra_disable_wake_source(TEGRA_WAKE_USB1_VBUS);
1236                 break;
1237         case BOARD_E1198:
1238                 if (board_info.fab < BOARD_FAB_A02)
1239                         /* post E1198-A01 revisions VBUS wake supported */
1240                         tegra_disable_wake_source(TEGRA_WAKE_USB1_VBUS);
1241                 break;
1242         case BOARD_PM269:
1243 #ifdef CONFIG_TEGRA_LP1_950
1244                 /* AP37 board supports the LP1_950mV feature */
1245                 if (is_display_board_dsi(display_board_info.board_id)) {
1246                         cardhu_suspend_data.lp1_lowvolt_support = true;
1247                         cardhu_suspend_data.i2c_base_addr = TEGRA_I2C5_BASE;
1248                         cardhu_suspend_data.pmuslave_addr = 0xC0;
1249                         cardhu_suspend_data.core_reg_addr = 0x03;
1250                         cardhu_suspend_data.lp1_core_volt_low = 0x2D;
1251                         cardhu_suspend_data.lp1_core_volt_high = 0x50;
1252                 }
1253 #endif
1254                 if (is_display_board_dsi(display_board_info.board_id))
1255                         cardhu_suspend_data.cpu_wake_freq = CPU_WAKE_FREQ_LOW;
1256         case BOARD_PM305:
1257         case BOARD_PM311:
1258                 break;
1259         case BOARD_E1256:
1260         case BOARD_E1257:
1261                 cardhu_suspend_data.cpu_timer = 5000;
1262                 cardhu_suspend_data.cpu_off_timer = 5000;
1263                 break;
1264         case BOARD_E1187:
1265         case BOARD_E1186:
1266                 /* VBUS repeated wakeup seen on older E1186 boards */
1267                 tegra_disable_wake_source(TEGRA_WAKE_USB1_VBUS);
1268                 cardhu_suspend_data.cpu_timer = 5000;
1269                 cardhu_suspend_data.cpu_off_timer = 5000;
1270                 break;
1271         default:
1272                 break;
1273         }
1274
1275         tegra_init_suspend(&cardhu_suspend_data);
1276         return 0;
1277 }
1278
1279 #ifdef CONFIG_TEGRA_EDP_LIMITS
1280
1281 int __init cardhu_edp_init(void)
1282 {
1283         unsigned int regulator_mA;
1284
1285         regulator_mA = get_maximum_cpu_current_supported();
1286         if (!regulator_mA) {
1287                 regulator_mA = 6000; /* regular T30/s */
1288         }
1289         pr_info("%s: CPU regulator %d mA\n", __func__, regulator_mA);
1290
1291         tegra_init_cpu_edp_limits(regulator_mA);
1292         return 0;
1293 }
1294 #endif
1295
1296 static char *cardhu_battery[] = {
1297         "bq27510-0",
1298 };
1299
1300 static struct gpio_charger_platform_data cardhu_charger_pdata = {
1301         .name = "ac",
1302         .type = POWER_SUPPLY_TYPE_MAINS,
1303         .gpio = AC_PRESENT_GPIO,
1304         .gpio_active_low = 0,
1305         .supplied_to = cardhu_battery,
1306         .num_supplicants = ARRAY_SIZE(cardhu_battery),
1307 };
1308
1309 static struct platform_device cardhu_charger_device = {
1310         .name = "gpio-charger",
1311         .dev = {
1312                 .platform_data = &cardhu_charger_pdata,
1313         },
1314 };
1315
1316 static int __init cardhu_charger_late_init(void)
1317 {
1318         if (!machine_is_cardhu())
1319                 return 0;
1320
1321         platform_device_register(&cardhu_charger_device);
1322         return 0;
1323 }
1324
1325 late_initcall(cardhu_charger_late_init);