ARM: tegra: cardhu: Remove tegra_gpio_enb/disable
[linux-2.6.git] / arch / arm / mach-tegra / board-cardhu-pm298-power-rails.c
1 /*
2  * arch/arm/mach-tegra/board-cardhu-pm298-power-rails.c
3  *
4  * Copyright (C) 2011 NVIDIA, Inc.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software
17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
18  * 02111-1307, USA
19  */
20 #include <linux/i2c.h>
21 #include <linux/pda_power.h>
22 #include <linux/platform_device.h>
23 #include <linux/resource.h>
24 #include <linux/regulator/machine.h>
25 #include <linux/gpio.h>
26 #include <linux/io.h>
27 #include <linux/regulator/fixed.h>
28 #include <linux/mfd/max77663-core.h>
29 #include <linux/regulator/max77663-regulator.h>
30
31 #include <mach/iomap.h>
32 #include <mach/irqs.h>
33 #include <mach/pinmux.h>
34 #include <mach/edp.h>
35
36 #include "gpio-names.h"
37 #include "board.h"
38 #include "board-cardhu.h"
39 #include "pm.h"
40 #include "wakeups-t3.h"
41
42 #define PMC_CTRL                0x0
43 #define PMC_CTRL_INTR_LOW       BIT(17)
44
45 static struct regulator_consumer_supply max77663_sd0_supply[] = {
46         REGULATOR_SUPPLY("vdd_cpu_pmu", NULL),
47         REGULATOR_SUPPLY("vdd_cpu", NULL),
48         REGULATOR_SUPPLY("vdd_sys", NULL),
49 };
50
51 static struct regulator_consumer_supply max77663_sd1_supply[] = {
52         REGULATOR_SUPPLY("vdd_core", NULL),
53         REGULATOR_SUPPLY("en_vddio_ddr_1v2", NULL),
54 };
55
56 static struct regulator_consumer_supply max77663_sd2_supply[] = {
57         REGULATOR_SUPPLY("avdd_hdmi_pll", NULL),
58         REGULATOR_SUPPLY("avdd_usb_pll", NULL),
59         REGULATOR_SUPPLY("avdd_osc", NULL),
60         REGULATOR_SUPPLY("vdd1v8_satelite", NULL),
61         REGULATOR_SUPPLY("vddio_uart", NULL),
62         REGULATOR_SUPPLY("pwrdet_uart", NULL),
63         REGULATOR_SUPPLY("vddio_audio", NULL),
64         REGULATOR_SUPPLY("pwrdet_audio", NULL),
65         REGULATOR_SUPPLY("vddio_bb", NULL),
66         REGULATOR_SUPPLY("pwrdet_bb", NULL),
67         REGULATOR_SUPPLY("vddio_lcd_pmu", NULL),
68         REGULATOR_SUPPLY("pwrdet_lcd", NULL),
69         REGULATOR_SUPPLY("vddio_cam", NULL),
70         REGULATOR_SUPPLY("pwrdet_cam", NULL),
71         REGULATOR_SUPPLY("vddio_vi", NULL),
72         REGULATOR_SUPPLY("pwrdet_vi", NULL),
73         REGULATOR_SUPPLY("ldo6", NULL),
74         REGULATOR_SUPPLY("ldo7", NULL),
75         REGULATOR_SUPPLY("ldo8", NULL),
76         REGULATOR_SUPPLY("vcore_audio", NULL),
77         REGULATOR_SUPPLY("avcore_audio", NULL),
78         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.2"),
79         REGULATOR_SUPPLY("pwrdet_sdmmc3", NULL),
80         REGULATOR_SUPPLY("vcore1_lpddr2", NULL),
81         REGULATOR_SUPPLY("vcom_1v8", NULL),
82         REGULATOR_SUPPLY("pmuio_1v8", NULL),
83         REGULATOR_SUPPLY("avdd_ic_usb", NULL),
84         REGULATOR_SUPPLY("vdd_gen1v8", NULL),
85 };
86
87 static struct regulator_consumer_supply max77663_sd3_supply[] = {
88         REGULATOR_SUPPLY("vdd_gen1v5", NULL),
89         REGULATOR_SUPPLY("vcore_lcd", NULL),
90         REGULATOR_SUPPLY("track_ldo1", NULL),
91         REGULATOR_SUPPLY("external_ldo_1v2", NULL),
92         REGULATOR_SUPPLY("vcore_cam1", NULL),
93         REGULATOR_SUPPLY("vcore_cam2", NULL),
94         REGULATOR_SUPPLY("avdd_pexb", NULL),
95         REGULATOR_SUPPLY("vdd_pexb", NULL),
96         REGULATOR_SUPPLY("avdd_pex_pll", NULL),
97         REGULATOR_SUPPLY("avdd_pexa", NULL),
98         REGULATOR_SUPPLY("vdd_pexa", NULL),
99         REGULATOR_SUPPLY("vcom_1v2", NULL),
100         REGULATOR_SUPPLY("vdio_hsic", NULL),
101 };
102
103 static struct regulator_consumer_supply max77663_ldo0_supply[] = {
104         REGULATOR_SUPPLY("vdd_ddr_hs", NULL),
105 };
106
107 static struct regulator_consumer_supply max77663_ldo1_supply[] = {
108         REGULATOR_SUPPLY("avdd_plla_p_c_s", NULL),
109         REGULATOR_SUPPLY("avdd_pllm", NULL),
110         REGULATOR_SUPPLY("avdd_pllu_d", NULL),
111         REGULATOR_SUPPLY("avdd_pllu_d2", NULL),
112         REGULATOR_SUPPLY("avdd_pllx", NULL),
113 };
114
115 static struct regulator_consumer_supply max77663_ldo2_supply[] = {
116         REGULATOR_SUPPLY("avdd_dsi_csi", NULL),
117         REGULATOR_SUPPLY("pwrdet_mipi", NULL),
118 };
119
120 static struct regulator_consumer_supply max77663_ldo3_supply[] = {
121         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.3"),
122         REGULATOR_SUPPLY("pwrdet_sdmmc4", NULL),
123 };
124
125 static struct regulator_consumer_supply max77663_ldo4_supply[] = {
126         REGULATOR_SUPPLY("vdd_rtc", NULL),
127 };
128
129 static struct regulator_consumer_supply max77663_ldo5_supply[] = {
130         REGULATOR_SUPPLY("vddio_sdmmc", "sdhci-tegra.0"),
131         REGULATOR_SUPPLY("pwrdet_sdmmc1", NULL),
132 };
133
134 static struct regulator_consumer_supply max77663_ldo6_supply[] = {
135         REGULATOR_SUPPLY("vddio_sys", NULL),
136 };
137
138 static struct regulator_consumer_supply max77663_ldo7_supply[] = {
139         REGULATOR_SUPPLY("unused_ldo7", NULL),
140 };
141
142 static struct regulator_consumer_supply max77663_ldo8_supply[] = {
143         REGULATOR_SUPPLY("vcore_mmc", NULL),
144 };
145
146 static struct max77663_regulator_fps_cfg max77663_fps_cfgs[] = {
147         {
148                 .src = FPS_SRC_0,
149                 .en_src = FPS_EN_SRC_EN0,
150                 .time_period = FPS_TIME_PERIOD_DEF,
151         },
152         {
153                 .src = FPS_SRC_1,
154                 .en_src = FPS_EN_SRC_EN1,
155                 .time_period = FPS_TIME_PERIOD_DEF,
156         },
157         {
158                 .src = FPS_SRC_2,
159                 .en_src = FPS_EN_SRC_EN0,
160                 .time_period = FPS_TIME_PERIOD_DEF,
161         },
162 };
163
164 #define MAX77663_PDATA_INIT(_id, _min_uV, _max_uV, _supply_reg,         \
165                             _always_on, _boot_on, _apply_uV,            \
166                             _init_apply, _init_enable, _init_uV,        \
167                             _fps_src, _fps_pu_period, _fps_pd_period, _flags) \
168         static struct max77663_regulator_platform_data max77663_regulator_pdata_##_id = \
169         {                                                               \
170                 .init_data = {                                          \
171                         .constraints = {                                \
172                                 .min_uV = _min_uV,                      \
173                                 .max_uV = _max_uV,                      \
174                                 .valid_modes_mask = (REGULATOR_MODE_NORMAL |  \
175                                                      REGULATOR_MODE_STANDBY), \
176                                 .valid_ops_mask = (REGULATOR_CHANGE_MODE |    \
177                                                    REGULATOR_CHANGE_STATUS |  \
178                                                    REGULATOR_CHANGE_VOLTAGE), \
179                                 .always_on = _always_on,                \
180                                 .boot_on = _boot_on,                    \
181                                 .apply_uV = _apply_uV,                  \
182                         },                                              \
183                         .num_consumer_supplies =                        \
184                                 ARRAY_SIZE(max77663_##_id##_supply),    \
185                         .consumer_supplies = max77663_##_id##_supply,   \
186                         .supply_regulator = _supply_reg,                \
187                 },                                                      \
188                 .init_apply = _init_apply,                              \
189                 .init_enable = _init_enable,                            \
190                 .init_uV = _init_uV,                                    \
191                 .fps_src = _fps_src,                                    \
192                 .fps_pu_period = _fps_pu_period,                        \
193                 .fps_pd_period = _fps_pd_period,                        \
194                 .fps_cfgs = max77663_fps_cfgs,                          \
195                 .flags = _flags,                                        \
196         }
197
198 MAX77663_PDATA_INIT(sd0,  600000, 3387500, NULL, 1, 0, 0,
199                     0, 0, -1, FPS_SRC_NONE, -1, -1, EN2_CTRL_SD0 | SD_FSRADE_DISABLE);
200
201 MAX77663_PDATA_INIT(sd1,  800000, 1587500, NULL, 1, 0, 0,
202                     1, 1, -1, FPS_SRC_1, -1, -1, SD_FSRADE_DISABLE);
203
204 MAX77663_PDATA_INIT(sd2,  600000, 3387500, NULL, 1, 0, 0,
205                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
206
207 MAX77663_PDATA_INIT(sd3,  600000, 3387500, NULL, 0, 0, 0,
208                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
209
210 MAX77663_PDATA_INIT(ldo0, 800000, 2350000, max77663_rails(sd2), 0, 0, 0,
211                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
212
213 MAX77663_PDATA_INIT(ldo1, 800000, 2350000, max77663_rails(sd2), 0, 0, 0,
214                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
215
216 MAX77663_PDATA_INIT(ldo2, 800000, 3950000, max77663_rails(sd2), 0, 0, 0,
217                     0, 0, -1, FPS_SRC_NONE, -1, -1, 0);
218
219 MAX77663_PDATA_INIT(ldo3, 800000, 3950000, NULL, 0, 0, 0,
220                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
221
222 MAX77663_PDATA_INIT(ldo4, 800000, 1587500, NULL, 0, 0, 0,
223                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
224
225 MAX77663_PDATA_INIT(ldo5, 800000, 3950000, NULL, 0, 0, 0,
226                     0, 0, -1, FPS_SRC_NONE, -1, -1, 0);
227
228 MAX77663_PDATA_INIT(ldo6, 800000, 3950000, NULL, 1, 0, 0,
229                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
230
231 MAX77663_PDATA_INIT(ldo7, 800000, 3950000, NULL, 0, 0, 0,
232                     0, 0, -1, FPS_SRC_NONE, -1, -1, 0);
233
234 MAX77663_PDATA_INIT(ldo8, 800000, 3950000, NULL, 0, 0, 0,
235                     1, 1, -1, FPS_SRC_NONE, -1, -1, 0);
236
237 #define MAX77663_REG(_id, _data)                                        \
238         {                                                               \
239                 .name = "max77663-regulator",                           \
240                 .id = MAX77663_REGULATOR_ID_##_id,                      \
241                 .platform_data = &max77663_regulator_pdata_##_data,     \
242                 .pdata_size = sizeof(max77663_regulator_pdata_##_data), \
243         }
244
245 #define MAX77663_RTC()                                                  \
246         {                                                               \
247                 .name = "max77663-rtc",                                 \
248                 .id = 0,                                                \
249         }
250
251 static struct mfd_cell max77663_subdevs[] = {
252         MAX77663_REG(SD0, sd0),
253         MAX77663_REG(SD1, sd1),
254         MAX77663_REG(SD2, sd2),
255         MAX77663_REG(SD3, sd3),
256         MAX77663_REG(LDO0, ldo0),
257         MAX77663_REG(LDO1, ldo1),
258         MAX77663_REG(LDO2, ldo2),
259         MAX77663_REG(LDO3, ldo3),
260         MAX77663_REG(LDO4, ldo4),
261         MAX77663_REG(LDO5, ldo5),
262         MAX77663_REG(LDO6, ldo6),
263         MAX77663_REG(LDO7, ldo7),
264         MAX77663_REG(LDO8, ldo8),
265         MAX77663_RTC(),
266 };
267
268 struct max77663_gpio_config max77663_gpio_cfgs[] = {
269         {
270                 .gpio = MAX77663_GPIO0,
271                 .dir = GPIO_DIR_OUT,
272                 .dout = GPIO_DOUT_LOW,
273                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
274                 .alternate = GPIO_ALT_DISABLE,
275         },
276         {
277                 .gpio = MAX77663_GPIO1,
278                 .dir = GPIO_DIR_OUT,
279                 .dout = GPIO_DOUT_HIGH,
280                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
281                 .alternate = GPIO_ALT_DISABLE,
282         },
283         {
284                 .gpio = MAX77663_GPIO2,
285                 .dir = GPIO_DIR_OUT,
286                 .dout = GPIO_DOUT_HIGH,
287                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
288                 .alternate = GPIO_ALT_DISABLE,
289         },
290         {
291                 .gpio = MAX77663_GPIO3,
292                 .dir = GPIO_DIR_OUT,
293                 .dout = GPIO_DOUT_HIGH,
294                 .out_drv = GPIO_OUT_DRV_OPEN_DRAIN,
295                 .alternate = GPIO_ALT_DISABLE,
296         },
297         {
298                 .gpio = MAX77663_GPIO4,
299                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
300                 .alternate = GPIO_ALT_ENABLE,
301         },
302         {
303                 .gpio = MAX77663_GPIO5,
304                 .dir = GPIO_DIR_OUT,
305                 .dout = GPIO_DOUT_LOW,
306                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
307                 .alternate = GPIO_ALT_DISABLE,
308         },
309         {
310                 .gpio = MAX77663_GPIO6,
311                 .dir = GPIO_DIR_OUT,
312                 .dout = GPIO_DOUT_LOW,
313                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
314                 .alternate = GPIO_ALT_DISABLE,
315         },
316         {
317                 .gpio = MAX77663_GPIO7,
318                 .dir = GPIO_DIR_OUT,
319                 .dout = GPIO_DOUT_LOW,
320                 .out_drv = GPIO_OUT_DRV_PUSH_PULL,
321                 .alternate = GPIO_ALT_DISABLE,
322         },
323 };
324
325 static struct max77663_platform_data max7763_pdata = {
326         .irq_base       = MAX77663_IRQ_BASE,
327         .gpio_base      = MAX77663_GPIO_BASE,
328
329         .num_gpio_cfgs = ARRAY_SIZE(max77663_gpio_cfgs),
330         .gpio_cfgs = max77663_gpio_cfgs,
331
332         .num_subdevs    = ARRAY_SIZE(max77663_subdevs),
333         .sub_devices    = max77663_subdevs,
334
335         .use_power_off  = true,
336 };
337
338 static struct i2c_board_info __initdata max77663_regulators[] = {
339         {
340                 /* The I2C address was determined by OTP factory setting */
341                 I2C_BOARD_INFO("max77663", 0x1C),
342                 .irq            = INT_EXTERNAL_PMU,
343                 .platform_data  = &max7763_pdata,
344         },
345 };
346
347 int __init cardhu_pm298_regulator_init(void)
348 {
349         struct board_info board_info;
350         struct board_info pmu_board_info;
351         void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
352         u32 pmc_ctrl;
353
354         /* configure the power management controller to trigger PMU
355          * interrupts when low */
356         pmc_ctrl = readl(pmc + PMC_CTRL);
357         writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL);
358
359         /* The regulator details have complete constraints */
360         tegra_get_board_info(&board_info);
361         tegra_get_pmu_board_info(&pmu_board_info);
362         if (pmu_board_info.board_id != BOARD_PMU_PM298) {
363                 pr_err("%s(): Board ID is not proper\n", __func__);
364                 return -ENODEV;
365         }
366
367         i2c_register_board_info(4, max77663_regulators,
368                                 ARRAY_SIZE(max77663_regulators));
369
370         return 0;
371 }
372
373 static struct regulator_consumer_supply fixed_reg_en_track_ldo2_supply[] = {
374         REGULATOR_SUPPLY("avdd_sata", NULL),
375         REGULATOR_SUPPLY("vdd_sata", NULL),
376         REGULATOR_SUPPLY("avdd_sata_pll", NULL),
377         REGULATOR_SUPPLY("avdd_plle", NULL),
378 };
379
380 static struct regulator_consumer_supply fixed_reg_en_5v0_supply[] = {
381         REGULATOR_SUPPLY("vdd_5v0_sys", NULL),
382         REGULATOR_SUPPLY("vdd_5v0_sby", NULL),
383         REGULATOR_SUPPLY("vdd_hall", NULL),
384         REGULATOR_SUPPLY("vterm_ddr", NULL),
385         REGULATOR_SUPPLY("v2ref_ddr", NULL),
386 };
387
388 static struct regulator_consumer_supply fixed_reg_en_ddr_supply[] = {
389         REGULATOR_SUPPLY("mem_vddio_ddr", NULL),
390         REGULATOR_SUPPLY("t30_vddio_ddr", NULL),
391 };
392
393 static struct regulator_consumer_supply fixed_reg_en_3v3_sys_supply[] = {
394         REGULATOR_SUPPLY("avdd_vdac", NULL),
395         REGULATOR_SUPPLY("vdd_lvds", NULL),
396         REGULATOR_SUPPLY("vdd_pnl", NULL),
397         REGULATOR_SUPPLY("vcom_3v3", NULL),
398         REGULATOR_SUPPLY("vdd_3v3", NULL),
399         REGULATOR_SUPPLY("vddio_pex_ctl", NULL),
400         REGULATOR_SUPPLY("pwrdet_pex_ctl", NULL),
401         REGULATOR_SUPPLY("hvdd_pex_pmu", NULL),
402         REGULATOR_SUPPLY("avdd_hdmi", NULL),
403         REGULATOR_SUPPLY("vpp_fuse", NULL),
404         REGULATOR_SUPPLY("avdd_usb", NULL),
405         REGULATOR_SUPPLY("vdd_ddr_rx", NULL),
406         REGULATOR_SUPPLY("vcore_nand", NULL),
407         REGULATOR_SUPPLY("hvdd_sata", NULL),
408         REGULATOR_SUPPLY("vddio_gmi_pmu", NULL),
409         REGULATOR_SUPPLY("pwrdet_nand", NULL),
410         REGULATOR_SUPPLY("avdd_cam1", NULL),
411         REGULATOR_SUPPLY("vdd_af", NULL),
412         REGULATOR_SUPPLY("avdd_cam2", NULL),
413         REGULATOR_SUPPLY("vdd_acc", NULL),
414         REGULATOR_SUPPLY("vdd_phtl", NULL),
415         REGULATOR_SUPPLY("vddio_tp", NULL),
416         REGULATOR_SUPPLY("vdd_led", NULL),
417         REGULATOR_SUPPLY("vddio_cec", NULL),
418         REGULATOR_SUPPLY("vdd_cmps", NULL),
419         REGULATOR_SUPPLY("vdd_temp", NULL),
420         REGULATOR_SUPPLY("vpp_kfuse", NULL),
421         REGULATOR_SUPPLY("vddio_ts", NULL),
422         REGULATOR_SUPPLY("vdd_ir_led", NULL),
423         REGULATOR_SUPPLY("vddio_1wire", NULL),
424         REGULATOR_SUPPLY("avddio_audio", NULL),
425         REGULATOR_SUPPLY("vdd_ec", NULL),
426         REGULATOR_SUPPLY("vcom_pa", NULL),
427         REGULATOR_SUPPLY("vdd_3v3_devices", NULL),
428         REGULATOR_SUPPLY("vdd_3v3_dock", NULL),
429         REGULATOR_SUPPLY("vdd_3v3_edid", NULL),
430         REGULATOR_SUPPLY("vdd_3v3_hdmi_cec", NULL),
431         REGULATOR_SUPPLY("vdd_3v3_gmi", NULL),
432         REGULATOR_SUPPLY("vdd_3v3_spk_amp", NULL),
433         REGULATOR_SUPPLY("vdd_3v3_sensor", NULL),
434         REGULATOR_SUPPLY("vdd_3v3_cam", NULL),
435         REGULATOR_SUPPLY("vdd_3v3_als", NULL),
436         REGULATOR_SUPPLY("debug_cons", NULL),
437         REGULATOR_SUPPLY("vdd", "4-004c"),
438 };
439
440 /* DIS_5V_SWITCH from AP SPI2_SCK X02 */
441 static struct regulator_consumer_supply fixed_reg_dis_5v_switch_supply[] = {
442         REGULATOR_SUPPLY("master_5v_switch", NULL),
443 };
444
445 /* EN_VDD_BL */
446 static struct regulator_consumer_supply fixed_reg_en_vdd_bl_supply[] = {
447         REGULATOR_SUPPLY("vdd_backlight", NULL),
448         REGULATOR_SUPPLY("vdd_backlight1", NULL),
449 };
450
451 /* EN_3V3_MODEM from AP GPIO VI_VSYNCH D06*/
452 static struct regulator_consumer_supply fixed_reg_en_3v3_modem_supply[] = {
453         REGULATOR_SUPPLY("vdd_3v3_mini_card", NULL),
454         REGULATOR_SUPPLY("vdd_mini_card", NULL),
455 };
456 /* EN_VDD_PNL1 from AP GPIO VI_D6 L04*/
457 static struct regulator_consumer_supply fixed_reg_en_vdd_pnl1_supply[] = {
458         REGULATOR_SUPPLY("vdd_lcd_panel", NULL),
459 };
460
461 /* CAM1_LDO_EN from AP GPIO KB_ROW6 R06*/
462 static struct regulator_consumer_supply fixed_reg_cam1_ldo_en_supply[] = {
463         REGULATOR_SUPPLY("vdd_2v8_cam1", NULL),
464         REGULATOR_SUPPLY("avdd", "6-0072"),
465 };
466
467 /* CAM2_LDO_EN from AP GPIO KB_ROW7 R07*/
468 static struct regulator_consumer_supply fixed_reg_cam2_ldo_en_supply[] = {
469         REGULATOR_SUPPLY("vdd_2v8_cam2", NULL),
470         REGULATOR_SUPPLY("avdd", "7-0072"),
471 };
472
473 /* CAM3_LDO_EN from AP GPIO KB_ROW8 S00*/
474 static struct regulator_consumer_supply fixed_reg_cam3_ldo_en_supply[] = {
475         REGULATOR_SUPPLY("vdd_cam3", NULL),
476 };
477
478 /* EN_VDD_COM from AP GPIO SDMMC3_DAT5 D00*/
479 static struct regulator_consumer_supply fixed_reg_en_vdd_com_supply[] = {
480         REGULATOR_SUPPLY("vdd_com_bd", NULL),
481 };
482
483 /* EN_VDD_SDMMC1 from AP GPIO VI_HSYNC D07*/
484 static struct regulator_consumer_supply fixed_reg_en_vdd_sdmmc1_supply[] = {
485         REGULATOR_SUPPLY("vddio_sd_slot", "sdhci-tegra.0"),
486 };
487
488 /* EN_3V3_EMMC from AP GPIO SDMMC3_DAT4 D01*/
489 static struct regulator_consumer_supply fixed_reg_en_3v3_emmc_supply[] = {
490         REGULATOR_SUPPLY("vdd_emmc_core", NULL),
491 };
492
493 /* EN_3V3_PEX_HVDD from AP GPIO VI_D09 L07*/
494 static struct regulator_consumer_supply fixed_reg_en_3v3_pex_hvdd_supply[] = {
495         REGULATOR_SUPPLY("hvdd_pex", NULL),
496 };
497
498 /* EN_3v3_FUSE from AP GPIO VI_D08 L06*/
499 static struct regulator_consumer_supply fixed_reg_en_3v3_fuse_supply[] = {
500         REGULATOR_SUPPLY("vdd_fuse", NULL),
501 };
502
503 /* EN_1V8_CAM from AP GPIO GPIO_PBB4 PBB04*/
504 static struct regulator_consumer_supply fixed_reg_en_1v8_cam_supply[] = {
505         REGULATOR_SUPPLY("vdd_1v8_cam1", NULL),
506         REGULATOR_SUPPLY("vdd_1v8_cam2", NULL),
507         REGULATOR_SUPPLY("vdd_1v8_cam3", NULL),
508         REGULATOR_SUPPLY("dvdd", "6-0072"),
509         REGULATOR_SUPPLY("dvdd", "7-0072"),
510         REGULATOR_SUPPLY("vdd_i2c", "2-0033"),
511 };
512
513 static struct regulator_consumer_supply fixed_reg_en_vbrtr_supply[] = {
514         REGULATOR_SUPPLY("vdd_vbrtr", NULL),
515 };
516
517
518 /* EN_USB1_VBUS_OC*/
519 static struct regulator_consumer_supply fixed_reg_en_usb1_vbus_oc_supply[] = {
520         REGULATOR_SUPPLY("vdd_vbus_micro_usb", NULL),
521 };
522
523 /*EN_USB3_VBUS_OC*/
524 static struct regulator_consumer_supply fixed_reg_en_usb3_vbus_oc_supply[] = {
525         REGULATOR_SUPPLY("vdd_vbus_typea_usb", NULL),
526 };
527
528 /* EN_VDDIO_VID_OC from AP GPIO VI_PCLK T00*/
529 static struct regulator_consumer_supply fixed_reg_en_vddio_vid_oc_supply[] = {
530         REGULATOR_SUPPLY("vdd_hdmi_con", NULL),
531 };
532
533 /* Macro for defining fixed regulator sub device data */
534 #define FIXED_SUPPLY(_name) "fixed_reg_"#_name
535 #define FIXED_REG_OD(_id, _var, _name, _in_supply, _always_on, _boot_on,      \
536                  _gpio_nr, _active_high, _boot_state, _millivolts, _od_state) \
537         static struct regulator_init_data ri_data_##_var =              \
538         {                                                               \
539                 .supply_regulator = _in_supply,                         \
540                 .num_consumer_supplies =                                \
541                         ARRAY_SIZE(fixed_reg_##_name##_supply),         \
542                 .consumer_supplies = fixed_reg_##_name##_supply,        \
543                 .constraints = {                                        \
544                         .valid_modes_mask = (REGULATOR_MODE_NORMAL |    \
545                                         REGULATOR_MODE_STANDBY),        \
546                         .valid_ops_mask = (REGULATOR_CHANGE_MODE |      \
547                                         REGULATOR_CHANGE_STATUS |       \
548                                         REGULATOR_CHANGE_VOLTAGE),      \
549                         .always_on = _always_on,                        \
550                         .boot_on = _boot_on,                            \
551                 },                                                      \
552         };                                                              \
553         static struct fixed_voltage_config fixed_reg_##_var##_pdata =   \
554         {                                                               \
555                 .supply_name = FIXED_SUPPLY(_name),                     \
556                 .microvolts = _millivolts * 1000,                       \
557                 .gpio = _gpio_nr,                                       \
558                 .enable_high = _active_high,                            \
559                 .enabled_at_boot = _boot_state,                         \
560                 .init_data = &ri_data_##_var,                           \
561                 .gpio_is_open_drain = _od_state,                        \
562         };                                                              \
563         static struct platform_device fixed_reg_##_var##_dev = {        \
564                 .name   = "reg-fixed-voltage",                          \
565                 .id     = _id,                                          \
566                 .dev    = {                                             \
567                         .platform_data = &fixed_reg_##_var##_pdata,     \
568                 },                                                      \
569         }
570
571 #define FIXED_REG(_id, _var, _name, _in_supply, _always_on, _boot_on,   \
572                  _gpio_nr, _active_high, _boot_state, _millivolts)      \
573         FIXED_REG_OD(_id, _var, _name, _in_supply, _always_on, _boot_on,  \
574                  _gpio_nr, _active_high, _boot_state, _millivolts, false) \
575
576 /* common to most of boards*/
577 FIXED_REG(0, en_track_ldo2,     en_track_ldo2,  NULL,                           0,      0,      MAX77663_GPIO_BASE + MAX77663_GPIO0,    true,   0, 3300);
578 FIXED_REG(1, en_5v0,            en_5v0,         NULL,                           1,      0,      MAX77663_GPIO_BASE + MAX77663_GPIO2,    true,   1, 5000);
579 FIXED_REG(2, en_ddr,            en_ddr,         NULL,                           1,      0,      MAX77663_GPIO_BASE + MAX77663_GPIO3,    true,   1, 1500);
580 FIXED_REG(3, en_3v3_sys,        en_3v3_sys,     NULL,                           1,      0,      MAX77663_GPIO_BASE + MAX77663_GPIO1,    true,   1, 3300);
581 FIXED_REG(4, en_vdd_bl,         en_vdd_bl,      NULL,                           0,      0,      TEGRA_GPIO_PK3,         true,   1, 5000);
582 FIXED_REG(5, en_3v3_modem,      en_3v3_modem,   NULL,                           1,      0,      TEGRA_GPIO_PD6,         true,   1, 3300);
583 FIXED_REG(6, en_vdd_pnl1,       en_vdd_pnl1,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PL4,         true,   1, 3300);
584 FIXED_REG(7, cam3_ldo_en,       cam3_ldo_en,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PS0,         true,   0, 3300);
585 FIXED_REG(8, en_vdd_com,        en_vdd_com,     FIXED_SUPPLY(en_3v3_sys),       1,      0,      TEGRA_GPIO_PD0,         true,   1, 3300);
586 FIXED_REG(9, en_3v3_fuse,       en_3v3_fuse,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PL6,         true,   0, 3300);
587 FIXED_REG(10, en_3v3_emmc,      en_3v3_emmc,    FIXED_SUPPLY(en_3v3_sys),       1,      0,      TEGRA_GPIO_PD1,         true,   1, 3300);
588 FIXED_REG(11, en_vdd_sdmmc1,    en_vdd_sdmmc1,  FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PD7,         true,   1, 3300);
589 FIXED_REG(12, en_3v3_pex_hvdd,  en_3v3_pex_hvdd, FIXED_SUPPLY(en_3v3_sys),      0,      0,      TEGRA_GPIO_PL7,         true,   0, 3300);
590 FIXED_REG(13, en_1v8_cam,       en_1v8_cam,     max77663_rails(sd2),            0,      0,      TEGRA_GPIO_PBB4,        true,   0, 1800);
591
592 /*Specific to pm269*/
593 FIXED_REG(4, en_vdd_bl_pm269,           en_vdd_bl,              NULL,                           0,      0,      TEGRA_GPIO_PH3, true,   1, 5000);
594 FIXED_REG(6, en_vdd_pnl1_pm269,         en_vdd_pnl1,            FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PW1, true,   0, 3300);
595 FIXED_REG(9, en_3v3_fuse_pm269,         en_3v3_fuse,            FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PC1, true,   0, 3300);
596 FIXED_REG(12, en_3v3_pex_hvdd_pm269,    en_3v3_pex_hvdd,        FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PC6, true,   0, 3300);
597
598 /* Specific to E1187/E1186/E1256 */
599 FIXED_REG(14, dis_5v_switch_e118x,      dis_5v_switch,          FIXED_SUPPLY(en_5v0), 0,      0,      TEGRA_GPIO_PX2,           false,  0, 5000);
600
601 /* E1198/E1291 specific*/
602 FIXED_REG(18, cam1_ldo_en,      cam1_ldo_en,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PR6,         true,   0, 2800);
603 FIXED_REG(19, cam2_ldo_en,      cam2_ldo_en,    FIXED_SUPPLY(en_3v3_sys),       0,      0,      TEGRA_GPIO_PR7,         true,   0, 2800);
604 FIXED_REG(22, en_vbrtr,         en_vbrtr,       FIXED_SUPPLY(en_3v3_sys),       0,      0,      PMU_TCA6416_GPIO_PORT12,        true,   0, 3300);
605
606 /**** Open collector Load switches ****/
607 /*Specific to pm269*/
608 FIXED_REG_OD(17, en_vddio_vid_oc_pm269, en_vddio_vid_oc,        FIXED_SUPPLY(dis_5v_switch), 0,      0,      TEGRA_GPIO_PP2,    true,   0, 5000, true);
609
610 /* Specific to E1187/E1186/E1256 */
611 FIXED_REG_OD(15, en_usb1_vbus_oc_e118x, en_usb1_vbus_oc,        FIXED_SUPPLY(dis_5v_switch), 0,      0,      TEGRA_GPIO_PI4,    true,   0, 5000, true);
612 FIXED_REG_OD(16, en_usb3_vbus_oc_e118x, en_usb3_vbus_oc,        FIXED_SUPPLY(dis_5v_switch), 0,      0,      TEGRA_GPIO_PH7,    true,   0, 5000, true);
613 FIXED_REG_OD(17, en_vddio_vid_oc_e118x, en_vddio_vid_oc,        FIXED_SUPPLY(dis_5v_switch), 0,      0,      TEGRA_GPIO_PT0,    true,   0, 5000, true);
614
615 /*
616  * Creating the fixed/gpio-switch regulator device tables for different boards
617  */
618 #define ADD_FIXED_REG(_name)    (&fixed_reg_##_name##_dev)
619
620 #define COMMON_FIXED_REG \
621         ADD_FIXED_REG(en_track_ldo2),           \
622         ADD_FIXED_REG(en_5v0),                  \
623         ADD_FIXED_REG(en_ddr),                  \
624         ADD_FIXED_REG(en_3v3_sys),              \
625         ADD_FIXED_REG(en_3v3_modem),            \
626         ADD_FIXED_REG(en_vdd_pnl1),             \
627         ADD_FIXED_REG(cam1_ldo_en),             \
628         ADD_FIXED_REG(cam2_ldo_en),             \
629         ADD_FIXED_REG(cam3_ldo_en),             \
630         ADD_FIXED_REG(en_vdd_com),              \
631         ADD_FIXED_REG(en_3v3_fuse),             \
632         ADD_FIXED_REG(en_3v3_emmc),             \
633         ADD_FIXED_REG(en_vdd_sdmmc1),           \
634         ADD_FIXED_REG(en_3v3_pex_hvdd),         \
635         ADD_FIXED_REG(en_1v8_cam),
636
637 #define PM269_FIXED_REG \
638         ADD_FIXED_REG(en_track_ldo2),           \
639         ADD_FIXED_REG(en_5v0),                  \
640         ADD_FIXED_REG(en_ddr),                  \
641         ADD_FIXED_REG(en_vdd_bl_pm269),         \
642         ADD_FIXED_REG(en_3v3_sys),              \
643         ADD_FIXED_REG(en_3v3_modem),            \
644         ADD_FIXED_REG(en_vdd_pnl1_pm269),       \
645         ADD_FIXED_REG(cam1_ldo_en),             \
646         ADD_FIXED_REG(cam2_ldo_en),             \
647         ADD_FIXED_REG(cam3_ldo_en),             \
648         ADD_FIXED_REG(en_vdd_com),              \
649         ADD_FIXED_REG(en_3v3_fuse_pm269),       \
650         ADD_FIXED_REG(en_3v3_emmc),             \
651         ADD_FIXED_REG(en_3v3_pex_hvdd_pm269),   \
652         ADD_FIXED_REG(en_1v8_cam),              \
653         ADD_FIXED_REG(dis_5v_switch_e118x),     \
654         ADD_FIXED_REG(en_usb1_vbus_oc_e118x),   \
655         ADD_FIXED_REG(en_usb3_vbus_oc_e118x),   \
656         ADD_FIXED_REG(en_vddio_vid_oc_pm269),
657
658 #define E118x_FIXED_REG \
659         ADD_FIXED_REG(en_vdd_bl),               \
660         ADD_FIXED_REG(dis_5v_switch_e118x),     \
661         ADD_FIXED_REG(en_vbrtr),                \
662         ADD_FIXED_REG(en_usb1_vbus_oc_e118x),   \
663         ADD_FIXED_REG(en_usb3_vbus_oc_e118x),   \
664         ADD_FIXED_REG(en_vddio_vid_oc_e118x),   \
665
666 /* Gpio switch regulator platform data  for E1186/E1187/E1256*/
667 static struct platform_device *fixed_reg_devs_e118x[] = {
668         COMMON_FIXED_REG
669         E118x_FIXED_REG
670 };
671
672 /* Gpio switch regulator platform data for PM269*/
673 static struct platform_device *fixed_reg_devs_pm269[] = {
674         PM269_FIXED_REG
675 };
676
677 int __init cardhu_pm298_gpio_switch_regulator_init(void)
678 {
679         int i;
680         struct board_info board_info;
681         struct platform_device **fixed_reg_devs;
682         int    nfixreg_devs;
683
684         tegra_get_board_info(&board_info);
685
686         switch (board_info.board_id) {
687         case BOARD_PM269:
688         case BOARD_PM305:
689         case BOARD_PM311:
690         case BOARD_E1257:
691                 nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_pm269);
692                 fixed_reg_devs = fixed_reg_devs_pm269;
693                 break;
694
695         default:
696                 nfixreg_devs = ARRAY_SIZE(fixed_reg_devs_e118x);
697                 fixed_reg_devs = fixed_reg_devs_e118x;
698                 break;
699         }
700
701         return platform_add_devices(fixed_reg_devs, nfixreg_devs);
702 }